sp805_wdt.c 7.8 KB

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  1. /*
  2. * drivers/char/watchdog/sp805-wdt.c
  3. *
  4. * Watchdog driver for ARM SP805 watchdog module
  5. *
  6. * Copyright (C) 2010 ST Microelectronics
  7. * Viresh Kumar<viresh.kumar@st.com>
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2 or later. This program is licensed "as is" without any
  11. * warranty of any kind, whether express or implied.
  12. */
  13. #include <linux/device.h>
  14. #include <linux/resource.h>
  15. #include <linux/amba/bus.h>
  16. #include <linux/bitops.h>
  17. #include <linux/clk.h>
  18. #include <linux/init.h>
  19. #include <linux/io.h>
  20. #include <linux/ioport.h>
  21. #include <linux/kernel.h>
  22. #include <linux/math64.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/pm.h>
  26. #include <linux/slab.h>
  27. #include <linux/spinlock.h>
  28. #include <linux/types.h>
  29. #include <linux/watchdog.h>
  30. /* default timeout in seconds */
  31. #define DEFAULT_TIMEOUT 60
  32. #define MODULE_NAME "sp805-wdt"
  33. /* watchdog register offsets and masks */
  34. #define WDTLOAD 0x000
  35. #define LOAD_MIN 0x00000001
  36. #define LOAD_MAX 0xFFFFFFFF
  37. #define WDTVALUE 0x004
  38. #define WDTCONTROL 0x008
  39. /* control register masks */
  40. #define INT_ENABLE (1 << 0)
  41. #define RESET_ENABLE (1 << 1)
  42. #define WDTINTCLR 0x00C
  43. #define WDTRIS 0x010
  44. #define WDTMIS 0x014
  45. #define INT_MASK (1 << 0)
  46. #define WDTLOCK 0xC00
  47. #define UNLOCK 0x1ACCE551
  48. #define LOCK 0x00000001
  49. /**
  50. * struct sp805_wdt: sp805 wdt device structure
  51. * @wdd: instance of struct watchdog_device
  52. * @lock: spin lock protecting dev structure and io access
  53. * @base: base address of wdt
  54. * @clk: clock structure of wdt
  55. * @adev: amba device structure of wdt
  56. * @status: current status of wdt
  57. * @load_val: load value to be set for current timeout
  58. * @timeout: current programmed timeout
  59. */
  60. struct sp805_wdt {
  61. struct watchdog_device wdd;
  62. spinlock_t lock;
  63. void __iomem *base;
  64. struct clk *clk;
  65. struct amba_device *adev;
  66. unsigned int load_val;
  67. unsigned int timeout;
  68. };
  69. static bool nowayout = WATCHDOG_NOWAYOUT;
  70. module_param(nowayout, bool, 0);
  71. MODULE_PARM_DESC(nowayout,
  72. "Set to 1 to keep watchdog running after device release");
  73. /* This routine finds load value that will reset system in required timout */
  74. static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
  75. {
  76. struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
  77. u64 load, rate;
  78. rate = clk_get_rate(wdt->clk);
  79. /*
  80. * sp805 runs counter with given value twice, after the end of first
  81. * counter it gives an interrupt and then starts counter again. If
  82. * interrupt already occurred then it resets the system. This is why
  83. * load is half of what should be required.
  84. */
  85. load = div_u64(rate, 2) * timeout - 1;
  86. load = (load > LOAD_MAX) ? LOAD_MAX : load;
  87. load = (load < LOAD_MIN) ? LOAD_MIN : load;
  88. spin_lock(&wdt->lock);
  89. wdt->load_val = load;
  90. /* roundup timeout to closest positive integer value */
  91. wdt->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
  92. spin_unlock(&wdt->lock);
  93. return 0;
  94. }
  95. /* returns number of seconds left for reset to occur */
  96. static unsigned int wdt_timeleft(struct watchdog_device *wdd)
  97. {
  98. struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
  99. u64 load, rate;
  100. rate = clk_get_rate(wdt->clk);
  101. spin_lock(&wdt->lock);
  102. load = readl_relaxed(wdt->base + WDTVALUE);
  103. /*If the interrupt is inactive then time left is WDTValue + WDTLoad. */
  104. if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK))
  105. load += wdt->load_val + 1;
  106. spin_unlock(&wdt->lock);
  107. return div_u64(load, rate);
  108. }
  109. static int wdt_config(struct watchdog_device *wdd, bool ping)
  110. {
  111. struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
  112. int ret;
  113. if (!ping) {
  114. ret = clk_prepare(wdt->clk);
  115. if (ret) {
  116. dev_err(&wdt->adev->dev, "clock prepare fail");
  117. return ret;
  118. }
  119. ret = clk_enable(wdt->clk);
  120. if (ret) {
  121. dev_err(&wdt->adev->dev, "clock enable fail");
  122. clk_unprepare(wdt->clk);
  123. return ret;
  124. }
  125. }
  126. spin_lock(&wdt->lock);
  127. writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
  128. writel_relaxed(wdt->load_val, wdt->base + WDTLOAD);
  129. if (!ping) {
  130. writel_relaxed(INT_MASK, wdt->base + WDTINTCLR);
  131. writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base +
  132. WDTCONTROL);
  133. }
  134. writel_relaxed(LOCK, wdt->base + WDTLOCK);
  135. /* Flush posted writes. */
  136. readl_relaxed(wdt->base + WDTLOCK);
  137. spin_unlock(&wdt->lock);
  138. return 0;
  139. }
  140. static int wdt_ping(struct watchdog_device *wdd)
  141. {
  142. return wdt_config(wdd, true);
  143. }
  144. /* enables watchdog timers reset */
  145. static int wdt_enable(struct watchdog_device *wdd)
  146. {
  147. return wdt_config(wdd, false);
  148. }
  149. /* disables watchdog timers reset */
  150. static int wdt_disable(struct watchdog_device *wdd)
  151. {
  152. struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
  153. spin_lock(&wdt->lock);
  154. writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
  155. writel_relaxed(0, wdt->base + WDTCONTROL);
  156. writel_relaxed(LOCK, wdt->base + WDTLOCK);
  157. /* Flush posted writes. */
  158. readl_relaxed(wdt->base + WDTLOCK);
  159. spin_unlock(&wdt->lock);
  160. clk_disable(wdt->clk);
  161. clk_unprepare(wdt->clk);
  162. return 0;
  163. }
  164. static const struct watchdog_info wdt_info = {
  165. .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
  166. .identity = MODULE_NAME,
  167. };
  168. static const struct watchdog_ops wdt_ops = {
  169. .owner = THIS_MODULE,
  170. .start = wdt_enable,
  171. .stop = wdt_disable,
  172. .ping = wdt_ping,
  173. .set_timeout = wdt_setload,
  174. .get_timeleft = wdt_timeleft,
  175. };
  176. static int __devinit
  177. sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
  178. {
  179. struct sp805_wdt *wdt;
  180. int ret = 0;
  181. if (!devm_request_mem_region(&adev->dev, adev->res.start,
  182. resource_size(&adev->res), "sp805_wdt")) {
  183. dev_warn(&adev->dev, "Failed to get memory region resource\n");
  184. ret = -ENOENT;
  185. goto err;
  186. }
  187. wdt = devm_kzalloc(&adev->dev, sizeof(*wdt), GFP_KERNEL);
  188. if (!wdt) {
  189. dev_warn(&adev->dev, "Kzalloc failed\n");
  190. ret = -ENOMEM;
  191. goto err;
  192. }
  193. wdt->base = devm_ioremap(&adev->dev, adev->res.start,
  194. resource_size(&adev->res));
  195. if (!wdt->base) {
  196. ret = -ENOMEM;
  197. dev_warn(&adev->dev, "ioremap fail\n");
  198. goto err;
  199. }
  200. wdt->clk = clk_get(&adev->dev, NULL);
  201. if (IS_ERR(wdt->clk)) {
  202. dev_warn(&adev->dev, "Clock not found\n");
  203. ret = PTR_ERR(wdt->clk);
  204. goto err;
  205. }
  206. wdt->adev = adev;
  207. wdt->wdd.info = &wdt_info;
  208. wdt->wdd.ops = &wdt_ops;
  209. spin_lock_init(&wdt->lock);
  210. watchdog_set_nowayout(&wdt->wdd, nowayout);
  211. watchdog_set_drvdata(&wdt->wdd, wdt);
  212. wdt_setload(&wdt->wdd, DEFAULT_TIMEOUT);
  213. ret = watchdog_register_device(&wdt->wdd);
  214. if (ret) {
  215. dev_err(&adev->dev, "watchdog_register_device() failed: %d\n",
  216. ret);
  217. goto err_register;
  218. }
  219. amba_set_drvdata(adev, wdt);
  220. dev_info(&adev->dev, "registration successful\n");
  221. return 0;
  222. err_register:
  223. clk_put(wdt->clk);
  224. err:
  225. dev_err(&adev->dev, "Probe Failed!!!\n");
  226. return ret;
  227. }
  228. static int __devexit sp805_wdt_remove(struct amba_device *adev)
  229. {
  230. struct sp805_wdt *wdt = amba_get_drvdata(adev);
  231. watchdog_unregister_device(&wdt->wdd);
  232. amba_set_drvdata(adev, NULL);
  233. watchdog_set_drvdata(&wdt->wdd, NULL);
  234. clk_put(wdt->clk);
  235. return 0;
  236. }
  237. #ifdef CONFIG_PM
  238. static int sp805_wdt_suspend(struct device *dev)
  239. {
  240. struct sp805_wdt *wdt = dev_get_drvdata(dev);
  241. if (watchdog_active(&wdt->wdd))
  242. return wdt_disable(&wdt->wdd);
  243. return 0;
  244. }
  245. static int sp805_wdt_resume(struct device *dev)
  246. {
  247. struct sp805_wdt *wdt = dev_get_drvdata(dev);
  248. if (watchdog_active(&wdt->wdd))
  249. return wdt_enable(&wdt->wdd);
  250. return 0;
  251. }
  252. #endif /* CONFIG_PM */
  253. static SIMPLE_DEV_PM_OPS(sp805_wdt_dev_pm_ops, sp805_wdt_suspend,
  254. sp805_wdt_resume);
  255. static struct amba_id sp805_wdt_ids[] = {
  256. {
  257. .id = 0x00141805,
  258. .mask = 0x00ffffff,
  259. },
  260. { 0, 0 },
  261. };
  262. MODULE_DEVICE_TABLE(amba, sp805_wdt_ids);
  263. static struct amba_driver sp805_wdt_driver = {
  264. .drv = {
  265. .name = MODULE_NAME,
  266. .pm = &sp805_wdt_dev_pm_ops,
  267. },
  268. .id_table = sp805_wdt_ids,
  269. .probe = sp805_wdt_probe,
  270. .remove = __devexit_p(sp805_wdt_remove),
  271. };
  272. module_amba_driver(sp805_wdt_driver);
  273. MODULE_AUTHOR("Viresh Kumar <viresh.kumar@st.com>");
  274. MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
  275. MODULE_LICENSE("GPL");