dss_features.c 21 KB

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  1. /*
  2. * linux/drivers/video/omap2/dss/dss_features.c
  3. *
  4. * Copyright (C) 2010 Texas Instruments
  5. * Author: Archit Taneja <archit@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/types.h>
  21. #include <linux/err.h>
  22. #include <linux/slab.h>
  23. #include <video/omapdss.h>
  24. #include <plat/cpu.h>
  25. #include "dss.h"
  26. #include "dss_features.h"
  27. /* Defines a generic omap register field */
  28. struct dss_reg_field {
  29. u8 start, end;
  30. };
  31. struct dss_param_range {
  32. int min, max;
  33. };
  34. struct omap_dss_features {
  35. const struct dss_reg_field *reg_fields;
  36. const int num_reg_fields;
  37. const enum dss_feat_id *features;
  38. const int num_features;
  39. const int num_mgrs;
  40. const int num_ovls;
  41. const enum omap_display_type *supported_displays;
  42. const enum omap_color_mode *supported_color_modes;
  43. const enum omap_overlay_caps *overlay_caps;
  44. const char * const *clksrc_names;
  45. const struct dss_param_range *dss_params;
  46. const enum omap_dss_rotation_type supported_rotation_types;
  47. const u32 buffer_size_unit;
  48. const u32 burst_size_unit;
  49. };
  50. /* This struct is assigned to one of the below during initialization */
  51. static const struct omap_dss_features *omap_current_dss_features;
  52. static const struct dss_reg_field omap2_dss_reg_fields[] = {
  53. [FEAT_REG_FIRHINC] = { 11, 0 },
  54. [FEAT_REG_FIRVINC] = { 27, 16 },
  55. [FEAT_REG_FIFOLOWTHRESHOLD] = { 8, 0 },
  56. [FEAT_REG_FIFOHIGHTHRESHOLD] = { 24, 16 },
  57. [FEAT_REG_FIFOSIZE] = { 8, 0 },
  58. [FEAT_REG_HORIZONTALACCU] = { 9, 0 },
  59. [FEAT_REG_VERTICALACCU] = { 25, 16 },
  60. [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
  61. [FEAT_REG_DSIPLL_REGN] = { 0, 0 },
  62. [FEAT_REG_DSIPLL_REGM] = { 0, 0 },
  63. [FEAT_REG_DSIPLL_REGM_DISPC] = { 0, 0 },
  64. [FEAT_REG_DSIPLL_REGM_DSI] = { 0, 0 },
  65. };
  66. static const struct dss_reg_field omap3_dss_reg_fields[] = {
  67. [FEAT_REG_FIRHINC] = { 12, 0 },
  68. [FEAT_REG_FIRVINC] = { 28, 16 },
  69. [FEAT_REG_FIFOLOWTHRESHOLD] = { 11, 0 },
  70. [FEAT_REG_FIFOHIGHTHRESHOLD] = { 27, 16 },
  71. [FEAT_REG_FIFOSIZE] = { 10, 0 },
  72. [FEAT_REG_HORIZONTALACCU] = { 9, 0 },
  73. [FEAT_REG_VERTICALACCU] = { 25, 16 },
  74. [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
  75. [FEAT_REG_DSIPLL_REGN] = { 7, 1 },
  76. [FEAT_REG_DSIPLL_REGM] = { 18, 8 },
  77. [FEAT_REG_DSIPLL_REGM_DISPC] = { 22, 19 },
  78. [FEAT_REG_DSIPLL_REGM_DSI] = { 26, 23 },
  79. };
  80. static const struct dss_reg_field omap4_dss_reg_fields[] = {
  81. [FEAT_REG_FIRHINC] = { 12, 0 },
  82. [FEAT_REG_FIRVINC] = { 28, 16 },
  83. [FEAT_REG_FIFOLOWTHRESHOLD] = { 15, 0 },
  84. [FEAT_REG_FIFOHIGHTHRESHOLD] = { 31, 16 },
  85. [FEAT_REG_FIFOSIZE] = { 15, 0 },
  86. [FEAT_REG_HORIZONTALACCU] = { 10, 0 },
  87. [FEAT_REG_VERTICALACCU] = { 26, 16 },
  88. [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 8 },
  89. [FEAT_REG_DSIPLL_REGN] = { 8, 1 },
  90. [FEAT_REG_DSIPLL_REGM] = { 20, 9 },
  91. [FEAT_REG_DSIPLL_REGM_DISPC] = { 25, 21 },
  92. [FEAT_REG_DSIPLL_REGM_DSI] = { 30, 26 },
  93. };
  94. static const enum omap_display_type omap2_dss_supported_displays[] = {
  95. /* OMAP_DSS_CHANNEL_LCD */
  96. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI,
  97. /* OMAP_DSS_CHANNEL_DIGIT */
  98. OMAP_DISPLAY_TYPE_VENC,
  99. };
  100. static const enum omap_display_type omap3430_dss_supported_displays[] = {
  101. /* OMAP_DSS_CHANNEL_LCD */
  102. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
  103. OMAP_DISPLAY_TYPE_SDI | OMAP_DISPLAY_TYPE_DSI,
  104. /* OMAP_DSS_CHANNEL_DIGIT */
  105. OMAP_DISPLAY_TYPE_VENC,
  106. };
  107. static const enum omap_display_type omap3630_dss_supported_displays[] = {
  108. /* OMAP_DSS_CHANNEL_LCD */
  109. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
  110. OMAP_DISPLAY_TYPE_DSI,
  111. /* OMAP_DSS_CHANNEL_DIGIT */
  112. OMAP_DISPLAY_TYPE_VENC,
  113. };
  114. static const enum omap_display_type omap4_dss_supported_displays[] = {
  115. /* OMAP_DSS_CHANNEL_LCD */
  116. OMAP_DISPLAY_TYPE_DBI | OMAP_DISPLAY_TYPE_DSI,
  117. /* OMAP_DSS_CHANNEL_DIGIT */
  118. OMAP_DISPLAY_TYPE_VENC | OMAP_DISPLAY_TYPE_HDMI,
  119. /* OMAP_DSS_CHANNEL_LCD2 */
  120. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
  121. OMAP_DISPLAY_TYPE_DSI,
  122. };
  123. static const enum omap_color_mode omap2_dss_supported_color_modes[] = {
  124. /* OMAP_DSS_GFX */
  125. OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
  126. OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
  127. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
  128. OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
  129. /* OMAP_DSS_VIDEO1 */
  130. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  131. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
  132. OMAP_DSS_COLOR_UYVY,
  133. /* OMAP_DSS_VIDEO2 */
  134. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  135. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
  136. OMAP_DSS_COLOR_UYVY,
  137. };
  138. static const enum omap_color_mode omap3_dss_supported_color_modes[] = {
  139. /* OMAP_DSS_GFX */
  140. OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
  141. OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
  142. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
  143. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  144. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
  145. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
  146. /* OMAP_DSS_VIDEO1 */
  147. OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
  148. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
  149. OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
  150. /* OMAP_DSS_VIDEO2 */
  151. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
  152. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  153. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
  154. OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
  155. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
  156. };
  157. static const enum omap_color_mode omap4_dss_supported_color_modes[] = {
  158. /* OMAP_DSS_GFX */
  159. OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
  160. OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
  161. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
  162. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  163. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
  164. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32 |
  165. OMAP_DSS_COLOR_ARGB16_1555 | OMAP_DSS_COLOR_RGBX16 |
  166. OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_XRGB16_1555,
  167. /* OMAP_DSS_VIDEO1 */
  168. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
  169. OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
  170. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
  171. OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
  172. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
  173. OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
  174. OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
  175. OMAP_DSS_COLOR_RGBX32,
  176. /* OMAP_DSS_VIDEO2 */
  177. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
  178. OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
  179. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
  180. OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
  181. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
  182. OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
  183. OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
  184. OMAP_DSS_COLOR_RGBX32,
  185. /* OMAP_DSS_VIDEO3 */
  186. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
  187. OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
  188. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
  189. OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
  190. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
  191. OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
  192. OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
  193. OMAP_DSS_COLOR_RGBX32,
  194. };
  195. static const enum omap_overlay_caps omap2_dss_overlay_caps[] = {
  196. /* OMAP_DSS_GFX */
  197. 0,
  198. /* OMAP_DSS_VIDEO1 */
  199. OMAP_DSS_OVL_CAP_SCALE,
  200. /* OMAP_DSS_VIDEO2 */
  201. OMAP_DSS_OVL_CAP_SCALE,
  202. };
  203. static const enum omap_overlay_caps omap3430_dss_overlay_caps[] = {
  204. /* OMAP_DSS_GFX */
  205. OMAP_DSS_OVL_CAP_GLOBAL_ALPHA,
  206. /* OMAP_DSS_VIDEO1 */
  207. OMAP_DSS_OVL_CAP_SCALE,
  208. /* OMAP_DSS_VIDEO2 */
  209. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA,
  210. };
  211. static const enum omap_overlay_caps omap3630_dss_overlay_caps[] = {
  212. /* OMAP_DSS_GFX */
  213. OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA,
  214. /* OMAP_DSS_VIDEO1 */
  215. OMAP_DSS_OVL_CAP_SCALE,
  216. /* OMAP_DSS_VIDEO2 */
  217. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
  218. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA,
  219. };
  220. static const enum omap_overlay_caps omap4_dss_overlay_caps[] = {
  221. /* OMAP_DSS_GFX */
  222. OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA |
  223. OMAP_DSS_OVL_CAP_ZORDER,
  224. /* OMAP_DSS_VIDEO1 */
  225. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
  226. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER,
  227. /* OMAP_DSS_VIDEO2 */
  228. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
  229. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER,
  230. /* OMAP_DSS_VIDEO3 */
  231. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
  232. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER,
  233. };
  234. static const char * const omap2_dss_clk_source_names[] = {
  235. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "N/A",
  236. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "N/A",
  237. [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK1",
  238. };
  239. static const char * const omap3_dss_clk_source_names[] = {
  240. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DSI1_PLL_FCLK",
  241. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DSI2_PLL_FCLK",
  242. [OMAP_DSS_CLK_SRC_FCK] = "DSS1_ALWON_FCLK",
  243. };
  244. static const char * const omap4_dss_clk_source_names[] = {
  245. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "PLL1_CLK1",
  246. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "PLL1_CLK2",
  247. [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK",
  248. [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "PLL2_CLK1",
  249. [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI] = "PLL2_CLK2",
  250. };
  251. static const struct dss_param_range omap2_dss_param_range[] = {
  252. [FEAT_PARAM_DSS_FCK] = { 0, 173000000 },
  253. [FEAT_PARAM_DSS_PCD] = { 2, 255 },
  254. [FEAT_PARAM_DSIPLL_REGN] = { 0, 0 },
  255. [FEAT_PARAM_DSIPLL_REGM] = { 0, 0 },
  256. [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, 0 },
  257. [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, 0 },
  258. [FEAT_PARAM_DSIPLL_FINT] = { 0, 0 },
  259. [FEAT_PARAM_DSIPLL_LPDIV] = { 0, 0 },
  260. [FEAT_PARAM_DOWNSCALE] = { 1, 2 },
  261. /*
  262. * Assuming the line width buffer to be 768 pixels as OMAP2 DISPC
  263. * scaler cannot scale a image with width more than 768.
  264. */
  265. [FEAT_PARAM_LINEWIDTH] = { 1, 768 },
  266. [FEAT_PARAM_MGR_WIDTH] = { 1, 2048 },
  267. [FEAT_PARAM_MGR_HEIGHT] = { 1, 2048 },
  268. };
  269. static const struct dss_param_range omap3_dss_param_range[] = {
  270. [FEAT_PARAM_DSS_FCK] = { 0, 173000000 },
  271. [FEAT_PARAM_DSS_PCD] = { 1, 255 },
  272. [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 7) - 1 },
  273. [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 11) - 1 },
  274. [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 4) - 1 },
  275. [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 4) - 1 },
  276. [FEAT_PARAM_DSIPLL_FINT] = { 750000, 2100000 },
  277. [FEAT_PARAM_DSIPLL_LPDIV] = { 1, (1 << 13) - 1},
  278. [FEAT_PARAM_DOWNSCALE] = { 1, 4 },
  279. [FEAT_PARAM_LINEWIDTH] = { 1, 1024 },
  280. [FEAT_PARAM_MGR_WIDTH] = { 1, 2048 },
  281. [FEAT_PARAM_MGR_HEIGHT] = { 1, 2048 },
  282. };
  283. static const struct dss_param_range omap4_dss_param_range[] = {
  284. [FEAT_PARAM_DSS_FCK] = { 0, 186000000 },
  285. [FEAT_PARAM_DSS_PCD] = { 1, 255 },
  286. [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 8) - 1 },
  287. [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 12) - 1 },
  288. [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 5) - 1 },
  289. [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 5) - 1 },
  290. [FEAT_PARAM_DSIPLL_FINT] = { 500000, 2500000 },
  291. [FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 },
  292. [FEAT_PARAM_DOWNSCALE] = { 1, 4 },
  293. [FEAT_PARAM_LINEWIDTH] = { 1, 2048 },
  294. [FEAT_PARAM_MGR_WIDTH] = { 1, 2048 },
  295. [FEAT_PARAM_MGR_HEIGHT] = { 1, 2048 },
  296. };
  297. static const enum dss_feat_id omap2_dss_feat_list[] = {
  298. FEAT_LCDENABLEPOL,
  299. FEAT_LCDENABLESIGNAL,
  300. FEAT_PCKFREEENABLE,
  301. FEAT_FUNCGATED,
  302. FEAT_ROWREPEATENABLE,
  303. FEAT_RESIZECONF,
  304. };
  305. static const enum dss_feat_id omap3430_dss_feat_list[] = {
  306. FEAT_LCDENABLEPOL,
  307. FEAT_LCDENABLESIGNAL,
  308. FEAT_PCKFREEENABLE,
  309. FEAT_FUNCGATED,
  310. FEAT_LINEBUFFERSPLIT,
  311. FEAT_ROWREPEATENABLE,
  312. FEAT_RESIZECONF,
  313. FEAT_DSI_PLL_FREQSEL,
  314. FEAT_DSI_REVERSE_TXCLKESC,
  315. FEAT_VENC_REQUIRES_TV_DAC_CLK,
  316. FEAT_CPR,
  317. FEAT_PRELOAD,
  318. FEAT_FIR_COEF_V,
  319. FEAT_ALPHA_FIXED_ZORDER,
  320. FEAT_FIFO_MERGE,
  321. FEAT_OMAP3_DSI_FIFO_BUG,
  322. };
  323. static const enum dss_feat_id omap3630_dss_feat_list[] = {
  324. FEAT_LCDENABLEPOL,
  325. FEAT_LCDENABLESIGNAL,
  326. FEAT_PCKFREEENABLE,
  327. FEAT_FUNCGATED,
  328. FEAT_LINEBUFFERSPLIT,
  329. FEAT_ROWREPEATENABLE,
  330. FEAT_RESIZECONF,
  331. FEAT_DSI_PLL_PWR_BUG,
  332. FEAT_DSI_PLL_FREQSEL,
  333. FEAT_CPR,
  334. FEAT_PRELOAD,
  335. FEAT_FIR_COEF_V,
  336. FEAT_ALPHA_FIXED_ZORDER,
  337. FEAT_FIFO_MERGE,
  338. FEAT_OMAP3_DSI_FIFO_BUG,
  339. };
  340. static const enum dss_feat_id omap4430_es1_0_dss_feat_list[] = {
  341. FEAT_MGR_LCD2,
  342. FEAT_CORE_CLK_DIV,
  343. FEAT_LCD_CLK_SRC,
  344. FEAT_DSI_DCS_CMD_CONFIG_VC,
  345. FEAT_DSI_VC_OCP_WIDTH,
  346. FEAT_DSI_GNQ,
  347. FEAT_HANDLE_UV_SEPARATE,
  348. FEAT_ATTR2,
  349. FEAT_CPR,
  350. FEAT_PRELOAD,
  351. FEAT_FIR_COEF_V,
  352. FEAT_ALPHA_FREE_ZORDER,
  353. FEAT_FIFO_MERGE,
  354. FEAT_BURST_2D,
  355. };
  356. static const enum dss_feat_id omap4430_es2_0_1_2_dss_feat_list[] = {
  357. FEAT_MGR_LCD2,
  358. FEAT_CORE_CLK_DIV,
  359. FEAT_LCD_CLK_SRC,
  360. FEAT_DSI_DCS_CMD_CONFIG_VC,
  361. FEAT_DSI_VC_OCP_WIDTH,
  362. FEAT_DSI_GNQ,
  363. FEAT_HDMI_CTS_SWMODE,
  364. FEAT_HANDLE_UV_SEPARATE,
  365. FEAT_ATTR2,
  366. FEAT_CPR,
  367. FEAT_PRELOAD,
  368. FEAT_FIR_COEF_V,
  369. FEAT_ALPHA_FREE_ZORDER,
  370. FEAT_FIFO_MERGE,
  371. FEAT_BURST_2D,
  372. };
  373. static const enum dss_feat_id omap4_dss_feat_list[] = {
  374. FEAT_MGR_LCD2,
  375. FEAT_CORE_CLK_DIV,
  376. FEAT_LCD_CLK_SRC,
  377. FEAT_DSI_DCS_CMD_CONFIG_VC,
  378. FEAT_DSI_VC_OCP_WIDTH,
  379. FEAT_DSI_GNQ,
  380. FEAT_HDMI_CTS_SWMODE,
  381. FEAT_HDMI_AUDIO_USE_MCLK,
  382. FEAT_HANDLE_UV_SEPARATE,
  383. FEAT_ATTR2,
  384. FEAT_CPR,
  385. FEAT_PRELOAD,
  386. FEAT_FIR_COEF_V,
  387. FEAT_ALPHA_FREE_ZORDER,
  388. FEAT_FIFO_MERGE,
  389. FEAT_BURST_2D,
  390. };
  391. /* OMAP2 DSS Features */
  392. static const struct omap_dss_features omap2_dss_features = {
  393. .reg_fields = omap2_dss_reg_fields,
  394. .num_reg_fields = ARRAY_SIZE(omap2_dss_reg_fields),
  395. .features = omap2_dss_feat_list,
  396. .num_features = ARRAY_SIZE(omap2_dss_feat_list),
  397. .num_mgrs = 2,
  398. .num_ovls = 3,
  399. .supported_displays = omap2_dss_supported_displays,
  400. .supported_color_modes = omap2_dss_supported_color_modes,
  401. .overlay_caps = omap2_dss_overlay_caps,
  402. .clksrc_names = omap2_dss_clk_source_names,
  403. .dss_params = omap2_dss_param_range,
  404. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
  405. .buffer_size_unit = 1,
  406. .burst_size_unit = 8,
  407. };
  408. /* OMAP3 DSS Features */
  409. static const struct omap_dss_features omap3430_dss_features = {
  410. .reg_fields = omap3_dss_reg_fields,
  411. .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
  412. .features = omap3430_dss_feat_list,
  413. .num_features = ARRAY_SIZE(omap3430_dss_feat_list),
  414. .num_mgrs = 2,
  415. .num_ovls = 3,
  416. .supported_displays = omap3430_dss_supported_displays,
  417. .supported_color_modes = omap3_dss_supported_color_modes,
  418. .overlay_caps = omap3430_dss_overlay_caps,
  419. .clksrc_names = omap3_dss_clk_source_names,
  420. .dss_params = omap3_dss_param_range,
  421. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
  422. .buffer_size_unit = 1,
  423. .burst_size_unit = 8,
  424. };
  425. static const struct omap_dss_features omap3630_dss_features = {
  426. .reg_fields = omap3_dss_reg_fields,
  427. .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
  428. .features = omap3630_dss_feat_list,
  429. .num_features = ARRAY_SIZE(omap3630_dss_feat_list),
  430. .num_mgrs = 2,
  431. .num_ovls = 3,
  432. .supported_displays = omap3630_dss_supported_displays,
  433. .supported_color_modes = omap3_dss_supported_color_modes,
  434. .overlay_caps = omap3630_dss_overlay_caps,
  435. .clksrc_names = omap3_dss_clk_source_names,
  436. .dss_params = omap3_dss_param_range,
  437. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
  438. .buffer_size_unit = 1,
  439. .burst_size_unit = 8,
  440. };
  441. /* OMAP4 DSS Features */
  442. /* For OMAP4430 ES 1.0 revision */
  443. static const struct omap_dss_features omap4430_es1_0_dss_features = {
  444. .reg_fields = omap4_dss_reg_fields,
  445. .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
  446. .features = omap4430_es1_0_dss_feat_list,
  447. .num_features = ARRAY_SIZE(omap4430_es1_0_dss_feat_list),
  448. .num_mgrs = 3,
  449. .num_ovls = 4,
  450. .supported_displays = omap4_dss_supported_displays,
  451. .supported_color_modes = omap4_dss_supported_color_modes,
  452. .overlay_caps = omap4_dss_overlay_caps,
  453. .clksrc_names = omap4_dss_clk_source_names,
  454. .dss_params = omap4_dss_param_range,
  455. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
  456. .buffer_size_unit = 16,
  457. .burst_size_unit = 16,
  458. };
  459. /* For OMAP4430 ES 2.0, 2.1 and 2.2 revisions */
  460. static const struct omap_dss_features omap4430_es2_0_1_2_dss_features = {
  461. .reg_fields = omap4_dss_reg_fields,
  462. .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
  463. .features = omap4430_es2_0_1_2_dss_feat_list,
  464. .num_features = ARRAY_SIZE(omap4430_es2_0_1_2_dss_feat_list),
  465. .num_mgrs = 3,
  466. .num_ovls = 4,
  467. .supported_displays = omap4_dss_supported_displays,
  468. .supported_color_modes = omap4_dss_supported_color_modes,
  469. .overlay_caps = omap4_dss_overlay_caps,
  470. .clksrc_names = omap4_dss_clk_source_names,
  471. .dss_params = omap4_dss_param_range,
  472. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
  473. .buffer_size_unit = 16,
  474. .burst_size_unit = 16,
  475. };
  476. /* For all the other OMAP4 versions */
  477. static const struct omap_dss_features omap4_dss_features = {
  478. .reg_fields = omap4_dss_reg_fields,
  479. .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
  480. .features = omap4_dss_feat_list,
  481. .num_features = ARRAY_SIZE(omap4_dss_feat_list),
  482. .num_mgrs = 3,
  483. .num_ovls = 4,
  484. .supported_displays = omap4_dss_supported_displays,
  485. .supported_color_modes = omap4_dss_supported_color_modes,
  486. .overlay_caps = omap4_dss_overlay_caps,
  487. .clksrc_names = omap4_dss_clk_source_names,
  488. .dss_params = omap4_dss_param_range,
  489. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
  490. .buffer_size_unit = 16,
  491. .burst_size_unit = 16,
  492. };
  493. #if defined(CONFIG_OMAP4_DSS_HDMI)
  494. /* HDMI OMAP4 Functions*/
  495. static const struct ti_hdmi_ip_ops omap4_hdmi_functions = {
  496. .video_configure = ti_hdmi_4xxx_basic_configure,
  497. .phy_enable = ti_hdmi_4xxx_phy_enable,
  498. .phy_disable = ti_hdmi_4xxx_phy_disable,
  499. .read_edid = ti_hdmi_4xxx_read_edid,
  500. .detect = ti_hdmi_4xxx_detect,
  501. .pll_enable = ti_hdmi_4xxx_pll_enable,
  502. .pll_disable = ti_hdmi_4xxx_pll_disable,
  503. .video_enable = ti_hdmi_4xxx_wp_video_start,
  504. .video_disable = ti_hdmi_4xxx_wp_video_stop,
  505. .dump_wrapper = ti_hdmi_4xxx_wp_dump,
  506. .dump_core = ti_hdmi_4xxx_core_dump,
  507. .dump_pll = ti_hdmi_4xxx_pll_dump,
  508. .dump_phy = ti_hdmi_4xxx_phy_dump,
  509. #if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO)
  510. .audio_enable = ti_hdmi_4xxx_wp_audio_enable,
  511. .audio_disable = ti_hdmi_4xxx_wp_audio_disable,
  512. .audio_start = ti_hdmi_4xxx_audio_start,
  513. .audio_stop = ti_hdmi_4xxx_audio_stop,
  514. .audio_config = ti_hdmi_4xxx_audio_config,
  515. #endif
  516. };
  517. void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data)
  518. {
  519. if (cpu_is_omap44xx())
  520. ip_data->ops = &omap4_hdmi_functions;
  521. }
  522. #endif
  523. /* Functions returning values related to a DSS feature */
  524. int dss_feat_get_num_mgrs(void)
  525. {
  526. return omap_current_dss_features->num_mgrs;
  527. }
  528. int dss_feat_get_num_ovls(void)
  529. {
  530. return omap_current_dss_features->num_ovls;
  531. }
  532. unsigned long dss_feat_get_param_min(enum dss_range_param param)
  533. {
  534. return omap_current_dss_features->dss_params[param].min;
  535. }
  536. unsigned long dss_feat_get_param_max(enum dss_range_param param)
  537. {
  538. return omap_current_dss_features->dss_params[param].max;
  539. }
  540. enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel)
  541. {
  542. return omap_current_dss_features->supported_displays[channel];
  543. }
  544. enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane)
  545. {
  546. return omap_current_dss_features->supported_color_modes[plane];
  547. }
  548. enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane)
  549. {
  550. return omap_current_dss_features->overlay_caps[plane];
  551. }
  552. bool dss_feat_color_mode_supported(enum omap_plane plane,
  553. enum omap_color_mode color_mode)
  554. {
  555. return omap_current_dss_features->supported_color_modes[plane] &
  556. color_mode;
  557. }
  558. const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id)
  559. {
  560. return omap_current_dss_features->clksrc_names[id];
  561. }
  562. u32 dss_feat_get_buffer_size_unit(void)
  563. {
  564. return omap_current_dss_features->buffer_size_unit;
  565. }
  566. u32 dss_feat_get_burst_size_unit(void)
  567. {
  568. return omap_current_dss_features->burst_size_unit;
  569. }
  570. /* DSS has_feature check */
  571. bool dss_has_feature(enum dss_feat_id id)
  572. {
  573. int i;
  574. const enum dss_feat_id *features = omap_current_dss_features->features;
  575. const int num_features = omap_current_dss_features->num_features;
  576. for (i = 0; i < num_features; i++) {
  577. if (features[i] == id)
  578. return true;
  579. }
  580. return false;
  581. }
  582. void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end)
  583. {
  584. if (id >= omap_current_dss_features->num_reg_fields)
  585. BUG();
  586. *start = omap_current_dss_features->reg_fields[id].start;
  587. *end = omap_current_dss_features->reg_fields[id].end;
  588. }
  589. bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type)
  590. {
  591. return omap_current_dss_features->supported_rotation_types & rot_type;
  592. }
  593. void dss_features_init(void)
  594. {
  595. if (cpu_is_omap24xx())
  596. omap_current_dss_features = &omap2_dss_features;
  597. else if (cpu_is_omap3630())
  598. omap_current_dss_features = &omap3630_dss_features;
  599. else if (cpu_is_omap34xx())
  600. omap_current_dss_features = &omap3430_dss_features;
  601. else if (omap_rev() == OMAP4430_REV_ES1_0)
  602. omap_current_dss_features = &omap4430_es1_0_dss_features;
  603. else if (omap_rev() == OMAP4430_REV_ES2_0 ||
  604. omap_rev() == OMAP4430_REV_ES2_1 ||
  605. omap_rev() == OMAP4430_REV_ES2_2)
  606. omap_current_dss_features = &omap4430_es2_0_1_2_dss_features;
  607. else if (cpu_is_omap44xx())
  608. omap_current_dss_features = &omap4_dss_features;
  609. else
  610. DSSWARN("Unsupported OMAP version");
  611. }