apply.c 31 KB

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  1. /*
  2. * Copyright (C) 2011 Texas Instruments
  3. * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #define DSS_SUBSYS_NAME "APPLY"
  18. #include <linux/kernel.h>
  19. #include <linux/slab.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/jiffies.h>
  22. #include <video/omapdss.h>
  23. #include "dss.h"
  24. #include "dss_features.h"
  25. /*
  26. * We have 4 levels of cache for the dispc settings. First two are in SW and
  27. * the latter two in HW.
  28. *
  29. * set_info()
  30. * v
  31. * +--------------------+
  32. * | user_info |
  33. * +--------------------+
  34. * v
  35. * apply()
  36. * v
  37. * +--------------------+
  38. * | info |
  39. * +--------------------+
  40. * v
  41. * write_regs()
  42. * v
  43. * +--------------------+
  44. * | shadow registers |
  45. * +--------------------+
  46. * v
  47. * VFP or lcd/digit_enable
  48. * v
  49. * +--------------------+
  50. * | registers |
  51. * +--------------------+
  52. */
  53. struct ovl_priv_data {
  54. bool user_info_dirty;
  55. struct omap_overlay_info user_info;
  56. bool info_dirty;
  57. struct omap_overlay_info info;
  58. bool shadow_info_dirty;
  59. bool extra_info_dirty;
  60. bool shadow_extra_info_dirty;
  61. bool enabled;
  62. enum omap_channel channel;
  63. u32 fifo_low, fifo_high;
  64. /*
  65. * True if overlay is to be enabled. Used to check and calculate configs
  66. * for the overlay before it is enabled in the HW.
  67. */
  68. bool enabling;
  69. };
  70. struct mgr_priv_data {
  71. bool user_info_dirty;
  72. struct omap_overlay_manager_info user_info;
  73. bool info_dirty;
  74. struct omap_overlay_manager_info info;
  75. bool shadow_info_dirty;
  76. /* If true, GO bit is up and shadow registers cannot be written.
  77. * Never true for manual update displays */
  78. bool busy;
  79. /* If true, dispc output is enabled */
  80. bool updating;
  81. /* If true, a display is enabled using this manager */
  82. bool enabled;
  83. bool extra_info_dirty;
  84. bool shadow_extra_info_dirty;
  85. struct omap_video_timings timings;
  86. };
  87. static struct {
  88. struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS];
  89. struct mgr_priv_data mgr_priv_data_array[MAX_DSS_MANAGERS];
  90. bool fifo_merge_dirty;
  91. bool fifo_merge;
  92. bool irq_enabled;
  93. } dss_data;
  94. /* protects dss_data */
  95. static spinlock_t data_lock;
  96. /* lock for blocking functions */
  97. static DEFINE_MUTEX(apply_lock);
  98. static DECLARE_COMPLETION(extra_updated_completion);
  99. static void dss_register_vsync_isr(void);
  100. static struct ovl_priv_data *get_ovl_priv(struct omap_overlay *ovl)
  101. {
  102. return &dss_data.ovl_priv_data_array[ovl->id];
  103. }
  104. static struct mgr_priv_data *get_mgr_priv(struct omap_overlay_manager *mgr)
  105. {
  106. return &dss_data.mgr_priv_data_array[mgr->id];
  107. }
  108. void dss_apply_init(void)
  109. {
  110. const int num_ovls = dss_feat_get_num_ovls();
  111. int i;
  112. spin_lock_init(&data_lock);
  113. for (i = 0; i < num_ovls; ++i) {
  114. struct ovl_priv_data *op;
  115. op = &dss_data.ovl_priv_data_array[i];
  116. op->info.global_alpha = 255;
  117. switch (i) {
  118. case 0:
  119. op->info.zorder = 0;
  120. break;
  121. case 1:
  122. op->info.zorder =
  123. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 3 : 0;
  124. break;
  125. case 2:
  126. op->info.zorder =
  127. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 2 : 0;
  128. break;
  129. case 3:
  130. op->info.zorder =
  131. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 1 : 0;
  132. break;
  133. }
  134. op->user_info = op->info;
  135. }
  136. }
  137. static bool ovl_manual_update(struct omap_overlay *ovl)
  138. {
  139. return ovl->manager->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
  140. }
  141. static bool mgr_manual_update(struct omap_overlay_manager *mgr)
  142. {
  143. return mgr->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
  144. }
  145. static int dss_check_settings_low(struct omap_overlay_manager *mgr,
  146. bool applying)
  147. {
  148. struct omap_overlay_info *oi;
  149. struct omap_overlay_manager_info *mi;
  150. struct omap_overlay *ovl;
  151. struct omap_overlay_info *ois[MAX_DSS_OVERLAYS];
  152. struct ovl_priv_data *op;
  153. struct mgr_priv_data *mp;
  154. mp = get_mgr_priv(mgr);
  155. if (!mp->enabled)
  156. return 0;
  157. if (applying && mp->user_info_dirty)
  158. mi = &mp->user_info;
  159. else
  160. mi = &mp->info;
  161. /* collect the infos to be tested into the array */
  162. list_for_each_entry(ovl, &mgr->overlays, list) {
  163. op = get_ovl_priv(ovl);
  164. if (!op->enabled && !op->enabling)
  165. oi = NULL;
  166. else if (applying && op->user_info_dirty)
  167. oi = &op->user_info;
  168. else
  169. oi = &op->info;
  170. ois[ovl->id] = oi;
  171. }
  172. return dss_mgr_check(mgr, mi, &mp->timings, ois);
  173. }
  174. /*
  175. * check manager and overlay settings using overlay_info from data->info
  176. */
  177. static int dss_check_settings(struct omap_overlay_manager *mgr)
  178. {
  179. return dss_check_settings_low(mgr, false);
  180. }
  181. /*
  182. * check manager and overlay settings using overlay_info from ovl->info if
  183. * dirty and from data->info otherwise
  184. */
  185. static int dss_check_settings_apply(struct omap_overlay_manager *mgr)
  186. {
  187. return dss_check_settings_low(mgr, true);
  188. }
  189. static bool need_isr(void)
  190. {
  191. const int num_mgrs = dss_feat_get_num_mgrs();
  192. int i;
  193. for (i = 0; i < num_mgrs; ++i) {
  194. struct omap_overlay_manager *mgr;
  195. struct mgr_priv_data *mp;
  196. struct omap_overlay *ovl;
  197. mgr = omap_dss_get_overlay_manager(i);
  198. mp = get_mgr_priv(mgr);
  199. if (!mp->enabled)
  200. continue;
  201. if (mgr_manual_update(mgr)) {
  202. /* to catch FRAMEDONE */
  203. if (mp->updating)
  204. return true;
  205. } else {
  206. /* to catch GO bit going down */
  207. if (mp->busy)
  208. return true;
  209. /* to write new values to registers */
  210. if (mp->info_dirty)
  211. return true;
  212. /* to set GO bit */
  213. if (mp->shadow_info_dirty)
  214. return true;
  215. /*
  216. * NOTE: we don't check extra_info flags for disabled
  217. * managers, once the manager is enabled, the extra_info
  218. * related manager changes will be taken in by HW.
  219. */
  220. /* to write new values to registers */
  221. if (mp->extra_info_dirty)
  222. return true;
  223. /* to set GO bit */
  224. if (mp->shadow_extra_info_dirty)
  225. return true;
  226. list_for_each_entry(ovl, &mgr->overlays, list) {
  227. struct ovl_priv_data *op;
  228. op = get_ovl_priv(ovl);
  229. /*
  230. * NOTE: we check extra_info flags even for
  231. * disabled overlays, as extra_infos need to be
  232. * always written.
  233. */
  234. /* to write new values to registers */
  235. if (op->extra_info_dirty)
  236. return true;
  237. /* to set GO bit */
  238. if (op->shadow_extra_info_dirty)
  239. return true;
  240. if (!op->enabled)
  241. continue;
  242. /* to write new values to registers */
  243. if (op->info_dirty)
  244. return true;
  245. /* to set GO bit */
  246. if (op->shadow_info_dirty)
  247. return true;
  248. }
  249. }
  250. }
  251. return false;
  252. }
  253. static bool need_go(struct omap_overlay_manager *mgr)
  254. {
  255. struct omap_overlay *ovl;
  256. struct mgr_priv_data *mp;
  257. struct ovl_priv_data *op;
  258. mp = get_mgr_priv(mgr);
  259. if (mp->shadow_info_dirty || mp->shadow_extra_info_dirty)
  260. return true;
  261. list_for_each_entry(ovl, &mgr->overlays, list) {
  262. op = get_ovl_priv(ovl);
  263. if (op->shadow_info_dirty || op->shadow_extra_info_dirty)
  264. return true;
  265. }
  266. return false;
  267. }
  268. /* returns true if an extra_info field is currently being updated */
  269. static bool extra_info_update_ongoing(void)
  270. {
  271. const int num_mgrs = dss_feat_get_num_mgrs();
  272. int i;
  273. for (i = 0; i < num_mgrs; ++i) {
  274. struct omap_overlay_manager *mgr;
  275. struct omap_overlay *ovl;
  276. struct mgr_priv_data *mp;
  277. mgr = omap_dss_get_overlay_manager(i);
  278. mp = get_mgr_priv(mgr);
  279. if (!mp->enabled)
  280. continue;
  281. if (!mp->updating)
  282. continue;
  283. if (mp->extra_info_dirty || mp->shadow_extra_info_dirty)
  284. return true;
  285. list_for_each_entry(ovl, &mgr->overlays, list) {
  286. struct ovl_priv_data *op = get_ovl_priv(ovl);
  287. if (op->extra_info_dirty || op->shadow_extra_info_dirty)
  288. return true;
  289. }
  290. }
  291. return false;
  292. }
  293. /* wait until no extra_info updates are pending */
  294. static void wait_pending_extra_info_updates(void)
  295. {
  296. bool updating;
  297. unsigned long flags;
  298. unsigned long t;
  299. int r;
  300. spin_lock_irqsave(&data_lock, flags);
  301. updating = extra_info_update_ongoing();
  302. if (!updating) {
  303. spin_unlock_irqrestore(&data_lock, flags);
  304. return;
  305. }
  306. init_completion(&extra_updated_completion);
  307. spin_unlock_irqrestore(&data_lock, flags);
  308. t = msecs_to_jiffies(500);
  309. r = wait_for_completion_timeout(&extra_updated_completion, t);
  310. if (r == 0)
  311. DSSWARN("timeout in wait_pending_extra_info_updates\n");
  312. else if (r < 0)
  313. DSSERR("wait_pending_extra_info_updates failed: %d\n", r);
  314. }
  315. int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr)
  316. {
  317. unsigned long timeout = msecs_to_jiffies(500);
  318. struct mgr_priv_data *mp;
  319. u32 irq;
  320. int r;
  321. int i;
  322. struct omap_dss_device *dssdev = mgr->device;
  323. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  324. return 0;
  325. if (mgr_manual_update(mgr))
  326. return 0;
  327. r = dispc_runtime_get();
  328. if (r)
  329. return r;
  330. irq = dispc_mgr_get_vsync_irq(mgr->id);
  331. mp = get_mgr_priv(mgr);
  332. i = 0;
  333. while (1) {
  334. unsigned long flags;
  335. bool shadow_dirty, dirty;
  336. spin_lock_irqsave(&data_lock, flags);
  337. dirty = mp->info_dirty;
  338. shadow_dirty = mp->shadow_info_dirty;
  339. spin_unlock_irqrestore(&data_lock, flags);
  340. if (!dirty && !shadow_dirty) {
  341. r = 0;
  342. break;
  343. }
  344. /* 4 iterations is the worst case:
  345. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  346. * 2 - first VSYNC, dirty = true
  347. * 3 - dirty = false, shadow_dirty = true
  348. * 4 - shadow_dirty = false */
  349. if (i++ == 3) {
  350. DSSERR("mgr(%d)->wait_for_go() not finishing\n",
  351. mgr->id);
  352. r = 0;
  353. break;
  354. }
  355. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  356. if (r == -ERESTARTSYS)
  357. break;
  358. if (r) {
  359. DSSERR("mgr(%d)->wait_for_go() timeout\n", mgr->id);
  360. break;
  361. }
  362. }
  363. dispc_runtime_put();
  364. return r;
  365. }
  366. int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
  367. {
  368. unsigned long timeout = msecs_to_jiffies(500);
  369. struct ovl_priv_data *op;
  370. struct omap_dss_device *dssdev;
  371. u32 irq;
  372. int r;
  373. int i;
  374. if (!ovl->manager)
  375. return 0;
  376. dssdev = ovl->manager->device;
  377. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  378. return 0;
  379. if (ovl_manual_update(ovl))
  380. return 0;
  381. r = dispc_runtime_get();
  382. if (r)
  383. return r;
  384. irq = dispc_mgr_get_vsync_irq(ovl->manager->id);
  385. op = get_ovl_priv(ovl);
  386. i = 0;
  387. while (1) {
  388. unsigned long flags;
  389. bool shadow_dirty, dirty;
  390. spin_lock_irqsave(&data_lock, flags);
  391. dirty = op->info_dirty;
  392. shadow_dirty = op->shadow_info_dirty;
  393. spin_unlock_irqrestore(&data_lock, flags);
  394. if (!dirty && !shadow_dirty) {
  395. r = 0;
  396. break;
  397. }
  398. /* 4 iterations is the worst case:
  399. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  400. * 2 - first VSYNC, dirty = true
  401. * 3 - dirty = false, shadow_dirty = true
  402. * 4 - shadow_dirty = false */
  403. if (i++ == 3) {
  404. DSSERR("ovl(%d)->wait_for_go() not finishing\n",
  405. ovl->id);
  406. r = 0;
  407. break;
  408. }
  409. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  410. if (r == -ERESTARTSYS)
  411. break;
  412. if (r) {
  413. DSSERR("ovl(%d)->wait_for_go() timeout\n", ovl->id);
  414. break;
  415. }
  416. }
  417. dispc_runtime_put();
  418. return r;
  419. }
  420. static void dss_ovl_write_regs(struct omap_overlay *ovl)
  421. {
  422. struct ovl_priv_data *op = get_ovl_priv(ovl);
  423. struct omap_overlay_info *oi;
  424. bool ilace, replication;
  425. struct mgr_priv_data *mp;
  426. int r;
  427. DSSDBGF("%d", ovl->id);
  428. if (!op->enabled || !op->info_dirty)
  429. return;
  430. oi = &op->info;
  431. mp = get_mgr_priv(ovl->manager);
  432. replication = dss_use_replication(ovl->manager->device, oi->color_mode);
  433. ilace = ovl->manager->device->type == OMAP_DISPLAY_TYPE_VENC;
  434. r = dispc_ovl_setup(ovl->id, oi, ilace, replication, &mp->timings);
  435. if (r) {
  436. /*
  437. * We can't do much here, as this function can be called from
  438. * vsync interrupt.
  439. */
  440. DSSERR("dispc_ovl_setup failed for ovl %d\n", ovl->id);
  441. /* This will leave fifo configurations in a nonoptimal state */
  442. op->enabled = false;
  443. dispc_ovl_enable(ovl->id, false);
  444. return;
  445. }
  446. op->info_dirty = false;
  447. if (mp->updating)
  448. op->shadow_info_dirty = true;
  449. }
  450. static void dss_ovl_write_regs_extra(struct omap_overlay *ovl)
  451. {
  452. struct ovl_priv_data *op = get_ovl_priv(ovl);
  453. struct mgr_priv_data *mp;
  454. DSSDBGF("%d", ovl->id);
  455. if (!op->extra_info_dirty)
  456. return;
  457. /* note: write also when op->enabled == false, so that the ovl gets
  458. * disabled */
  459. dispc_ovl_enable(ovl->id, op->enabled);
  460. dispc_ovl_set_channel_out(ovl->id, op->channel);
  461. dispc_ovl_set_fifo_threshold(ovl->id, op->fifo_low, op->fifo_high);
  462. mp = get_mgr_priv(ovl->manager);
  463. op->extra_info_dirty = false;
  464. if (mp->updating)
  465. op->shadow_extra_info_dirty = true;
  466. }
  467. static void dss_mgr_write_regs(struct omap_overlay_manager *mgr)
  468. {
  469. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  470. struct omap_overlay *ovl;
  471. DSSDBGF("%d", mgr->id);
  472. if (!mp->enabled)
  473. return;
  474. WARN_ON(mp->busy);
  475. /* Commit overlay settings */
  476. list_for_each_entry(ovl, &mgr->overlays, list) {
  477. dss_ovl_write_regs(ovl);
  478. dss_ovl_write_regs_extra(ovl);
  479. }
  480. if (mp->info_dirty) {
  481. dispc_mgr_setup(mgr->id, &mp->info);
  482. mp->info_dirty = false;
  483. if (mp->updating)
  484. mp->shadow_info_dirty = true;
  485. }
  486. }
  487. static void dss_mgr_write_regs_extra(struct omap_overlay_manager *mgr)
  488. {
  489. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  490. DSSDBGF("%d", mgr->id);
  491. if (!mp->extra_info_dirty)
  492. return;
  493. dispc_mgr_set_timings(mgr->id, &mp->timings);
  494. mp->extra_info_dirty = false;
  495. if (mp->updating)
  496. mp->shadow_extra_info_dirty = true;
  497. }
  498. static void dss_write_regs_common(void)
  499. {
  500. const int num_mgrs = omap_dss_get_num_overlay_managers();
  501. int i;
  502. if (!dss_data.fifo_merge_dirty)
  503. return;
  504. for (i = 0; i < num_mgrs; ++i) {
  505. struct omap_overlay_manager *mgr;
  506. struct mgr_priv_data *mp;
  507. mgr = omap_dss_get_overlay_manager(i);
  508. mp = get_mgr_priv(mgr);
  509. if (mp->enabled) {
  510. if (dss_data.fifo_merge_dirty) {
  511. dispc_enable_fifomerge(dss_data.fifo_merge);
  512. dss_data.fifo_merge_dirty = false;
  513. }
  514. if (mp->updating)
  515. mp->shadow_info_dirty = true;
  516. }
  517. }
  518. }
  519. static void dss_write_regs(void)
  520. {
  521. const int num_mgrs = omap_dss_get_num_overlay_managers();
  522. int i;
  523. dss_write_regs_common();
  524. for (i = 0; i < num_mgrs; ++i) {
  525. struct omap_overlay_manager *mgr;
  526. struct mgr_priv_data *mp;
  527. int r;
  528. mgr = omap_dss_get_overlay_manager(i);
  529. mp = get_mgr_priv(mgr);
  530. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  531. continue;
  532. r = dss_check_settings(mgr);
  533. if (r) {
  534. DSSERR("cannot write registers for manager %s: "
  535. "illegal configuration\n", mgr->name);
  536. continue;
  537. }
  538. dss_mgr_write_regs(mgr);
  539. dss_mgr_write_regs_extra(mgr);
  540. }
  541. }
  542. static void dss_set_go_bits(void)
  543. {
  544. const int num_mgrs = omap_dss_get_num_overlay_managers();
  545. int i;
  546. for (i = 0; i < num_mgrs; ++i) {
  547. struct omap_overlay_manager *mgr;
  548. struct mgr_priv_data *mp;
  549. mgr = omap_dss_get_overlay_manager(i);
  550. mp = get_mgr_priv(mgr);
  551. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  552. continue;
  553. if (!need_go(mgr))
  554. continue;
  555. mp->busy = true;
  556. if (!dss_data.irq_enabled && need_isr())
  557. dss_register_vsync_isr();
  558. dispc_mgr_go(mgr->id);
  559. }
  560. }
  561. static void mgr_clear_shadow_dirty(struct omap_overlay_manager *mgr)
  562. {
  563. struct omap_overlay *ovl;
  564. struct mgr_priv_data *mp;
  565. struct ovl_priv_data *op;
  566. mp = get_mgr_priv(mgr);
  567. mp->shadow_info_dirty = false;
  568. mp->shadow_extra_info_dirty = false;
  569. list_for_each_entry(ovl, &mgr->overlays, list) {
  570. op = get_ovl_priv(ovl);
  571. op->shadow_info_dirty = false;
  572. op->shadow_extra_info_dirty = false;
  573. }
  574. }
  575. void dss_mgr_start_update(struct omap_overlay_manager *mgr)
  576. {
  577. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  578. unsigned long flags;
  579. int r;
  580. spin_lock_irqsave(&data_lock, flags);
  581. WARN_ON(mp->updating);
  582. r = dss_check_settings(mgr);
  583. if (r) {
  584. DSSERR("cannot start manual update: illegal configuration\n");
  585. spin_unlock_irqrestore(&data_lock, flags);
  586. return;
  587. }
  588. dss_mgr_write_regs(mgr);
  589. dss_mgr_write_regs_extra(mgr);
  590. dss_write_regs_common();
  591. mp->updating = true;
  592. if (!dss_data.irq_enabled && need_isr())
  593. dss_register_vsync_isr();
  594. dispc_mgr_enable(mgr->id, true);
  595. mgr_clear_shadow_dirty(mgr);
  596. spin_unlock_irqrestore(&data_lock, flags);
  597. }
  598. static void dss_apply_irq_handler(void *data, u32 mask);
  599. static void dss_register_vsync_isr(void)
  600. {
  601. const int num_mgrs = dss_feat_get_num_mgrs();
  602. u32 mask;
  603. int r, i;
  604. mask = 0;
  605. for (i = 0; i < num_mgrs; ++i)
  606. mask |= dispc_mgr_get_vsync_irq(i);
  607. for (i = 0; i < num_mgrs; ++i)
  608. mask |= dispc_mgr_get_framedone_irq(i);
  609. r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask);
  610. WARN_ON(r);
  611. dss_data.irq_enabled = true;
  612. }
  613. static void dss_unregister_vsync_isr(void)
  614. {
  615. const int num_mgrs = dss_feat_get_num_mgrs();
  616. u32 mask;
  617. int r, i;
  618. mask = 0;
  619. for (i = 0; i < num_mgrs; ++i)
  620. mask |= dispc_mgr_get_vsync_irq(i);
  621. for (i = 0; i < num_mgrs; ++i)
  622. mask |= dispc_mgr_get_framedone_irq(i);
  623. r = omap_dispc_unregister_isr(dss_apply_irq_handler, NULL, mask);
  624. WARN_ON(r);
  625. dss_data.irq_enabled = false;
  626. }
  627. static void dss_apply_irq_handler(void *data, u32 mask)
  628. {
  629. const int num_mgrs = dss_feat_get_num_mgrs();
  630. int i;
  631. bool extra_updating;
  632. spin_lock(&data_lock);
  633. /* clear busy, updating flags, shadow_dirty flags */
  634. for (i = 0; i < num_mgrs; i++) {
  635. struct omap_overlay_manager *mgr;
  636. struct mgr_priv_data *mp;
  637. bool was_updating;
  638. mgr = omap_dss_get_overlay_manager(i);
  639. mp = get_mgr_priv(mgr);
  640. if (!mp->enabled)
  641. continue;
  642. was_updating = mp->updating;
  643. mp->updating = dispc_mgr_is_enabled(i);
  644. if (!mgr_manual_update(mgr)) {
  645. bool was_busy = mp->busy;
  646. mp->busy = dispc_mgr_go_busy(i);
  647. if (was_busy && !mp->busy)
  648. mgr_clear_shadow_dirty(mgr);
  649. }
  650. }
  651. dss_write_regs();
  652. dss_set_go_bits();
  653. extra_updating = extra_info_update_ongoing();
  654. if (!extra_updating)
  655. complete_all(&extra_updated_completion);
  656. if (!need_isr())
  657. dss_unregister_vsync_isr();
  658. spin_unlock(&data_lock);
  659. }
  660. static void omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
  661. {
  662. struct ovl_priv_data *op;
  663. op = get_ovl_priv(ovl);
  664. if (!op->user_info_dirty)
  665. return;
  666. op->user_info_dirty = false;
  667. op->info_dirty = true;
  668. op->info = op->user_info;
  669. }
  670. static void omap_dss_mgr_apply_mgr(struct omap_overlay_manager *mgr)
  671. {
  672. struct mgr_priv_data *mp;
  673. mp = get_mgr_priv(mgr);
  674. if (!mp->user_info_dirty)
  675. return;
  676. mp->user_info_dirty = false;
  677. mp->info_dirty = true;
  678. mp->info = mp->user_info;
  679. }
  680. int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
  681. {
  682. unsigned long flags;
  683. struct omap_overlay *ovl;
  684. int r;
  685. DSSDBG("omap_dss_mgr_apply(%s)\n", mgr->name);
  686. spin_lock_irqsave(&data_lock, flags);
  687. r = dss_check_settings_apply(mgr);
  688. if (r) {
  689. spin_unlock_irqrestore(&data_lock, flags);
  690. DSSERR("failed to apply settings: illegal configuration.\n");
  691. return r;
  692. }
  693. /* Configure overlays */
  694. list_for_each_entry(ovl, &mgr->overlays, list)
  695. omap_dss_mgr_apply_ovl(ovl);
  696. /* Configure manager */
  697. omap_dss_mgr_apply_mgr(mgr);
  698. dss_write_regs();
  699. dss_set_go_bits();
  700. spin_unlock_irqrestore(&data_lock, flags);
  701. return 0;
  702. }
  703. static void dss_apply_ovl_enable(struct omap_overlay *ovl, bool enable)
  704. {
  705. struct ovl_priv_data *op;
  706. op = get_ovl_priv(ovl);
  707. if (op->enabled == enable)
  708. return;
  709. op->enabled = enable;
  710. op->extra_info_dirty = true;
  711. }
  712. static void dss_apply_ovl_fifo_thresholds(struct omap_overlay *ovl,
  713. u32 fifo_low, u32 fifo_high)
  714. {
  715. struct ovl_priv_data *op = get_ovl_priv(ovl);
  716. if (op->fifo_low == fifo_low && op->fifo_high == fifo_high)
  717. return;
  718. op->fifo_low = fifo_low;
  719. op->fifo_high = fifo_high;
  720. op->extra_info_dirty = true;
  721. }
  722. static void dss_apply_fifo_merge(bool use_fifo_merge)
  723. {
  724. if (dss_data.fifo_merge == use_fifo_merge)
  725. return;
  726. dss_data.fifo_merge = use_fifo_merge;
  727. dss_data.fifo_merge_dirty = true;
  728. }
  729. static void dss_ovl_setup_fifo(struct omap_overlay *ovl,
  730. bool use_fifo_merge)
  731. {
  732. struct ovl_priv_data *op = get_ovl_priv(ovl);
  733. u32 fifo_low, fifo_high;
  734. if (!op->enabled && !op->enabling)
  735. return;
  736. dispc_ovl_compute_fifo_thresholds(ovl->id, &fifo_low, &fifo_high,
  737. use_fifo_merge, ovl_manual_update(ovl));
  738. dss_apply_ovl_fifo_thresholds(ovl, fifo_low, fifo_high);
  739. }
  740. static void dss_mgr_setup_fifos(struct omap_overlay_manager *mgr,
  741. bool use_fifo_merge)
  742. {
  743. struct omap_overlay *ovl;
  744. struct mgr_priv_data *mp;
  745. mp = get_mgr_priv(mgr);
  746. if (!mp->enabled)
  747. return;
  748. list_for_each_entry(ovl, &mgr->overlays, list)
  749. dss_ovl_setup_fifo(ovl, use_fifo_merge);
  750. }
  751. static void dss_setup_fifos(bool use_fifo_merge)
  752. {
  753. const int num_mgrs = omap_dss_get_num_overlay_managers();
  754. struct omap_overlay_manager *mgr;
  755. int i;
  756. for (i = 0; i < num_mgrs; ++i) {
  757. mgr = omap_dss_get_overlay_manager(i);
  758. dss_mgr_setup_fifos(mgr, use_fifo_merge);
  759. }
  760. }
  761. static int get_num_used_managers(void)
  762. {
  763. const int num_mgrs = omap_dss_get_num_overlay_managers();
  764. struct omap_overlay_manager *mgr;
  765. struct mgr_priv_data *mp;
  766. int i;
  767. int enabled_mgrs;
  768. enabled_mgrs = 0;
  769. for (i = 0; i < num_mgrs; ++i) {
  770. mgr = omap_dss_get_overlay_manager(i);
  771. mp = get_mgr_priv(mgr);
  772. if (!mp->enabled)
  773. continue;
  774. enabled_mgrs++;
  775. }
  776. return enabled_mgrs;
  777. }
  778. static int get_num_used_overlays(void)
  779. {
  780. const int num_ovls = omap_dss_get_num_overlays();
  781. struct omap_overlay *ovl;
  782. struct ovl_priv_data *op;
  783. struct mgr_priv_data *mp;
  784. int i;
  785. int enabled_ovls;
  786. enabled_ovls = 0;
  787. for (i = 0; i < num_ovls; ++i) {
  788. ovl = omap_dss_get_overlay(i);
  789. op = get_ovl_priv(ovl);
  790. if (!op->enabled && !op->enabling)
  791. continue;
  792. mp = get_mgr_priv(ovl->manager);
  793. if (!mp->enabled)
  794. continue;
  795. enabled_ovls++;
  796. }
  797. return enabled_ovls;
  798. }
  799. static bool get_use_fifo_merge(void)
  800. {
  801. int enabled_mgrs = get_num_used_managers();
  802. int enabled_ovls = get_num_used_overlays();
  803. if (!dss_has_feature(FEAT_FIFO_MERGE))
  804. return false;
  805. /*
  806. * In theory the only requirement for fifomerge is enabled_ovls <= 1.
  807. * However, if we have two managers enabled and set/unset the fifomerge,
  808. * we need to set the GO bits in particular sequence for the managers,
  809. * and wait in between.
  810. *
  811. * This is rather difficult as new apply calls can happen at any time,
  812. * so we simplify the problem by requiring also that enabled_mgrs <= 1.
  813. * In practice this shouldn't matter, because when only one overlay is
  814. * enabled, most likely only one output is enabled.
  815. */
  816. return enabled_mgrs <= 1 && enabled_ovls <= 1;
  817. }
  818. int dss_mgr_enable(struct omap_overlay_manager *mgr)
  819. {
  820. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  821. unsigned long flags;
  822. int r;
  823. bool fifo_merge;
  824. mutex_lock(&apply_lock);
  825. if (mp->enabled)
  826. goto out;
  827. spin_lock_irqsave(&data_lock, flags);
  828. mp->enabled = true;
  829. r = dss_check_settings(mgr);
  830. if (r) {
  831. DSSERR("failed to enable manager %d: check_settings failed\n",
  832. mgr->id);
  833. goto err;
  834. }
  835. /* step 1: setup fifos/fifomerge before enabling the manager */
  836. fifo_merge = get_use_fifo_merge();
  837. dss_setup_fifos(fifo_merge);
  838. dss_apply_fifo_merge(fifo_merge);
  839. dss_write_regs();
  840. dss_set_go_bits();
  841. spin_unlock_irqrestore(&data_lock, flags);
  842. /* wait until fifo config is in */
  843. wait_pending_extra_info_updates();
  844. /* step 2: enable the manager */
  845. spin_lock_irqsave(&data_lock, flags);
  846. if (!mgr_manual_update(mgr))
  847. mp->updating = true;
  848. spin_unlock_irqrestore(&data_lock, flags);
  849. if (!mgr_manual_update(mgr))
  850. dispc_mgr_enable(mgr->id, true);
  851. out:
  852. mutex_unlock(&apply_lock);
  853. return 0;
  854. err:
  855. mp->enabled = false;
  856. spin_unlock_irqrestore(&data_lock, flags);
  857. mutex_unlock(&apply_lock);
  858. return r;
  859. }
  860. void dss_mgr_disable(struct omap_overlay_manager *mgr)
  861. {
  862. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  863. unsigned long flags;
  864. bool fifo_merge;
  865. mutex_lock(&apply_lock);
  866. if (!mp->enabled)
  867. goto out;
  868. if (!mgr_manual_update(mgr))
  869. dispc_mgr_enable(mgr->id, false);
  870. spin_lock_irqsave(&data_lock, flags);
  871. mp->updating = false;
  872. mp->enabled = false;
  873. fifo_merge = get_use_fifo_merge();
  874. dss_setup_fifos(fifo_merge);
  875. dss_apply_fifo_merge(fifo_merge);
  876. dss_write_regs();
  877. dss_set_go_bits();
  878. spin_unlock_irqrestore(&data_lock, flags);
  879. wait_pending_extra_info_updates();
  880. out:
  881. mutex_unlock(&apply_lock);
  882. }
  883. int dss_mgr_set_info(struct omap_overlay_manager *mgr,
  884. struct omap_overlay_manager_info *info)
  885. {
  886. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  887. unsigned long flags;
  888. int r;
  889. r = dss_mgr_simple_check(mgr, info);
  890. if (r)
  891. return r;
  892. spin_lock_irqsave(&data_lock, flags);
  893. mp->user_info = *info;
  894. mp->user_info_dirty = true;
  895. spin_unlock_irqrestore(&data_lock, flags);
  896. return 0;
  897. }
  898. void dss_mgr_get_info(struct omap_overlay_manager *mgr,
  899. struct omap_overlay_manager_info *info)
  900. {
  901. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  902. unsigned long flags;
  903. spin_lock_irqsave(&data_lock, flags);
  904. *info = mp->user_info;
  905. spin_unlock_irqrestore(&data_lock, flags);
  906. }
  907. int dss_mgr_set_device(struct omap_overlay_manager *mgr,
  908. struct omap_dss_device *dssdev)
  909. {
  910. int r;
  911. mutex_lock(&apply_lock);
  912. if (dssdev->manager) {
  913. DSSERR("display '%s' already has a manager '%s'\n",
  914. dssdev->name, dssdev->manager->name);
  915. r = -EINVAL;
  916. goto err;
  917. }
  918. if ((mgr->supported_displays & dssdev->type) == 0) {
  919. DSSERR("display '%s' does not support manager '%s'\n",
  920. dssdev->name, mgr->name);
  921. r = -EINVAL;
  922. goto err;
  923. }
  924. dssdev->manager = mgr;
  925. mgr->device = dssdev;
  926. mutex_unlock(&apply_lock);
  927. return 0;
  928. err:
  929. mutex_unlock(&apply_lock);
  930. return r;
  931. }
  932. int dss_mgr_unset_device(struct omap_overlay_manager *mgr)
  933. {
  934. int r;
  935. mutex_lock(&apply_lock);
  936. if (!mgr->device) {
  937. DSSERR("failed to unset display, display not set.\n");
  938. r = -EINVAL;
  939. goto err;
  940. }
  941. /*
  942. * Don't allow currently enabled displays to have the overlay manager
  943. * pulled out from underneath them
  944. */
  945. if (mgr->device->state != OMAP_DSS_DISPLAY_DISABLED) {
  946. r = -EINVAL;
  947. goto err;
  948. }
  949. mgr->device->manager = NULL;
  950. mgr->device = NULL;
  951. mutex_unlock(&apply_lock);
  952. return 0;
  953. err:
  954. mutex_unlock(&apply_lock);
  955. return r;
  956. }
  957. static void dss_apply_mgr_timings(struct omap_overlay_manager *mgr,
  958. struct omap_video_timings *timings)
  959. {
  960. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  961. mp->timings = *timings;
  962. mp->extra_info_dirty = true;
  963. }
  964. void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
  965. struct omap_video_timings *timings)
  966. {
  967. unsigned long flags;
  968. mutex_lock(&apply_lock);
  969. spin_lock_irqsave(&data_lock, flags);
  970. dss_apply_mgr_timings(mgr, timings);
  971. dss_write_regs();
  972. dss_set_go_bits();
  973. spin_unlock_irqrestore(&data_lock, flags);
  974. wait_pending_extra_info_updates();
  975. mutex_unlock(&apply_lock);
  976. }
  977. int dss_ovl_set_info(struct omap_overlay *ovl,
  978. struct omap_overlay_info *info)
  979. {
  980. struct ovl_priv_data *op = get_ovl_priv(ovl);
  981. unsigned long flags;
  982. int r;
  983. r = dss_ovl_simple_check(ovl, info);
  984. if (r)
  985. return r;
  986. spin_lock_irqsave(&data_lock, flags);
  987. op->user_info = *info;
  988. op->user_info_dirty = true;
  989. spin_unlock_irqrestore(&data_lock, flags);
  990. return 0;
  991. }
  992. void dss_ovl_get_info(struct omap_overlay *ovl,
  993. struct omap_overlay_info *info)
  994. {
  995. struct ovl_priv_data *op = get_ovl_priv(ovl);
  996. unsigned long flags;
  997. spin_lock_irqsave(&data_lock, flags);
  998. *info = op->user_info;
  999. spin_unlock_irqrestore(&data_lock, flags);
  1000. }
  1001. int dss_ovl_set_manager(struct omap_overlay *ovl,
  1002. struct omap_overlay_manager *mgr)
  1003. {
  1004. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1005. unsigned long flags;
  1006. int r;
  1007. if (!mgr)
  1008. return -EINVAL;
  1009. mutex_lock(&apply_lock);
  1010. if (ovl->manager) {
  1011. DSSERR("overlay '%s' already has a manager '%s'\n",
  1012. ovl->name, ovl->manager->name);
  1013. r = -EINVAL;
  1014. goto err;
  1015. }
  1016. spin_lock_irqsave(&data_lock, flags);
  1017. if (op->enabled) {
  1018. spin_unlock_irqrestore(&data_lock, flags);
  1019. DSSERR("overlay has to be disabled to change the manager\n");
  1020. r = -EINVAL;
  1021. goto err;
  1022. }
  1023. op->channel = mgr->id;
  1024. op->extra_info_dirty = true;
  1025. ovl->manager = mgr;
  1026. list_add_tail(&ovl->list, &mgr->overlays);
  1027. spin_unlock_irqrestore(&data_lock, flags);
  1028. /* XXX: When there is an overlay on a DSI manual update display, and
  1029. * the overlay is first disabled, then moved to tv, and enabled, we
  1030. * seem to get SYNC_LOST_DIGIT error.
  1031. *
  1032. * Waiting doesn't seem to help, but updating the manual update display
  1033. * after disabling the overlay seems to fix this. This hints that the
  1034. * overlay is perhaps somehow tied to the LCD output until the output
  1035. * is updated.
  1036. *
  1037. * Userspace workaround for this is to update the LCD after disabling
  1038. * the overlay, but before moving the overlay to TV.
  1039. */
  1040. mutex_unlock(&apply_lock);
  1041. return 0;
  1042. err:
  1043. mutex_unlock(&apply_lock);
  1044. return r;
  1045. }
  1046. int dss_ovl_unset_manager(struct omap_overlay *ovl)
  1047. {
  1048. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1049. unsigned long flags;
  1050. int r;
  1051. mutex_lock(&apply_lock);
  1052. if (!ovl->manager) {
  1053. DSSERR("failed to detach overlay: manager not set\n");
  1054. r = -EINVAL;
  1055. goto err;
  1056. }
  1057. spin_lock_irqsave(&data_lock, flags);
  1058. if (op->enabled) {
  1059. spin_unlock_irqrestore(&data_lock, flags);
  1060. DSSERR("overlay has to be disabled to unset the manager\n");
  1061. r = -EINVAL;
  1062. goto err;
  1063. }
  1064. op->channel = -1;
  1065. ovl->manager = NULL;
  1066. list_del(&ovl->list);
  1067. spin_unlock_irqrestore(&data_lock, flags);
  1068. mutex_unlock(&apply_lock);
  1069. return 0;
  1070. err:
  1071. mutex_unlock(&apply_lock);
  1072. return r;
  1073. }
  1074. bool dss_ovl_is_enabled(struct omap_overlay *ovl)
  1075. {
  1076. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1077. unsigned long flags;
  1078. bool e;
  1079. spin_lock_irqsave(&data_lock, flags);
  1080. e = op->enabled;
  1081. spin_unlock_irqrestore(&data_lock, flags);
  1082. return e;
  1083. }
  1084. int dss_ovl_enable(struct omap_overlay *ovl)
  1085. {
  1086. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1087. unsigned long flags;
  1088. bool fifo_merge;
  1089. int r;
  1090. mutex_lock(&apply_lock);
  1091. if (op->enabled) {
  1092. r = 0;
  1093. goto err1;
  1094. }
  1095. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1096. r = -EINVAL;
  1097. goto err1;
  1098. }
  1099. spin_lock_irqsave(&data_lock, flags);
  1100. op->enabling = true;
  1101. r = dss_check_settings(ovl->manager);
  1102. if (r) {
  1103. DSSERR("failed to enable overlay %d: check_settings failed\n",
  1104. ovl->id);
  1105. goto err2;
  1106. }
  1107. /* step 1: configure fifos/fifomerge for currently enabled ovls */
  1108. fifo_merge = get_use_fifo_merge();
  1109. dss_setup_fifos(fifo_merge);
  1110. dss_apply_fifo_merge(fifo_merge);
  1111. dss_write_regs();
  1112. dss_set_go_bits();
  1113. spin_unlock_irqrestore(&data_lock, flags);
  1114. /* wait for fifo configs to go in */
  1115. wait_pending_extra_info_updates();
  1116. /* step 2: enable the overlay */
  1117. spin_lock_irqsave(&data_lock, flags);
  1118. op->enabling = false;
  1119. dss_apply_ovl_enable(ovl, true);
  1120. dss_write_regs();
  1121. dss_set_go_bits();
  1122. spin_unlock_irqrestore(&data_lock, flags);
  1123. /* wait for overlay to be enabled */
  1124. wait_pending_extra_info_updates();
  1125. mutex_unlock(&apply_lock);
  1126. return 0;
  1127. err2:
  1128. op->enabling = false;
  1129. spin_unlock_irqrestore(&data_lock, flags);
  1130. err1:
  1131. mutex_unlock(&apply_lock);
  1132. return r;
  1133. }
  1134. int dss_ovl_disable(struct omap_overlay *ovl)
  1135. {
  1136. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1137. unsigned long flags;
  1138. bool fifo_merge;
  1139. int r;
  1140. mutex_lock(&apply_lock);
  1141. if (!op->enabled) {
  1142. r = 0;
  1143. goto err;
  1144. }
  1145. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1146. r = -EINVAL;
  1147. goto err;
  1148. }
  1149. /* step 1: disable the overlay */
  1150. spin_lock_irqsave(&data_lock, flags);
  1151. dss_apply_ovl_enable(ovl, false);
  1152. dss_write_regs();
  1153. dss_set_go_bits();
  1154. spin_unlock_irqrestore(&data_lock, flags);
  1155. /* wait for the overlay to be disabled */
  1156. wait_pending_extra_info_updates();
  1157. /* step 2: configure fifos/fifomerge */
  1158. spin_lock_irqsave(&data_lock, flags);
  1159. fifo_merge = get_use_fifo_merge();
  1160. dss_setup_fifos(fifo_merge);
  1161. dss_apply_fifo_merge(fifo_merge);
  1162. dss_write_regs();
  1163. dss_set_go_bits();
  1164. spin_unlock_irqrestore(&data_lock, flags);
  1165. /* wait for fifo config to go in */
  1166. wait_pending_extra_info_updates();
  1167. mutex_unlock(&apply_lock);
  1168. return 0;
  1169. err:
  1170. mutex_unlock(&apply_lock);
  1171. return r;
  1172. }