qla_isr.c 70 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2011 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_target.h"
  9. #include <linux/delay.h>
  10. #include <linux/slab.h>
  11. #include <scsi/scsi_tcq.h>
  12. #include <scsi/scsi_bsg_fc.h>
  13. #include <scsi/scsi_eh.h>
  14. static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
  15. static void qla2x00_process_completed_request(struct scsi_qla_host *,
  16. struct req_que *, uint32_t);
  17. static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *);
  18. static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
  19. static void qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
  20. sts_entry_t *);
  21. /**
  22. * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
  23. * @irq:
  24. * @dev_id: SCSI driver HA context
  25. *
  26. * Called by system whenever the host adapter generates an interrupt.
  27. *
  28. * Returns handled flag.
  29. */
  30. irqreturn_t
  31. qla2100_intr_handler(int irq, void *dev_id)
  32. {
  33. scsi_qla_host_t *vha;
  34. struct qla_hw_data *ha;
  35. struct device_reg_2xxx __iomem *reg;
  36. int status;
  37. unsigned long iter;
  38. uint16_t hccr;
  39. uint16_t mb[4];
  40. struct rsp_que *rsp;
  41. unsigned long flags;
  42. rsp = (struct rsp_que *) dev_id;
  43. if (!rsp) {
  44. ql_log(ql_log_info, NULL, 0x505d,
  45. "%s: NULL response queue pointer.\n", __func__);
  46. return (IRQ_NONE);
  47. }
  48. ha = rsp->hw;
  49. reg = &ha->iobase->isp;
  50. status = 0;
  51. spin_lock_irqsave(&ha->hardware_lock, flags);
  52. vha = pci_get_drvdata(ha->pdev);
  53. for (iter = 50; iter--; ) {
  54. hccr = RD_REG_WORD(&reg->hccr);
  55. if (hccr & HCCR_RISC_PAUSE) {
  56. if (pci_channel_offline(ha->pdev))
  57. break;
  58. /*
  59. * Issue a "HARD" reset in order for the RISC interrupt
  60. * bit to be cleared. Schedule a big hammer to get
  61. * out of the RISC PAUSED state.
  62. */
  63. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  64. RD_REG_WORD(&reg->hccr);
  65. ha->isp_ops->fw_dump(vha, 1);
  66. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  67. break;
  68. } else if ((RD_REG_WORD(&reg->istatus) & ISR_RISC_INT) == 0)
  69. break;
  70. if (RD_REG_WORD(&reg->semaphore) & BIT_0) {
  71. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  72. RD_REG_WORD(&reg->hccr);
  73. /* Get mailbox data. */
  74. mb[0] = RD_MAILBOX_REG(ha, reg, 0);
  75. if (mb[0] > 0x3fff && mb[0] < 0x8000) {
  76. qla2x00_mbx_completion(vha, mb[0]);
  77. status |= MBX_INTERRUPT;
  78. } else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
  79. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  80. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  81. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  82. qla2x00_async_event(vha, rsp, mb);
  83. } else {
  84. /*EMPTY*/
  85. ql_dbg(ql_dbg_async, vha, 0x5025,
  86. "Unrecognized interrupt type (%d).\n",
  87. mb[0]);
  88. }
  89. /* Release mailbox registers. */
  90. WRT_REG_WORD(&reg->semaphore, 0);
  91. RD_REG_WORD(&reg->semaphore);
  92. } else {
  93. qla2x00_process_response_queue(rsp);
  94. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  95. RD_REG_WORD(&reg->hccr);
  96. }
  97. }
  98. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  99. if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
  100. (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
  101. set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  102. complete(&ha->mbx_intr_comp);
  103. }
  104. return (IRQ_HANDLED);
  105. }
  106. /**
  107. * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
  108. * @irq:
  109. * @dev_id: SCSI driver HA context
  110. *
  111. * Called by system whenever the host adapter generates an interrupt.
  112. *
  113. * Returns handled flag.
  114. */
  115. irqreturn_t
  116. qla2300_intr_handler(int irq, void *dev_id)
  117. {
  118. scsi_qla_host_t *vha;
  119. struct device_reg_2xxx __iomem *reg;
  120. int status;
  121. unsigned long iter;
  122. uint32_t stat;
  123. uint16_t hccr;
  124. uint16_t mb[4];
  125. struct rsp_que *rsp;
  126. struct qla_hw_data *ha;
  127. unsigned long flags;
  128. rsp = (struct rsp_que *) dev_id;
  129. if (!rsp) {
  130. ql_log(ql_log_info, NULL, 0x5058,
  131. "%s: NULL response queue pointer.\n", __func__);
  132. return (IRQ_NONE);
  133. }
  134. ha = rsp->hw;
  135. reg = &ha->iobase->isp;
  136. status = 0;
  137. spin_lock_irqsave(&ha->hardware_lock, flags);
  138. vha = pci_get_drvdata(ha->pdev);
  139. for (iter = 50; iter--; ) {
  140. stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
  141. if (stat & HSR_RISC_PAUSED) {
  142. if (unlikely(pci_channel_offline(ha->pdev)))
  143. break;
  144. hccr = RD_REG_WORD(&reg->hccr);
  145. if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8))
  146. ql_log(ql_log_warn, vha, 0x5026,
  147. "Parity error -- HCCR=%x, Dumping "
  148. "firmware.\n", hccr);
  149. else
  150. ql_log(ql_log_warn, vha, 0x5027,
  151. "RISC paused -- HCCR=%x, Dumping "
  152. "firmware.\n", hccr);
  153. /*
  154. * Issue a "HARD" reset in order for the RISC
  155. * interrupt bit to be cleared. Schedule a big
  156. * hammer to get out of the RISC PAUSED state.
  157. */
  158. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  159. RD_REG_WORD(&reg->hccr);
  160. ha->isp_ops->fw_dump(vha, 1);
  161. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  162. break;
  163. } else if ((stat & HSR_RISC_INT) == 0)
  164. break;
  165. switch (stat & 0xff) {
  166. case 0x1:
  167. case 0x2:
  168. case 0x10:
  169. case 0x11:
  170. qla2x00_mbx_completion(vha, MSW(stat));
  171. status |= MBX_INTERRUPT;
  172. /* Release mailbox registers. */
  173. WRT_REG_WORD(&reg->semaphore, 0);
  174. break;
  175. case 0x12:
  176. mb[0] = MSW(stat);
  177. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  178. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  179. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  180. qla2x00_async_event(vha, rsp, mb);
  181. break;
  182. case 0x13:
  183. qla2x00_process_response_queue(rsp);
  184. break;
  185. case 0x15:
  186. mb[0] = MBA_CMPLT_1_16BIT;
  187. mb[1] = MSW(stat);
  188. qla2x00_async_event(vha, rsp, mb);
  189. break;
  190. case 0x16:
  191. mb[0] = MBA_SCSI_COMPLETION;
  192. mb[1] = MSW(stat);
  193. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  194. qla2x00_async_event(vha, rsp, mb);
  195. break;
  196. default:
  197. ql_dbg(ql_dbg_async, vha, 0x5028,
  198. "Unrecognized interrupt type (%d).\n", stat & 0xff);
  199. break;
  200. }
  201. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  202. RD_REG_WORD_RELAXED(&reg->hccr);
  203. }
  204. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  205. if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
  206. (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
  207. set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  208. complete(&ha->mbx_intr_comp);
  209. }
  210. return (IRQ_HANDLED);
  211. }
  212. /**
  213. * qla2x00_mbx_completion() - Process mailbox command completions.
  214. * @ha: SCSI driver HA context
  215. * @mb0: Mailbox0 register
  216. */
  217. static void
  218. qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
  219. {
  220. uint16_t cnt;
  221. uint32_t mboxes;
  222. uint16_t __iomem *wptr;
  223. struct qla_hw_data *ha = vha->hw;
  224. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  225. /* Read all mbox registers? */
  226. mboxes = (1 << ha->mbx_count) - 1;
  227. if (!ha->mcp)
  228. ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERRROR.\n");
  229. else
  230. mboxes = ha->mcp->in_mb;
  231. /* Load return mailbox registers. */
  232. ha->flags.mbox_int = 1;
  233. ha->mailbox_out[0] = mb0;
  234. mboxes >>= 1;
  235. wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1);
  236. for (cnt = 1; cnt < ha->mbx_count; cnt++) {
  237. if (IS_QLA2200(ha) && cnt == 8)
  238. wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8);
  239. if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0))
  240. ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
  241. else if (mboxes & BIT_0)
  242. ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
  243. wptr++;
  244. mboxes >>= 1;
  245. }
  246. }
  247. static void
  248. qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)
  249. {
  250. static char *event[] =
  251. { "Complete", "Request Notification", "Time Extension" };
  252. int rval;
  253. struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24;
  254. uint16_t __iomem *wptr;
  255. uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS];
  256. /* Seed data -- mailbox1 -> mailbox7. */
  257. wptr = (uint16_t __iomem *)&reg24->mailbox1;
  258. for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++)
  259. mb[cnt] = RD_REG_WORD(wptr);
  260. ql_dbg(ql_dbg_async, vha, 0x5021,
  261. "Inter-Driver Communication %s -- "
  262. "%04x %04x %04x %04x %04x %04x %04x.\n",
  263. event[aen & 0xff], mb[0], mb[1], mb[2], mb[3],
  264. mb[4], mb[5], mb[6]);
  265. /* Acknowledgement needed? [Notify && non-zero timeout]. */
  266. timeout = (descr >> 8) & 0xf;
  267. if (aen != MBA_IDC_NOTIFY || !timeout)
  268. return;
  269. ql_dbg(ql_dbg_async, vha, 0x5022,
  270. "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n",
  271. vha->host_no, event[aen & 0xff], timeout);
  272. rval = qla2x00_post_idc_ack_work(vha, mb);
  273. if (rval != QLA_SUCCESS)
  274. ql_log(ql_log_warn, vha, 0x5023,
  275. "IDC failed to post ACK.\n");
  276. }
  277. #define LS_UNKNOWN 2
  278. char *
  279. qla2x00_get_link_speed_str(struct qla_hw_data *ha)
  280. {
  281. static char *link_speeds[] = {"1", "2", "?", "4", "8", "16", "10"};
  282. char *link_speed;
  283. int fw_speed = ha->link_data_rate;
  284. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  285. link_speed = link_speeds[0];
  286. else if (fw_speed == 0x13)
  287. link_speed = link_speeds[6];
  288. else {
  289. link_speed = link_speeds[LS_UNKNOWN];
  290. if (fw_speed < 6)
  291. link_speed =
  292. link_speeds[fw_speed];
  293. }
  294. return link_speed;
  295. }
  296. /**
  297. * qla2x00_async_event() - Process aynchronous events.
  298. * @ha: SCSI driver HA context
  299. * @mb: Mailbox registers (0 - 3)
  300. */
  301. void
  302. qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)
  303. {
  304. uint16_t handle_cnt;
  305. uint16_t cnt, mbx;
  306. uint32_t handles[5];
  307. struct qla_hw_data *ha = vha->hw;
  308. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  309. struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
  310. struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
  311. uint32_t rscn_entry, host_pid;
  312. unsigned long flags;
  313. /* Setup to process RIO completion. */
  314. handle_cnt = 0;
  315. if (IS_CNA_CAPABLE(ha))
  316. goto skip_rio;
  317. switch (mb[0]) {
  318. case MBA_SCSI_COMPLETION:
  319. handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
  320. handle_cnt = 1;
  321. break;
  322. case MBA_CMPLT_1_16BIT:
  323. handles[0] = mb[1];
  324. handle_cnt = 1;
  325. mb[0] = MBA_SCSI_COMPLETION;
  326. break;
  327. case MBA_CMPLT_2_16BIT:
  328. handles[0] = mb[1];
  329. handles[1] = mb[2];
  330. handle_cnt = 2;
  331. mb[0] = MBA_SCSI_COMPLETION;
  332. break;
  333. case MBA_CMPLT_3_16BIT:
  334. handles[0] = mb[1];
  335. handles[1] = mb[2];
  336. handles[2] = mb[3];
  337. handle_cnt = 3;
  338. mb[0] = MBA_SCSI_COMPLETION;
  339. break;
  340. case MBA_CMPLT_4_16BIT:
  341. handles[0] = mb[1];
  342. handles[1] = mb[2];
  343. handles[2] = mb[3];
  344. handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
  345. handle_cnt = 4;
  346. mb[0] = MBA_SCSI_COMPLETION;
  347. break;
  348. case MBA_CMPLT_5_16BIT:
  349. handles[0] = mb[1];
  350. handles[1] = mb[2];
  351. handles[2] = mb[3];
  352. handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
  353. handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
  354. handle_cnt = 5;
  355. mb[0] = MBA_SCSI_COMPLETION;
  356. break;
  357. case MBA_CMPLT_2_32BIT:
  358. handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
  359. handles[1] = le32_to_cpu(
  360. ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) |
  361. RD_MAILBOX_REG(ha, reg, 6));
  362. handle_cnt = 2;
  363. mb[0] = MBA_SCSI_COMPLETION;
  364. break;
  365. default:
  366. break;
  367. }
  368. skip_rio:
  369. switch (mb[0]) {
  370. case MBA_SCSI_COMPLETION: /* Fast Post */
  371. if (!vha->flags.online)
  372. break;
  373. for (cnt = 0; cnt < handle_cnt; cnt++)
  374. qla2x00_process_completed_request(vha, rsp->req,
  375. handles[cnt]);
  376. break;
  377. case MBA_RESET: /* Reset */
  378. ql_dbg(ql_dbg_async, vha, 0x5002,
  379. "Asynchronous RESET.\n");
  380. set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  381. break;
  382. case MBA_SYSTEM_ERR: /* System Error */
  383. mbx = (IS_QLA81XX(ha) || IS_QLA83XX(ha)) ?
  384. RD_REG_WORD(&reg24->mailbox7) : 0;
  385. ql_log(ql_log_warn, vha, 0x5003,
  386. "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh "
  387. "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx);
  388. ha->isp_ops->fw_dump(vha, 1);
  389. if (IS_FWI2_CAPABLE(ha)) {
  390. if (mb[1] == 0 && mb[2] == 0) {
  391. ql_log(ql_log_fatal, vha, 0x5004,
  392. "Unrecoverable Hardware Error: adapter "
  393. "marked OFFLINE!\n");
  394. vha->flags.online = 0;
  395. vha->device_flags |= DFLG_DEV_FAILED;
  396. } else {
  397. /* Check to see if MPI timeout occurred */
  398. if ((mbx & MBX_3) && (ha->flags.port0))
  399. set_bit(MPI_RESET_NEEDED,
  400. &vha->dpc_flags);
  401. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  402. }
  403. } else if (mb[1] == 0) {
  404. ql_log(ql_log_fatal, vha, 0x5005,
  405. "Unrecoverable Hardware Error: adapter marked "
  406. "OFFLINE!\n");
  407. vha->flags.online = 0;
  408. vha->device_flags |= DFLG_DEV_FAILED;
  409. } else
  410. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  411. break;
  412. case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */
  413. ql_log(ql_log_warn, vha, 0x5006,
  414. "ISP Request Transfer Error (%x).\n", mb[1]);
  415. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  416. break;
  417. case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */
  418. ql_log(ql_log_warn, vha, 0x5007,
  419. "ISP Response Transfer Error.\n");
  420. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  421. break;
  422. case MBA_WAKEUP_THRES: /* Request Queue Wake-up */
  423. ql_dbg(ql_dbg_async, vha, 0x5008,
  424. "Asynchronous WAKEUP_THRES.\n");
  425. break;
  426. case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */
  427. ql_dbg(ql_dbg_async, vha, 0x5009,
  428. "LIP occurred (%x).\n", mb[1]);
  429. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  430. atomic_set(&vha->loop_state, LOOP_DOWN);
  431. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  432. qla2x00_mark_all_devices_lost(vha, 1);
  433. }
  434. if (vha->vp_idx) {
  435. atomic_set(&vha->vp_state, VP_FAILED);
  436. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  437. }
  438. set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
  439. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  440. vha->flags.management_server_logged_in = 0;
  441. qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]);
  442. break;
  443. case MBA_LOOP_UP: /* Loop Up Event */
  444. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  445. ha->link_data_rate = PORT_SPEED_1GB;
  446. else
  447. ha->link_data_rate = mb[1];
  448. ql_dbg(ql_dbg_async, vha, 0x500a,
  449. "LOOP UP detected (%s Gbps).\n",
  450. qla2x00_get_link_speed_str(ha));
  451. vha->flags.management_server_logged_in = 0;
  452. qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate);
  453. break;
  454. case MBA_LOOP_DOWN: /* Loop Down Event */
  455. mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha))
  456. ? RD_REG_WORD(&reg24->mailbox4) : 0;
  457. mbx = IS_QLA82XX(ha) ? RD_REG_WORD(&reg82->mailbox_out[4]) : mbx;
  458. ql_dbg(ql_dbg_async, vha, 0x500b,
  459. "LOOP DOWN detected (%x %x %x %x).\n",
  460. mb[1], mb[2], mb[3], mbx);
  461. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  462. atomic_set(&vha->loop_state, LOOP_DOWN);
  463. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  464. vha->device_flags |= DFLG_NO_CABLE;
  465. qla2x00_mark_all_devices_lost(vha, 1);
  466. }
  467. if (vha->vp_idx) {
  468. atomic_set(&vha->vp_state, VP_FAILED);
  469. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  470. }
  471. vha->flags.management_server_logged_in = 0;
  472. ha->link_data_rate = PORT_SPEED_UNKNOWN;
  473. qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0);
  474. break;
  475. case MBA_LIP_RESET: /* LIP reset occurred */
  476. ql_dbg(ql_dbg_async, vha, 0x500c,
  477. "LIP reset occurred (%x).\n", mb[1]);
  478. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  479. atomic_set(&vha->loop_state, LOOP_DOWN);
  480. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  481. qla2x00_mark_all_devices_lost(vha, 1);
  482. }
  483. if (vha->vp_idx) {
  484. atomic_set(&vha->vp_state, VP_FAILED);
  485. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  486. }
  487. set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  488. ha->operating_mode = LOOP;
  489. vha->flags.management_server_logged_in = 0;
  490. qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]);
  491. break;
  492. /* case MBA_DCBX_COMPLETE: */
  493. case MBA_POINT_TO_POINT: /* Point-to-Point */
  494. if (IS_QLA2100(ha))
  495. break;
  496. if (IS_QLA81XX(ha) || IS_QLA82XX(ha) || IS_QLA8031(ha)) {
  497. ql_dbg(ql_dbg_async, vha, 0x500d,
  498. "DCBX Completed -- %04x %04x %04x.\n",
  499. mb[1], mb[2], mb[3]);
  500. if (ha->notify_dcbx_comp)
  501. complete(&ha->dcbx_comp);
  502. } else
  503. ql_dbg(ql_dbg_async, vha, 0x500e,
  504. "Asynchronous P2P MODE received.\n");
  505. /*
  506. * Until there's a transition from loop down to loop up, treat
  507. * this as loop down only.
  508. */
  509. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  510. atomic_set(&vha->loop_state, LOOP_DOWN);
  511. if (!atomic_read(&vha->loop_down_timer))
  512. atomic_set(&vha->loop_down_timer,
  513. LOOP_DOWN_TIME);
  514. qla2x00_mark_all_devices_lost(vha, 1);
  515. }
  516. if (vha->vp_idx) {
  517. atomic_set(&vha->vp_state, VP_FAILED);
  518. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  519. }
  520. if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)))
  521. set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  522. set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
  523. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  524. ha->flags.gpsc_supported = 1;
  525. vha->flags.management_server_logged_in = 0;
  526. break;
  527. case MBA_CHG_IN_CONNECTION: /* Change in connection mode */
  528. if (IS_QLA2100(ha))
  529. break;
  530. ql_dbg(ql_dbg_async, vha, 0x500f,
  531. "Configuration change detected: value=%x.\n", mb[1]);
  532. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  533. atomic_set(&vha->loop_state, LOOP_DOWN);
  534. if (!atomic_read(&vha->loop_down_timer))
  535. atomic_set(&vha->loop_down_timer,
  536. LOOP_DOWN_TIME);
  537. qla2x00_mark_all_devices_lost(vha, 1);
  538. }
  539. if (vha->vp_idx) {
  540. atomic_set(&vha->vp_state, VP_FAILED);
  541. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  542. }
  543. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  544. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  545. break;
  546. case MBA_PORT_UPDATE: /* Port database update */
  547. /*
  548. * Handle only global and vn-port update events
  549. *
  550. * Relevant inputs:
  551. * mb[1] = N_Port handle of changed port
  552. * OR 0xffff for global event
  553. * mb[2] = New login state
  554. * 7 = Port logged out
  555. * mb[3] = LSB is vp_idx, 0xff = all vps
  556. *
  557. * Skip processing if:
  558. * Event is global, vp_idx is NOT all vps,
  559. * vp_idx does not match
  560. * Event is not global, vp_idx does not match
  561. */
  562. if (IS_QLA2XXX_MIDTYPE(ha) &&
  563. ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) ||
  564. (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff))
  565. break;
  566. /* Global event -- port logout or port unavailable. */
  567. if (mb[1] == 0xffff && mb[2] == 0x7) {
  568. ql_dbg(ql_dbg_async, vha, 0x5010,
  569. "Port unavailable %04x %04x %04x.\n",
  570. mb[1], mb[2], mb[3]);
  571. ql_log(ql_log_warn, vha, 0x505e,
  572. "Link is offline.\n");
  573. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  574. atomic_set(&vha->loop_state, LOOP_DOWN);
  575. atomic_set(&vha->loop_down_timer,
  576. LOOP_DOWN_TIME);
  577. vha->device_flags |= DFLG_NO_CABLE;
  578. qla2x00_mark_all_devices_lost(vha, 1);
  579. }
  580. if (vha->vp_idx) {
  581. atomic_set(&vha->vp_state, VP_FAILED);
  582. fc_vport_set_state(vha->fc_vport,
  583. FC_VPORT_FAILED);
  584. qla2x00_mark_all_devices_lost(vha, 1);
  585. }
  586. vha->flags.management_server_logged_in = 0;
  587. ha->link_data_rate = PORT_SPEED_UNKNOWN;
  588. break;
  589. }
  590. /*
  591. * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET
  592. * event etc. earlier indicating loop is down) then process
  593. * it. Otherwise ignore it and Wait for RSCN to come in.
  594. */
  595. atomic_set(&vha->loop_down_timer, 0);
  596. if (atomic_read(&vha->loop_state) != LOOP_DOWN &&
  597. atomic_read(&vha->loop_state) != LOOP_DEAD) {
  598. ql_dbg(ql_dbg_async, vha, 0x5011,
  599. "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",
  600. mb[1], mb[2], mb[3]);
  601. qlt_async_event(mb[0], vha, mb);
  602. break;
  603. }
  604. ql_dbg(ql_dbg_async, vha, 0x5012,
  605. "Port database changed %04x %04x %04x.\n",
  606. mb[1], mb[2], mb[3]);
  607. ql_log(ql_log_warn, vha, 0x505f,
  608. "Link is operational (%s Gbps).\n",
  609. qla2x00_get_link_speed_str(ha));
  610. /*
  611. * Mark all devices as missing so we will login again.
  612. */
  613. atomic_set(&vha->loop_state, LOOP_UP);
  614. qla2x00_mark_all_devices_lost(vha, 1);
  615. if (vha->vp_idx == 0 && !qla_ini_mode_enabled(vha))
  616. set_bit(SCR_PENDING, &vha->dpc_flags);
  617. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  618. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  619. qlt_async_event(mb[0], vha, mb);
  620. break;
  621. case MBA_RSCN_UPDATE: /* State Change Registration */
  622. /* Check if the Vport has issued a SCR */
  623. if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags))
  624. break;
  625. /* Only handle SCNs for our Vport index. */
  626. if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff))
  627. break;
  628. ql_dbg(ql_dbg_async, vha, 0x5013,
  629. "RSCN database changed -- %04x %04x %04x.\n",
  630. mb[1], mb[2], mb[3]);
  631. rscn_entry = ((mb[1] & 0xff) << 16) | mb[2];
  632. host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8)
  633. | vha->d_id.b.al_pa;
  634. if (rscn_entry == host_pid) {
  635. ql_dbg(ql_dbg_async, vha, 0x5014,
  636. "Ignoring RSCN update to local host "
  637. "port ID (%06x).\n", host_pid);
  638. break;
  639. }
  640. /* Ignore reserved bits from RSCN-payload. */
  641. rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2];
  642. atomic_set(&vha->loop_down_timer, 0);
  643. vha->flags.management_server_logged_in = 0;
  644. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  645. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  646. qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry);
  647. break;
  648. /* case MBA_RIO_RESPONSE: */
  649. case MBA_ZIO_RESPONSE:
  650. ql_dbg(ql_dbg_async, vha, 0x5015,
  651. "[R|Z]IO update completion.\n");
  652. if (IS_FWI2_CAPABLE(ha))
  653. qla24xx_process_response_queue(vha, rsp);
  654. else
  655. qla2x00_process_response_queue(rsp);
  656. break;
  657. case MBA_DISCARD_RND_FRAME:
  658. ql_dbg(ql_dbg_async, vha, 0x5016,
  659. "Discard RND Frame -- %04x %04x %04x.\n",
  660. mb[1], mb[2], mb[3]);
  661. break;
  662. case MBA_TRACE_NOTIFICATION:
  663. ql_dbg(ql_dbg_async, vha, 0x5017,
  664. "Trace Notification -- %04x %04x.\n", mb[1], mb[2]);
  665. break;
  666. case MBA_ISP84XX_ALERT:
  667. ql_dbg(ql_dbg_async, vha, 0x5018,
  668. "ISP84XX Alert Notification -- %04x %04x %04x.\n",
  669. mb[1], mb[2], mb[3]);
  670. spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
  671. switch (mb[1]) {
  672. case A84_PANIC_RECOVERY:
  673. ql_log(ql_log_info, vha, 0x5019,
  674. "Alert 84XX: panic recovery %04x %04x.\n",
  675. mb[2], mb[3]);
  676. break;
  677. case A84_OP_LOGIN_COMPLETE:
  678. ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2];
  679. ql_log(ql_log_info, vha, 0x501a,
  680. "Alert 84XX: firmware version %x.\n",
  681. ha->cs84xx->op_fw_version);
  682. break;
  683. case A84_DIAG_LOGIN_COMPLETE:
  684. ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
  685. ql_log(ql_log_info, vha, 0x501b,
  686. "Alert 84XX: diagnostic firmware version %x.\n",
  687. ha->cs84xx->diag_fw_version);
  688. break;
  689. case A84_GOLD_LOGIN_COMPLETE:
  690. ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
  691. ha->cs84xx->fw_update = 1;
  692. ql_log(ql_log_info, vha, 0x501c,
  693. "Alert 84XX: gold firmware version %x.\n",
  694. ha->cs84xx->gold_fw_version);
  695. break;
  696. default:
  697. ql_log(ql_log_warn, vha, 0x501d,
  698. "Alert 84xx: Invalid Alert %04x %04x %04x.\n",
  699. mb[1], mb[2], mb[3]);
  700. }
  701. spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags);
  702. break;
  703. case MBA_DCBX_START:
  704. ql_dbg(ql_dbg_async, vha, 0x501e,
  705. "DCBX Started -- %04x %04x %04x.\n",
  706. mb[1], mb[2], mb[3]);
  707. break;
  708. case MBA_DCBX_PARAM_UPDATE:
  709. ql_dbg(ql_dbg_async, vha, 0x501f,
  710. "DCBX Parameters Updated -- %04x %04x %04x.\n",
  711. mb[1], mb[2], mb[3]);
  712. break;
  713. case MBA_FCF_CONF_ERR:
  714. ql_dbg(ql_dbg_async, vha, 0x5020,
  715. "FCF Configuration Error -- %04x %04x %04x.\n",
  716. mb[1], mb[2], mb[3]);
  717. break;
  718. case MBA_IDC_COMPLETE:
  719. case MBA_IDC_NOTIFY:
  720. case MBA_IDC_TIME_EXT:
  721. qla81xx_idc_event(vha, mb[0], mb[1]);
  722. break;
  723. default:
  724. ql_dbg(ql_dbg_async, vha, 0x5057,
  725. "Unknown AEN:%04x %04x %04x %04x\n",
  726. mb[0], mb[1], mb[2], mb[3]);
  727. }
  728. qlt_async_event(mb[0], vha, mb);
  729. if (!vha->vp_idx && ha->num_vhosts)
  730. qla2x00_alert_all_vps(rsp, mb);
  731. }
  732. /**
  733. * qla2x00_process_completed_request() - Process a Fast Post response.
  734. * @ha: SCSI driver HA context
  735. * @index: SRB index
  736. */
  737. static void
  738. qla2x00_process_completed_request(struct scsi_qla_host *vha,
  739. struct req_que *req, uint32_t index)
  740. {
  741. srb_t *sp;
  742. struct qla_hw_data *ha = vha->hw;
  743. /* Validate handle. */
  744. if (index >= MAX_OUTSTANDING_COMMANDS) {
  745. ql_log(ql_log_warn, vha, 0x3014,
  746. "Invalid SCSI command index (%x).\n", index);
  747. if (IS_QLA82XX(ha))
  748. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  749. else
  750. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  751. return;
  752. }
  753. sp = req->outstanding_cmds[index];
  754. if (sp) {
  755. /* Free outstanding command slot. */
  756. req->outstanding_cmds[index] = NULL;
  757. /* Save ISP completion status */
  758. sp->done(ha, sp, DID_OK << 16);
  759. } else {
  760. ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n");
  761. if (IS_QLA82XX(ha))
  762. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  763. else
  764. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  765. }
  766. }
  767. static srb_t *
  768. qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
  769. struct req_que *req, void *iocb)
  770. {
  771. struct qla_hw_data *ha = vha->hw;
  772. sts_entry_t *pkt = iocb;
  773. srb_t *sp = NULL;
  774. uint16_t index;
  775. index = LSW(pkt->handle);
  776. if (index >= MAX_OUTSTANDING_COMMANDS) {
  777. ql_log(ql_log_warn, vha, 0x5031,
  778. "Invalid command index (%x).\n", index);
  779. if (IS_QLA82XX(ha))
  780. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  781. else
  782. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  783. goto done;
  784. }
  785. sp = req->outstanding_cmds[index];
  786. if (!sp) {
  787. ql_log(ql_log_warn, vha, 0x5032,
  788. "Invalid completion handle (%x) -- timed-out.\n", index);
  789. return sp;
  790. }
  791. if (sp->handle != index) {
  792. ql_log(ql_log_warn, vha, 0x5033,
  793. "SRB handle (%x) mismatch %x.\n", sp->handle, index);
  794. return NULL;
  795. }
  796. req->outstanding_cmds[index] = NULL;
  797. done:
  798. return sp;
  799. }
  800. static void
  801. qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
  802. struct mbx_entry *mbx)
  803. {
  804. const char func[] = "MBX-IOCB";
  805. const char *type;
  806. fc_port_t *fcport;
  807. srb_t *sp;
  808. struct srb_iocb *lio;
  809. uint16_t *data;
  810. uint16_t status;
  811. sp = qla2x00_get_sp_from_handle(vha, func, req, mbx);
  812. if (!sp)
  813. return;
  814. lio = &sp->u.iocb_cmd;
  815. type = sp->name;
  816. fcport = sp->fcport;
  817. data = lio->u.logio.data;
  818. data[0] = MBS_COMMAND_ERROR;
  819. data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
  820. QLA_LOGIO_LOGIN_RETRIED : 0;
  821. if (mbx->entry_status) {
  822. ql_dbg(ql_dbg_async, vha, 0x5043,
  823. "Async-%s error entry - hdl=%x portid=%02x%02x%02x "
  824. "entry-status=%x status=%x state-flag=%x "
  825. "status-flags=%x.\n", type, sp->handle,
  826. fcport->d_id.b.domain, fcport->d_id.b.area,
  827. fcport->d_id.b.al_pa, mbx->entry_status,
  828. le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags),
  829. le16_to_cpu(mbx->status_flags));
  830. ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029,
  831. (uint8_t *)mbx, sizeof(*mbx));
  832. goto logio_done;
  833. }
  834. status = le16_to_cpu(mbx->status);
  835. if (status == 0x30 && sp->type == SRB_LOGIN_CMD &&
  836. le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE)
  837. status = 0;
  838. if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) {
  839. ql_dbg(ql_dbg_async, vha, 0x5045,
  840. "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n",
  841. type, sp->handle, fcport->d_id.b.domain,
  842. fcport->d_id.b.area, fcport->d_id.b.al_pa,
  843. le16_to_cpu(mbx->mb1));
  844. data[0] = MBS_COMMAND_COMPLETE;
  845. if (sp->type == SRB_LOGIN_CMD) {
  846. fcport->port_type = FCT_TARGET;
  847. if (le16_to_cpu(mbx->mb1) & BIT_0)
  848. fcport->port_type = FCT_INITIATOR;
  849. else if (le16_to_cpu(mbx->mb1) & BIT_1)
  850. fcport->flags |= FCF_FCP2_DEVICE;
  851. }
  852. goto logio_done;
  853. }
  854. data[0] = le16_to_cpu(mbx->mb0);
  855. switch (data[0]) {
  856. case MBS_PORT_ID_USED:
  857. data[1] = le16_to_cpu(mbx->mb1);
  858. break;
  859. case MBS_LOOP_ID_USED:
  860. break;
  861. default:
  862. data[0] = MBS_COMMAND_ERROR;
  863. break;
  864. }
  865. ql_log(ql_log_warn, vha, 0x5046,
  866. "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x "
  867. "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle,
  868. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  869. status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1),
  870. le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6),
  871. le16_to_cpu(mbx->mb7));
  872. logio_done:
  873. sp->done(vha, sp, 0);
  874. }
  875. static void
  876. qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
  877. sts_entry_t *pkt, int iocb_type)
  878. {
  879. const char func[] = "CT_IOCB";
  880. const char *type;
  881. srb_t *sp;
  882. struct fc_bsg_job *bsg_job;
  883. uint16_t comp_status;
  884. int res;
  885. sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
  886. if (!sp)
  887. return;
  888. bsg_job = sp->u.bsg_job;
  889. type = "ct pass-through";
  890. comp_status = le16_to_cpu(pkt->comp_status);
  891. /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
  892. * fc payload to the caller
  893. */
  894. bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
  895. bsg_job->reply_len = sizeof(struct fc_bsg_reply);
  896. if (comp_status != CS_COMPLETE) {
  897. if (comp_status == CS_DATA_UNDERRUN) {
  898. res = DID_OK << 16;
  899. bsg_job->reply->reply_payload_rcv_len =
  900. le16_to_cpu(((sts_entry_t *)pkt)->rsp_info_len);
  901. ql_log(ql_log_warn, vha, 0x5048,
  902. "CT pass-through-%s error "
  903. "comp_status-status=0x%x total_byte = 0x%x.\n",
  904. type, comp_status,
  905. bsg_job->reply->reply_payload_rcv_len);
  906. } else {
  907. ql_log(ql_log_warn, vha, 0x5049,
  908. "CT pass-through-%s error "
  909. "comp_status-status=0x%x.\n", type, comp_status);
  910. res = DID_ERROR << 16;
  911. bsg_job->reply->reply_payload_rcv_len = 0;
  912. }
  913. ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035,
  914. (uint8_t *)pkt, sizeof(*pkt));
  915. } else {
  916. res = DID_OK << 16;
  917. bsg_job->reply->reply_payload_rcv_len =
  918. bsg_job->reply_payload.payload_len;
  919. bsg_job->reply_len = 0;
  920. }
  921. sp->done(vha, sp, res);
  922. }
  923. static void
  924. qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
  925. struct sts_entry_24xx *pkt, int iocb_type)
  926. {
  927. const char func[] = "ELS_CT_IOCB";
  928. const char *type;
  929. srb_t *sp;
  930. struct fc_bsg_job *bsg_job;
  931. uint16_t comp_status;
  932. uint32_t fw_status[3];
  933. uint8_t* fw_sts_ptr;
  934. int res;
  935. sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
  936. if (!sp)
  937. return;
  938. bsg_job = sp->u.bsg_job;
  939. type = NULL;
  940. switch (sp->type) {
  941. case SRB_ELS_CMD_RPT:
  942. case SRB_ELS_CMD_HST:
  943. type = "els";
  944. break;
  945. case SRB_CT_CMD:
  946. type = "ct pass-through";
  947. break;
  948. default:
  949. ql_dbg(ql_dbg_user, vha, 0x503e,
  950. "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type);
  951. return;
  952. }
  953. comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
  954. fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_1);
  955. fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_2);
  956. /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
  957. * fc payload to the caller
  958. */
  959. bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
  960. bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
  961. if (comp_status != CS_COMPLETE) {
  962. if (comp_status == CS_DATA_UNDERRUN) {
  963. res = DID_OK << 16;
  964. bsg_job->reply->reply_payload_rcv_len =
  965. le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->total_byte_count);
  966. ql_dbg(ql_dbg_user, vha, 0x503f,
  967. "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
  968. "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
  969. type, sp->handle, comp_status, fw_status[1], fw_status[2],
  970. le16_to_cpu(((struct els_sts_entry_24xx *)
  971. pkt)->total_byte_count));
  972. fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
  973. memcpy( fw_sts_ptr, fw_status, sizeof(fw_status));
  974. }
  975. else {
  976. ql_dbg(ql_dbg_user, vha, 0x5040,
  977. "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
  978. "error subcode 1=0x%x error subcode 2=0x%x.\n",
  979. type, sp->handle, comp_status,
  980. le16_to_cpu(((struct els_sts_entry_24xx *)
  981. pkt)->error_subcode_1),
  982. le16_to_cpu(((struct els_sts_entry_24xx *)
  983. pkt)->error_subcode_2));
  984. res = DID_ERROR << 16;
  985. bsg_job->reply->reply_payload_rcv_len = 0;
  986. fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
  987. memcpy( fw_sts_ptr, fw_status, sizeof(fw_status));
  988. }
  989. ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056,
  990. (uint8_t *)pkt, sizeof(*pkt));
  991. }
  992. else {
  993. res = DID_OK << 16;
  994. bsg_job->reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
  995. bsg_job->reply_len = 0;
  996. }
  997. sp->done(vha, sp, res);
  998. }
  999. static void
  1000. qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
  1001. struct logio_entry_24xx *logio)
  1002. {
  1003. const char func[] = "LOGIO-IOCB";
  1004. const char *type;
  1005. fc_port_t *fcport;
  1006. srb_t *sp;
  1007. struct srb_iocb *lio;
  1008. uint16_t *data;
  1009. uint32_t iop[2];
  1010. sp = qla2x00_get_sp_from_handle(vha, func, req, logio);
  1011. if (!sp)
  1012. return;
  1013. lio = &sp->u.iocb_cmd;
  1014. type = sp->name;
  1015. fcport = sp->fcport;
  1016. data = lio->u.logio.data;
  1017. data[0] = MBS_COMMAND_ERROR;
  1018. data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
  1019. QLA_LOGIO_LOGIN_RETRIED : 0;
  1020. if (logio->entry_status) {
  1021. ql_log(ql_log_warn, fcport->vha, 0x5034,
  1022. "Async-%s error entry - hdl=%x"
  1023. "portid=%02x%02x%02x entry-status=%x.\n",
  1024. type, sp->handle, fcport->d_id.b.domain,
  1025. fcport->d_id.b.area, fcport->d_id.b.al_pa,
  1026. logio->entry_status);
  1027. ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d,
  1028. (uint8_t *)logio, sizeof(*logio));
  1029. goto logio_done;
  1030. }
  1031. if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) {
  1032. ql_dbg(ql_dbg_async, fcport->vha, 0x5036,
  1033. "Async-%s complete - hdl=%x portid=%02x%02x%02x "
  1034. "iop0=%x.\n", type, sp->handle, fcport->d_id.b.domain,
  1035. fcport->d_id.b.area, fcport->d_id.b.al_pa,
  1036. le32_to_cpu(logio->io_parameter[0]));
  1037. data[0] = MBS_COMMAND_COMPLETE;
  1038. if (sp->type != SRB_LOGIN_CMD)
  1039. goto logio_done;
  1040. iop[0] = le32_to_cpu(logio->io_parameter[0]);
  1041. if (iop[0] & BIT_4) {
  1042. fcport->port_type = FCT_TARGET;
  1043. if (iop[0] & BIT_8)
  1044. fcport->flags |= FCF_FCP2_DEVICE;
  1045. } else if (iop[0] & BIT_5)
  1046. fcport->port_type = FCT_INITIATOR;
  1047. if (iop[0] & BIT_7)
  1048. fcport->flags |= FCF_CONF_COMP_SUPPORTED;
  1049. if (logio->io_parameter[7] || logio->io_parameter[8])
  1050. fcport->supported_classes |= FC_COS_CLASS2;
  1051. if (logio->io_parameter[9] || logio->io_parameter[10])
  1052. fcport->supported_classes |= FC_COS_CLASS3;
  1053. goto logio_done;
  1054. }
  1055. iop[0] = le32_to_cpu(logio->io_parameter[0]);
  1056. iop[1] = le32_to_cpu(logio->io_parameter[1]);
  1057. switch (iop[0]) {
  1058. case LSC_SCODE_PORTID_USED:
  1059. data[0] = MBS_PORT_ID_USED;
  1060. data[1] = LSW(iop[1]);
  1061. break;
  1062. case LSC_SCODE_NPORT_USED:
  1063. data[0] = MBS_LOOP_ID_USED;
  1064. break;
  1065. default:
  1066. data[0] = MBS_COMMAND_ERROR;
  1067. break;
  1068. }
  1069. ql_dbg(ql_dbg_async, fcport->vha, 0x5037,
  1070. "Async-%s failed - hdl=%x portid=%02x%02x%02x comp=%x "
  1071. "iop0=%x iop1=%x.\n", type, sp->handle, fcport->d_id.b.domain,
  1072. fcport->d_id.b.area, fcport->d_id.b.al_pa,
  1073. le16_to_cpu(logio->comp_status),
  1074. le32_to_cpu(logio->io_parameter[0]),
  1075. le32_to_cpu(logio->io_parameter[1]));
  1076. logio_done:
  1077. sp->done(vha, sp, 0);
  1078. }
  1079. static void
  1080. qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
  1081. struct tsk_mgmt_entry *tsk)
  1082. {
  1083. const char func[] = "TMF-IOCB";
  1084. const char *type;
  1085. fc_port_t *fcport;
  1086. srb_t *sp;
  1087. struct srb_iocb *iocb;
  1088. struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
  1089. int error = 1;
  1090. sp = qla2x00_get_sp_from_handle(vha, func, req, tsk);
  1091. if (!sp)
  1092. return;
  1093. iocb = &sp->u.iocb_cmd;
  1094. type = sp->name;
  1095. fcport = sp->fcport;
  1096. if (sts->entry_status) {
  1097. ql_log(ql_log_warn, fcport->vha, 0x5038,
  1098. "Async-%s error - hdl=%x entry-status(%x).\n",
  1099. type, sp->handle, sts->entry_status);
  1100. } else if (sts->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  1101. ql_log(ql_log_warn, fcport->vha, 0x5039,
  1102. "Async-%s error - hdl=%x completion status(%x).\n",
  1103. type, sp->handle, sts->comp_status);
  1104. } else if (!(le16_to_cpu(sts->scsi_status) &
  1105. SS_RESPONSE_INFO_LEN_VALID)) {
  1106. ql_log(ql_log_warn, fcport->vha, 0x503a,
  1107. "Async-%s error - hdl=%x no response info(%x).\n",
  1108. type, sp->handle, sts->scsi_status);
  1109. } else if (le32_to_cpu(sts->rsp_data_len) < 4) {
  1110. ql_log(ql_log_warn, fcport->vha, 0x503b,
  1111. "Async-%s error - hdl=%x not enough response(%d).\n",
  1112. type, sp->handle, sts->rsp_data_len);
  1113. } else if (sts->data[3]) {
  1114. ql_log(ql_log_warn, fcport->vha, 0x503c,
  1115. "Async-%s error - hdl=%x response(%x).\n",
  1116. type, sp->handle, sts->data[3]);
  1117. } else {
  1118. error = 0;
  1119. }
  1120. if (error) {
  1121. iocb->u.tmf.data = error;
  1122. ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5055,
  1123. (uint8_t *)sts, sizeof(*sts));
  1124. }
  1125. sp->done(vha, sp, 0);
  1126. }
  1127. /**
  1128. * qla2x00_process_response_queue() - Process response queue entries.
  1129. * @ha: SCSI driver HA context
  1130. */
  1131. void
  1132. qla2x00_process_response_queue(struct rsp_que *rsp)
  1133. {
  1134. struct scsi_qla_host *vha;
  1135. struct qla_hw_data *ha = rsp->hw;
  1136. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1137. sts_entry_t *pkt;
  1138. uint16_t handle_cnt;
  1139. uint16_t cnt;
  1140. vha = pci_get_drvdata(ha->pdev);
  1141. if (!vha->flags.online)
  1142. return;
  1143. while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
  1144. pkt = (sts_entry_t *)rsp->ring_ptr;
  1145. rsp->ring_index++;
  1146. if (rsp->ring_index == rsp->length) {
  1147. rsp->ring_index = 0;
  1148. rsp->ring_ptr = rsp->ring;
  1149. } else {
  1150. rsp->ring_ptr++;
  1151. }
  1152. if (pkt->entry_status != 0) {
  1153. qla2x00_error_entry(vha, rsp, pkt);
  1154. ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
  1155. wmb();
  1156. continue;
  1157. }
  1158. switch (pkt->entry_type) {
  1159. case STATUS_TYPE:
  1160. qla2x00_status_entry(vha, rsp, pkt);
  1161. break;
  1162. case STATUS_TYPE_21:
  1163. handle_cnt = ((sts21_entry_t *)pkt)->handle_count;
  1164. for (cnt = 0; cnt < handle_cnt; cnt++) {
  1165. qla2x00_process_completed_request(vha, rsp->req,
  1166. ((sts21_entry_t *)pkt)->handle[cnt]);
  1167. }
  1168. break;
  1169. case STATUS_TYPE_22:
  1170. handle_cnt = ((sts22_entry_t *)pkt)->handle_count;
  1171. for (cnt = 0; cnt < handle_cnt; cnt++) {
  1172. qla2x00_process_completed_request(vha, rsp->req,
  1173. ((sts22_entry_t *)pkt)->handle[cnt]);
  1174. }
  1175. break;
  1176. case STATUS_CONT_TYPE:
  1177. qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
  1178. break;
  1179. case MBX_IOCB_TYPE:
  1180. qla2x00_mbx_iocb_entry(vha, rsp->req,
  1181. (struct mbx_entry *)pkt);
  1182. break;
  1183. case CT_IOCB_TYPE:
  1184. qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
  1185. break;
  1186. default:
  1187. /* Type Not Supported. */
  1188. ql_log(ql_log_warn, vha, 0x504a,
  1189. "Received unknown response pkt type %x "
  1190. "entry status=%x.\n",
  1191. pkt->entry_type, pkt->entry_status);
  1192. break;
  1193. }
  1194. ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
  1195. wmb();
  1196. }
  1197. /* Adjust ring index */
  1198. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index);
  1199. }
  1200. static inline void
  1201. qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
  1202. uint32_t sense_len, struct rsp_que *rsp, int res)
  1203. {
  1204. struct scsi_qla_host *vha = sp->fcport->vha;
  1205. struct scsi_cmnd *cp = GET_CMD_SP(sp);
  1206. uint32_t track_sense_len;
  1207. if (sense_len >= SCSI_SENSE_BUFFERSIZE)
  1208. sense_len = SCSI_SENSE_BUFFERSIZE;
  1209. SET_CMD_SENSE_LEN(sp, sense_len);
  1210. SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
  1211. track_sense_len = sense_len;
  1212. if (sense_len > par_sense_len)
  1213. sense_len = par_sense_len;
  1214. memcpy(cp->sense_buffer, sense_data, sense_len);
  1215. SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
  1216. track_sense_len -= sense_len;
  1217. SET_CMD_SENSE_LEN(sp, track_sense_len);
  1218. if (track_sense_len != 0) {
  1219. rsp->status_srb = sp;
  1220. cp->result = res;
  1221. }
  1222. if (sense_len) {
  1223. ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c,
  1224. "Check condition Sense data, nexus%ld:%d:%d cmd=%p.\n",
  1225. sp->fcport->vha->host_no, cp->device->id, cp->device->lun,
  1226. cp);
  1227. ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b,
  1228. cp->sense_buffer, sense_len);
  1229. }
  1230. }
  1231. struct scsi_dif_tuple {
  1232. __be16 guard; /* Checksum */
  1233. __be16 app_tag; /* APPL identifer */
  1234. __be32 ref_tag; /* Target LBA or indirect LBA */
  1235. };
  1236. /*
  1237. * Checks the guard or meta-data for the type of error
  1238. * detected by the HBA. In case of errors, we set the
  1239. * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST
  1240. * to indicate to the kernel that the HBA detected error.
  1241. */
  1242. static inline int
  1243. qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24)
  1244. {
  1245. struct scsi_qla_host *vha = sp->fcport->vha;
  1246. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1247. uint8_t *ap = &sts24->data[12];
  1248. uint8_t *ep = &sts24->data[20];
  1249. uint32_t e_ref_tag, a_ref_tag;
  1250. uint16_t e_app_tag, a_app_tag;
  1251. uint16_t e_guard, a_guard;
  1252. /*
  1253. * swab32 of the "data" field in the beginning of qla2x00_status_entry()
  1254. * would make guard field appear at offset 2
  1255. */
  1256. a_guard = le16_to_cpu(*(uint16_t *)(ap + 2));
  1257. a_app_tag = le16_to_cpu(*(uint16_t *)(ap + 0));
  1258. a_ref_tag = le32_to_cpu(*(uint32_t *)(ap + 4));
  1259. e_guard = le16_to_cpu(*(uint16_t *)(ep + 2));
  1260. e_app_tag = le16_to_cpu(*(uint16_t *)(ep + 0));
  1261. e_ref_tag = le32_to_cpu(*(uint32_t *)(ep + 4));
  1262. ql_dbg(ql_dbg_io, vha, 0x3023,
  1263. "iocb(s) %p Returned STATUS.\n", sts24);
  1264. ql_dbg(ql_dbg_io, vha, 0x3024,
  1265. "DIF ERROR in cmd 0x%x lba 0x%llx act ref"
  1266. " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app"
  1267. " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n",
  1268. cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag,
  1269. a_app_tag, e_app_tag, a_guard, e_guard);
  1270. /*
  1271. * Ignore sector if:
  1272. * For type 3: ref & app tag is all 'f's
  1273. * For type 0,1,2: app tag is all 'f's
  1274. */
  1275. if ((a_app_tag == 0xffff) &&
  1276. ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) ||
  1277. (a_ref_tag == 0xffffffff))) {
  1278. uint32_t blocks_done, resid;
  1279. sector_t lba_s = scsi_get_lba(cmd);
  1280. /* 2TB boundary case covered automatically with this */
  1281. blocks_done = e_ref_tag - (uint32_t)lba_s + 1;
  1282. resid = scsi_bufflen(cmd) - (blocks_done *
  1283. cmd->device->sector_size);
  1284. scsi_set_resid(cmd, resid);
  1285. cmd->result = DID_OK << 16;
  1286. /* Update protection tag */
  1287. if (scsi_prot_sg_count(cmd)) {
  1288. uint32_t i, j = 0, k = 0, num_ent;
  1289. struct scatterlist *sg;
  1290. struct sd_dif_tuple *spt;
  1291. /* Patch the corresponding protection tags */
  1292. scsi_for_each_prot_sg(cmd, sg,
  1293. scsi_prot_sg_count(cmd), i) {
  1294. num_ent = sg_dma_len(sg) / 8;
  1295. if (k + num_ent < blocks_done) {
  1296. k += num_ent;
  1297. continue;
  1298. }
  1299. j = blocks_done - k - 1;
  1300. k = blocks_done;
  1301. break;
  1302. }
  1303. if (k != blocks_done) {
  1304. ql_log(ql_log_warn, vha, 0x302f,
  1305. "unexpected tag values tag:lba=%x:%llx)\n",
  1306. e_ref_tag, (unsigned long long)lba_s);
  1307. return 1;
  1308. }
  1309. spt = page_address(sg_page(sg)) + sg->offset;
  1310. spt += j;
  1311. spt->app_tag = 0xffff;
  1312. if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3)
  1313. spt->ref_tag = 0xffffffff;
  1314. }
  1315. return 0;
  1316. }
  1317. /* check guard */
  1318. if (e_guard != a_guard) {
  1319. scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
  1320. 0x10, 0x1);
  1321. set_driver_byte(cmd, DRIVER_SENSE);
  1322. set_host_byte(cmd, DID_ABORT);
  1323. cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
  1324. return 1;
  1325. }
  1326. /* check ref tag */
  1327. if (e_ref_tag != a_ref_tag) {
  1328. scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
  1329. 0x10, 0x3);
  1330. set_driver_byte(cmd, DRIVER_SENSE);
  1331. set_host_byte(cmd, DID_ABORT);
  1332. cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
  1333. return 1;
  1334. }
  1335. /* check appl tag */
  1336. if (e_app_tag != a_app_tag) {
  1337. scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
  1338. 0x10, 0x2);
  1339. set_driver_byte(cmd, DRIVER_SENSE);
  1340. set_host_byte(cmd, DID_ABORT);
  1341. cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
  1342. return 1;
  1343. }
  1344. return 1;
  1345. }
  1346. /**
  1347. * qla2x00_status_entry() - Process a Status IOCB entry.
  1348. * @ha: SCSI driver HA context
  1349. * @pkt: Entry pointer
  1350. */
  1351. static void
  1352. qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
  1353. {
  1354. srb_t *sp;
  1355. fc_port_t *fcport;
  1356. struct scsi_cmnd *cp;
  1357. sts_entry_t *sts;
  1358. struct sts_entry_24xx *sts24;
  1359. uint16_t comp_status;
  1360. uint16_t scsi_status;
  1361. uint16_t ox_id;
  1362. uint8_t lscsi_status;
  1363. int32_t resid;
  1364. uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
  1365. fw_resid_len;
  1366. uint8_t *rsp_info, *sense_data;
  1367. struct qla_hw_data *ha = vha->hw;
  1368. uint32_t handle;
  1369. uint16_t que;
  1370. struct req_que *req;
  1371. int logit = 1;
  1372. int res = 0;
  1373. sts = (sts_entry_t *) pkt;
  1374. sts24 = (struct sts_entry_24xx *) pkt;
  1375. if (IS_FWI2_CAPABLE(ha)) {
  1376. comp_status = le16_to_cpu(sts24->comp_status);
  1377. scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
  1378. } else {
  1379. comp_status = le16_to_cpu(sts->comp_status);
  1380. scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
  1381. }
  1382. handle = (uint32_t) LSW(sts->handle);
  1383. que = MSW(sts->handle);
  1384. req = ha->req_q_map[que];
  1385. /* Fast path completion. */
  1386. if (comp_status == CS_COMPLETE && scsi_status == 0) {
  1387. qla2x00_process_completed_request(vha, req, handle);
  1388. return;
  1389. }
  1390. /* Validate handle. */
  1391. if (handle < MAX_OUTSTANDING_COMMANDS) {
  1392. sp = req->outstanding_cmds[handle];
  1393. req->outstanding_cmds[handle] = NULL;
  1394. } else
  1395. sp = NULL;
  1396. if (sp == NULL) {
  1397. ql_dbg(ql_dbg_io, vha, 0x3017,
  1398. "Invalid status handle (0x%x).\n", sts->handle);
  1399. if (IS_QLA82XX(ha))
  1400. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  1401. else
  1402. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1403. qla2xxx_wake_dpc(vha);
  1404. return;
  1405. }
  1406. cp = GET_CMD_SP(sp);
  1407. if (cp == NULL) {
  1408. ql_dbg(ql_dbg_io, vha, 0x3018,
  1409. "Command already returned (0x%x/%p).\n",
  1410. sts->handle, sp);
  1411. return;
  1412. }
  1413. lscsi_status = scsi_status & STATUS_MASK;
  1414. fcport = sp->fcport;
  1415. ox_id = 0;
  1416. sense_len = par_sense_len = rsp_info_len = resid_len =
  1417. fw_resid_len = 0;
  1418. if (IS_FWI2_CAPABLE(ha)) {
  1419. if (scsi_status & SS_SENSE_LEN_VALID)
  1420. sense_len = le32_to_cpu(sts24->sense_len);
  1421. if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
  1422. rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
  1423. if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
  1424. resid_len = le32_to_cpu(sts24->rsp_residual_count);
  1425. if (comp_status == CS_DATA_UNDERRUN)
  1426. fw_resid_len = le32_to_cpu(sts24->residual_len);
  1427. rsp_info = sts24->data;
  1428. sense_data = sts24->data;
  1429. host_to_fcp_swap(sts24->data, sizeof(sts24->data));
  1430. ox_id = le16_to_cpu(sts24->ox_id);
  1431. par_sense_len = sizeof(sts24->data);
  1432. } else {
  1433. if (scsi_status & SS_SENSE_LEN_VALID)
  1434. sense_len = le16_to_cpu(sts->req_sense_length);
  1435. if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
  1436. rsp_info_len = le16_to_cpu(sts->rsp_info_len);
  1437. resid_len = le32_to_cpu(sts->residual_length);
  1438. rsp_info = sts->rsp_info;
  1439. sense_data = sts->req_sense_data;
  1440. par_sense_len = sizeof(sts->req_sense_data);
  1441. }
  1442. /* Check for any FCP transport errors. */
  1443. if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
  1444. /* Sense data lies beyond any FCP RESPONSE data. */
  1445. if (IS_FWI2_CAPABLE(ha)) {
  1446. sense_data += rsp_info_len;
  1447. par_sense_len -= rsp_info_len;
  1448. }
  1449. if (rsp_info_len > 3 && rsp_info[3]) {
  1450. ql_dbg(ql_dbg_io, fcport->vha, 0x3019,
  1451. "FCP I/O protocol failure (0x%x/0x%x).\n",
  1452. rsp_info_len, rsp_info[3]);
  1453. res = DID_BUS_BUSY << 16;
  1454. goto out;
  1455. }
  1456. }
  1457. /* Check for overrun. */
  1458. if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE &&
  1459. scsi_status & SS_RESIDUAL_OVER)
  1460. comp_status = CS_DATA_OVERRUN;
  1461. /*
  1462. * Based on Host and scsi status generate status code for Linux
  1463. */
  1464. switch (comp_status) {
  1465. case CS_COMPLETE:
  1466. case CS_QUEUE_FULL:
  1467. if (scsi_status == 0) {
  1468. res = DID_OK << 16;
  1469. break;
  1470. }
  1471. if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
  1472. resid = resid_len;
  1473. scsi_set_resid(cp, resid);
  1474. if (!lscsi_status &&
  1475. ((unsigned)(scsi_bufflen(cp) - resid) <
  1476. cp->underflow)) {
  1477. ql_dbg(ql_dbg_io, fcport->vha, 0x301a,
  1478. "Mid-layer underflow "
  1479. "detected (0x%x of 0x%x bytes).\n",
  1480. resid, scsi_bufflen(cp));
  1481. res = DID_ERROR << 16;
  1482. break;
  1483. }
  1484. }
  1485. res = DID_OK << 16 | lscsi_status;
  1486. if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
  1487. ql_dbg(ql_dbg_io, fcport->vha, 0x301b,
  1488. "QUEUE FULL detected.\n");
  1489. break;
  1490. }
  1491. logit = 0;
  1492. if (lscsi_status != SS_CHECK_CONDITION)
  1493. break;
  1494. memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
  1495. if (!(scsi_status & SS_SENSE_LEN_VALID))
  1496. break;
  1497. qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len,
  1498. rsp, res);
  1499. break;
  1500. case CS_DATA_UNDERRUN:
  1501. /* Use F/W calculated residual length. */
  1502. resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
  1503. scsi_set_resid(cp, resid);
  1504. if (scsi_status & SS_RESIDUAL_UNDER) {
  1505. if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
  1506. ql_dbg(ql_dbg_io, fcport->vha, 0x301d,
  1507. "Dropped frame(s) detected "
  1508. "(0x%x of 0x%x bytes).\n",
  1509. resid, scsi_bufflen(cp));
  1510. res = DID_ERROR << 16 | lscsi_status;
  1511. goto check_scsi_status;
  1512. }
  1513. if (!lscsi_status &&
  1514. ((unsigned)(scsi_bufflen(cp) - resid) <
  1515. cp->underflow)) {
  1516. ql_dbg(ql_dbg_io, fcport->vha, 0x301e,
  1517. "Mid-layer underflow "
  1518. "detected (0x%x of 0x%x bytes).\n",
  1519. resid, scsi_bufflen(cp));
  1520. res = DID_ERROR << 16;
  1521. break;
  1522. }
  1523. } else if (lscsi_status != SAM_STAT_TASK_SET_FULL &&
  1524. lscsi_status != SAM_STAT_BUSY) {
  1525. /*
  1526. * scsi status of task set and busy are considered to be
  1527. * task not completed.
  1528. */
  1529. ql_dbg(ql_dbg_io, fcport->vha, 0x301f,
  1530. "Dropped frame(s) detected (0x%x "
  1531. "of 0x%x bytes).\n", resid,
  1532. scsi_bufflen(cp));
  1533. res = DID_ERROR << 16 | lscsi_status;
  1534. goto check_scsi_status;
  1535. } else {
  1536. ql_dbg(ql_dbg_io, fcport->vha, 0x3030,
  1537. "scsi_status: 0x%x, lscsi_status: 0x%x\n",
  1538. scsi_status, lscsi_status);
  1539. }
  1540. res = DID_OK << 16 | lscsi_status;
  1541. logit = 0;
  1542. check_scsi_status:
  1543. /*
  1544. * Check to see if SCSI Status is non zero. If so report SCSI
  1545. * Status.
  1546. */
  1547. if (lscsi_status != 0) {
  1548. if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
  1549. ql_dbg(ql_dbg_io, fcport->vha, 0x3020,
  1550. "QUEUE FULL detected.\n");
  1551. logit = 1;
  1552. break;
  1553. }
  1554. if (lscsi_status != SS_CHECK_CONDITION)
  1555. break;
  1556. memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
  1557. if (!(scsi_status & SS_SENSE_LEN_VALID))
  1558. break;
  1559. qla2x00_handle_sense(sp, sense_data, par_sense_len,
  1560. sense_len, rsp, res);
  1561. }
  1562. break;
  1563. case CS_PORT_LOGGED_OUT:
  1564. case CS_PORT_CONFIG_CHG:
  1565. case CS_PORT_BUSY:
  1566. case CS_INCOMPLETE:
  1567. case CS_PORT_UNAVAILABLE:
  1568. case CS_TIMEOUT:
  1569. case CS_RESET:
  1570. /*
  1571. * We are going to have the fc class block the rport
  1572. * while we try to recover so instruct the mid layer
  1573. * to requeue until the class decides how to handle this.
  1574. */
  1575. res = DID_TRANSPORT_DISRUPTED << 16;
  1576. if (comp_status == CS_TIMEOUT) {
  1577. if (IS_FWI2_CAPABLE(ha))
  1578. break;
  1579. else if ((le16_to_cpu(sts->status_flags) &
  1580. SF_LOGOUT_SENT) == 0)
  1581. break;
  1582. }
  1583. ql_dbg(ql_dbg_io, fcport->vha, 0x3021,
  1584. "Port down status: port-state=0x%x.\n",
  1585. atomic_read(&fcport->state));
  1586. if (atomic_read(&fcport->state) == FCS_ONLINE)
  1587. qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
  1588. break;
  1589. case CS_ABORTED:
  1590. res = DID_RESET << 16;
  1591. break;
  1592. case CS_DIF_ERROR:
  1593. logit = qla2x00_handle_dif_error(sp, sts24);
  1594. break;
  1595. default:
  1596. res = DID_ERROR << 16;
  1597. break;
  1598. }
  1599. out:
  1600. if (logit)
  1601. ql_dbg(ql_dbg_io, fcport->vha, 0x3022,
  1602. "FCP command status: 0x%x-0x%x (0x%x) "
  1603. "nexus=%ld:%d:%d portid=%02x%02x%02x oxid=0x%x "
  1604. "cdb=%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x len=0x%x "
  1605. "rsp_info=0x%x resid=0x%x fw_resid=0x%x.\n",
  1606. comp_status, scsi_status, res, vha->host_no,
  1607. cp->device->id, cp->device->lun, fcport->d_id.b.domain,
  1608. fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id,
  1609. cp->cmnd[0], cp->cmnd[1], cp->cmnd[2], cp->cmnd[3],
  1610. cp->cmnd[4], cp->cmnd[5], cp->cmnd[6], cp->cmnd[7],
  1611. cp->cmnd[8], cp->cmnd[9], scsi_bufflen(cp), rsp_info_len,
  1612. resid_len, fw_resid_len);
  1613. if (rsp->status_srb == NULL)
  1614. sp->done(ha, sp, res);
  1615. }
  1616. /**
  1617. * qla2x00_status_cont_entry() - Process a Status Continuations entry.
  1618. * @ha: SCSI driver HA context
  1619. * @pkt: Entry pointer
  1620. *
  1621. * Extended sense data.
  1622. */
  1623. static void
  1624. qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
  1625. {
  1626. uint8_t sense_sz = 0;
  1627. struct qla_hw_data *ha = rsp->hw;
  1628. struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
  1629. srb_t *sp = rsp->status_srb;
  1630. struct scsi_cmnd *cp;
  1631. uint32_t sense_len;
  1632. uint8_t *sense_ptr;
  1633. if (!sp || !GET_CMD_SENSE_LEN(sp))
  1634. return;
  1635. sense_len = GET_CMD_SENSE_LEN(sp);
  1636. sense_ptr = GET_CMD_SENSE_PTR(sp);
  1637. cp = GET_CMD_SP(sp);
  1638. if (cp == NULL) {
  1639. ql_log(ql_log_warn, vha, 0x3025,
  1640. "cmd is NULL: already returned to OS (sp=%p).\n", sp);
  1641. rsp->status_srb = NULL;
  1642. return;
  1643. }
  1644. if (sense_len > sizeof(pkt->data))
  1645. sense_sz = sizeof(pkt->data);
  1646. else
  1647. sense_sz = sense_len;
  1648. /* Move sense data. */
  1649. if (IS_FWI2_CAPABLE(ha))
  1650. host_to_fcp_swap(pkt->data, sizeof(pkt->data));
  1651. memcpy(sense_ptr, pkt->data, sense_sz);
  1652. ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c,
  1653. sense_ptr, sense_sz);
  1654. sense_len -= sense_sz;
  1655. sense_ptr += sense_sz;
  1656. SET_CMD_SENSE_PTR(sp, sense_ptr);
  1657. SET_CMD_SENSE_LEN(sp, sense_len);
  1658. /* Place command on done queue. */
  1659. if (sense_len == 0) {
  1660. rsp->status_srb = NULL;
  1661. sp->done(ha, sp, cp->result);
  1662. }
  1663. }
  1664. /**
  1665. * qla2x00_error_entry() - Process an error entry.
  1666. * @ha: SCSI driver HA context
  1667. * @pkt: Entry pointer
  1668. */
  1669. static void
  1670. qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
  1671. {
  1672. srb_t *sp;
  1673. struct qla_hw_data *ha = vha->hw;
  1674. const char func[] = "ERROR-IOCB";
  1675. uint16_t que = MSW(pkt->handle);
  1676. struct req_que *req = NULL;
  1677. int res = DID_ERROR << 16;
  1678. ql_dbg(ql_dbg_async, vha, 0x502a,
  1679. "type of error status in response: 0x%x\n", pkt->entry_status);
  1680. if (que >= ha->max_req_queues || !ha->req_q_map[que])
  1681. goto fatal;
  1682. req = ha->req_q_map[que];
  1683. if (pkt->entry_status & RF_BUSY)
  1684. res = DID_BUS_BUSY << 16;
  1685. sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
  1686. if (sp) {
  1687. sp->done(ha, sp, res);
  1688. return;
  1689. }
  1690. fatal:
  1691. ql_log(ql_log_warn, vha, 0x5030,
  1692. "Error entry - invalid handle/queue.\n");
  1693. if (IS_QLA82XX(ha))
  1694. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  1695. else
  1696. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1697. qla2xxx_wake_dpc(vha);
  1698. }
  1699. /**
  1700. * qla24xx_mbx_completion() - Process mailbox command completions.
  1701. * @ha: SCSI driver HA context
  1702. * @mb0: Mailbox0 register
  1703. */
  1704. static void
  1705. qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
  1706. {
  1707. uint16_t cnt;
  1708. uint32_t mboxes;
  1709. uint16_t __iomem *wptr;
  1710. struct qla_hw_data *ha = vha->hw;
  1711. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1712. /* Read all mbox registers? */
  1713. mboxes = (1 << ha->mbx_count) - 1;
  1714. if (!ha->mcp)
  1715. ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERRROR.\n");
  1716. else
  1717. mboxes = ha->mcp->in_mb;
  1718. /* Load return mailbox registers. */
  1719. ha->flags.mbox_int = 1;
  1720. ha->mailbox_out[0] = mb0;
  1721. mboxes >>= 1;
  1722. wptr = (uint16_t __iomem *)&reg->mailbox1;
  1723. for (cnt = 1; cnt < ha->mbx_count; cnt++) {
  1724. if (mboxes & BIT_0)
  1725. ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
  1726. mboxes >>= 1;
  1727. wptr++;
  1728. }
  1729. }
  1730. /**
  1731. * qla24xx_process_response_queue() - Process response queue entries.
  1732. * @ha: SCSI driver HA context
  1733. */
  1734. void qla24xx_process_response_queue(struct scsi_qla_host *vha,
  1735. struct rsp_que *rsp)
  1736. {
  1737. struct sts_entry_24xx *pkt;
  1738. struct qla_hw_data *ha = vha->hw;
  1739. if (!vha->flags.online)
  1740. return;
  1741. while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
  1742. pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
  1743. rsp->ring_index++;
  1744. if (rsp->ring_index == rsp->length) {
  1745. rsp->ring_index = 0;
  1746. rsp->ring_ptr = rsp->ring;
  1747. } else {
  1748. rsp->ring_ptr++;
  1749. }
  1750. if (pkt->entry_status != 0) {
  1751. qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt);
  1752. (void)qlt_24xx_process_response_error(vha, pkt);
  1753. ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
  1754. wmb();
  1755. continue;
  1756. }
  1757. switch (pkt->entry_type) {
  1758. case STATUS_TYPE:
  1759. qla2x00_status_entry(vha, rsp, pkt);
  1760. break;
  1761. case STATUS_CONT_TYPE:
  1762. qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
  1763. break;
  1764. case VP_RPT_ID_IOCB_TYPE:
  1765. qla24xx_report_id_acquisition(vha,
  1766. (struct vp_rpt_id_entry_24xx *)pkt);
  1767. break;
  1768. case LOGINOUT_PORT_IOCB_TYPE:
  1769. qla24xx_logio_entry(vha, rsp->req,
  1770. (struct logio_entry_24xx *)pkt);
  1771. break;
  1772. case TSK_MGMT_IOCB_TYPE:
  1773. qla24xx_tm_iocb_entry(vha, rsp->req,
  1774. (struct tsk_mgmt_entry *)pkt);
  1775. break;
  1776. case CT_IOCB_TYPE:
  1777. qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
  1778. break;
  1779. case ELS_IOCB_TYPE:
  1780. qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
  1781. break;
  1782. case ABTS_RECV_24XX:
  1783. /* ensure that the ATIO queue is empty */
  1784. qlt_24xx_process_atio_queue(vha);
  1785. case ABTS_RESP_24XX:
  1786. case CTIO_TYPE7:
  1787. case NOTIFY_ACK_TYPE:
  1788. qlt_response_pkt_all_vps(vha, (response_t *)pkt);
  1789. break;
  1790. case MARKER_TYPE:
  1791. /* Do nothing in this case, this check is to prevent it
  1792. * from falling into default case
  1793. */
  1794. break;
  1795. default:
  1796. /* Type Not Supported. */
  1797. ql_dbg(ql_dbg_async, vha, 0x5042,
  1798. "Received unknown response pkt type %x "
  1799. "entry status=%x.\n",
  1800. pkt->entry_type, pkt->entry_status);
  1801. break;
  1802. }
  1803. ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
  1804. wmb();
  1805. }
  1806. /* Adjust ring index */
  1807. if (IS_QLA82XX(ha)) {
  1808. struct device_reg_82xx __iomem *reg = &ha->iobase->isp82;
  1809. WRT_REG_DWORD(&reg->rsp_q_out[0], rsp->ring_index);
  1810. } else
  1811. WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
  1812. }
  1813. static void
  1814. qla2xxx_check_risc_status(scsi_qla_host_t *vha)
  1815. {
  1816. int rval;
  1817. uint32_t cnt;
  1818. struct qla_hw_data *ha = vha->hw;
  1819. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1820. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha))
  1821. return;
  1822. rval = QLA_SUCCESS;
  1823. WRT_REG_DWORD(&reg->iobase_addr, 0x7C00);
  1824. RD_REG_DWORD(&reg->iobase_addr);
  1825. WRT_REG_DWORD(&reg->iobase_window, 0x0001);
  1826. for (cnt = 10000; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
  1827. rval == QLA_SUCCESS; cnt--) {
  1828. if (cnt) {
  1829. WRT_REG_DWORD(&reg->iobase_window, 0x0001);
  1830. udelay(10);
  1831. } else
  1832. rval = QLA_FUNCTION_TIMEOUT;
  1833. }
  1834. if (rval == QLA_SUCCESS)
  1835. goto next_test;
  1836. WRT_REG_DWORD(&reg->iobase_window, 0x0003);
  1837. for (cnt = 100; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
  1838. rval == QLA_SUCCESS; cnt--) {
  1839. if (cnt) {
  1840. WRT_REG_DWORD(&reg->iobase_window, 0x0003);
  1841. udelay(10);
  1842. } else
  1843. rval = QLA_FUNCTION_TIMEOUT;
  1844. }
  1845. if (rval != QLA_SUCCESS)
  1846. goto done;
  1847. next_test:
  1848. if (RD_REG_DWORD(&reg->iobase_c8) & BIT_3)
  1849. ql_log(ql_log_info, vha, 0x504c,
  1850. "Additional code -- 0x55AA.\n");
  1851. done:
  1852. WRT_REG_DWORD(&reg->iobase_window, 0x0000);
  1853. RD_REG_DWORD(&reg->iobase_window);
  1854. }
  1855. /**
  1856. * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx.
  1857. * @irq:
  1858. * @dev_id: SCSI driver HA context
  1859. *
  1860. * Called by system whenever the host adapter generates an interrupt.
  1861. *
  1862. * Returns handled flag.
  1863. */
  1864. irqreturn_t
  1865. qla24xx_intr_handler(int irq, void *dev_id)
  1866. {
  1867. scsi_qla_host_t *vha;
  1868. struct qla_hw_data *ha;
  1869. struct device_reg_24xx __iomem *reg;
  1870. int status;
  1871. unsigned long iter;
  1872. uint32_t stat;
  1873. uint32_t hccr;
  1874. uint16_t mb[4];
  1875. struct rsp_que *rsp;
  1876. unsigned long flags;
  1877. rsp = (struct rsp_que *) dev_id;
  1878. if (!rsp) {
  1879. ql_log(ql_log_info, NULL, 0x5059,
  1880. "%s: NULL response queue pointer.\n", __func__);
  1881. return IRQ_NONE;
  1882. }
  1883. ha = rsp->hw;
  1884. reg = &ha->iobase->isp24;
  1885. status = 0;
  1886. if (unlikely(pci_channel_offline(ha->pdev)))
  1887. return IRQ_HANDLED;
  1888. spin_lock_irqsave(&ha->hardware_lock, flags);
  1889. vha = pci_get_drvdata(ha->pdev);
  1890. for (iter = 50; iter--; ) {
  1891. stat = RD_REG_DWORD(&reg->host_status);
  1892. if (stat & HSRX_RISC_PAUSED) {
  1893. if (unlikely(pci_channel_offline(ha->pdev)))
  1894. break;
  1895. hccr = RD_REG_DWORD(&reg->hccr);
  1896. ql_log(ql_log_warn, vha, 0x504b,
  1897. "RISC paused -- HCCR=%x, Dumping firmware.\n",
  1898. hccr);
  1899. qla2xxx_check_risc_status(vha);
  1900. ha->isp_ops->fw_dump(vha, 1);
  1901. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1902. break;
  1903. } else if ((stat & HSRX_RISC_INT) == 0)
  1904. break;
  1905. switch (stat & 0xff) {
  1906. case 0x1:
  1907. case 0x2:
  1908. case 0x10:
  1909. case 0x11:
  1910. qla24xx_mbx_completion(vha, MSW(stat));
  1911. status |= MBX_INTERRUPT;
  1912. break;
  1913. case 0x12:
  1914. mb[0] = MSW(stat);
  1915. mb[1] = RD_REG_WORD(&reg->mailbox1);
  1916. mb[2] = RD_REG_WORD(&reg->mailbox2);
  1917. mb[3] = RD_REG_WORD(&reg->mailbox3);
  1918. qla2x00_async_event(vha, rsp, mb);
  1919. break;
  1920. case 0x13:
  1921. case 0x14:
  1922. qla24xx_process_response_queue(vha, rsp);
  1923. break;
  1924. case 0x1C: /* ATIO queue updated */
  1925. qlt_24xx_process_atio_queue(vha);
  1926. break;
  1927. case 0x1D: /* ATIO and response queues updated */
  1928. qlt_24xx_process_atio_queue(vha);
  1929. qla24xx_process_response_queue(vha, rsp);
  1930. break;
  1931. default:
  1932. ql_dbg(ql_dbg_async, vha, 0x504f,
  1933. "Unrecognized interrupt type (%d).\n", stat * 0xff);
  1934. break;
  1935. }
  1936. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
  1937. RD_REG_DWORD_RELAXED(&reg->hccr);
  1938. }
  1939. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1940. if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
  1941. (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
  1942. set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  1943. complete(&ha->mbx_intr_comp);
  1944. }
  1945. return IRQ_HANDLED;
  1946. }
  1947. static irqreturn_t
  1948. qla24xx_msix_rsp_q(int irq, void *dev_id)
  1949. {
  1950. struct qla_hw_data *ha;
  1951. struct rsp_que *rsp;
  1952. struct device_reg_24xx __iomem *reg;
  1953. struct scsi_qla_host *vha;
  1954. unsigned long flags;
  1955. rsp = (struct rsp_que *) dev_id;
  1956. if (!rsp) {
  1957. ql_log(ql_log_info, NULL, 0x505a,
  1958. "%s: NULL response queue pointer.\n", __func__);
  1959. return IRQ_NONE;
  1960. }
  1961. ha = rsp->hw;
  1962. reg = &ha->iobase->isp24;
  1963. spin_lock_irqsave(&ha->hardware_lock, flags);
  1964. vha = pci_get_drvdata(ha->pdev);
  1965. qla24xx_process_response_queue(vha, rsp);
  1966. if (!ha->flags.disable_msix_handshake) {
  1967. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
  1968. RD_REG_DWORD_RELAXED(&reg->hccr);
  1969. }
  1970. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1971. return IRQ_HANDLED;
  1972. }
  1973. static irqreturn_t
  1974. qla25xx_msix_rsp_q(int irq, void *dev_id)
  1975. {
  1976. struct qla_hw_data *ha;
  1977. struct rsp_que *rsp;
  1978. struct device_reg_24xx __iomem *reg;
  1979. unsigned long flags;
  1980. rsp = (struct rsp_que *) dev_id;
  1981. if (!rsp) {
  1982. ql_log(ql_log_info, NULL, 0x505b,
  1983. "%s: NULL response queue pointer.\n", __func__);
  1984. return IRQ_NONE;
  1985. }
  1986. ha = rsp->hw;
  1987. /* Clear the interrupt, if enabled, for this response queue */
  1988. if (!ha->flags.disable_msix_handshake) {
  1989. reg = &ha->iobase->isp24;
  1990. spin_lock_irqsave(&ha->hardware_lock, flags);
  1991. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
  1992. RD_REG_DWORD_RELAXED(&reg->hccr);
  1993. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1994. }
  1995. queue_work_on((int) (rsp->id - 1), ha->wq, &rsp->q_work);
  1996. return IRQ_HANDLED;
  1997. }
  1998. static irqreturn_t
  1999. qla24xx_msix_default(int irq, void *dev_id)
  2000. {
  2001. scsi_qla_host_t *vha;
  2002. struct qla_hw_data *ha;
  2003. struct rsp_que *rsp;
  2004. struct device_reg_24xx __iomem *reg;
  2005. int status;
  2006. uint32_t stat;
  2007. uint32_t hccr;
  2008. uint16_t mb[4];
  2009. unsigned long flags;
  2010. rsp = (struct rsp_que *) dev_id;
  2011. if (!rsp) {
  2012. ql_log(ql_log_info, NULL, 0x505c,
  2013. "%s: NULL response queue pointer.\n", __func__);
  2014. return IRQ_NONE;
  2015. }
  2016. ha = rsp->hw;
  2017. reg = &ha->iobase->isp24;
  2018. status = 0;
  2019. spin_lock_irqsave(&ha->hardware_lock, flags);
  2020. vha = pci_get_drvdata(ha->pdev);
  2021. do {
  2022. stat = RD_REG_DWORD(&reg->host_status);
  2023. if (stat & HSRX_RISC_PAUSED) {
  2024. if (unlikely(pci_channel_offline(ha->pdev)))
  2025. break;
  2026. hccr = RD_REG_DWORD(&reg->hccr);
  2027. ql_log(ql_log_info, vha, 0x5050,
  2028. "RISC paused -- HCCR=%x, Dumping firmware.\n",
  2029. hccr);
  2030. qla2xxx_check_risc_status(vha);
  2031. ha->isp_ops->fw_dump(vha, 1);
  2032. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  2033. break;
  2034. } else if ((stat & HSRX_RISC_INT) == 0)
  2035. break;
  2036. switch (stat & 0xff) {
  2037. case 0x1:
  2038. case 0x2:
  2039. case 0x10:
  2040. case 0x11:
  2041. qla24xx_mbx_completion(vha, MSW(stat));
  2042. status |= MBX_INTERRUPT;
  2043. break;
  2044. case 0x12:
  2045. mb[0] = MSW(stat);
  2046. mb[1] = RD_REG_WORD(&reg->mailbox1);
  2047. mb[2] = RD_REG_WORD(&reg->mailbox2);
  2048. mb[3] = RD_REG_WORD(&reg->mailbox3);
  2049. qla2x00_async_event(vha, rsp, mb);
  2050. break;
  2051. case 0x13:
  2052. case 0x14:
  2053. qla24xx_process_response_queue(vha, rsp);
  2054. break;
  2055. case 0x1C: /* ATIO queue updated */
  2056. qlt_24xx_process_atio_queue(vha);
  2057. break;
  2058. case 0x1D: /* ATIO and response queues updated */
  2059. qlt_24xx_process_atio_queue(vha);
  2060. qla24xx_process_response_queue(vha, rsp);
  2061. break;
  2062. default:
  2063. ql_dbg(ql_dbg_async, vha, 0x5051,
  2064. "Unrecognized interrupt type (%d).\n", stat & 0xff);
  2065. break;
  2066. }
  2067. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
  2068. } while (0);
  2069. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2070. if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
  2071. (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
  2072. set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  2073. complete(&ha->mbx_intr_comp);
  2074. }
  2075. return IRQ_HANDLED;
  2076. }
  2077. /* Interrupt handling helpers. */
  2078. struct qla_init_msix_entry {
  2079. const char *name;
  2080. irq_handler_t handler;
  2081. };
  2082. static struct qla_init_msix_entry msix_entries[3] = {
  2083. { "qla2xxx (default)", qla24xx_msix_default },
  2084. { "qla2xxx (rsp_q)", qla24xx_msix_rsp_q },
  2085. { "qla2xxx (multiq)", qla25xx_msix_rsp_q },
  2086. };
  2087. static struct qla_init_msix_entry qla82xx_msix_entries[2] = {
  2088. { "qla2xxx (default)", qla82xx_msix_default },
  2089. { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
  2090. };
  2091. static void
  2092. qla24xx_disable_msix(struct qla_hw_data *ha)
  2093. {
  2094. int i;
  2095. struct qla_msix_entry *qentry;
  2096. scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
  2097. for (i = 0; i < ha->msix_count; i++) {
  2098. qentry = &ha->msix_entries[i];
  2099. if (qentry->have_irq)
  2100. free_irq(qentry->vector, qentry->rsp);
  2101. }
  2102. pci_disable_msix(ha->pdev);
  2103. kfree(ha->msix_entries);
  2104. ha->msix_entries = NULL;
  2105. ha->flags.msix_enabled = 0;
  2106. ql_dbg(ql_dbg_init, vha, 0x0042,
  2107. "Disabled the MSI.\n");
  2108. }
  2109. static int
  2110. qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
  2111. {
  2112. #define MIN_MSIX_COUNT 2
  2113. int i, ret;
  2114. struct msix_entry *entries;
  2115. struct qla_msix_entry *qentry;
  2116. scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
  2117. entries = kzalloc(sizeof(struct msix_entry) * ha->msix_count,
  2118. GFP_KERNEL);
  2119. if (!entries) {
  2120. ql_log(ql_log_warn, vha, 0x00bc,
  2121. "Failed to allocate memory for msix_entry.\n");
  2122. return -ENOMEM;
  2123. }
  2124. for (i = 0; i < ha->msix_count; i++)
  2125. entries[i].entry = i;
  2126. ret = pci_enable_msix(ha->pdev, entries, ha->msix_count);
  2127. if (ret) {
  2128. if (ret < MIN_MSIX_COUNT)
  2129. goto msix_failed;
  2130. ql_log(ql_log_warn, vha, 0x00c6,
  2131. "MSI-X: Failed to enable support "
  2132. "-- %d/%d\n Retry with %d vectors.\n",
  2133. ha->msix_count, ret, ret);
  2134. ha->msix_count = ret;
  2135. ret = pci_enable_msix(ha->pdev, entries, ha->msix_count);
  2136. if (ret) {
  2137. msix_failed:
  2138. ql_log(ql_log_fatal, vha, 0x00c7,
  2139. "MSI-X: Failed to enable support, "
  2140. "giving up -- %d/%d.\n",
  2141. ha->msix_count, ret);
  2142. goto msix_out;
  2143. }
  2144. ha->max_rsp_queues = ha->msix_count - 1;
  2145. }
  2146. ha->msix_entries = kzalloc(sizeof(struct qla_msix_entry) *
  2147. ha->msix_count, GFP_KERNEL);
  2148. if (!ha->msix_entries) {
  2149. ql_log(ql_log_fatal, vha, 0x00c8,
  2150. "Failed to allocate memory for ha->msix_entries.\n");
  2151. ret = -ENOMEM;
  2152. goto msix_out;
  2153. }
  2154. ha->flags.msix_enabled = 1;
  2155. for (i = 0; i < ha->msix_count; i++) {
  2156. qentry = &ha->msix_entries[i];
  2157. qentry->vector = entries[i].vector;
  2158. qentry->entry = entries[i].entry;
  2159. qentry->have_irq = 0;
  2160. qentry->rsp = NULL;
  2161. }
  2162. /* Enable MSI-X vectors for the base queue */
  2163. for (i = 0; i < 2; i++) {
  2164. qentry = &ha->msix_entries[i];
  2165. if (IS_QLA82XX(ha)) {
  2166. ret = request_irq(qentry->vector,
  2167. qla82xx_msix_entries[i].handler,
  2168. 0, qla82xx_msix_entries[i].name, rsp);
  2169. } else {
  2170. ret = request_irq(qentry->vector,
  2171. msix_entries[i].handler,
  2172. 0, msix_entries[i].name, rsp);
  2173. }
  2174. if (ret) {
  2175. ql_log(ql_log_fatal, vha, 0x00cb,
  2176. "MSI-X: unable to register handler -- %x/%d.\n",
  2177. qentry->vector, ret);
  2178. qla24xx_disable_msix(ha);
  2179. ha->mqenable = 0;
  2180. goto msix_out;
  2181. }
  2182. qentry->have_irq = 1;
  2183. qentry->rsp = rsp;
  2184. rsp->msix = qentry;
  2185. }
  2186. /* Enable MSI-X vector for response queue update for queue 0 */
  2187. if (IS_QLA83XX(ha)) {
  2188. if (ha->msixbase && ha->mqiobase &&
  2189. (ha->max_rsp_queues > 1 || ha->max_req_queues > 1))
  2190. ha->mqenable = 1;
  2191. } else
  2192. if (ha->mqiobase
  2193. && (ha->max_rsp_queues > 1 || ha->max_req_queues > 1))
  2194. ha->mqenable = 1;
  2195. ql_dbg(ql_dbg_multiq, vha, 0xc005,
  2196. "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
  2197. ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
  2198. ql_dbg(ql_dbg_init, vha, 0x0055,
  2199. "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
  2200. ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
  2201. msix_out:
  2202. kfree(entries);
  2203. return ret;
  2204. }
  2205. int
  2206. qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp)
  2207. {
  2208. int ret;
  2209. device_reg_t __iomem *reg = ha->iobase;
  2210. scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
  2211. /* If possible, enable MSI-X. */
  2212. if (!IS_QLA2432(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
  2213. !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha))
  2214. goto skip_msi;
  2215. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
  2216. (ha->pdev->subsystem_device == 0x7040 ||
  2217. ha->pdev->subsystem_device == 0x7041 ||
  2218. ha->pdev->subsystem_device == 0x1705)) {
  2219. ql_log(ql_log_warn, vha, 0x0034,
  2220. "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n",
  2221. ha->pdev->subsystem_vendor,
  2222. ha->pdev->subsystem_device);
  2223. goto skip_msi;
  2224. }
  2225. if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) {
  2226. ql_log(ql_log_warn, vha, 0x0035,
  2227. "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n",
  2228. ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX);
  2229. goto skip_msix;
  2230. }
  2231. ret = qla24xx_enable_msix(ha, rsp);
  2232. if (!ret) {
  2233. ql_dbg(ql_dbg_init, vha, 0x0036,
  2234. "MSI-X: Enabled (0x%X, 0x%X).\n",
  2235. ha->chip_revision, ha->fw_attributes);
  2236. goto clear_risc_ints;
  2237. }
  2238. ql_log(ql_log_info, vha, 0x0037,
  2239. "MSI-X Falling back-to MSI mode -%d.\n", ret);
  2240. skip_msix:
  2241. if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
  2242. !IS_QLA8001(ha))
  2243. goto skip_msi;
  2244. ret = pci_enable_msi(ha->pdev);
  2245. if (!ret) {
  2246. ql_dbg(ql_dbg_init, vha, 0x0038,
  2247. "MSI: Enabled.\n");
  2248. ha->flags.msi_enabled = 1;
  2249. } else
  2250. ql_log(ql_log_warn, vha, 0x0039,
  2251. "MSI-X; Falling back-to INTa mode -- %d.\n", ret);
  2252. skip_msi:
  2253. ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler,
  2254. ha->flags.msi_enabled ? 0 : IRQF_SHARED,
  2255. QLA2XXX_DRIVER_NAME, rsp);
  2256. if (ret) {
  2257. ql_log(ql_log_warn, vha, 0x003a,
  2258. "Failed to reserve interrupt %d already in use.\n",
  2259. ha->pdev->irq);
  2260. goto fail;
  2261. }
  2262. clear_risc_ints:
  2263. /*
  2264. * FIXME: Noted that 8014s were being dropped during NK testing.
  2265. * Timing deltas during MSI-X/INTa transitions?
  2266. */
  2267. if (IS_QLA81XX(ha) || IS_QLA82XX(ha) || IS_QLA83XX(ha))
  2268. goto fail;
  2269. spin_lock_irq(&ha->hardware_lock);
  2270. if (IS_FWI2_CAPABLE(ha)) {
  2271. WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_CLR_HOST_INT);
  2272. WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_CLR_RISC_INT);
  2273. } else {
  2274. WRT_REG_WORD(&reg->isp.semaphore, 0);
  2275. WRT_REG_WORD(&reg->isp.hccr, HCCR_CLR_RISC_INT);
  2276. WRT_REG_WORD(&reg->isp.hccr, HCCR_CLR_HOST_INT);
  2277. }
  2278. spin_unlock_irq(&ha->hardware_lock);
  2279. fail:
  2280. return ret;
  2281. }
  2282. void
  2283. qla2x00_free_irqs(scsi_qla_host_t *vha)
  2284. {
  2285. struct qla_hw_data *ha = vha->hw;
  2286. struct rsp_que *rsp;
  2287. /*
  2288. * We need to check that ha->rsp_q_map is valid in case we are called
  2289. * from a probe failure context.
  2290. */
  2291. if (!ha->rsp_q_map || !ha->rsp_q_map[0])
  2292. return;
  2293. rsp = ha->rsp_q_map[0];
  2294. if (ha->flags.msix_enabled)
  2295. qla24xx_disable_msix(ha);
  2296. else if (ha->flags.msi_enabled) {
  2297. free_irq(ha->pdev->irq, rsp);
  2298. pci_disable_msi(ha->pdev);
  2299. } else
  2300. free_irq(ha->pdev->irq, rsp);
  2301. }
  2302. int qla25xx_request_irq(struct rsp_que *rsp)
  2303. {
  2304. struct qla_hw_data *ha = rsp->hw;
  2305. struct qla_init_msix_entry *intr = &msix_entries[2];
  2306. struct qla_msix_entry *msix = rsp->msix;
  2307. scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
  2308. int ret;
  2309. ret = request_irq(msix->vector, intr->handler, 0, intr->name, rsp);
  2310. if (ret) {
  2311. ql_log(ql_log_fatal, vha, 0x00e6,
  2312. "MSI-X: Unable to register handler -- %x/%d.\n",
  2313. msix->vector, ret);
  2314. return ret;
  2315. }
  2316. msix->have_irq = 1;
  2317. msix->rsp = rsp;
  2318. return ret;
  2319. }