qdio_main.c 45 KB

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  1. /*
  2. * linux/drivers/s390/cio/qdio_main.c
  3. *
  4. * Linux for s390 qdio support, buffer handling, qdio API and module support.
  5. *
  6. * Copyright 2000,2008 IBM Corp.
  7. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  8. * Jan Glauber <jang@linux.vnet.ibm.com>
  9. * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
  10. */
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/timer.h>
  15. #include <linux/delay.h>
  16. #include <linux/gfp.h>
  17. #include <linux/io.h>
  18. #include <linux/atomic.h>
  19. #include <asm/debug.h>
  20. #include <asm/qdio.h>
  21. #include <asm/ipl.h>
  22. #include "cio.h"
  23. #include "css.h"
  24. #include "device.h"
  25. #include "qdio.h"
  26. #include "qdio_debug.h"
  27. MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
  28. "Jan Glauber <jang@linux.vnet.ibm.com>");
  29. MODULE_DESCRIPTION("QDIO base support");
  30. MODULE_LICENSE("GPL");
  31. static inline int do_siga_sync(unsigned long schid,
  32. unsigned int out_mask, unsigned int in_mask,
  33. unsigned int fc)
  34. {
  35. register unsigned long __fc asm ("0") = fc;
  36. register unsigned long __schid asm ("1") = schid;
  37. register unsigned long out asm ("2") = out_mask;
  38. register unsigned long in asm ("3") = in_mask;
  39. int cc;
  40. asm volatile(
  41. " siga 0\n"
  42. " ipm %0\n"
  43. " srl %0,28\n"
  44. : "=d" (cc)
  45. : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
  46. return cc;
  47. }
  48. static inline int do_siga_input(unsigned long schid, unsigned int mask,
  49. unsigned int fc)
  50. {
  51. register unsigned long __fc asm ("0") = fc;
  52. register unsigned long __schid asm ("1") = schid;
  53. register unsigned long __mask asm ("2") = mask;
  54. int cc;
  55. asm volatile(
  56. " siga 0\n"
  57. " ipm %0\n"
  58. " srl %0,28\n"
  59. : "=d" (cc)
  60. : "d" (__fc), "d" (__schid), "d" (__mask) : "cc");
  61. return cc;
  62. }
  63. /**
  64. * do_siga_output - perform SIGA-w/wt function
  65. * @schid: subchannel id or in case of QEBSM the subchannel token
  66. * @mask: which output queues to process
  67. * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
  68. * @fc: function code to perform
  69. *
  70. * Returns condition code.
  71. * Note: For IQDC unicast queues only the highest priority queue is processed.
  72. */
  73. static inline int do_siga_output(unsigned long schid, unsigned long mask,
  74. unsigned int *bb, unsigned int fc,
  75. unsigned long aob)
  76. {
  77. register unsigned long __fc asm("0") = fc;
  78. register unsigned long __schid asm("1") = schid;
  79. register unsigned long __mask asm("2") = mask;
  80. register unsigned long __aob asm("3") = aob;
  81. int cc;
  82. asm volatile(
  83. " siga 0\n"
  84. " ipm %0\n"
  85. " srl %0,28\n"
  86. : "=d" (cc), "+d" (__fc), "+d" (__aob)
  87. : "d" (__schid), "d" (__mask)
  88. : "cc");
  89. *bb = __fc >> 31;
  90. return cc;
  91. }
  92. static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
  93. {
  94. /* all done or next buffer state different */
  95. if (ccq == 0 || ccq == 32)
  96. return 0;
  97. /* no buffer processed */
  98. if (ccq == 97)
  99. return 1;
  100. /* not all buffers processed */
  101. if (ccq == 96)
  102. return 2;
  103. /* notify devices immediately */
  104. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  105. return -EIO;
  106. }
  107. /**
  108. * qdio_do_eqbs - extract buffer states for QEBSM
  109. * @q: queue to manipulate
  110. * @state: state of the extracted buffers
  111. * @start: buffer number to start at
  112. * @count: count of buffers to examine
  113. * @auto_ack: automatically acknowledge buffers
  114. *
  115. * Returns the number of successfully extracted equal buffer states.
  116. * Stops processing if a state is different from the last buffers state.
  117. */
  118. static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
  119. int start, int count, int auto_ack)
  120. {
  121. int rc, tmp_count = count, tmp_start = start, nr = q->nr, retried = 0;
  122. unsigned int ccq = 0;
  123. BUG_ON(!q->irq_ptr->sch_token);
  124. qperf_inc(q, eqbs);
  125. if (!q->is_input_q)
  126. nr += q->irq_ptr->nr_input_qs;
  127. again:
  128. ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
  129. auto_ack);
  130. rc = qdio_check_ccq(q, ccq);
  131. if (!rc)
  132. return count - tmp_count;
  133. if (rc == 1) {
  134. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
  135. goto again;
  136. }
  137. if (rc == 2) {
  138. BUG_ON(tmp_count == count);
  139. qperf_inc(q, eqbs_partial);
  140. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS part:%02x",
  141. tmp_count);
  142. /*
  143. * Retry once, if that fails bail out and process the
  144. * extracted buffers before trying again.
  145. */
  146. if (!retried++)
  147. goto again;
  148. else
  149. return count - tmp_count;
  150. }
  151. DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
  152. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  153. q->handler(q->irq_ptr->cdev, QDIO_ERROR_GET_BUF_STATE,
  154. q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
  155. return 0;
  156. }
  157. /**
  158. * qdio_do_sqbs - set buffer states for QEBSM
  159. * @q: queue to manipulate
  160. * @state: new state of the buffers
  161. * @start: first buffer number to change
  162. * @count: how many buffers to change
  163. *
  164. * Returns the number of successfully changed buffers.
  165. * Does retrying until the specified count of buffer states is set or an
  166. * error occurs.
  167. */
  168. static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
  169. int count)
  170. {
  171. unsigned int ccq = 0;
  172. int tmp_count = count, tmp_start = start;
  173. int nr = q->nr;
  174. int rc;
  175. if (!count)
  176. return 0;
  177. BUG_ON(!q->irq_ptr->sch_token);
  178. qperf_inc(q, sqbs);
  179. if (!q->is_input_q)
  180. nr += q->irq_ptr->nr_input_qs;
  181. again:
  182. ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
  183. rc = qdio_check_ccq(q, ccq);
  184. if (!rc) {
  185. WARN_ON(tmp_count);
  186. return count - tmp_count;
  187. }
  188. if (rc == 1 || rc == 2) {
  189. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
  190. qperf_inc(q, sqbs_partial);
  191. goto again;
  192. }
  193. DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
  194. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  195. q->handler(q->irq_ptr->cdev, QDIO_ERROR_SET_BUF_STATE,
  196. q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
  197. return 0;
  198. }
  199. /* returns number of examined buffers and their common state in *state */
  200. static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
  201. unsigned char *state, unsigned int count,
  202. int auto_ack, int merge_pending)
  203. {
  204. unsigned char __state = 0;
  205. int i;
  206. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  207. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  208. if (is_qebsm(q))
  209. return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
  210. for (i = 0; i < count; i++) {
  211. if (!__state) {
  212. __state = q->slsb.val[bufnr];
  213. if (merge_pending && __state == SLSB_P_OUTPUT_PENDING)
  214. __state = SLSB_P_OUTPUT_EMPTY;
  215. } else if (merge_pending) {
  216. if ((q->slsb.val[bufnr] & __state) != __state)
  217. break;
  218. } else if (q->slsb.val[bufnr] != __state)
  219. break;
  220. bufnr = next_buf(bufnr);
  221. }
  222. *state = __state;
  223. return i;
  224. }
  225. static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
  226. unsigned char *state, int auto_ack)
  227. {
  228. return get_buf_states(q, bufnr, state, 1, auto_ack, 0);
  229. }
  230. /* wrap-around safe setting of slsb states, returns number of changed buffers */
  231. static inline int set_buf_states(struct qdio_q *q, int bufnr,
  232. unsigned char state, int count)
  233. {
  234. int i;
  235. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  236. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  237. if (is_qebsm(q))
  238. return qdio_do_sqbs(q, state, bufnr, count);
  239. for (i = 0; i < count; i++) {
  240. xchg(&q->slsb.val[bufnr], state);
  241. bufnr = next_buf(bufnr);
  242. }
  243. return count;
  244. }
  245. static inline int set_buf_state(struct qdio_q *q, int bufnr,
  246. unsigned char state)
  247. {
  248. return set_buf_states(q, bufnr, state, 1);
  249. }
  250. /* set slsb states to initial state */
  251. static void qdio_init_buf_states(struct qdio_irq *irq_ptr)
  252. {
  253. struct qdio_q *q;
  254. int i;
  255. for_each_input_queue(irq_ptr, q, i)
  256. set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
  257. QDIO_MAX_BUFFERS_PER_Q);
  258. for_each_output_queue(irq_ptr, q, i)
  259. set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
  260. QDIO_MAX_BUFFERS_PER_Q);
  261. }
  262. static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
  263. unsigned int input)
  264. {
  265. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  266. unsigned int fc = QDIO_SIGA_SYNC;
  267. int cc;
  268. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
  269. qperf_inc(q, siga_sync);
  270. if (is_qebsm(q)) {
  271. schid = q->irq_ptr->sch_token;
  272. fc |= QDIO_SIGA_QEBSM_FLAG;
  273. }
  274. cc = do_siga_sync(schid, output, input, fc);
  275. if (unlikely(cc))
  276. DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
  277. return (cc) ? -EIO : 0;
  278. }
  279. static inline int qdio_siga_sync_q(struct qdio_q *q)
  280. {
  281. if (q->is_input_q)
  282. return qdio_siga_sync(q, 0, q->mask);
  283. else
  284. return qdio_siga_sync(q, q->mask, 0);
  285. }
  286. static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit,
  287. unsigned long aob)
  288. {
  289. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  290. unsigned int fc = QDIO_SIGA_WRITE;
  291. u64 start_time = 0;
  292. int retries = 0, cc;
  293. unsigned long laob = 0;
  294. if (q->u.out.use_cq && aob != 0) {
  295. fc = QDIO_SIGA_WRITEQ;
  296. laob = aob;
  297. }
  298. if (is_qebsm(q)) {
  299. schid = q->irq_ptr->sch_token;
  300. fc |= QDIO_SIGA_QEBSM_FLAG;
  301. }
  302. again:
  303. WARN_ON_ONCE((aob && queue_type(q) != QDIO_IQDIO_QFMT) ||
  304. (aob && fc != QDIO_SIGA_WRITEQ));
  305. cc = do_siga_output(schid, q->mask, busy_bit, fc, laob);
  306. /* hipersocket busy condition */
  307. if (unlikely(*busy_bit)) {
  308. WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2);
  309. retries++;
  310. if (!start_time) {
  311. start_time = get_clock();
  312. goto again;
  313. }
  314. if ((get_clock() - start_time) < QDIO_BUSY_BIT_PATIENCE)
  315. goto again;
  316. }
  317. if (retries) {
  318. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr,
  319. "%4x cc2 BB1:%1d", SCH_NO(q), q->nr);
  320. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries);
  321. }
  322. return cc;
  323. }
  324. static inline int qdio_siga_input(struct qdio_q *q)
  325. {
  326. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  327. unsigned int fc = QDIO_SIGA_READ;
  328. int cc;
  329. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
  330. qperf_inc(q, siga_read);
  331. if (is_qebsm(q)) {
  332. schid = q->irq_ptr->sch_token;
  333. fc |= QDIO_SIGA_QEBSM_FLAG;
  334. }
  335. cc = do_siga_input(schid, q->mask, fc);
  336. if (unlikely(cc))
  337. DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
  338. return (cc) ? -EIO : 0;
  339. }
  340. #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
  341. #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
  342. static inline void qdio_sync_queues(struct qdio_q *q)
  343. {
  344. /* PCI capable outbound queues will also be scanned so sync them too */
  345. if (pci_out_supported(q))
  346. qdio_siga_sync_all(q);
  347. else
  348. qdio_siga_sync_q(q);
  349. }
  350. int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
  351. unsigned char *state)
  352. {
  353. if (need_siga_sync(q))
  354. qdio_siga_sync_q(q);
  355. return get_buf_states(q, bufnr, state, 1, 0, 0);
  356. }
  357. static inline void qdio_stop_polling(struct qdio_q *q)
  358. {
  359. if (!q->u.in.polling)
  360. return;
  361. q->u.in.polling = 0;
  362. qperf_inc(q, stop_polling);
  363. /* show the card that we are not polling anymore */
  364. if (is_qebsm(q)) {
  365. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  366. q->u.in.ack_count);
  367. q->u.in.ack_count = 0;
  368. } else
  369. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  370. }
  371. static inline void account_sbals(struct qdio_q *q, int count)
  372. {
  373. int pos = 0;
  374. q->q_stats.nr_sbal_total += count;
  375. if (count == QDIO_MAX_BUFFERS_MASK) {
  376. q->q_stats.nr_sbals[7]++;
  377. return;
  378. }
  379. while (count >>= 1)
  380. pos++;
  381. q->q_stats.nr_sbals[pos]++;
  382. }
  383. static void process_buffer_error(struct qdio_q *q, int count)
  384. {
  385. unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT :
  386. SLSB_P_OUTPUT_NOT_INIT;
  387. q->qdio_error = QDIO_ERROR_SLSB_STATE;
  388. /* special handling for no target buffer empty */
  389. if ((!q->is_input_q &&
  390. (q->sbal[q->first_to_check]->element[15].sflags) == 0x10)) {
  391. qperf_inc(q, target_full);
  392. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
  393. q->first_to_check);
  394. goto set;
  395. }
  396. DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
  397. DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
  398. DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
  399. DBF_ERROR("F14:%2x F15:%2x",
  400. q->sbal[q->first_to_check]->element[14].sflags,
  401. q->sbal[q->first_to_check]->element[15].sflags);
  402. set:
  403. /*
  404. * Interrupts may be avoided as long as the error is present
  405. * so change the buffer state immediately to avoid starvation.
  406. */
  407. set_buf_states(q, q->first_to_check, state, count);
  408. }
  409. static inline void inbound_primed(struct qdio_q *q, int count)
  410. {
  411. int new;
  412. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count);
  413. /* for QEBSM the ACK was already set by EQBS */
  414. if (is_qebsm(q)) {
  415. if (!q->u.in.polling) {
  416. q->u.in.polling = 1;
  417. q->u.in.ack_count = count;
  418. q->u.in.ack_start = q->first_to_check;
  419. return;
  420. }
  421. /* delete the previous ACK's */
  422. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  423. q->u.in.ack_count);
  424. q->u.in.ack_count = count;
  425. q->u.in.ack_start = q->first_to_check;
  426. return;
  427. }
  428. /*
  429. * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
  430. * or by the next inbound run.
  431. */
  432. new = add_buf(q->first_to_check, count - 1);
  433. if (q->u.in.polling) {
  434. /* reset the previous ACK but first set the new one */
  435. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  436. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  437. } else {
  438. q->u.in.polling = 1;
  439. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  440. }
  441. q->u.in.ack_start = new;
  442. count--;
  443. if (!count)
  444. return;
  445. /* need to change ALL buffers to get more interrupts */
  446. set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
  447. }
  448. static int get_inbound_buffer_frontier(struct qdio_q *q)
  449. {
  450. int count, stop;
  451. unsigned char state = 0;
  452. q->timestamp = get_clock();
  453. /*
  454. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  455. * would return 0.
  456. */
  457. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  458. stop = add_buf(q->first_to_check, count);
  459. if (q->first_to_check == stop)
  460. goto out;
  461. /*
  462. * No siga sync here, as a PCI or we after a thin interrupt
  463. * already sync'ed the queues.
  464. */
  465. count = get_buf_states(q, q->first_to_check, &state, count, 1, 0);
  466. if (!count)
  467. goto out;
  468. switch (state) {
  469. case SLSB_P_INPUT_PRIMED:
  470. inbound_primed(q, count);
  471. q->first_to_check = add_buf(q->first_to_check, count);
  472. if (atomic_sub(count, &q->nr_buf_used) == 0)
  473. qperf_inc(q, inbound_queue_full);
  474. if (q->irq_ptr->perf_stat_enabled)
  475. account_sbals(q, count);
  476. break;
  477. case SLSB_P_INPUT_ERROR:
  478. process_buffer_error(q, count);
  479. q->first_to_check = add_buf(q->first_to_check, count);
  480. atomic_sub(count, &q->nr_buf_used);
  481. if (q->irq_ptr->perf_stat_enabled)
  482. account_sbals_error(q, count);
  483. break;
  484. case SLSB_CU_INPUT_EMPTY:
  485. case SLSB_P_INPUT_NOT_INIT:
  486. case SLSB_P_INPUT_ACK:
  487. if (q->irq_ptr->perf_stat_enabled)
  488. q->q_stats.nr_sbal_nop++;
  489. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
  490. break;
  491. default:
  492. BUG();
  493. }
  494. out:
  495. return q->first_to_check;
  496. }
  497. static int qdio_inbound_q_moved(struct qdio_q *q)
  498. {
  499. int bufnr;
  500. bufnr = get_inbound_buffer_frontier(q);
  501. if (bufnr != q->last_move) {
  502. q->last_move = bufnr;
  503. if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
  504. q->u.in.timestamp = get_clock();
  505. return 1;
  506. } else
  507. return 0;
  508. }
  509. static inline int qdio_inbound_q_done(struct qdio_q *q)
  510. {
  511. unsigned char state = 0;
  512. if (!atomic_read(&q->nr_buf_used))
  513. return 1;
  514. if (need_siga_sync(q))
  515. qdio_siga_sync_q(q);
  516. get_buf_state(q, q->first_to_check, &state, 0);
  517. if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
  518. /* more work coming */
  519. return 0;
  520. if (is_thinint_irq(q->irq_ptr))
  521. return 1;
  522. /* don't poll under z/VM */
  523. if (MACHINE_IS_VM)
  524. return 1;
  525. /*
  526. * At this point we know, that inbound first_to_check
  527. * has (probably) not moved (see qdio_inbound_processing).
  528. */
  529. if (get_clock() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
  530. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
  531. q->first_to_check);
  532. return 1;
  533. } else
  534. return 0;
  535. }
  536. static inline int contains_aobs(struct qdio_q *q)
  537. {
  538. return !q->is_input_q && q->u.out.use_cq;
  539. }
  540. static inline void qdio_trace_aob(struct qdio_irq *irq, struct qdio_q *q,
  541. int i, struct qaob *aob)
  542. {
  543. int tmp;
  544. DBF_DEV_EVENT(DBF_INFO, irq, "AOB%d:%lx", i,
  545. (unsigned long) virt_to_phys(aob));
  546. DBF_DEV_EVENT(DBF_INFO, irq, "RES00:%lx",
  547. (unsigned long) aob->res0[0]);
  548. DBF_DEV_EVENT(DBF_INFO, irq, "RES01:%lx",
  549. (unsigned long) aob->res0[1]);
  550. DBF_DEV_EVENT(DBF_INFO, irq, "RES02:%lx",
  551. (unsigned long) aob->res0[2]);
  552. DBF_DEV_EVENT(DBF_INFO, irq, "RES03:%lx",
  553. (unsigned long) aob->res0[3]);
  554. DBF_DEV_EVENT(DBF_INFO, irq, "RES04:%lx",
  555. (unsigned long) aob->res0[4]);
  556. DBF_DEV_EVENT(DBF_INFO, irq, "RES05:%lx",
  557. (unsigned long) aob->res0[5]);
  558. DBF_DEV_EVENT(DBF_INFO, irq, "RES1:%x", aob->res1);
  559. DBF_DEV_EVENT(DBF_INFO, irq, "RES2:%x", aob->res2);
  560. DBF_DEV_EVENT(DBF_INFO, irq, "RES3:%x", aob->res3);
  561. DBF_DEV_EVENT(DBF_INFO, irq, "AORC:%u", aob->aorc);
  562. DBF_DEV_EVENT(DBF_INFO, irq, "FLAGS:%u", aob->flags);
  563. DBF_DEV_EVENT(DBF_INFO, irq, "CBTBS:%u", aob->cbtbs);
  564. DBF_DEV_EVENT(DBF_INFO, irq, "SBC:%u", aob->sb_count);
  565. for (tmp = 0; tmp < QDIO_MAX_ELEMENTS_PER_BUFFER; ++tmp) {
  566. DBF_DEV_EVENT(DBF_INFO, irq, "SBA%d:%lx", tmp,
  567. (unsigned long) aob->sba[tmp]);
  568. DBF_DEV_EVENT(DBF_INFO, irq, "rSBA%d:%lx", tmp,
  569. (unsigned long) q->sbal[i]->element[tmp].addr);
  570. DBF_DEV_EVENT(DBF_INFO, irq, "DC%d:%u", tmp, aob->dcount[tmp]);
  571. DBF_DEV_EVENT(DBF_INFO, irq, "rDC%d:%u", tmp,
  572. q->sbal[i]->element[tmp].length);
  573. }
  574. DBF_DEV_EVENT(DBF_INFO, irq, "USER0:%lx", (unsigned long) aob->user0);
  575. for (tmp = 0; tmp < 2; ++tmp) {
  576. DBF_DEV_EVENT(DBF_INFO, irq, "RES4%d:%lx", tmp,
  577. (unsigned long) aob->res4[tmp]);
  578. }
  579. DBF_DEV_EVENT(DBF_INFO, irq, "USER1:%lx", (unsigned long) aob->user1);
  580. DBF_DEV_EVENT(DBF_INFO, irq, "USER2:%lx", (unsigned long) aob->user2);
  581. }
  582. static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count)
  583. {
  584. unsigned char state = 0;
  585. int j, b = start;
  586. if (!contains_aobs(q))
  587. return;
  588. for (j = 0; j < count; ++j) {
  589. get_buf_state(q, b, &state, 0);
  590. if (state == SLSB_P_OUTPUT_PENDING) {
  591. struct qaob *aob = q->u.out.aobs[b];
  592. if (aob == NULL)
  593. continue;
  594. BUG_ON(q->u.out.sbal_state == NULL);
  595. q->u.out.sbal_state[b].flags |=
  596. QDIO_OUTBUF_STATE_FLAG_PENDING;
  597. q->u.out.aobs[b] = NULL;
  598. } else if (state == SLSB_P_OUTPUT_EMPTY) {
  599. BUG_ON(q->u.out.sbal_state == NULL);
  600. q->u.out.sbal_state[b].aob = NULL;
  601. }
  602. b = next_buf(b);
  603. }
  604. }
  605. static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q,
  606. int bufnr)
  607. {
  608. unsigned long phys_aob = 0;
  609. if (!q->use_cq)
  610. goto out;
  611. if (!q->aobs[bufnr]) {
  612. struct qaob *aob = qdio_allocate_aob();
  613. q->aobs[bufnr] = aob;
  614. }
  615. if (q->aobs[bufnr]) {
  616. BUG_ON(q->sbal_state == NULL);
  617. q->sbal_state[bufnr].flags = QDIO_OUTBUF_STATE_FLAG_NONE;
  618. q->sbal_state[bufnr].aob = q->aobs[bufnr];
  619. q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user;
  620. phys_aob = virt_to_phys(q->aobs[bufnr]);
  621. BUG_ON(phys_aob & 0xFF);
  622. }
  623. out:
  624. return phys_aob;
  625. }
  626. static void qdio_kick_handler(struct qdio_q *q)
  627. {
  628. int start = q->first_to_kick;
  629. int end = q->first_to_check;
  630. int count;
  631. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  632. return;
  633. count = sub_buf(end, start);
  634. if (q->is_input_q) {
  635. qperf_inc(q, inbound_handler);
  636. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
  637. } else {
  638. qperf_inc(q, outbound_handler);
  639. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
  640. start, count);
  641. }
  642. qdio_handle_aobs(q, start, count);
  643. q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
  644. q->irq_ptr->int_parm);
  645. /* for the next time */
  646. q->first_to_kick = end;
  647. q->qdio_error = 0;
  648. }
  649. static void __qdio_inbound_processing(struct qdio_q *q)
  650. {
  651. qperf_inc(q, tasklet_inbound);
  652. if (!qdio_inbound_q_moved(q))
  653. return;
  654. qdio_kick_handler(q);
  655. if (!qdio_inbound_q_done(q)) {
  656. /* means poll time is not yet over */
  657. qperf_inc(q, tasklet_inbound_resched);
  658. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  659. tasklet_schedule(&q->tasklet);
  660. return;
  661. }
  662. }
  663. qdio_stop_polling(q);
  664. /*
  665. * We need to check again to not lose initiative after
  666. * resetting the ACK state.
  667. */
  668. if (!qdio_inbound_q_done(q)) {
  669. qperf_inc(q, tasklet_inbound_resched2);
  670. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  671. tasklet_schedule(&q->tasklet);
  672. }
  673. }
  674. void qdio_inbound_processing(unsigned long data)
  675. {
  676. struct qdio_q *q = (struct qdio_q *)data;
  677. __qdio_inbound_processing(q);
  678. }
  679. static int get_outbound_buffer_frontier(struct qdio_q *q)
  680. {
  681. int count, stop;
  682. unsigned char state = 0;
  683. q->timestamp = get_clock();
  684. if (need_siga_sync(q))
  685. if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
  686. !pci_out_supported(q)) ||
  687. (queue_type(q) == QDIO_IQDIO_QFMT &&
  688. multicast_outbound(q)))
  689. qdio_siga_sync_q(q);
  690. /*
  691. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  692. * would return 0.
  693. */
  694. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  695. stop = add_buf(q->first_to_check, count);
  696. if (q->first_to_check == stop)
  697. goto out;
  698. count = get_buf_states(q, q->first_to_check, &state, count, 0, 1);
  699. if (!count)
  700. goto out;
  701. switch (state) {
  702. case SLSB_P_OUTPUT_PENDING:
  703. BUG();
  704. case SLSB_P_OUTPUT_EMPTY:
  705. /* the adapter got it */
  706. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr,
  707. "out empty:%1d %02x", q->nr, count);
  708. atomic_sub(count, &q->nr_buf_used);
  709. q->first_to_check = add_buf(q->first_to_check, count);
  710. if (q->irq_ptr->perf_stat_enabled)
  711. account_sbals(q, count);
  712. break;
  713. case SLSB_P_OUTPUT_ERROR:
  714. process_buffer_error(q, count);
  715. q->first_to_check = add_buf(q->first_to_check, count);
  716. atomic_sub(count, &q->nr_buf_used);
  717. if (q->irq_ptr->perf_stat_enabled)
  718. account_sbals_error(q, count);
  719. break;
  720. case SLSB_CU_OUTPUT_PRIMED:
  721. /* the adapter has not fetched the output yet */
  722. if (q->irq_ptr->perf_stat_enabled)
  723. q->q_stats.nr_sbal_nop++;
  724. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d",
  725. q->nr);
  726. break;
  727. case SLSB_P_OUTPUT_NOT_INIT:
  728. case SLSB_P_OUTPUT_HALTED:
  729. break;
  730. default:
  731. BUG();
  732. }
  733. out:
  734. return q->first_to_check;
  735. }
  736. /* all buffers processed? */
  737. static inline int qdio_outbound_q_done(struct qdio_q *q)
  738. {
  739. return atomic_read(&q->nr_buf_used) == 0;
  740. }
  741. static inline int qdio_outbound_q_moved(struct qdio_q *q)
  742. {
  743. int bufnr;
  744. bufnr = get_outbound_buffer_frontier(q);
  745. if (bufnr != q->last_move) {
  746. q->last_move = bufnr;
  747. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
  748. return 1;
  749. } else
  750. return 0;
  751. }
  752. static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob)
  753. {
  754. int retries = 0, cc;
  755. unsigned int busy_bit;
  756. if (!need_siga_out(q))
  757. return 0;
  758. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
  759. retry:
  760. qperf_inc(q, siga_write);
  761. cc = qdio_siga_output(q, &busy_bit, aob);
  762. switch (cc) {
  763. case 0:
  764. break;
  765. case 2:
  766. if (busy_bit) {
  767. while (++retries < QDIO_BUSY_BIT_RETRIES) {
  768. mdelay(QDIO_BUSY_BIT_RETRY_DELAY);
  769. goto retry;
  770. }
  771. DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr);
  772. cc = -EBUSY;
  773. } else {
  774. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
  775. cc = -ENOBUFS;
  776. }
  777. break;
  778. case 1:
  779. case 3:
  780. DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
  781. cc = -EIO;
  782. break;
  783. }
  784. if (retries) {
  785. DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr);
  786. DBF_ERROR("count:%u", retries);
  787. }
  788. return cc;
  789. }
  790. static void __qdio_outbound_processing(struct qdio_q *q)
  791. {
  792. qperf_inc(q, tasklet_outbound);
  793. BUG_ON(atomic_read(&q->nr_buf_used) < 0);
  794. if (qdio_outbound_q_moved(q))
  795. qdio_kick_handler(q);
  796. if (queue_type(q) == QDIO_ZFCP_QFMT)
  797. if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
  798. goto sched;
  799. if (q->u.out.pci_out_enabled)
  800. return;
  801. /*
  802. * Now we know that queue type is either qeth without pci enabled
  803. * or HiperSockets. Make sure buffer switch from PRIMED to EMPTY
  804. * is noticed and outbound_handler is called after some time.
  805. */
  806. if (qdio_outbound_q_done(q))
  807. del_timer(&q->u.out.timer);
  808. else
  809. if (!timer_pending(&q->u.out.timer))
  810. mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
  811. return;
  812. sched:
  813. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  814. return;
  815. tasklet_schedule(&q->tasklet);
  816. }
  817. /* outbound tasklet */
  818. void qdio_outbound_processing(unsigned long data)
  819. {
  820. struct qdio_q *q = (struct qdio_q *)data;
  821. __qdio_outbound_processing(q);
  822. }
  823. void qdio_outbound_timer(unsigned long data)
  824. {
  825. struct qdio_q *q = (struct qdio_q *)data;
  826. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  827. return;
  828. tasklet_schedule(&q->tasklet);
  829. }
  830. static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
  831. {
  832. struct qdio_q *out;
  833. int i;
  834. if (!pci_out_supported(q))
  835. return;
  836. for_each_output_queue(q->irq_ptr, out, i)
  837. if (!qdio_outbound_q_done(out))
  838. tasklet_schedule(&out->tasklet);
  839. }
  840. static void __tiqdio_inbound_processing(struct qdio_q *q)
  841. {
  842. qperf_inc(q, tasklet_inbound);
  843. if (need_siga_sync(q) && need_siga_sync_after_ai(q))
  844. qdio_sync_queues(q);
  845. /*
  846. * The interrupt could be caused by a PCI request. Check the
  847. * PCI capable outbound queues.
  848. */
  849. qdio_check_outbound_after_thinint(q);
  850. if (!qdio_inbound_q_moved(q))
  851. return;
  852. qdio_kick_handler(q);
  853. if (!qdio_inbound_q_done(q)) {
  854. qperf_inc(q, tasklet_inbound_resched);
  855. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  856. tasklet_schedule(&q->tasklet);
  857. return;
  858. }
  859. }
  860. qdio_stop_polling(q);
  861. /*
  862. * We need to check again to not lose initiative after
  863. * resetting the ACK state.
  864. */
  865. if (!qdio_inbound_q_done(q)) {
  866. qperf_inc(q, tasklet_inbound_resched2);
  867. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  868. tasklet_schedule(&q->tasklet);
  869. }
  870. }
  871. void tiqdio_inbound_processing(unsigned long data)
  872. {
  873. struct qdio_q *q = (struct qdio_q *)data;
  874. __tiqdio_inbound_processing(q);
  875. }
  876. static inline void qdio_set_state(struct qdio_irq *irq_ptr,
  877. enum qdio_irq_states state)
  878. {
  879. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
  880. irq_ptr->state = state;
  881. mb();
  882. }
  883. static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
  884. {
  885. if (irb->esw.esw0.erw.cons) {
  886. DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
  887. DBF_ERROR_HEX(irb, 64);
  888. DBF_ERROR_HEX(irb->ecw, 64);
  889. }
  890. }
  891. /* PCI interrupt handler */
  892. static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
  893. {
  894. int i;
  895. struct qdio_q *q;
  896. if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  897. return;
  898. for_each_input_queue(irq_ptr, q, i) {
  899. if (q->u.in.queue_start_poll) {
  900. /* skip if polling is enabled or already in work */
  901. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  902. &q->u.in.queue_irq_state)) {
  903. qperf_inc(q, int_discarded);
  904. continue;
  905. }
  906. q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
  907. q->irq_ptr->int_parm);
  908. } else {
  909. tasklet_schedule(&q->tasklet);
  910. }
  911. }
  912. if (!pci_out_supported(q))
  913. return;
  914. for_each_output_queue(irq_ptr, q, i) {
  915. if (qdio_outbound_q_done(q))
  916. continue;
  917. if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
  918. qdio_siga_sync_q(q);
  919. tasklet_schedule(&q->tasklet);
  920. }
  921. }
  922. static void qdio_handle_activate_check(struct ccw_device *cdev,
  923. unsigned long intparm, int cstat, int dstat)
  924. {
  925. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  926. struct qdio_q *q;
  927. int count;
  928. DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
  929. DBF_ERROR("intp :%lx", intparm);
  930. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  931. if (irq_ptr->nr_input_qs) {
  932. q = irq_ptr->input_qs[0];
  933. } else if (irq_ptr->nr_output_qs) {
  934. q = irq_ptr->output_qs[0];
  935. } else {
  936. dump_stack();
  937. goto no_handler;
  938. }
  939. count = sub_buf(q->first_to_check, q->first_to_kick);
  940. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE,
  941. q->nr, q->first_to_kick, count, irq_ptr->int_parm);
  942. no_handler:
  943. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  944. /*
  945. * In case of z/VM LGR (Live Guest Migration) QDIO recovery will happen.
  946. * Therefore we call the LGR detection function here.
  947. */
  948. lgr_info_log();
  949. }
  950. static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
  951. int dstat)
  952. {
  953. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  954. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
  955. if (cstat)
  956. goto error;
  957. if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
  958. goto error;
  959. if (!(dstat & DEV_STAT_DEV_END))
  960. goto error;
  961. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
  962. return;
  963. error:
  964. DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
  965. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  966. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  967. }
  968. /* qdio interrupt handler */
  969. void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
  970. struct irb *irb)
  971. {
  972. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  973. int cstat, dstat;
  974. if (!intparm || !irq_ptr) {
  975. DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
  976. return;
  977. }
  978. if (irq_ptr->perf_stat_enabled)
  979. irq_ptr->perf_stat.qdio_int++;
  980. if (IS_ERR(irb)) {
  981. switch (PTR_ERR(irb)) {
  982. case -EIO:
  983. DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
  984. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  985. wake_up(&cdev->private->wait_q);
  986. return;
  987. default:
  988. WARN_ON(1);
  989. return;
  990. }
  991. }
  992. qdio_irq_check_sense(irq_ptr, irb);
  993. cstat = irb->scsw.cmd.cstat;
  994. dstat = irb->scsw.cmd.dstat;
  995. switch (irq_ptr->state) {
  996. case QDIO_IRQ_STATE_INACTIVE:
  997. qdio_establish_handle_irq(cdev, cstat, dstat);
  998. break;
  999. case QDIO_IRQ_STATE_CLEANUP:
  1000. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1001. break;
  1002. case QDIO_IRQ_STATE_ESTABLISHED:
  1003. case QDIO_IRQ_STATE_ACTIVE:
  1004. if (cstat & SCHN_STAT_PCI) {
  1005. qdio_int_handler_pci(irq_ptr);
  1006. return;
  1007. }
  1008. if (cstat || dstat)
  1009. qdio_handle_activate_check(cdev, intparm, cstat,
  1010. dstat);
  1011. break;
  1012. case QDIO_IRQ_STATE_STOPPED:
  1013. break;
  1014. default:
  1015. WARN_ON(1);
  1016. }
  1017. wake_up(&cdev->private->wait_q);
  1018. }
  1019. /**
  1020. * qdio_get_ssqd_desc - get qdio subchannel description
  1021. * @cdev: ccw device to get description for
  1022. * @data: where to store the ssqd
  1023. *
  1024. * Returns 0 or an error code. The results of the chsc are stored in the
  1025. * specified structure.
  1026. */
  1027. int qdio_get_ssqd_desc(struct ccw_device *cdev,
  1028. struct qdio_ssqd_desc *data)
  1029. {
  1030. if (!cdev || !cdev->private)
  1031. return -EINVAL;
  1032. DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no);
  1033. return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data);
  1034. }
  1035. EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
  1036. static void qdio_shutdown_queues(struct ccw_device *cdev)
  1037. {
  1038. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1039. struct qdio_q *q;
  1040. int i;
  1041. for_each_input_queue(irq_ptr, q, i)
  1042. tasklet_kill(&q->tasklet);
  1043. for_each_output_queue(irq_ptr, q, i) {
  1044. del_timer(&q->u.out.timer);
  1045. tasklet_kill(&q->tasklet);
  1046. }
  1047. }
  1048. /**
  1049. * qdio_shutdown - shut down a qdio subchannel
  1050. * @cdev: associated ccw device
  1051. * @how: use halt or clear to shutdown
  1052. */
  1053. int qdio_shutdown(struct ccw_device *cdev, int how)
  1054. {
  1055. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1056. int rc;
  1057. unsigned long flags;
  1058. if (!irq_ptr)
  1059. return -ENODEV;
  1060. BUG_ON(irqs_disabled());
  1061. DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no);
  1062. mutex_lock(&irq_ptr->setup_mutex);
  1063. /*
  1064. * Subchannel was already shot down. We cannot prevent being called
  1065. * twice since cio may trigger a shutdown asynchronously.
  1066. */
  1067. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1068. mutex_unlock(&irq_ptr->setup_mutex);
  1069. return 0;
  1070. }
  1071. /*
  1072. * Indicate that the device is going down. Scheduling the queue
  1073. * tasklets is forbidden from here on.
  1074. */
  1075. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  1076. tiqdio_remove_input_queues(irq_ptr);
  1077. qdio_shutdown_queues(cdev);
  1078. qdio_shutdown_debug_entries(irq_ptr, cdev);
  1079. /* cleanup subchannel */
  1080. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  1081. if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
  1082. rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
  1083. else
  1084. /* default behaviour is halt */
  1085. rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
  1086. if (rc) {
  1087. DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
  1088. DBF_ERROR("rc:%4d", rc);
  1089. goto no_cleanup;
  1090. }
  1091. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
  1092. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  1093. wait_event_interruptible_timeout(cdev->private->wait_q,
  1094. irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
  1095. irq_ptr->state == QDIO_IRQ_STATE_ERR,
  1096. 10 * HZ);
  1097. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  1098. no_cleanup:
  1099. qdio_shutdown_thinint(irq_ptr);
  1100. /* restore interrupt handler */
  1101. if ((void *)cdev->handler == (void *)qdio_int_handler)
  1102. cdev->handler = irq_ptr->orig_handler;
  1103. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  1104. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1105. mutex_unlock(&irq_ptr->setup_mutex);
  1106. if (rc)
  1107. return rc;
  1108. return 0;
  1109. }
  1110. EXPORT_SYMBOL_GPL(qdio_shutdown);
  1111. /**
  1112. * qdio_free - free data structures for a qdio subchannel
  1113. * @cdev: associated ccw device
  1114. */
  1115. int qdio_free(struct ccw_device *cdev)
  1116. {
  1117. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1118. if (!irq_ptr)
  1119. return -ENODEV;
  1120. DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no);
  1121. mutex_lock(&irq_ptr->setup_mutex);
  1122. if (irq_ptr->debug_area != NULL) {
  1123. debug_unregister(irq_ptr->debug_area);
  1124. irq_ptr->debug_area = NULL;
  1125. }
  1126. cdev->private->qdio_data = NULL;
  1127. mutex_unlock(&irq_ptr->setup_mutex);
  1128. qdio_release_memory(irq_ptr);
  1129. return 0;
  1130. }
  1131. EXPORT_SYMBOL_GPL(qdio_free);
  1132. /**
  1133. * qdio_allocate - allocate qdio queues and associated data
  1134. * @init_data: initialization data
  1135. */
  1136. int qdio_allocate(struct qdio_initialize *init_data)
  1137. {
  1138. struct qdio_irq *irq_ptr;
  1139. DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no);
  1140. if ((init_data->no_input_qs && !init_data->input_handler) ||
  1141. (init_data->no_output_qs && !init_data->output_handler))
  1142. return -EINVAL;
  1143. if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
  1144. (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
  1145. return -EINVAL;
  1146. if ((!init_data->input_sbal_addr_array) ||
  1147. (!init_data->output_sbal_addr_array))
  1148. return -EINVAL;
  1149. /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
  1150. irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1151. if (!irq_ptr)
  1152. goto out_err;
  1153. mutex_init(&irq_ptr->setup_mutex);
  1154. qdio_allocate_dbf(init_data, irq_ptr);
  1155. /*
  1156. * Allocate a page for the chsc calls in qdio_establish.
  1157. * Must be pre-allocated since a zfcp recovery will call
  1158. * qdio_establish. In case of low memory and swap on a zfcp disk
  1159. * we may not be able to allocate memory otherwise.
  1160. */
  1161. irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
  1162. if (!irq_ptr->chsc_page)
  1163. goto out_rel;
  1164. /* qdr is used in ccw1.cda which is u32 */
  1165. irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1166. if (!irq_ptr->qdr)
  1167. goto out_rel;
  1168. WARN_ON((unsigned long)irq_ptr->qdr & 0xfff);
  1169. if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
  1170. init_data->no_output_qs))
  1171. goto out_rel;
  1172. init_data->cdev->private->qdio_data = irq_ptr;
  1173. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1174. return 0;
  1175. out_rel:
  1176. qdio_release_memory(irq_ptr);
  1177. out_err:
  1178. return -ENOMEM;
  1179. }
  1180. EXPORT_SYMBOL_GPL(qdio_allocate);
  1181. static void qdio_detect_hsicq(struct qdio_irq *irq_ptr)
  1182. {
  1183. struct qdio_q *q = irq_ptr->input_qs[0];
  1184. int i, use_cq = 0;
  1185. if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT)
  1186. use_cq = 1;
  1187. for_each_output_queue(irq_ptr, q, i) {
  1188. if (use_cq) {
  1189. if (qdio_enable_async_operation(&q->u.out) < 0) {
  1190. use_cq = 0;
  1191. continue;
  1192. }
  1193. } else
  1194. qdio_disable_async_operation(&q->u.out);
  1195. }
  1196. DBF_EVENT("use_cq:%d", use_cq);
  1197. }
  1198. /**
  1199. * qdio_establish - establish queues on a qdio subchannel
  1200. * @init_data: initialization data
  1201. */
  1202. int qdio_establish(struct qdio_initialize *init_data)
  1203. {
  1204. struct qdio_irq *irq_ptr;
  1205. struct ccw_device *cdev = init_data->cdev;
  1206. unsigned long saveflags;
  1207. int rc;
  1208. DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no);
  1209. irq_ptr = cdev->private->qdio_data;
  1210. if (!irq_ptr)
  1211. return -ENODEV;
  1212. if (cdev->private->state != DEV_STATE_ONLINE)
  1213. return -EINVAL;
  1214. mutex_lock(&irq_ptr->setup_mutex);
  1215. qdio_setup_irq(init_data);
  1216. rc = qdio_establish_thinint(irq_ptr);
  1217. if (rc) {
  1218. mutex_unlock(&irq_ptr->setup_mutex);
  1219. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1220. return rc;
  1221. }
  1222. /* establish q */
  1223. irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
  1224. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1225. irq_ptr->ccw.count = irq_ptr->equeue.count;
  1226. irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
  1227. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1228. ccw_device_set_options_mask(cdev, 0);
  1229. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
  1230. if (rc) {
  1231. DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
  1232. DBF_ERROR("rc:%4x", rc);
  1233. }
  1234. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1235. if (rc) {
  1236. mutex_unlock(&irq_ptr->setup_mutex);
  1237. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1238. return rc;
  1239. }
  1240. wait_event_interruptible_timeout(cdev->private->wait_q,
  1241. irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
  1242. irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
  1243. if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
  1244. mutex_unlock(&irq_ptr->setup_mutex);
  1245. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1246. return -EIO;
  1247. }
  1248. qdio_setup_ssqd_info(irq_ptr);
  1249. qdio_detect_hsicq(irq_ptr);
  1250. /* qebsm is now setup if available, initialize buffer states */
  1251. qdio_init_buf_states(irq_ptr);
  1252. mutex_unlock(&irq_ptr->setup_mutex);
  1253. qdio_print_subchannel_info(irq_ptr, cdev);
  1254. qdio_setup_debug_entries(irq_ptr, cdev);
  1255. return 0;
  1256. }
  1257. EXPORT_SYMBOL_GPL(qdio_establish);
  1258. /**
  1259. * qdio_activate - activate queues on a qdio subchannel
  1260. * @cdev: associated cdev
  1261. */
  1262. int qdio_activate(struct ccw_device *cdev)
  1263. {
  1264. struct qdio_irq *irq_ptr;
  1265. int rc;
  1266. unsigned long saveflags;
  1267. DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no);
  1268. irq_ptr = cdev->private->qdio_data;
  1269. if (!irq_ptr)
  1270. return -ENODEV;
  1271. if (cdev->private->state != DEV_STATE_ONLINE)
  1272. return -EINVAL;
  1273. mutex_lock(&irq_ptr->setup_mutex);
  1274. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1275. rc = -EBUSY;
  1276. goto out;
  1277. }
  1278. irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
  1279. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1280. irq_ptr->ccw.count = irq_ptr->aqueue.count;
  1281. irq_ptr->ccw.cda = 0;
  1282. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1283. ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
  1284. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
  1285. 0, DOIO_DENY_PREFETCH);
  1286. if (rc) {
  1287. DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
  1288. DBF_ERROR("rc:%4x", rc);
  1289. }
  1290. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1291. if (rc)
  1292. goto out;
  1293. if (is_thinint_irq(irq_ptr))
  1294. tiqdio_add_input_queues(irq_ptr);
  1295. /* wait for subchannel to become active */
  1296. msleep(5);
  1297. switch (irq_ptr->state) {
  1298. case QDIO_IRQ_STATE_STOPPED:
  1299. case QDIO_IRQ_STATE_ERR:
  1300. rc = -EIO;
  1301. break;
  1302. default:
  1303. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
  1304. rc = 0;
  1305. }
  1306. out:
  1307. mutex_unlock(&irq_ptr->setup_mutex);
  1308. return rc;
  1309. }
  1310. EXPORT_SYMBOL_GPL(qdio_activate);
  1311. static inline int buf_in_between(int bufnr, int start, int count)
  1312. {
  1313. int end = add_buf(start, count);
  1314. if (end > start) {
  1315. if (bufnr >= start && bufnr < end)
  1316. return 1;
  1317. else
  1318. return 0;
  1319. }
  1320. /* wrap-around case */
  1321. if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
  1322. (bufnr < end))
  1323. return 1;
  1324. else
  1325. return 0;
  1326. }
  1327. /**
  1328. * handle_inbound - reset processed input buffers
  1329. * @q: queue containing the buffers
  1330. * @callflags: flags
  1331. * @bufnr: first buffer to process
  1332. * @count: how many buffers are emptied
  1333. */
  1334. static int handle_inbound(struct qdio_q *q, unsigned int callflags,
  1335. int bufnr, int count)
  1336. {
  1337. int used, diff;
  1338. qperf_inc(q, inbound_call);
  1339. if (!q->u.in.polling)
  1340. goto set;
  1341. /* protect against stop polling setting an ACK for an emptied slsb */
  1342. if (count == QDIO_MAX_BUFFERS_PER_Q) {
  1343. /* overwriting everything, just delete polling status */
  1344. q->u.in.polling = 0;
  1345. q->u.in.ack_count = 0;
  1346. goto set;
  1347. } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
  1348. if (is_qebsm(q)) {
  1349. /* partial overwrite, just update ack_start */
  1350. diff = add_buf(bufnr, count);
  1351. diff = sub_buf(diff, q->u.in.ack_start);
  1352. q->u.in.ack_count -= diff;
  1353. if (q->u.in.ack_count <= 0) {
  1354. q->u.in.polling = 0;
  1355. q->u.in.ack_count = 0;
  1356. goto set;
  1357. }
  1358. q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
  1359. }
  1360. else
  1361. /* the only ACK will be deleted, so stop polling */
  1362. q->u.in.polling = 0;
  1363. }
  1364. set:
  1365. count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
  1366. used = atomic_add_return(count, &q->nr_buf_used) - count;
  1367. BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q);
  1368. if (need_siga_in(q))
  1369. return qdio_siga_input(q);
  1370. return 0;
  1371. }
  1372. /**
  1373. * handle_outbound - process filled outbound buffers
  1374. * @q: queue containing the buffers
  1375. * @callflags: flags
  1376. * @bufnr: first buffer to process
  1377. * @count: how many buffers are filled
  1378. */
  1379. static int handle_outbound(struct qdio_q *q, unsigned int callflags,
  1380. int bufnr, int count)
  1381. {
  1382. unsigned char state = 0;
  1383. int used, rc = 0;
  1384. qperf_inc(q, outbound_call);
  1385. count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
  1386. used = atomic_add_return(count, &q->nr_buf_used);
  1387. BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q);
  1388. if (used == QDIO_MAX_BUFFERS_PER_Q)
  1389. qperf_inc(q, outbound_queue_full);
  1390. if (callflags & QDIO_FLAG_PCI_OUT) {
  1391. q->u.out.pci_out_enabled = 1;
  1392. qperf_inc(q, pci_request_int);
  1393. } else
  1394. q->u.out.pci_out_enabled = 0;
  1395. if (queue_type(q) == QDIO_IQDIO_QFMT) {
  1396. unsigned long phys_aob = 0;
  1397. /* One SIGA-W per buffer required for unicast HSI */
  1398. WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
  1399. phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr);
  1400. rc = qdio_kick_outbound_q(q, phys_aob);
  1401. } else if (need_siga_sync(q)) {
  1402. rc = qdio_siga_sync_q(q);
  1403. } else {
  1404. /* try to fast requeue buffers */
  1405. get_buf_state(q, prev_buf(bufnr), &state, 0);
  1406. if (state != SLSB_CU_OUTPUT_PRIMED)
  1407. rc = qdio_kick_outbound_q(q, 0);
  1408. else
  1409. qperf_inc(q, fast_requeue);
  1410. }
  1411. /* in case of SIGA errors we must process the error immediately */
  1412. if (used >= q->u.out.scan_threshold || rc)
  1413. tasklet_schedule(&q->tasklet);
  1414. else
  1415. /* free the SBALs in case of no further traffic */
  1416. if (!timer_pending(&q->u.out.timer))
  1417. mod_timer(&q->u.out.timer, jiffies + HZ);
  1418. return rc;
  1419. }
  1420. /**
  1421. * do_QDIO - process input or output buffers
  1422. * @cdev: associated ccw_device for the qdio subchannel
  1423. * @callflags: input or output and special flags from the program
  1424. * @q_nr: queue number
  1425. * @bufnr: buffer number
  1426. * @count: how many buffers to process
  1427. */
  1428. int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
  1429. int q_nr, unsigned int bufnr, unsigned int count)
  1430. {
  1431. struct qdio_irq *irq_ptr;
  1432. if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
  1433. return -EINVAL;
  1434. irq_ptr = cdev->private->qdio_data;
  1435. if (!irq_ptr)
  1436. return -ENODEV;
  1437. DBF_DEV_EVENT(DBF_INFO, irq_ptr,
  1438. "do%02x b:%02x c:%02x", callflags, bufnr, count);
  1439. if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
  1440. return -EIO;
  1441. if (!count)
  1442. return 0;
  1443. if (callflags & QDIO_FLAG_SYNC_INPUT)
  1444. return handle_inbound(irq_ptr->input_qs[q_nr],
  1445. callflags, bufnr, count);
  1446. else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
  1447. return handle_outbound(irq_ptr->output_qs[q_nr],
  1448. callflags, bufnr, count);
  1449. return -EINVAL;
  1450. }
  1451. EXPORT_SYMBOL_GPL(do_QDIO);
  1452. /**
  1453. * qdio_start_irq - process input buffers
  1454. * @cdev: associated ccw_device for the qdio subchannel
  1455. * @nr: input queue number
  1456. *
  1457. * Return codes
  1458. * 0 - success
  1459. * 1 - irqs not started since new data is available
  1460. */
  1461. int qdio_start_irq(struct ccw_device *cdev, int nr)
  1462. {
  1463. struct qdio_q *q;
  1464. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1465. if (!irq_ptr)
  1466. return -ENODEV;
  1467. q = irq_ptr->input_qs[nr];
  1468. WARN_ON(queue_irqs_enabled(q));
  1469. clear_nonshared_ind(irq_ptr);
  1470. qdio_stop_polling(q);
  1471. clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
  1472. /*
  1473. * We need to check again to not lose initiative after
  1474. * resetting the ACK state.
  1475. */
  1476. if (test_nonshared_ind(irq_ptr))
  1477. goto rescan;
  1478. if (!qdio_inbound_q_done(q))
  1479. goto rescan;
  1480. return 0;
  1481. rescan:
  1482. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1483. &q->u.in.queue_irq_state))
  1484. return 0;
  1485. else
  1486. return 1;
  1487. }
  1488. EXPORT_SYMBOL(qdio_start_irq);
  1489. /**
  1490. * qdio_get_next_buffers - process input buffers
  1491. * @cdev: associated ccw_device for the qdio subchannel
  1492. * @nr: input queue number
  1493. * @bufnr: first filled buffer number
  1494. * @error: buffers are in error state
  1495. *
  1496. * Return codes
  1497. * < 0 - error
  1498. * = 0 - no new buffers found
  1499. * > 0 - number of processed buffers
  1500. */
  1501. int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
  1502. int *error)
  1503. {
  1504. struct qdio_q *q;
  1505. int start, end;
  1506. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1507. if (!irq_ptr)
  1508. return -ENODEV;
  1509. q = irq_ptr->input_qs[nr];
  1510. WARN_ON(queue_irqs_enabled(q));
  1511. /*
  1512. * Cannot rely on automatic sync after interrupt since queues may
  1513. * also be examined without interrupt.
  1514. */
  1515. if (need_siga_sync(q))
  1516. qdio_sync_queues(q);
  1517. /* check the PCI capable outbound queues. */
  1518. qdio_check_outbound_after_thinint(q);
  1519. if (!qdio_inbound_q_moved(q))
  1520. return 0;
  1521. /* Note: upper-layer MUST stop processing immediately here ... */
  1522. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  1523. return -EIO;
  1524. start = q->first_to_kick;
  1525. end = q->first_to_check;
  1526. *bufnr = start;
  1527. *error = q->qdio_error;
  1528. /* for the next time */
  1529. q->first_to_kick = end;
  1530. q->qdio_error = 0;
  1531. return sub_buf(end, start);
  1532. }
  1533. EXPORT_SYMBOL(qdio_get_next_buffers);
  1534. /**
  1535. * qdio_stop_irq - disable interrupt processing for the device
  1536. * @cdev: associated ccw_device for the qdio subchannel
  1537. * @nr: input queue number
  1538. *
  1539. * Return codes
  1540. * 0 - interrupts were already disabled
  1541. * 1 - interrupts successfully disabled
  1542. */
  1543. int qdio_stop_irq(struct ccw_device *cdev, int nr)
  1544. {
  1545. struct qdio_q *q;
  1546. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1547. if (!irq_ptr)
  1548. return -ENODEV;
  1549. q = irq_ptr->input_qs[nr];
  1550. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1551. &q->u.in.queue_irq_state))
  1552. return 0;
  1553. else
  1554. return 1;
  1555. }
  1556. EXPORT_SYMBOL(qdio_stop_irq);
  1557. static int __init init_QDIO(void)
  1558. {
  1559. int rc;
  1560. rc = qdio_debug_init();
  1561. if (rc)
  1562. return rc;
  1563. rc = qdio_setup_init();
  1564. if (rc)
  1565. goto out_debug;
  1566. rc = tiqdio_allocate_memory();
  1567. if (rc)
  1568. goto out_cache;
  1569. rc = tiqdio_register_thinints();
  1570. if (rc)
  1571. goto out_ti;
  1572. return 0;
  1573. out_ti:
  1574. tiqdio_free_memory();
  1575. out_cache:
  1576. qdio_setup_exit();
  1577. out_debug:
  1578. qdio_debug_exit();
  1579. return rc;
  1580. }
  1581. static void __exit exit_QDIO(void)
  1582. {
  1583. tiqdio_unregister_thinints();
  1584. tiqdio_free_memory();
  1585. qdio_setup_exit();
  1586. qdio_debug_exit();
  1587. }
  1588. module_init(init_QDIO);
  1589. module_exit(exit_QDIO);