pinctrl-pxa3xx.c 6.1 KB

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  1. /*
  2. * linux/drivers/pinctrl/pinctrl-pxa3xx.c
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * publishhed by the Free Software Foundation.
  7. *
  8. * Copyright (C) 2011, Marvell Technology Group Ltd.
  9. *
  10. * Author: Haojian Zhuang <haojian.zhuang@marvell.com>
  11. *
  12. */
  13. #include <linux/module.h>
  14. #include <linux/device.h>
  15. #include <linux/io.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/slab.h>
  18. #include "pinctrl-pxa3xx.h"
  19. static struct pinctrl_gpio_range pxa3xx_pinctrl_gpio_range = {
  20. .name = "PXA3xx GPIO",
  21. .id = 0,
  22. .base = 0,
  23. .pin_base = 0,
  24. };
  25. static int pxa3xx_get_groups_count(struct pinctrl_dev *pctrldev)
  26. {
  27. struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
  28. return info->num_grps;
  29. }
  30. static const char *pxa3xx_get_group_name(struct pinctrl_dev *pctrldev,
  31. unsigned selector)
  32. {
  33. struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
  34. return info->grps[selector].name;
  35. }
  36. static int pxa3xx_get_group_pins(struct pinctrl_dev *pctrldev,
  37. unsigned selector,
  38. const unsigned **pins,
  39. unsigned *num_pins)
  40. {
  41. struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
  42. *pins = info->grps[selector].pins;
  43. *num_pins = info->grps[selector].npins;
  44. return 0;
  45. }
  46. static struct pinctrl_ops pxa3xx_pctrl_ops = {
  47. .get_groups_count = pxa3xx_get_groups_count,
  48. .get_group_name = pxa3xx_get_group_name,
  49. .get_group_pins = pxa3xx_get_group_pins,
  50. };
  51. static int pxa3xx_pmx_get_funcs_count(struct pinctrl_dev *pctrldev)
  52. {
  53. struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
  54. return info->num_funcs;
  55. }
  56. static const char *pxa3xx_pmx_get_func_name(struct pinctrl_dev *pctrldev,
  57. unsigned func)
  58. {
  59. struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
  60. return info->funcs[func].name;
  61. }
  62. static int pxa3xx_pmx_get_groups(struct pinctrl_dev *pctrldev, unsigned func,
  63. const char * const **groups,
  64. unsigned * const num_groups)
  65. {
  66. struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
  67. *groups = info->funcs[func].groups;
  68. *num_groups = info->funcs[func].num_groups;
  69. return 0;
  70. }
  71. /* Return function number. If failure, return negative value. */
  72. static int match_mux(struct pxa3xx_mfp_pin *mfp, unsigned mux)
  73. {
  74. int i;
  75. for (i = 0; i < PXA3xx_MAX_MUX; i++) {
  76. if (mfp->func[i] == mux)
  77. break;
  78. }
  79. if (i >= PXA3xx_MAX_MUX)
  80. return -EINVAL;
  81. return i;
  82. }
  83. /* check whether current pin configuration is valid. Negative for failure */
  84. static int match_group_mux(struct pxa3xx_pin_group *grp,
  85. struct pxa3xx_pinmux_info *info,
  86. unsigned mux)
  87. {
  88. int i, pin, ret = 0;
  89. for (i = 0; i < grp->npins; i++) {
  90. pin = grp->pins[i];
  91. ret = match_mux(&info->mfp[pin], mux);
  92. if (ret < 0) {
  93. dev_err(info->dev, "Can't find mux %d on pin%d\n",
  94. mux, pin);
  95. break;
  96. }
  97. }
  98. return ret;
  99. }
  100. static int pxa3xx_pmx_enable(struct pinctrl_dev *pctrldev, unsigned func,
  101. unsigned group)
  102. {
  103. struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
  104. struct pxa3xx_pin_group *pin_grp = &info->grps[group];
  105. unsigned int data;
  106. int i, mfpr, pin, pin_func;
  107. if (!pin_grp->npins ||
  108. (match_group_mux(pin_grp, info, pin_grp->mux) < 0)) {
  109. dev_err(info->dev, "Failed to set the pin group: %d\n", group);
  110. return -EINVAL;
  111. }
  112. for (i = 0; i < pin_grp->npins; i++) {
  113. pin = pin_grp->pins[i];
  114. pin_func = match_mux(&info->mfp[pin], pin_grp->mux);
  115. mfpr = info->mfp[pin].mfpr;
  116. data = readl_relaxed(info->virt_base + mfpr);
  117. data &= ~MFPR_FUNC_MASK;
  118. data |= pin_func;
  119. writel_relaxed(data, info->virt_base + mfpr);
  120. }
  121. return 0;
  122. }
  123. static int pxa3xx_pmx_request_gpio(struct pinctrl_dev *pctrldev,
  124. struct pinctrl_gpio_range *range,
  125. unsigned pin)
  126. {
  127. struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
  128. unsigned int data;
  129. int pin_func, mfpr;
  130. pin_func = match_mux(&info->mfp[pin], PXA3xx_MUX_GPIO);
  131. if (pin_func < 0) {
  132. dev_err(info->dev, "No GPIO function on pin%d (%s)\n",
  133. pin, info->pads[pin].name);
  134. return -EINVAL;
  135. }
  136. mfpr = info->mfp[pin].mfpr;
  137. /* write gpio function into mfpr register */
  138. data = readl_relaxed(info->virt_base + mfpr) & ~MFPR_FUNC_MASK;
  139. data |= pin_func;
  140. writel_relaxed(data, info->virt_base + mfpr);
  141. return 0;
  142. }
  143. static struct pinmux_ops pxa3xx_pmx_ops = {
  144. .get_functions_count = pxa3xx_pmx_get_funcs_count,
  145. .get_function_name = pxa3xx_pmx_get_func_name,
  146. .get_function_groups = pxa3xx_pmx_get_groups,
  147. .enable = pxa3xx_pmx_enable,
  148. .gpio_request_enable = pxa3xx_pmx_request_gpio,
  149. };
  150. int pxa3xx_pinctrl_register(struct platform_device *pdev,
  151. struct pxa3xx_pinmux_info *info)
  152. {
  153. struct pinctrl_desc *desc;
  154. struct resource *res;
  155. int ret = 0;
  156. if (!info || !info->cputype)
  157. return -EINVAL;
  158. desc = info->desc;
  159. desc->pins = info->pads;
  160. desc->npins = info->num_pads;
  161. desc->pctlops = &pxa3xx_pctrl_ops;
  162. desc->pmxops = &pxa3xx_pmx_ops;
  163. info->dev = &pdev->dev;
  164. pxa3xx_pinctrl_gpio_range.npins = info->num_gpio;
  165. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  166. if (!res)
  167. return -ENOENT;
  168. info->phy_base = res->start;
  169. info->phy_size = resource_size(res);
  170. info->virt_base = ioremap(info->phy_base, info->phy_size);
  171. if (!info->virt_base)
  172. return -ENOMEM;
  173. info->pctrl = pinctrl_register(desc, &pdev->dev, info);
  174. if (!info->pctrl) {
  175. dev_err(&pdev->dev, "failed to register PXA pinmux driver\n");
  176. ret = -EINVAL;
  177. goto err;
  178. }
  179. pinctrl_add_gpio_range(info->pctrl, &pxa3xx_pinctrl_gpio_range);
  180. platform_set_drvdata(pdev, info);
  181. return 0;
  182. err:
  183. iounmap(info->virt_base);
  184. return ret;
  185. }
  186. int pxa3xx_pinctrl_unregister(struct platform_device *pdev)
  187. {
  188. struct pxa3xx_pinmux_info *info = platform_get_drvdata(pdev);
  189. pinctrl_unregister(info->pctrl);
  190. iounmap(info->virt_base);
  191. platform_set_drvdata(pdev, NULL);
  192. return 0;
  193. }
  194. static int __init pxa3xx_pinctrl_init(void)
  195. {
  196. pr_info("pxa3xx-pinctrl: PXA3xx pinctrl driver initializing\n");
  197. return 0;
  198. }
  199. core_initcall_sync(pxa3xx_pinctrl_init);
  200. static void __exit pxa3xx_pinctrl_exit(void)
  201. {
  202. }
  203. module_exit(pxa3xx_pinctrl_exit);
  204. MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>");
  205. MODULE_DESCRIPTION("PXA3xx pin control driver");
  206. MODULE_LICENSE("GPL v2");