pci-sysfs.c 33 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include "pci.h"
  30. static int sysfs_initialized; /* = 0 */
  31. /* show configuration fields */
  32. #define pci_config_attr(field, format_string) \
  33. static ssize_t \
  34. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  35. { \
  36. struct pci_dev *pdev; \
  37. \
  38. pdev = to_pci_dev (dev); \
  39. return sprintf (buf, format_string, pdev->field); \
  40. }
  41. pci_config_attr(vendor, "0x%04x\n");
  42. pci_config_attr(device, "0x%04x\n");
  43. pci_config_attr(subsystem_vendor, "0x%04x\n");
  44. pci_config_attr(subsystem_device, "0x%04x\n");
  45. pci_config_attr(class, "0x%06x\n");
  46. pci_config_attr(irq, "%u\n");
  47. static ssize_t broken_parity_status_show(struct device *dev,
  48. struct device_attribute *attr,
  49. char *buf)
  50. {
  51. struct pci_dev *pdev = to_pci_dev(dev);
  52. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  53. }
  54. static ssize_t broken_parity_status_store(struct device *dev,
  55. struct device_attribute *attr,
  56. const char *buf, size_t count)
  57. {
  58. struct pci_dev *pdev = to_pci_dev(dev);
  59. unsigned long val;
  60. if (strict_strtoul(buf, 0, &val) < 0)
  61. return -EINVAL;
  62. pdev->broken_parity_status = !!val;
  63. return count;
  64. }
  65. static ssize_t local_cpus_show(struct device *dev,
  66. struct device_attribute *attr, char *buf)
  67. {
  68. const struct cpumask *mask;
  69. int len;
  70. #ifdef CONFIG_NUMA
  71. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  72. cpumask_of_node(dev_to_node(dev));
  73. #else
  74. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  75. #endif
  76. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  77. buf[len++] = '\n';
  78. buf[len] = '\0';
  79. return len;
  80. }
  81. static ssize_t local_cpulist_show(struct device *dev,
  82. struct device_attribute *attr, char *buf)
  83. {
  84. const struct cpumask *mask;
  85. int len;
  86. #ifdef CONFIG_NUMA
  87. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  88. cpumask_of_node(dev_to_node(dev));
  89. #else
  90. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  91. #endif
  92. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  93. buf[len++] = '\n';
  94. buf[len] = '\0';
  95. return len;
  96. }
  97. /*
  98. * PCI Bus Class Devices
  99. */
  100. static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
  101. int type,
  102. struct device_attribute *attr,
  103. char *buf)
  104. {
  105. int ret;
  106. const struct cpumask *cpumask;
  107. cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  108. ret = type ?
  109. cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
  110. cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
  111. buf[ret++] = '\n';
  112. buf[ret] = '\0';
  113. return ret;
  114. }
  115. static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev,
  116. struct device_attribute *attr,
  117. char *buf)
  118. {
  119. return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
  120. }
  121. static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev,
  122. struct device_attribute *attr,
  123. char *buf)
  124. {
  125. return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
  126. }
  127. /* show resources */
  128. static ssize_t
  129. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  130. {
  131. struct pci_dev * pci_dev = to_pci_dev(dev);
  132. char * str = buf;
  133. int i;
  134. int max;
  135. resource_size_t start, end;
  136. if (pci_dev->subordinate)
  137. max = DEVICE_COUNT_RESOURCE;
  138. else
  139. max = PCI_BRIDGE_RESOURCES;
  140. for (i = 0; i < max; i++) {
  141. struct resource *res = &pci_dev->resource[i];
  142. pci_resource_to_user(pci_dev, i, res, &start, &end);
  143. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  144. (unsigned long long)start,
  145. (unsigned long long)end,
  146. (unsigned long long)res->flags);
  147. }
  148. return (str - buf);
  149. }
  150. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  151. {
  152. struct pci_dev *pci_dev = to_pci_dev(dev);
  153. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  154. pci_dev->vendor, pci_dev->device,
  155. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  156. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  157. (u8)(pci_dev->class));
  158. }
  159. static ssize_t is_enabled_store(struct device *dev,
  160. struct device_attribute *attr, const char *buf,
  161. size_t count)
  162. {
  163. struct pci_dev *pdev = to_pci_dev(dev);
  164. unsigned long val;
  165. ssize_t result = strict_strtoul(buf, 0, &val);
  166. if (result < 0)
  167. return result;
  168. /* this can crash the machine when done on the "wrong" device */
  169. if (!capable(CAP_SYS_ADMIN))
  170. return -EPERM;
  171. if (!val) {
  172. if (pci_is_enabled(pdev))
  173. pci_disable_device(pdev);
  174. else
  175. result = -EIO;
  176. } else
  177. result = pci_enable_device(pdev);
  178. return result < 0 ? result : count;
  179. }
  180. static ssize_t is_enabled_show(struct device *dev,
  181. struct device_attribute *attr, char *buf)
  182. {
  183. struct pci_dev *pdev;
  184. pdev = to_pci_dev (dev);
  185. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  186. }
  187. #ifdef CONFIG_NUMA
  188. static ssize_t
  189. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  190. {
  191. return sprintf (buf, "%d\n", dev->numa_node);
  192. }
  193. #endif
  194. static ssize_t
  195. dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
  196. {
  197. struct pci_dev *pdev = to_pci_dev(dev);
  198. return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
  199. }
  200. static ssize_t
  201. consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
  202. char *buf)
  203. {
  204. return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
  205. }
  206. static ssize_t
  207. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  208. {
  209. struct pci_dev *pdev = to_pci_dev(dev);
  210. if (!pdev->subordinate)
  211. return 0;
  212. return sprintf (buf, "%u\n",
  213. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  214. }
  215. static ssize_t
  216. msi_bus_store(struct device *dev, struct device_attribute *attr,
  217. const char *buf, size_t count)
  218. {
  219. struct pci_dev *pdev = to_pci_dev(dev);
  220. unsigned long val;
  221. if (strict_strtoul(buf, 0, &val) < 0)
  222. return -EINVAL;
  223. /* bad things may happen if the no_msi flag is changed
  224. * while some drivers are loaded */
  225. if (!capable(CAP_SYS_ADMIN))
  226. return -EPERM;
  227. /* Maybe pci devices without subordinate busses shouldn't even have this
  228. * attribute in the first place? */
  229. if (!pdev->subordinate)
  230. return count;
  231. /* Is the flag going to change, or keep the value it already had? */
  232. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  233. !!val) {
  234. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  235. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  236. " bad things could happen\n", val ? "" : " not");
  237. }
  238. return count;
  239. }
  240. #ifdef CONFIG_HOTPLUG
  241. static DEFINE_MUTEX(pci_remove_rescan_mutex);
  242. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  243. size_t count)
  244. {
  245. unsigned long val;
  246. struct pci_bus *b = NULL;
  247. if (strict_strtoul(buf, 0, &val) < 0)
  248. return -EINVAL;
  249. if (val) {
  250. mutex_lock(&pci_remove_rescan_mutex);
  251. while ((b = pci_find_next_bus(b)) != NULL)
  252. pci_rescan_bus(b);
  253. mutex_unlock(&pci_remove_rescan_mutex);
  254. }
  255. return count;
  256. }
  257. struct bus_attribute pci_bus_attrs[] = {
  258. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
  259. __ATTR_NULL
  260. };
  261. static ssize_t
  262. dev_rescan_store(struct device *dev, struct device_attribute *attr,
  263. const char *buf, size_t count)
  264. {
  265. unsigned long val;
  266. struct pci_dev *pdev = to_pci_dev(dev);
  267. if (strict_strtoul(buf, 0, &val) < 0)
  268. return -EINVAL;
  269. if (val) {
  270. mutex_lock(&pci_remove_rescan_mutex);
  271. pci_rescan_bus(pdev->bus);
  272. mutex_unlock(&pci_remove_rescan_mutex);
  273. }
  274. return count;
  275. }
  276. static void remove_callback(struct device *dev)
  277. {
  278. struct pci_dev *pdev = to_pci_dev(dev);
  279. mutex_lock(&pci_remove_rescan_mutex);
  280. pci_stop_and_remove_bus_device(pdev);
  281. mutex_unlock(&pci_remove_rescan_mutex);
  282. }
  283. static ssize_t
  284. remove_store(struct device *dev, struct device_attribute *dummy,
  285. const char *buf, size_t count)
  286. {
  287. int ret = 0;
  288. unsigned long val;
  289. if (strict_strtoul(buf, 0, &val) < 0)
  290. return -EINVAL;
  291. /* An attribute cannot be unregistered by one of its own methods,
  292. * so we have to use this roundabout approach.
  293. */
  294. if (val)
  295. ret = device_schedule_callback(dev, remove_callback);
  296. if (ret)
  297. count = ret;
  298. return count;
  299. }
  300. static ssize_t
  301. dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
  302. const char *buf, size_t count)
  303. {
  304. unsigned long val;
  305. struct pci_bus *bus = to_pci_bus(dev);
  306. if (strict_strtoul(buf, 0, &val) < 0)
  307. return -EINVAL;
  308. if (val) {
  309. mutex_lock(&pci_remove_rescan_mutex);
  310. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  311. pci_rescan_bus_bridge_resize(bus->self);
  312. else
  313. pci_rescan_bus(bus);
  314. mutex_unlock(&pci_remove_rescan_mutex);
  315. }
  316. return count;
  317. }
  318. #endif
  319. struct device_attribute pci_dev_attrs[] = {
  320. __ATTR_RO(resource),
  321. __ATTR_RO(vendor),
  322. __ATTR_RO(device),
  323. __ATTR_RO(subsystem_vendor),
  324. __ATTR_RO(subsystem_device),
  325. __ATTR_RO(class),
  326. __ATTR_RO(irq),
  327. __ATTR_RO(local_cpus),
  328. __ATTR_RO(local_cpulist),
  329. __ATTR_RO(modalias),
  330. #ifdef CONFIG_NUMA
  331. __ATTR_RO(numa_node),
  332. #endif
  333. __ATTR_RO(dma_mask_bits),
  334. __ATTR_RO(consistent_dma_mask_bits),
  335. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  336. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  337. broken_parity_status_show,broken_parity_status_store),
  338. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  339. #ifdef CONFIG_HOTPLUG
  340. __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
  341. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
  342. #endif
  343. __ATTR_NULL,
  344. };
  345. struct device_attribute pcibus_dev_attrs[] = {
  346. #ifdef CONFIG_HOTPLUG
  347. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store),
  348. #endif
  349. __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL),
  350. __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL),
  351. __ATTR_NULL,
  352. };
  353. static ssize_t
  354. boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
  355. {
  356. struct pci_dev *pdev = to_pci_dev(dev);
  357. struct pci_dev *vga_dev = vga_default_device();
  358. if (vga_dev)
  359. return sprintf(buf, "%u\n", (pdev == vga_dev));
  360. return sprintf(buf, "%u\n",
  361. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  362. IORESOURCE_ROM_SHADOW));
  363. }
  364. struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  365. static ssize_t
  366. pci_read_config(struct file *filp, struct kobject *kobj,
  367. struct bin_attribute *bin_attr,
  368. char *buf, loff_t off, size_t count)
  369. {
  370. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  371. unsigned int size = 64;
  372. loff_t init_off = off;
  373. u8 *data = (u8*) buf;
  374. /* Several chips lock up trying to read undefined config space */
  375. if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) {
  376. size = dev->cfg_size;
  377. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  378. size = 128;
  379. }
  380. if (off > size)
  381. return 0;
  382. if (off + count > size) {
  383. size -= off;
  384. count = size;
  385. } else {
  386. size = count;
  387. }
  388. if ((off & 1) && size) {
  389. u8 val;
  390. pci_user_read_config_byte(dev, off, &val);
  391. data[off - init_off] = val;
  392. off++;
  393. size--;
  394. }
  395. if ((off & 3) && size > 2) {
  396. u16 val;
  397. pci_user_read_config_word(dev, off, &val);
  398. data[off - init_off] = val & 0xff;
  399. data[off - init_off + 1] = (val >> 8) & 0xff;
  400. off += 2;
  401. size -= 2;
  402. }
  403. while (size > 3) {
  404. u32 val;
  405. pci_user_read_config_dword(dev, off, &val);
  406. data[off - init_off] = val & 0xff;
  407. data[off - init_off + 1] = (val >> 8) & 0xff;
  408. data[off - init_off + 2] = (val >> 16) & 0xff;
  409. data[off - init_off + 3] = (val >> 24) & 0xff;
  410. off += 4;
  411. size -= 4;
  412. }
  413. if (size >= 2) {
  414. u16 val;
  415. pci_user_read_config_word(dev, off, &val);
  416. data[off - init_off] = val & 0xff;
  417. data[off - init_off + 1] = (val >> 8) & 0xff;
  418. off += 2;
  419. size -= 2;
  420. }
  421. if (size > 0) {
  422. u8 val;
  423. pci_user_read_config_byte(dev, off, &val);
  424. data[off - init_off] = val;
  425. off++;
  426. --size;
  427. }
  428. return count;
  429. }
  430. static ssize_t
  431. pci_write_config(struct file* filp, struct kobject *kobj,
  432. struct bin_attribute *bin_attr,
  433. char *buf, loff_t off, size_t count)
  434. {
  435. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  436. unsigned int size = count;
  437. loff_t init_off = off;
  438. u8 *data = (u8*) buf;
  439. if (off > dev->cfg_size)
  440. return 0;
  441. if (off + count > dev->cfg_size) {
  442. size = dev->cfg_size - off;
  443. count = size;
  444. }
  445. if ((off & 1) && size) {
  446. pci_user_write_config_byte(dev, off, data[off - init_off]);
  447. off++;
  448. size--;
  449. }
  450. if ((off & 3) && size > 2) {
  451. u16 val = data[off - init_off];
  452. val |= (u16) data[off - init_off + 1] << 8;
  453. pci_user_write_config_word(dev, off, val);
  454. off += 2;
  455. size -= 2;
  456. }
  457. while (size > 3) {
  458. u32 val = data[off - init_off];
  459. val |= (u32) data[off - init_off + 1] << 8;
  460. val |= (u32) data[off - init_off + 2] << 16;
  461. val |= (u32) data[off - init_off + 3] << 24;
  462. pci_user_write_config_dword(dev, off, val);
  463. off += 4;
  464. size -= 4;
  465. }
  466. if (size >= 2) {
  467. u16 val = data[off - init_off];
  468. val |= (u16) data[off - init_off + 1] << 8;
  469. pci_user_write_config_word(dev, off, val);
  470. off += 2;
  471. size -= 2;
  472. }
  473. if (size) {
  474. pci_user_write_config_byte(dev, off, data[off - init_off]);
  475. off++;
  476. --size;
  477. }
  478. return count;
  479. }
  480. static ssize_t
  481. read_vpd_attr(struct file *filp, struct kobject *kobj,
  482. struct bin_attribute *bin_attr,
  483. char *buf, loff_t off, size_t count)
  484. {
  485. struct pci_dev *dev =
  486. to_pci_dev(container_of(kobj, struct device, kobj));
  487. if (off > bin_attr->size)
  488. count = 0;
  489. else if (count > bin_attr->size - off)
  490. count = bin_attr->size - off;
  491. return pci_read_vpd(dev, off, count, buf);
  492. }
  493. static ssize_t
  494. write_vpd_attr(struct file *filp, struct kobject *kobj,
  495. struct bin_attribute *bin_attr,
  496. char *buf, loff_t off, size_t count)
  497. {
  498. struct pci_dev *dev =
  499. to_pci_dev(container_of(kobj, struct device, kobj));
  500. if (off > bin_attr->size)
  501. count = 0;
  502. else if (count > bin_attr->size - off)
  503. count = bin_attr->size - off;
  504. return pci_write_vpd(dev, off, count, buf);
  505. }
  506. #ifdef HAVE_PCI_LEGACY
  507. /**
  508. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  509. * @filp: open sysfs file
  510. * @kobj: kobject corresponding to file to read from
  511. * @bin_attr: struct bin_attribute for this file
  512. * @buf: buffer to store results
  513. * @off: offset into legacy I/O port space
  514. * @count: number of bytes to read
  515. *
  516. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  517. * callback routine (pci_legacy_read).
  518. */
  519. static ssize_t
  520. pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  521. struct bin_attribute *bin_attr,
  522. char *buf, loff_t off, size_t count)
  523. {
  524. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  525. struct device,
  526. kobj));
  527. /* Only support 1, 2 or 4 byte accesses */
  528. if (count != 1 && count != 2 && count != 4)
  529. return -EINVAL;
  530. return pci_legacy_read(bus, off, (u32 *)buf, count);
  531. }
  532. /**
  533. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  534. * @filp: open sysfs file
  535. * @kobj: kobject corresponding to file to read from
  536. * @bin_attr: struct bin_attribute for this file
  537. * @buf: buffer containing value to be written
  538. * @off: offset into legacy I/O port space
  539. * @count: number of bytes to write
  540. *
  541. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  542. * callback routine (pci_legacy_write).
  543. */
  544. static ssize_t
  545. pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  546. struct bin_attribute *bin_attr,
  547. char *buf, loff_t off, size_t count)
  548. {
  549. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  550. struct device,
  551. kobj));
  552. /* Only support 1, 2 or 4 byte accesses */
  553. if (count != 1 && count != 2 && count != 4)
  554. return -EINVAL;
  555. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  556. }
  557. /**
  558. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  559. * @filp: open sysfs file
  560. * @kobj: kobject corresponding to device to be mapped
  561. * @attr: struct bin_attribute for this file
  562. * @vma: struct vm_area_struct passed to mmap
  563. *
  564. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  565. * legacy memory space (first meg of bus space) into application virtual
  566. * memory space.
  567. */
  568. static int
  569. pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  570. struct bin_attribute *attr,
  571. struct vm_area_struct *vma)
  572. {
  573. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  574. struct device,
  575. kobj));
  576. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  577. }
  578. /**
  579. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  580. * @filp: open sysfs file
  581. * @kobj: kobject corresponding to device to be mapped
  582. * @attr: struct bin_attribute for this file
  583. * @vma: struct vm_area_struct passed to mmap
  584. *
  585. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  586. * legacy IO space (first meg of bus space) into application virtual
  587. * memory space. Returns -ENOSYS if the operation isn't supported
  588. */
  589. static int
  590. pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  591. struct bin_attribute *attr,
  592. struct vm_area_struct *vma)
  593. {
  594. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  595. struct device,
  596. kobj));
  597. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  598. }
  599. /**
  600. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  601. * @b: bus to create files under
  602. * @mmap_type: I/O port or memory
  603. *
  604. * Stub implementation. Can be overridden by arch if necessary.
  605. */
  606. void __weak
  607. pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  608. {
  609. return;
  610. }
  611. /**
  612. * pci_create_legacy_files - create legacy I/O port and memory files
  613. * @b: bus to create files under
  614. *
  615. * Some platforms allow access to legacy I/O port and ISA memory space on
  616. * a per-bus basis. This routine creates the files and ties them into
  617. * their associated read, write and mmap files from pci-sysfs.c
  618. *
  619. * On error unwind, but don't propagate the error to the caller
  620. * as it is ok to set up the PCI bus without these files.
  621. */
  622. void pci_create_legacy_files(struct pci_bus *b)
  623. {
  624. int error;
  625. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  626. GFP_ATOMIC);
  627. if (!b->legacy_io)
  628. goto kzalloc_err;
  629. sysfs_bin_attr_init(b->legacy_io);
  630. b->legacy_io->attr.name = "legacy_io";
  631. b->legacy_io->size = 0xffff;
  632. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  633. b->legacy_io->read = pci_read_legacy_io;
  634. b->legacy_io->write = pci_write_legacy_io;
  635. b->legacy_io->mmap = pci_mmap_legacy_io;
  636. pci_adjust_legacy_attr(b, pci_mmap_io);
  637. error = device_create_bin_file(&b->dev, b->legacy_io);
  638. if (error)
  639. goto legacy_io_err;
  640. /* Allocated above after the legacy_io struct */
  641. b->legacy_mem = b->legacy_io + 1;
  642. sysfs_bin_attr_init(b->legacy_mem);
  643. b->legacy_mem->attr.name = "legacy_mem";
  644. b->legacy_mem->size = 1024*1024;
  645. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  646. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  647. pci_adjust_legacy_attr(b, pci_mmap_mem);
  648. error = device_create_bin_file(&b->dev, b->legacy_mem);
  649. if (error)
  650. goto legacy_mem_err;
  651. return;
  652. legacy_mem_err:
  653. device_remove_bin_file(&b->dev, b->legacy_io);
  654. legacy_io_err:
  655. kfree(b->legacy_io);
  656. b->legacy_io = NULL;
  657. kzalloc_err:
  658. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  659. "and ISA memory resources to sysfs\n");
  660. return;
  661. }
  662. void pci_remove_legacy_files(struct pci_bus *b)
  663. {
  664. if (b->legacy_io) {
  665. device_remove_bin_file(&b->dev, b->legacy_io);
  666. device_remove_bin_file(&b->dev, b->legacy_mem);
  667. kfree(b->legacy_io); /* both are allocated here */
  668. }
  669. }
  670. #endif /* HAVE_PCI_LEGACY */
  671. #ifdef HAVE_PCI_MMAP
  672. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  673. enum pci_mmap_api mmap_api)
  674. {
  675. unsigned long nr, start, size, pci_start;
  676. if (pci_resource_len(pdev, resno) == 0)
  677. return 0;
  678. nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  679. start = vma->vm_pgoff;
  680. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  681. pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
  682. pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
  683. if (start >= pci_start && start < pci_start + size &&
  684. start + nr <= pci_start + size)
  685. return 1;
  686. return 0;
  687. }
  688. /**
  689. * pci_mmap_resource - map a PCI resource into user memory space
  690. * @kobj: kobject for mapping
  691. * @attr: struct bin_attribute for the file being mapped
  692. * @vma: struct vm_area_struct passed into the mmap
  693. * @write_combine: 1 for write_combine mapping
  694. *
  695. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  696. */
  697. static int
  698. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  699. struct vm_area_struct *vma, int write_combine)
  700. {
  701. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  702. struct device, kobj));
  703. struct resource *res = attr->private;
  704. enum pci_mmap_state mmap_type;
  705. resource_size_t start, end;
  706. int i;
  707. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  708. if (res == &pdev->resource[i])
  709. break;
  710. if (i >= PCI_ROM_RESOURCE)
  711. return -ENODEV;
  712. if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
  713. WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
  714. "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  715. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  716. pci_name(pdev), i,
  717. (u64)pci_resource_start(pdev, i),
  718. (u64)pci_resource_len(pdev, i));
  719. return -EINVAL;
  720. }
  721. /* pci_mmap_page_range() expects the same kind of entry as coming
  722. * from /proc/bus/pci/ which is a "user visible" value. If this is
  723. * different from the resource itself, arch will do necessary fixup.
  724. */
  725. pci_resource_to_user(pdev, i, res, &start, &end);
  726. vma->vm_pgoff += start >> PAGE_SHIFT;
  727. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  728. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  729. return -EINVAL;
  730. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  731. }
  732. static int
  733. pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  734. struct bin_attribute *attr,
  735. struct vm_area_struct *vma)
  736. {
  737. return pci_mmap_resource(kobj, attr, vma, 0);
  738. }
  739. static int
  740. pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  741. struct bin_attribute *attr,
  742. struct vm_area_struct *vma)
  743. {
  744. return pci_mmap_resource(kobj, attr, vma, 1);
  745. }
  746. static ssize_t
  747. pci_resource_io(struct file *filp, struct kobject *kobj,
  748. struct bin_attribute *attr, char *buf,
  749. loff_t off, size_t count, bool write)
  750. {
  751. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  752. struct device, kobj));
  753. struct resource *res = attr->private;
  754. unsigned long port = off;
  755. int i;
  756. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  757. if (res == &pdev->resource[i])
  758. break;
  759. if (i >= PCI_ROM_RESOURCE)
  760. return -ENODEV;
  761. port += pci_resource_start(pdev, i);
  762. if (port > pci_resource_end(pdev, i))
  763. return 0;
  764. if (port + count - 1 > pci_resource_end(pdev, i))
  765. return -EINVAL;
  766. switch (count) {
  767. case 1:
  768. if (write)
  769. outb(*(u8 *)buf, port);
  770. else
  771. *(u8 *)buf = inb(port);
  772. return 1;
  773. case 2:
  774. if (write)
  775. outw(*(u16 *)buf, port);
  776. else
  777. *(u16 *)buf = inw(port);
  778. return 2;
  779. case 4:
  780. if (write)
  781. outl(*(u32 *)buf, port);
  782. else
  783. *(u32 *)buf = inl(port);
  784. return 4;
  785. }
  786. return -EINVAL;
  787. }
  788. static ssize_t
  789. pci_read_resource_io(struct file *filp, struct kobject *kobj,
  790. struct bin_attribute *attr, char *buf,
  791. loff_t off, size_t count)
  792. {
  793. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  794. }
  795. static ssize_t
  796. pci_write_resource_io(struct file *filp, struct kobject *kobj,
  797. struct bin_attribute *attr, char *buf,
  798. loff_t off, size_t count)
  799. {
  800. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  801. }
  802. /**
  803. * pci_remove_resource_files - cleanup resource files
  804. * @pdev: dev to cleanup
  805. *
  806. * If we created resource files for @pdev, remove them from sysfs and
  807. * free their resources.
  808. */
  809. static void
  810. pci_remove_resource_files(struct pci_dev *pdev)
  811. {
  812. int i;
  813. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  814. struct bin_attribute *res_attr;
  815. res_attr = pdev->res_attr[i];
  816. if (res_attr) {
  817. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  818. kfree(res_attr);
  819. }
  820. res_attr = pdev->res_attr_wc[i];
  821. if (res_attr) {
  822. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  823. kfree(res_attr);
  824. }
  825. }
  826. }
  827. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  828. {
  829. /* allocate attribute structure, piggyback attribute name */
  830. int name_len = write_combine ? 13 : 10;
  831. struct bin_attribute *res_attr;
  832. int retval;
  833. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  834. if (res_attr) {
  835. char *res_attr_name = (char *)(res_attr + 1);
  836. sysfs_bin_attr_init(res_attr);
  837. if (write_combine) {
  838. pdev->res_attr_wc[num] = res_attr;
  839. sprintf(res_attr_name, "resource%d_wc", num);
  840. res_attr->mmap = pci_mmap_resource_wc;
  841. } else {
  842. pdev->res_attr[num] = res_attr;
  843. sprintf(res_attr_name, "resource%d", num);
  844. res_attr->mmap = pci_mmap_resource_uc;
  845. }
  846. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  847. res_attr->read = pci_read_resource_io;
  848. res_attr->write = pci_write_resource_io;
  849. }
  850. res_attr->attr.name = res_attr_name;
  851. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  852. res_attr->size = pci_resource_len(pdev, num);
  853. res_attr->private = &pdev->resource[num];
  854. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  855. } else
  856. retval = -ENOMEM;
  857. return retval;
  858. }
  859. /**
  860. * pci_create_resource_files - create resource files in sysfs for @dev
  861. * @pdev: dev in question
  862. *
  863. * Walk the resources in @pdev creating files for each resource available.
  864. */
  865. static int pci_create_resource_files(struct pci_dev *pdev)
  866. {
  867. int i;
  868. int retval;
  869. /* Expose the PCI resources from this device as files */
  870. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  871. /* skip empty resources */
  872. if (!pci_resource_len(pdev, i))
  873. continue;
  874. retval = pci_create_attr(pdev, i, 0);
  875. /* for prefetchable resources, create a WC mappable file */
  876. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  877. retval = pci_create_attr(pdev, i, 1);
  878. if (retval) {
  879. pci_remove_resource_files(pdev);
  880. return retval;
  881. }
  882. }
  883. return 0;
  884. }
  885. #else /* !HAVE_PCI_MMAP */
  886. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  887. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  888. #endif /* HAVE_PCI_MMAP */
  889. /**
  890. * pci_write_rom - used to enable access to the PCI ROM display
  891. * @filp: sysfs file
  892. * @kobj: kernel object handle
  893. * @bin_attr: struct bin_attribute for this file
  894. * @buf: user input
  895. * @off: file offset
  896. * @count: number of byte in input
  897. *
  898. * writing anything except 0 enables it
  899. */
  900. static ssize_t
  901. pci_write_rom(struct file *filp, struct kobject *kobj,
  902. struct bin_attribute *bin_attr,
  903. char *buf, loff_t off, size_t count)
  904. {
  905. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  906. if ((off == 0) && (*buf == '0') && (count == 2))
  907. pdev->rom_attr_enabled = 0;
  908. else
  909. pdev->rom_attr_enabled = 1;
  910. return count;
  911. }
  912. /**
  913. * pci_read_rom - read a PCI ROM
  914. * @filp: sysfs file
  915. * @kobj: kernel object handle
  916. * @bin_attr: struct bin_attribute for this file
  917. * @buf: where to put the data we read from the ROM
  918. * @off: file offset
  919. * @count: number of bytes to read
  920. *
  921. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  922. * device corresponding to @kobj.
  923. */
  924. static ssize_t
  925. pci_read_rom(struct file *filp, struct kobject *kobj,
  926. struct bin_attribute *bin_attr,
  927. char *buf, loff_t off, size_t count)
  928. {
  929. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  930. void __iomem *rom;
  931. size_t size;
  932. if (!pdev->rom_attr_enabled)
  933. return -EINVAL;
  934. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  935. if (!rom || !size)
  936. return -EIO;
  937. if (off >= size)
  938. count = 0;
  939. else {
  940. if (off + count > size)
  941. count = size - off;
  942. memcpy_fromio(buf, rom + off, count);
  943. }
  944. pci_unmap_rom(pdev, rom);
  945. return count;
  946. }
  947. static struct bin_attribute pci_config_attr = {
  948. .attr = {
  949. .name = "config",
  950. .mode = S_IRUGO | S_IWUSR,
  951. },
  952. .size = PCI_CFG_SPACE_SIZE,
  953. .read = pci_read_config,
  954. .write = pci_write_config,
  955. };
  956. static struct bin_attribute pcie_config_attr = {
  957. .attr = {
  958. .name = "config",
  959. .mode = S_IRUGO | S_IWUSR,
  960. },
  961. .size = PCI_CFG_SPACE_EXP_SIZE,
  962. .read = pci_read_config,
  963. .write = pci_write_config,
  964. };
  965. int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
  966. {
  967. return 0;
  968. }
  969. static ssize_t reset_store(struct device *dev,
  970. struct device_attribute *attr, const char *buf,
  971. size_t count)
  972. {
  973. struct pci_dev *pdev = to_pci_dev(dev);
  974. unsigned long val;
  975. ssize_t result = strict_strtoul(buf, 0, &val);
  976. if (result < 0)
  977. return result;
  978. if (val != 1)
  979. return -EINVAL;
  980. result = pci_reset_function(pdev);
  981. if (result < 0)
  982. return result;
  983. return count;
  984. }
  985. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  986. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  987. {
  988. int retval;
  989. struct bin_attribute *attr;
  990. /* If the device has VPD, try to expose it in sysfs. */
  991. if (dev->vpd) {
  992. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  993. if (!attr)
  994. return -ENOMEM;
  995. sysfs_bin_attr_init(attr);
  996. attr->size = dev->vpd->len;
  997. attr->attr.name = "vpd";
  998. attr->attr.mode = S_IRUSR | S_IWUSR;
  999. attr->read = read_vpd_attr;
  1000. attr->write = write_vpd_attr;
  1001. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1002. if (retval) {
  1003. kfree(attr);
  1004. return retval;
  1005. }
  1006. dev->vpd->attr = attr;
  1007. }
  1008. /* Active State Power Management */
  1009. pcie_aspm_create_sysfs_dev_files(dev);
  1010. if (!pci_probe_reset_function(dev)) {
  1011. retval = device_create_file(&dev->dev, &reset_attr);
  1012. if (retval)
  1013. goto error;
  1014. dev->reset_fn = 1;
  1015. }
  1016. return 0;
  1017. error:
  1018. pcie_aspm_remove_sysfs_dev_files(dev);
  1019. if (dev->vpd && dev->vpd->attr) {
  1020. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1021. kfree(dev->vpd->attr);
  1022. }
  1023. return retval;
  1024. }
  1025. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  1026. {
  1027. int retval;
  1028. int rom_size = 0;
  1029. struct bin_attribute *attr;
  1030. if (!sysfs_initialized)
  1031. return -EACCES;
  1032. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1033. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1034. else
  1035. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1036. if (retval)
  1037. goto err;
  1038. retval = pci_create_resource_files(pdev);
  1039. if (retval)
  1040. goto err_config_file;
  1041. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1042. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1043. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1044. rom_size = 0x20000;
  1045. /* If the device has a ROM, try to expose it in sysfs. */
  1046. if (rom_size) {
  1047. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1048. if (!attr) {
  1049. retval = -ENOMEM;
  1050. goto err_resource_files;
  1051. }
  1052. sysfs_bin_attr_init(attr);
  1053. attr->size = rom_size;
  1054. attr->attr.name = "rom";
  1055. attr->attr.mode = S_IRUSR | S_IWUSR;
  1056. attr->read = pci_read_rom;
  1057. attr->write = pci_write_rom;
  1058. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1059. if (retval) {
  1060. kfree(attr);
  1061. goto err_resource_files;
  1062. }
  1063. pdev->rom_attr = attr;
  1064. }
  1065. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
  1066. retval = device_create_file(&pdev->dev, &vga_attr);
  1067. if (retval)
  1068. goto err_rom_file;
  1069. }
  1070. /* add platform-specific attributes */
  1071. retval = pcibios_add_platform_entries(pdev);
  1072. if (retval)
  1073. goto err_vga_file;
  1074. /* add sysfs entries for various capabilities */
  1075. retval = pci_create_capabilities_sysfs(pdev);
  1076. if (retval)
  1077. goto err_vga_file;
  1078. pci_create_firmware_label_files(pdev);
  1079. return 0;
  1080. err_vga_file:
  1081. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
  1082. device_remove_file(&pdev->dev, &vga_attr);
  1083. err_rom_file:
  1084. if (rom_size) {
  1085. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1086. kfree(pdev->rom_attr);
  1087. pdev->rom_attr = NULL;
  1088. }
  1089. err_resource_files:
  1090. pci_remove_resource_files(pdev);
  1091. err_config_file:
  1092. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1093. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1094. else
  1095. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1096. err:
  1097. return retval;
  1098. }
  1099. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1100. {
  1101. if (dev->vpd && dev->vpd->attr) {
  1102. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1103. kfree(dev->vpd->attr);
  1104. }
  1105. pcie_aspm_remove_sysfs_dev_files(dev);
  1106. if (dev->reset_fn) {
  1107. device_remove_file(&dev->dev, &reset_attr);
  1108. dev->reset_fn = 0;
  1109. }
  1110. }
  1111. /**
  1112. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1113. * @pdev: device whose entries we should free
  1114. *
  1115. * Cleanup when @pdev is removed from sysfs.
  1116. */
  1117. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1118. {
  1119. int rom_size = 0;
  1120. if (!sysfs_initialized)
  1121. return;
  1122. pci_remove_capabilities_sysfs(pdev);
  1123. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1124. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1125. else
  1126. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1127. pci_remove_resource_files(pdev);
  1128. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1129. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1130. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1131. rom_size = 0x20000;
  1132. if (rom_size && pdev->rom_attr) {
  1133. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1134. kfree(pdev->rom_attr);
  1135. }
  1136. pci_remove_firmware_label_files(pdev);
  1137. }
  1138. static int __init pci_sysfs_init(void)
  1139. {
  1140. struct pci_dev *pdev = NULL;
  1141. int retval;
  1142. sysfs_initialized = 1;
  1143. for_each_pci_dev(pdev) {
  1144. retval = pci_create_sysfs_dev_files(pdev);
  1145. if (retval) {
  1146. pci_dev_put(pdev);
  1147. return retval;
  1148. }
  1149. }
  1150. return 0;
  1151. }
  1152. late_initcall(pci_sysfs_init);