core.h 22 KB

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  1. /*
  2. * Copyright (c) 2010-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #ifndef CORE_H
  18. #define CORE_H
  19. #include <linux/etherdevice.h>
  20. #include <linux/rtnetlink.h>
  21. #include <linux/firmware.h>
  22. #include <linux/sched.h>
  23. #include <linux/circ_buf.h>
  24. #include <net/cfg80211.h>
  25. #include "htc.h"
  26. #include "wmi.h"
  27. #include "bmi.h"
  28. #include "target.h"
  29. #define MAX_ATH6KL 1
  30. #define ATH6KL_MAX_RX_BUFFERS 16
  31. #define ATH6KL_BUFFER_SIZE 1664
  32. #define ATH6KL_MAX_AMSDU_RX_BUFFERS 4
  33. #define ATH6KL_AMSDU_REFILL_THRESHOLD 3
  34. #define ATH6KL_AMSDU_BUFFER_SIZE (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128)
  35. #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN 1508
  36. #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN 46
  37. #define USER_SAVEDKEYS_STAT_INIT 0
  38. #define USER_SAVEDKEYS_STAT_RUN 1
  39. #define ATH6KL_TX_TIMEOUT 10
  40. #define ATH6KL_MAX_ENDPOINTS 4
  41. #define MAX_NODE_NUM 15
  42. #define ATH6KL_APSD_ALL_FRAME 0xFFFF
  43. #define ATH6KL_APSD_NUM_OF_AC 0x4
  44. #define ATH6KL_APSD_FRAME_MASK 0xF
  45. /* Extra bytes for htc header alignment */
  46. #define ATH6KL_HTC_ALIGN_BYTES 3
  47. /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */
  48. #define MAX_DEF_COOKIE_NUM 180
  49. #define MAX_HI_COOKIE_NUM 18 /* 10% of MAX_COOKIE_NUM */
  50. #define MAX_COOKIE_NUM (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM)
  51. #define MAX_DEFAULT_SEND_QUEUE_DEPTH (MAX_DEF_COOKIE_NUM / WMM_NUM_AC)
  52. #define DISCON_TIMER_INTVAL 10000 /* in msec */
  53. /* Channel dwell time in fg scan */
  54. #define ATH6KL_FG_SCAN_INTERVAL 50 /* in ms */
  55. /* includes also the null byte */
  56. #define ATH6KL_FIRMWARE_MAGIC "QCA-ATH6KL"
  57. enum ath6kl_fw_ie_type {
  58. ATH6KL_FW_IE_FW_VERSION = 0,
  59. ATH6KL_FW_IE_TIMESTAMP = 1,
  60. ATH6KL_FW_IE_OTP_IMAGE = 2,
  61. ATH6KL_FW_IE_FW_IMAGE = 3,
  62. ATH6KL_FW_IE_PATCH_IMAGE = 4,
  63. ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5,
  64. ATH6KL_FW_IE_CAPABILITIES = 6,
  65. ATH6KL_FW_IE_PATCH_ADDR = 7,
  66. ATH6KL_FW_IE_BOARD_ADDR = 8,
  67. ATH6KL_FW_IE_VIF_MAX = 9,
  68. };
  69. enum ath6kl_fw_capability {
  70. ATH6KL_FW_CAPABILITY_HOST_P2P = 0,
  71. ATH6KL_FW_CAPABILITY_SCHED_SCAN = 1,
  72. /*
  73. * Firmware is capable of supporting P2P mgmt operations on a
  74. * station interface. After group formation, the station
  75. * interface will become a P2P client/GO interface as the case may be
  76. */
  77. ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
  78. /*
  79. * Firmware has support to cleanup inactive stations
  80. * in AP mode.
  81. */
  82. ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT,
  83. /* Firmware has support to override rsn cap of rsn ie */
  84. ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE,
  85. /* this needs to be last */
  86. ATH6KL_FW_CAPABILITY_MAX,
  87. };
  88. #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32)
  89. struct ath6kl_fw_ie {
  90. __le32 id;
  91. __le32 len;
  92. u8 data[0];
  93. };
  94. #define ATH6KL_FW_API2_FILE "fw-2.bin"
  95. #define ATH6KL_FW_API3_FILE "fw-3.bin"
  96. /* AR6003 1.0 definitions */
  97. #define AR6003_HW_1_0_VERSION 0x300002ba
  98. /* AR6003 2.0 definitions */
  99. #define AR6003_HW_2_0_VERSION 0x30000384
  100. #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS 0x57e910
  101. #define AR6003_HW_2_0_FW_DIR "ath6k/AR6003/hw2.0"
  102. #define AR6003_HW_2_0_OTP_FILE "otp.bin.z77"
  103. #define AR6003_HW_2_0_FIRMWARE_FILE "athwlan.bin.z77"
  104. #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE "athtcmd_ram.bin"
  105. #define AR6003_HW_2_0_PATCH_FILE "data.patch.bin"
  106. #define AR6003_HW_2_0_BOARD_DATA_FILE AR6003_HW_2_0_FW_DIR "/bdata.bin"
  107. #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \
  108. AR6003_HW_2_0_FW_DIR "/bdata.SD31.bin"
  109. /* AR6003 3.0 definitions */
  110. #define AR6003_HW_2_1_1_VERSION 0x30000582
  111. #define AR6003_HW_2_1_1_FW_DIR "ath6k/AR6003/hw2.1.1"
  112. #define AR6003_HW_2_1_1_OTP_FILE "otp.bin"
  113. #define AR6003_HW_2_1_1_FIRMWARE_FILE "athwlan.bin"
  114. #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE "athtcmd_ram.bin"
  115. #define AR6003_HW_2_1_1_UTF_FIRMWARE_FILE "utf.bin"
  116. #define AR6003_HW_2_1_1_TESTSCRIPT_FILE "nullTestFlow.bin"
  117. #define AR6003_HW_2_1_1_PATCH_FILE "data.patch.bin"
  118. #define AR6003_HW_2_1_1_BOARD_DATA_FILE AR6003_HW_2_1_1_FW_DIR "/bdata.bin"
  119. #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \
  120. AR6003_HW_2_1_1_FW_DIR "/bdata.SD31.bin"
  121. /* AR6004 1.0 definitions */
  122. #define AR6004_HW_1_0_VERSION 0x30000623
  123. #define AR6004_HW_1_0_FW_DIR "ath6k/AR6004/hw1.0"
  124. #define AR6004_HW_1_0_FIRMWARE_FILE "fw.ram.bin"
  125. #define AR6004_HW_1_0_BOARD_DATA_FILE AR6004_HW_1_0_FW_DIR "/bdata.bin"
  126. #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \
  127. AR6004_HW_1_0_FW_DIR "/bdata.DB132.bin"
  128. /* AR6004 1.1 definitions */
  129. #define AR6004_HW_1_1_VERSION 0x30000001
  130. #define AR6004_HW_1_1_FW_DIR "ath6k/AR6004/hw1.1"
  131. #define AR6004_HW_1_1_FIRMWARE_FILE "fw.ram.bin"
  132. #define AR6004_HW_1_1_BOARD_DATA_FILE AR6004_HW_1_1_FW_DIR "/bdata.bin"
  133. #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \
  134. AR6004_HW_1_1_FW_DIR "/bdata.DB132.bin"
  135. /* AR6004 1.2 definitions */
  136. #define AR6004_HW_1_2_VERSION 0x300007e8
  137. #define AR6004_HW_1_2_FW_DIR "ath6k/AR6004/hw1.2"
  138. #define AR6004_HW_1_2_FIRMWARE_FILE "fw.ram.bin"
  139. #define AR6004_HW_1_2_BOARD_DATA_FILE AR6004_HW_1_2_FW_DIR "/bdata.bin"
  140. #define AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE \
  141. AR6004_HW_1_2_FW_DIR "/bdata.bin"
  142. /* Per STA data, used in AP mode */
  143. #define STA_PS_AWAKE BIT(0)
  144. #define STA_PS_SLEEP BIT(1)
  145. #define STA_PS_POLLED BIT(2)
  146. #define STA_PS_APSD_TRIGGER BIT(3)
  147. #define STA_PS_APSD_EOSP BIT(4)
  148. /* HTC TX packet tagging definitions */
  149. #define ATH6KL_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED
  150. #define ATH6KL_DATA_PKT_TAG (ATH6KL_CONTROL_PKT_TAG + 1)
  151. #define AR6003_CUST_DATA_SIZE 16
  152. #define AGGR_WIN_IDX(x, y) ((x) % (y))
  153. #define AGGR_INCR_IDX(x, y) AGGR_WIN_IDX(((x) + 1), (y))
  154. #define AGGR_DCRM_IDX(x, y) AGGR_WIN_IDX(((x) - 1), (y))
  155. #define ATH6KL_MAX_SEQ_NO 0xFFF
  156. #define ATH6KL_NEXT_SEQ_NO(x) (((x) + 1) & ATH6KL_MAX_SEQ_NO)
  157. #define NUM_OF_TIDS 8
  158. #define AGGR_SZ_DEFAULT 8
  159. #define AGGR_WIN_SZ_MIN 2
  160. #define AGGR_WIN_SZ_MAX 8
  161. #define TID_WINDOW_SZ(_x) ((_x) << 1)
  162. #define AGGR_NUM_OF_FREE_NETBUFS 16
  163. #define AGGR_RX_TIMEOUT 400 /* in ms */
  164. #define WMI_TIMEOUT (2 * HZ)
  165. #define MBOX_YIELD_LIMIT 99
  166. #define ATH6KL_DEFAULT_LISTEN_INTVAL 100 /* in TUs */
  167. #define ATH6KL_DEFAULT_BMISS_TIME 1500
  168. #define ATH6KL_MAX_WOW_LISTEN_INTL 300 /* in TUs */
  169. #define ATH6KL_MAX_BMISS_TIME 5000
  170. /* configuration lags */
  171. /*
  172. * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in
  173. * ERP IE of beacon to determine the short premable support when
  174. * sending (Re)Assoc req.
  175. * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power
  176. * module state transition failure events which happen during
  177. * scan, to the host.
  178. */
  179. #define ATH6KL_CONF_IGNORE_ERP_BARKER BIT(0)
  180. #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN BIT(1)
  181. #define ATH6KL_CONF_ENABLE_11N BIT(2)
  182. #define ATH6KL_CONF_ENABLE_TX_BURST BIT(3)
  183. #define ATH6KL_CONF_UART_DEBUG BIT(4)
  184. #define P2P_WILDCARD_SSID_LEN 7 /* DIRECT- */
  185. enum wlan_low_pwr_state {
  186. WLAN_POWER_STATE_ON,
  187. WLAN_POWER_STATE_CUT_PWR,
  188. WLAN_POWER_STATE_DEEP_SLEEP,
  189. WLAN_POWER_STATE_WOW
  190. };
  191. enum sme_state {
  192. SME_DISCONNECTED,
  193. SME_CONNECTING,
  194. SME_CONNECTED
  195. };
  196. struct skb_hold_q {
  197. struct sk_buff *skb;
  198. bool is_amsdu;
  199. u16 seq_no;
  200. };
  201. struct rxtid {
  202. bool aggr;
  203. bool progress;
  204. bool timer_mon;
  205. u16 win_sz;
  206. u16 seq_next;
  207. u32 hold_q_sz;
  208. struct skb_hold_q *hold_q;
  209. struct sk_buff_head q;
  210. /*
  211. * FIXME: No clue what this should protect. Apparently it should
  212. * protect some of the fields above but they are also accessed
  213. * without taking the lock.
  214. */
  215. spinlock_t lock;
  216. };
  217. struct rxtid_stats {
  218. u32 num_into_aggr;
  219. u32 num_dups;
  220. u32 num_oow;
  221. u32 num_mpdu;
  222. u32 num_amsdu;
  223. u32 num_delivered;
  224. u32 num_timeouts;
  225. u32 num_hole;
  226. u32 num_bar;
  227. };
  228. struct aggr_info_conn {
  229. u8 aggr_sz;
  230. u8 timer_scheduled;
  231. struct timer_list timer;
  232. struct net_device *dev;
  233. struct rxtid rx_tid[NUM_OF_TIDS];
  234. struct rxtid_stats stat[NUM_OF_TIDS];
  235. struct aggr_info *aggr_info;
  236. };
  237. struct aggr_info {
  238. struct aggr_info_conn *aggr_conn;
  239. struct sk_buff_head rx_amsdu_freeq;
  240. };
  241. struct ath6kl_wep_key {
  242. u8 key_index;
  243. u8 key_len;
  244. u8 key[64];
  245. };
  246. #define ATH6KL_KEY_SEQ_LEN 8
  247. struct ath6kl_key {
  248. u8 key[WLAN_MAX_KEY_LEN];
  249. u8 key_len;
  250. u8 seq[ATH6KL_KEY_SEQ_LEN];
  251. u8 seq_len;
  252. u32 cipher;
  253. };
  254. struct ath6kl_node_mapping {
  255. u8 mac_addr[ETH_ALEN];
  256. u8 ep_id;
  257. u8 tx_pend;
  258. };
  259. struct ath6kl_cookie {
  260. struct sk_buff *skb;
  261. u32 map_no;
  262. struct htc_packet htc_pkt;
  263. struct ath6kl_cookie *arc_list_next;
  264. };
  265. struct ath6kl_mgmt_buff {
  266. struct list_head list;
  267. u32 freq;
  268. u32 wait;
  269. u32 id;
  270. bool no_cck;
  271. size_t len;
  272. u8 buf[0];
  273. };
  274. struct ath6kl_sta {
  275. u16 sta_flags;
  276. u8 mac[ETH_ALEN];
  277. u8 aid;
  278. u8 keymgmt;
  279. u8 ucipher;
  280. u8 auth;
  281. u8 wpa_ie[ATH6KL_MAX_IE];
  282. struct sk_buff_head psq;
  283. /* protects psq, mgmt_psq, apsdq, and mgmt_psq_len fields */
  284. spinlock_t psq_lock;
  285. struct list_head mgmt_psq;
  286. size_t mgmt_psq_len;
  287. u8 apsd_info;
  288. struct sk_buff_head apsdq;
  289. struct aggr_info_conn *aggr_conn;
  290. };
  291. struct ath6kl_version {
  292. u32 target_ver;
  293. u32 wlan_ver;
  294. u32 abi_ver;
  295. };
  296. struct ath6kl_bmi {
  297. u32 cmd_credits;
  298. bool done_sent;
  299. u8 *cmd_buf;
  300. u32 max_data_size;
  301. u32 max_cmd_size;
  302. };
  303. struct target_stats {
  304. u64 tx_pkt;
  305. u64 tx_byte;
  306. u64 tx_ucast_pkt;
  307. u64 tx_ucast_byte;
  308. u64 tx_mcast_pkt;
  309. u64 tx_mcast_byte;
  310. u64 tx_bcast_pkt;
  311. u64 tx_bcast_byte;
  312. u64 tx_rts_success_cnt;
  313. u64 tx_pkt_per_ac[4];
  314. u64 tx_err;
  315. u64 tx_fail_cnt;
  316. u64 tx_retry_cnt;
  317. u64 tx_mult_retry_cnt;
  318. u64 tx_rts_fail_cnt;
  319. u64 rx_pkt;
  320. u64 rx_byte;
  321. u64 rx_ucast_pkt;
  322. u64 rx_ucast_byte;
  323. u64 rx_mcast_pkt;
  324. u64 rx_mcast_byte;
  325. u64 rx_bcast_pkt;
  326. u64 rx_bcast_byte;
  327. u64 rx_frgment_pkt;
  328. u64 rx_err;
  329. u64 rx_crc_err;
  330. u64 rx_key_cache_miss;
  331. u64 rx_decrypt_err;
  332. u64 rx_dupl_frame;
  333. u64 tkip_local_mic_fail;
  334. u64 tkip_cnter_measures_invoked;
  335. u64 tkip_replays;
  336. u64 tkip_fmt_err;
  337. u64 ccmp_fmt_err;
  338. u64 ccmp_replays;
  339. u64 pwr_save_fail_cnt;
  340. u64 cs_bmiss_cnt;
  341. u64 cs_low_rssi_cnt;
  342. u64 cs_connect_cnt;
  343. u64 cs_discon_cnt;
  344. s32 tx_ucast_rate;
  345. s32 rx_ucast_rate;
  346. u32 lq_val;
  347. u32 wow_pkt_dropped;
  348. u16 wow_evt_discarded;
  349. s16 noise_floor_calib;
  350. s16 cs_rssi;
  351. s16 cs_ave_beacon_rssi;
  352. u8 cs_ave_beacon_snr;
  353. u8 cs_last_roam_msec;
  354. u8 cs_snr;
  355. u8 wow_host_pkt_wakeups;
  356. u8 wow_host_evt_wakeups;
  357. u32 arp_received;
  358. u32 arp_matched;
  359. u32 arp_replied;
  360. };
  361. struct ath6kl_mbox_info {
  362. u32 htc_addr;
  363. u32 htc_ext_addr;
  364. u32 htc_ext_sz;
  365. u32 block_size;
  366. u32 gmbox_addr;
  367. u32 gmbox_sz;
  368. };
  369. /*
  370. * 802.11i defines an extended IV for use with non-WEP ciphers.
  371. * When the EXTIV bit is set in the key id byte an additional
  372. * 4 bytes immediately follow the IV for TKIP. For CCMP the
  373. * EXTIV bit is likewise set but the 8 bytes represent the
  374. * CCMP header rather than IV+extended-IV.
  375. */
  376. #define ATH6KL_KEYBUF_SIZE 16
  377. #define ATH6KL_MICBUF_SIZE (8+8) /* space for both tx and rx */
  378. #define ATH6KL_KEY_XMIT 0x01
  379. #define ATH6KL_KEY_RECV 0x02
  380. #define ATH6KL_KEY_DEFAULT 0x80 /* default xmit key */
  381. /* Initial group key for AP mode */
  382. struct ath6kl_req_key {
  383. bool valid;
  384. u8 key_index;
  385. int key_type;
  386. u8 key[WLAN_MAX_KEY_LEN];
  387. u8 key_len;
  388. };
  389. enum ath6kl_hif_type {
  390. ATH6KL_HIF_TYPE_SDIO,
  391. ATH6KL_HIF_TYPE_USB,
  392. };
  393. enum ath6kl_htc_type {
  394. ATH6KL_HTC_TYPE_MBOX,
  395. ATH6KL_HTC_TYPE_PIPE,
  396. };
  397. /* Max number of filters that hw supports */
  398. #define ATH6K_MAX_MC_FILTERS_PER_LIST 7
  399. struct ath6kl_mc_filter {
  400. struct list_head list;
  401. char hw_addr[ATH6KL_MCAST_FILTER_MAC_ADDR_SIZE];
  402. };
  403. struct ath6kl_htcap {
  404. bool ht_enable;
  405. u8 ampdu_factor;
  406. unsigned short cap_info;
  407. };
  408. /*
  409. * Driver's maximum limit, note that some firmwares support only one vif
  410. * and the runtime (current) limit must be checked from ar->vif_max.
  411. */
  412. #define ATH6KL_VIF_MAX 3
  413. /* vif flags info */
  414. enum ath6kl_vif_state {
  415. CONNECTED,
  416. CONNECT_PEND,
  417. WMM_ENABLED,
  418. NETQ_STOPPED,
  419. DTIM_EXPIRED,
  420. NETDEV_REGISTERED,
  421. CLEAR_BSSFILTER_ON_BEACON,
  422. DTIM_PERIOD_AVAIL,
  423. WLAN_ENABLED,
  424. STATS_UPDATE_PEND,
  425. HOST_SLEEP_MODE_CMD_PROCESSED,
  426. NETDEV_MCAST_ALL_ON,
  427. NETDEV_MCAST_ALL_OFF,
  428. };
  429. struct ath6kl_vif {
  430. struct list_head list;
  431. struct wireless_dev wdev;
  432. struct net_device *ndev;
  433. struct ath6kl *ar;
  434. /* Lock to protect vif specific net_stats and flags */
  435. spinlock_t if_lock;
  436. u8 fw_vif_idx;
  437. unsigned long flags;
  438. int ssid_len;
  439. u8 ssid[IEEE80211_MAX_SSID_LEN];
  440. u8 dot11_auth_mode;
  441. u8 auth_mode;
  442. u8 prwise_crypto;
  443. u8 prwise_crypto_len;
  444. u8 grp_crypto;
  445. u8 grp_crypto_len;
  446. u8 def_txkey_index;
  447. u8 next_mode;
  448. u8 nw_type;
  449. u8 bssid[ETH_ALEN];
  450. u8 req_bssid[ETH_ALEN];
  451. u16 ch_hint;
  452. u16 bss_ch;
  453. struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1];
  454. struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1];
  455. struct aggr_info *aggr_cntxt;
  456. struct ath6kl_htcap htcap;
  457. struct timer_list disconnect_timer;
  458. struct timer_list sched_scan_timer;
  459. struct cfg80211_scan_request *scan_req;
  460. enum sme_state sme_state;
  461. int reconnect_flag;
  462. u32 last_roc_id;
  463. u32 last_cancel_roc_id;
  464. u32 send_action_id;
  465. bool probe_req_report;
  466. u16 next_chan;
  467. enum nl80211_channel_type next_ch_type;
  468. enum ieee80211_band next_ch_band;
  469. u16 assoc_bss_beacon_int;
  470. u16 listen_intvl_t;
  471. u16 bmiss_time_t;
  472. u16 bg_scan_period;
  473. u8 assoc_bss_dtim_period;
  474. struct net_device_stats net_stats;
  475. struct target_stats target_stats;
  476. struct wmi_connect_cmd profile;
  477. struct list_head mc_filter;
  478. };
  479. #define WOW_LIST_ID 0
  480. #define WOW_HOST_REQ_DELAY 500 /* ms */
  481. #define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */
  482. /* Flag info */
  483. enum ath6kl_dev_state {
  484. WMI_ENABLED,
  485. WMI_READY,
  486. WMI_CTRL_EP_FULL,
  487. TESTMODE,
  488. DESTROY_IN_PROGRESS,
  489. SKIP_SCAN,
  490. ROAM_TBL_PEND,
  491. FIRST_BOOT,
  492. };
  493. enum ath6kl_state {
  494. ATH6KL_STATE_OFF,
  495. ATH6KL_STATE_ON,
  496. ATH6KL_STATE_SUSPENDING,
  497. ATH6KL_STATE_RESUMING,
  498. ATH6KL_STATE_DEEPSLEEP,
  499. ATH6KL_STATE_CUTPOWER,
  500. ATH6KL_STATE_WOW,
  501. ATH6KL_STATE_SCHED_SCAN,
  502. };
  503. struct ath6kl {
  504. struct device *dev;
  505. struct wiphy *wiphy;
  506. enum ath6kl_state state;
  507. unsigned int testmode;
  508. struct ath6kl_bmi bmi;
  509. const struct ath6kl_hif_ops *hif_ops;
  510. const struct ath6kl_htc_ops *htc_ops;
  511. struct wmi *wmi;
  512. int tx_pending[ENDPOINT_MAX];
  513. int total_tx_data_pend;
  514. struct htc_target *htc_target;
  515. enum ath6kl_hif_type hif_type;
  516. void *hif_priv;
  517. struct list_head vif_list;
  518. /* Lock to avoid race in vif_list entries among add/del/traverse */
  519. spinlock_t list_lock;
  520. u8 num_vif;
  521. unsigned int vif_max;
  522. u8 max_norm_iface;
  523. u8 avail_idx_map;
  524. /*
  525. * Protects at least amsdu_rx_buffer_queue, ath6kl_alloc_cookie()
  526. * calls, tx_pending and total_tx_data_pend.
  527. */
  528. spinlock_t lock;
  529. struct semaphore sem;
  530. u8 lrssi_roam_threshold;
  531. struct ath6kl_version version;
  532. u32 target_type;
  533. u8 tx_pwr;
  534. struct ath6kl_node_mapping node_map[MAX_NODE_NUM];
  535. u8 ibss_ps_enable;
  536. bool ibss_if_active;
  537. u8 node_num;
  538. u8 next_ep_id;
  539. struct ath6kl_cookie *cookie_list;
  540. u32 cookie_count;
  541. enum htc_endpoint_id ac2ep_map[WMM_NUM_AC];
  542. bool ac_stream_active[WMM_NUM_AC];
  543. u8 ac_stream_pri_map[WMM_NUM_AC];
  544. u8 hiac_stream_active_pri;
  545. u8 ep2ac_map[ENDPOINT_MAX];
  546. enum htc_endpoint_id ctrl_ep;
  547. struct ath6kl_htc_credit_info credit_state_info;
  548. u32 connect_ctrl_flags;
  549. u32 user_key_ctrl;
  550. u8 usr_bss_filter;
  551. struct ath6kl_sta sta_list[AP_MAX_NUM_STA];
  552. u8 sta_list_index;
  553. struct ath6kl_req_key ap_mode_bkey;
  554. struct sk_buff_head mcastpsq;
  555. u32 want_ch_switch;
  556. /*
  557. * FIXME: protects access to mcastpsq but is actually useless as
  558. * all skbe_queue_*() functions provide serialisation themselves
  559. */
  560. spinlock_t mcastpsq_lock;
  561. u8 intra_bss;
  562. struct wmi_ap_mode_stat ap_stats;
  563. u8 ap_country_code[3];
  564. struct list_head amsdu_rx_buffer_queue;
  565. u8 rx_meta_ver;
  566. enum wlan_low_pwr_state wlan_pwr_state;
  567. u8 mac_addr[ETH_ALEN];
  568. #define AR_MCAST_FILTER_MAC_ADDR_SIZE 4
  569. struct {
  570. void *rx_report;
  571. size_t rx_report_len;
  572. } tm;
  573. struct ath6kl_hw {
  574. u32 id;
  575. const char *name;
  576. u32 dataset_patch_addr;
  577. u32 app_load_addr;
  578. u32 app_start_override_addr;
  579. u32 board_ext_data_addr;
  580. u32 reserved_ram_size;
  581. u32 board_addr;
  582. u32 refclk_hz;
  583. u32 uarttx_pin;
  584. u32 testscript_addr;
  585. enum wmi_phy_cap cap;
  586. struct ath6kl_hw_fw {
  587. const char *dir;
  588. const char *otp;
  589. const char *fw;
  590. const char *tcmd;
  591. const char *patch;
  592. const char *utf;
  593. const char *testscript;
  594. } fw;
  595. const char *fw_board;
  596. const char *fw_default_board;
  597. } hw;
  598. u16 conf_flags;
  599. u16 suspend_mode;
  600. u16 wow_suspend_mode;
  601. wait_queue_head_t event_wq;
  602. struct ath6kl_mbox_info mbox_info;
  603. struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM];
  604. unsigned long flag;
  605. u8 *fw_board;
  606. size_t fw_board_len;
  607. u8 *fw_otp;
  608. size_t fw_otp_len;
  609. u8 *fw;
  610. size_t fw_len;
  611. u8 *fw_patch;
  612. size_t fw_patch_len;
  613. u8 *fw_testscript;
  614. size_t fw_testscript_len;
  615. unsigned int fw_api;
  616. unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN];
  617. struct workqueue_struct *ath6kl_wq;
  618. struct dentry *debugfs_phy;
  619. bool p2p;
  620. bool wiphy_registered;
  621. #ifdef CONFIG_ATH6KL_DEBUG
  622. struct {
  623. struct sk_buff_head fwlog_queue;
  624. struct completion fwlog_completion;
  625. bool fwlog_open;
  626. u32 fwlog_mask;
  627. unsigned int dbgfs_diag_reg;
  628. u32 diag_reg_addr_wr;
  629. u32 diag_reg_val_wr;
  630. struct {
  631. unsigned int invalid_rate;
  632. } war_stats;
  633. u8 *roam_tbl;
  634. unsigned int roam_tbl_len;
  635. u8 keepalive;
  636. u8 disc_timeout;
  637. } debug;
  638. #endif /* CONFIG_ATH6KL_DEBUG */
  639. };
  640. static inline struct ath6kl *ath6kl_priv(struct net_device *dev)
  641. {
  642. return ((struct ath6kl_vif *) netdev_priv(dev))->ar;
  643. }
  644. static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar,
  645. u32 item_offset)
  646. {
  647. u32 addr = 0;
  648. if (ar->target_type == TARGET_TYPE_AR6003)
  649. addr = ATH6KL_AR6003_HI_START_ADDR + item_offset;
  650. else if (ar->target_type == TARGET_TYPE_AR6004)
  651. addr = ATH6KL_AR6004_HI_START_ADDR + item_offset;
  652. return addr;
  653. }
  654. int ath6kl_configure_target(struct ath6kl *ar);
  655. void ath6kl_detect_error(unsigned long ptr);
  656. void disconnect_timer_handler(unsigned long ptr);
  657. void init_netdev(struct net_device *dev);
  658. void ath6kl_cookie_init(struct ath6kl *ar);
  659. void ath6kl_cookie_cleanup(struct ath6kl *ar);
  660. void ath6kl_rx(struct htc_target *target, struct htc_packet *packet);
  661. void ath6kl_tx_complete(struct htc_target *context,
  662. struct list_head *packet_queue);
  663. enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
  664. struct htc_packet *packet);
  665. void ath6kl_stop_txrx(struct ath6kl *ar);
  666. void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar);
  667. int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value);
  668. int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length);
  669. int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value);
  670. int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length);
  671. int ath6kl_read_fwlogs(struct ath6kl *ar);
  672. void ath6kl_init_profile_info(struct ath6kl_vif *vif);
  673. void ath6kl_tx_data_cleanup(struct ath6kl *ar);
  674. struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar);
  675. void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie);
  676. int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev);
  677. struct aggr_info *aggr_init(struct ath6kl_vif *vif);
  678. void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info,
  679. struct aggr_info_conn *aggr_conn);
  680. void ath6kl_rx_refill(struct htc_target *target,
  681. enum htc_endpoint_id endpoint);
  682. void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count);
  683. struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target,
  684. enum htc_endpoint_id endpoint,
  685. int len);
  686. void aggr_module_destroy(struct aggr_info *aggr_info);
  687. void aggr_reset_state(struct aggr_info_conn *aggr_conn);
  688. struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 *node_addr);
  689. struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid);
  690. void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver,
  691. enum wmi_phy_cap cap);
  692. int ath6kl_control_tx(void *devt, struct sk_buff *skb,
  693. enum htc_endpoint_id eid);
  694. void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel,
  695. u8 *bssid, u16 listen_int,
  696. u16 beacon_int, enum network_type net_type,
  697. u8 beacon_ie_len, u8 assoc_req_len,
  698. u8 assoc_resp_len, u8 *assoc_info);
  699. void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel);
  700. void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr,
  701. u8 keymgmt, u8 ucipher, u8 auth,
  702. u8 assoc_req_len, u8 *assoc_info, u8 apsd_info);
  703. void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason,
  704. u8 *bssid, u8 assoc_resp_len,
  705. u8 *assoc_info, u16 prot_reason_status);
  706. void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast);
  707. void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr);
  708. void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status);
  709. void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len);
  710. void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active);
  711. enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac);
  712. void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid);
  713. void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif);
  714. void ath6kl_disconnect(struct ath6kl_vif *vif);
  715. void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid);
  716. void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no,
  717. u8 win_sz);
  718. void ath6kl_wakeup_event(void *dev);
  719. void ath6kl_reset_device(struct ath6kl *ar, u32 target_type,
  720. bool wait_fot_compltn, bool cold_reset);
  721. void ath6kl_init_control_info(struct ath6kl_vif *vif);
  722. struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar);
  723. void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready);
  724. int ath6kl_init_hw_start(struct ath6kl *ar);
  725. int ath6kl_init_hw_stop(struct ath6kl *ar);
  726. int ath6kl_init_fetch_firmwares(struct ath6kl *ar);
  727. int ath6kl_init_hw_params(struct ath6kl *ar);
  728. void ath6kl_check_wow_status(struct ath6kl *ar);
  729. void ath6kl_core_tx_complete(struct ath6kl *ar, struct sk_buff *skb);
  730. void ath6kl_core_rx_complete(struct ath6kl *ar, struct sk_buff *skb, u8 pipe);
  731. struct ath6kl *ath6kl_core_create(struct device *dev);
  732. int ath6kl_core_init(struct ath6kl *ar, enum ath6kl_htc_type htc_type);
  733. void ath6kl_core_cleanup(struct ath6kl *ar);
  734. void ath6kl_core_destroy(struct ath6kl *ar);
  735. #endif /* CORE_H */