qlcnic_init.c 46 KB

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  1. /*
  2. * QLogic qlcnic NIC Driver
  3. * Copyright (c) 2009-2010 QLogic Corporation
  4. *
  5. * See LICENSE.qlcnic for copyright and licensing details.
  6. */
  7. #include <linux/netdevice.h>
  8. #include <linux/delay.h>
  9. #include <linux/slab.h>
  10. #include <linux/if_vlan.h>
  11. #include "qlcnic.h"
  12. struct crb_addr_pair {
  13. u32 addr;
  14. u32 data;
  15. };
  16. #define QLCNIC_MAX_CRB_XFORM 60
  17. static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM];
  18. #define crb_addr_transform(name) \
  19. (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \
  20. QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20)
  21. #define QLCNIC_ADDR_ERROR (0xffffffff)
  22. static void
  23. qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter,
  24. struct qlcnic_host_rds_ring *rds_ring);
  25. static int
  26. qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter);
  27. static void crb_addr_transform_setup(void)
  28. {
  29. crb_addr_transform(XDMA);
  30. crb_addr_transform(TIMR);
  31. crb_addr_transform(SRE);
  32. crb_addr_transform(SQN3);
  33. crb_addr_transform(SQN2);
  34. crb_addr_transform(SQN1);
  35. crb_addr_transform(SQN0);
  36. crb_addr_transform(SQS3);
  37. crb_addr_transform(SQS2);
  38. crb_addr_transform(SQS1);
  39. crb_addr_transform(SQS0);
  40. crb_addr_transform(RPMX7);
  41. crb_addr_transform(RPMX6);
  42. crb_addr_transform(RPMX5);
  43. crb_addr_transform(RPMX4);
  44. crb_addr_transform(RPMX3);
  45. crb_addr_transform(RPMX2);
  46. crb_addr_transform(RPMX1);
  47. crb_addr_transform(RPMX0);
  48. crb_addr_transform(ROMUSB);
  49. crb_addr_transform(SN);
  50. crb_addr_transform(QMN);
  51. crb_addr_transform(QMS);
  52. crb_addr_transform(PGNI);
  53. crb_addr_transform(PGND);
  54. crb_addr_transform(PGN3);
  55. crb_addr_transform(PGN2);
  56. crb_addr_transform(PGN1);
  57. crb_addr_transform(PGN0);
  58. crb_addr_transform(PGSI);
  59. crb_addr_transform(PGSD);
  60. crb_addr_transform(PGS3);
  61. crb_addr_transform(PGS2);
  62. crb_addr_transform(PGS1);
  63. crb_addr_transform(PGS0);
  64. crb_addr_transform(PS);
  65. crb_addr_transform(PH);
  66. crb_addr_transform(NIU);
  67. crb_addr_transform(I2Q);
  68. crb_addr_transform(EG);
  69. crb_addr_transform(MN);
  70. crb_addr_transform(MS);
  71. crb_addr_transform(CAS2);
  72. crb_addr_transform(CAS1);
  73. crb_addr_transform(CAS0);
  74. crb_addr_transform(CAM);
  75. crb_addr_transform(C2C1);
  76. crb_addr_transform(C2C0);
  77. crb_addr_transform(SMB);
  78. crb_addr_transform(OCM0);
  79. crb_addr_transform(I2C0);
  80. }
  81. void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter)
  82. {
  83. struct qlcnic_recv_context *recv_ctx;
  84. struct qlcnic_host_rds_ring *rds_ring;
  85. struct qlcnic_rx_buffer *rx_buf;
  86. int i, ring;
  87. recv_ctx = adapter->recv_ctx;
  88. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  89. rds_ring = &recv_ctx->rds_rings[ring];
  90. for (i = 0; i < rds_ring->num_desc; ++i) {
  91. rx_buf = &(rds_ring->rx_buf_arr[i]);
  92. if (rx_buf->skb == NULL)
  93. continue;
  94. pci_unmap_single(adapter->pdev,
  95. rx_buf->dma,
  96. rds_ring->dma_size,
  97. PCI_DMA_FROMDEVICE);
  98. dev_kfree_skb_any(rx_buf->skb);
  99. }
  100. }
  101. }
  102. void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter)
  103. {
  104. struct qlcnic_recv_context *recv_ctx;
  105. struct qlcnic_host_rds_ring *rds_ring;
  106. struct qlcnic_rx_buffer *rx_buf;
  107. int i, ring;
  108. recv_ctx = adapter->recv_ctx;
  109. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  110. rds_ring = &recv_ctx->rds_rings[ring];
  111. INIT_LIST_HEAD(&rds_ring->free_list);
  112. rx_buf = rds_ring->rx_buf_arr;
  113. for (i = 0; i < rds_ring->num_desc; i++) {
  114. list_add_tail(&rx_buf->list,
  115. &rds_ring->free_list);
  116. rx_buf++;
  117. }
  118. }
  119. }
  120. void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter)
  121. {
  122. struct qlcnic_cmd_buffer *cmd_buf;
  123. struct qlcnic_skb_frag *buffrag;
  124. int i, j;
  125. struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
  126. cmd_buf = tx_ring->cmd_buf_arr;
  127. for (i = 0; i < tx_ring->num_desc; i++) {
  128. buffrag = cmd_buf->frag_array;
  129. if (buffrag->dma) {
  130. pci_unmap_single(adapter->pdev, buffrag->dma,
  131. buffrag->length, PCI_DMA_TODEVICE);
  132. buffrag->dma = 0ULL;
  133. }
  134. for (j = 0; j < cmd_buf->frag_count; j++) {
  135. buffrag++;
  136. if (buffrag->dma) {
  137. pci_unmap_page(adapter->pdev, buffrag->dma,
  138. buffrag->length,
  139. PCI_DMA_TODEVICE);
  140. buffrag->dma = 0ULL;
  141. }
  142. }
  143. if (cmd_buf->skb) {
  144. dev_kfree_skb_any(cmd_buf->skb);
  145. cmd_buf->skb = NULL;
  146. }
  147. cmd_buf++;
  148. }
  149. }
  150. void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter)
  151. {
  152. struct qlcnic_recv_context *recv_ctx;
  153. struct qlcnic_host_rds_ring *rds_ring;
  154. struct qlcnic_host_tx_ring *tx_ring;
  155. int ring;
  156. recv_ctx = adapter->recv_ctx;
  157. if (recv_ctx->rds_rings == NULL)
  158. goto skip_rds;
  159. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  160. rds_ring = &recv_ctx->rds_rings[ring];
  161. vfree(rds_ring->rx_buf_arr);
  162. rds_ring->rx_buf_arr = NULL;
  163. }
  164. kfree(recv_ctx->rds_rings);
  165. skip_rds:
  166. if (adapter->tx_ring == NULL)
  167. return;
  168. tx_ring = adapter->tx_ring;
  169. vfree(tx_ring->cmd_buf_arr);
  170. tx_ring->cmd_buf_arr = NULL;
  171. kfree(adapter->tx_ring);
  172. adapter->tx_ring = NULL;
  173. }
  174. int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
  175. {
  176. struct qlcnic_recv_context *recv_ctx;
  177. struct qlcnic_host_rds_ring *rds_ring;
  178. struct qlcnic_host_sds_ring *sds_ring;
  179. struct qlcnic_host_tx_ring *tx_ring;
  180. struct qlcnic_rx_buffer *rx_buf;
  181. int ring, i, size;
  182. struct qlcnic_cmd_buffer *cmd_buf_arr;
  183. struct net_device *netdev = adapter->netdev;
  184. size = sizeof(struct qlcnic_host_tx_ring);
  185. tx_ring = kzalloc(size, GFP_KERNEL);
  186. if (tx_ring == NULL) {
  187. dev_err(&netdev->dev, "failed to allocate tx ring struct\n");
  188. return -ENOMEM;
  189. }
  190. adapter->tx_ring = tx_ring;
  191. tx_ring->num_desc = adapter->num_txd;
  192. tx_ring->txq = netdev_get_tx_queue(netdev, 0);
  193. cmd_buf_arr = vzalloc(TX_BUFF_RINGSIZE(tx_ring));
  194. if (cmd_buf_arr == NULL) {
  195. dev_err(&netdev->dev, "failed to allocate cmd buffer ring\n");
  196. goto err_out;
  197. }
  198. tx_ring->cmd_buf_arr = cmd_buf_arr;
  199. recv_ctx = adapter->recv_ctx;
  200. size = adapter->max_rds_rings * sizeof(struct qlcnic_host_rds_ring);
  201. rds_ring = kzalloc(size, GFP_KERNEL);
  202. if (rds_ring == NULL) {
  203. dev_err(&netdev->dev, "failed to allocate rds ring struct\n");
  204. goto err_out;
  205. }
  206. recv_ctx->rds_rings = rds_ring;
  207. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  208. rds_ring = &recv_ctx->rds_rings[ring];
  209. switch (ring) {
  210. case RCV_RING_NORMAL:
  211. rds_ring->num_desc = adapter->num_rxd;
  212. rds_ring->dma_size = QLCNIC_P3P_RX_BUF_MAX_LEN;
  213. rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
  214. break;
  215. case RCV_RING_JUMBO:
  216. rds_ring->num_desc = adapter->num_jumbo_rxd;
  217. rds_ring->dma_size =
  218. QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN;
  219. if (adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO)
  220. rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
  221. rds_ring->skb_size =
  222. rds_ring->dma_size + NET_IP_ALIGN;
  223. break;
  224. }
  225. rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring));
  226. if (rds_ring->rx_buf_arr == NULL) {
  227. dev_err(&netdev->dev, "Failed to allocate "
  228. "rx buffer ring %d\n", ring);
  229. goto err_out;
  230. }
  231. INIT_LIST_HEAD(&rds_ring->free_list);
  232. /*
  233. * Now go through all of them, set reference handles
  234. * and put them in the queues.
  235. */
  236. rx_buf = rds_ring->rx_buf_arr;
  237. for (i = 0; i < rds_ring->num_desc; i++) {
  238. list_add_tail(&rx_buf->list,
  239. &rds_ring->free_list);
  240. rx_buf->ref_handle = i;
  241. rx_buf++;
  242. }
  243. spin_lock_init(&rds_ring->lock);
  244. }
  245. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  246. sds_ring = &recv_ctx->sds_rings[ring];
  247. sds_ring->irq = adapter->msix_entries[ring].vector;
  248. sds_ring->adapter = adapter;
  249. sds_ring->num_desc = adapter->num_rxd;
  250. for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
  251. INIT_LIST_HEAD(&sds_ring->free_list[i]);
  252. }
  253. return 0;
  254. err_out:
  255. qlcnic_free_sw_resources(adapter);
  256. return -ENOMEM;
  257. }
  258. /*
  259. * Utility to translate from internal Phantom CRB address
  260. * to external PCI CRB address.
  261. */
  262. static u32 qlcnic_decode_crb_addr(u32 addr)
  263. {
  264. int i;
  265. u32 base_addr, offset, pci_base;
  266. crb_addr_transform_setup();
  267. pci_base = QLCNIC_ADDR_ERROR;
  268. base_addr = addr & 0xfff00000;
  269. offset = addr & 0x000fffff;
  270. for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) {
  271. if (crb_addr_xform[i] == base_addr) {
  272. pci_base = i << 20;
  273. break;
  274. }
  275. }
  276. if (pci_base == QLCNIC_ADDR_ERROR)
  277. return pci_base;
  278. else
  279. return pci_base + offset;
  280. }
  281. #define QLCNIC_MAX_ROM_WAIT_USEC 100
  282. static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
  283. {
  284. long timeout = 0;
  285. long done = 0;
  286. cond_resched();
  287. while (done == 0) {
  288. done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS);
  289. done &= 2;
  290. if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) {
  291. dev_err(&adapter->pdev->dev,
  292. "Timeout reached waiting for rom done");
  293. return -EIO;
  294. }
  295. udelay(1);
  296. }
  297. return 0;
  298. }
  299. static int do_rom_fast_read(struct qlcnic_adapter *adapter,
  300. u32 addr, u32 *valp)
  301. {
  302. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr);
  303. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  304. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3);
  305. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb);
  306. if (qlcnic_wait_rom_done(adapter)) {
  307. dev_err(&adapter->pdev->dev, "Error waiting for rom done\n");
  308. return -EIO;
  309. }
  310. /* reset abyte_cnt and dummy_byte_cnt */
  311. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0);
  312. udelay(10);
  313. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  314. *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA);
  315. return 0;
  316. }
  317. static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
  318. u8 *bytes, size_t size)
  319. {
  320. int addridx;
  321. int ret = 0;
  322. for (addridx = addr; addridx < (addr + size); addridx += 4) {
  323. int v;
  324. ret = do_rom_fast_read(adapter, addridx, &v);
  325. if (ret != 0)
  326. break;
  327. *(__le32 *)bytes = cpu_to_le32(v);
  328. bytes += 4;
  329. }
  330. return ret;
  331. }
  332. int
  333. qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
  334. u8 *bytes, size_t size)
  335. {
  336. int ret;
  337. ret = qlcnic_rom_lock(adapter);
  338. if (ret < 0)
  339. return ret;
  340. ret = do_rom_fast_read_words(adapter, addr, bytes, size);
  341. qlcnic_rom_unlock(adapter);
  342. return ret;
  343. }
  344. int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp)
  345. {
  346. int ret;
  347. if (qlcnic_rom_lock(adapter) != 0)
  348. return -EIO;
  349. ret = do_rom_fast_read(adapter, addr, valp);
  350. qlcnic_rom_unlock(adapter);
  351. return ret;
  352. }
  353. int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
  354. {
  355. int addr, val;
  356. int i, n, init_delay;
  357. struct crb_addr_pair *buf;
  358. unsigned offset;
  359. u32 off;
  360. struct pci_dev *pdev = adapter->pdev;
  361. QLCWR32(adapter, CRB_CMDPEG_STATE, 0);
  362. QLCWR32(adapter, CRB_RCVPEG_STATE, 0);
  363. /* Halt all the indiviual PEGs and other blocks */
  364. /* disable all I2Q */
  365. QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x10, 0x0);
  366. QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x14, 0x0);
  367. QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x18, 0x0);
  368. QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x1c, 0x0);
  369. QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x20, 0x0);
  370. QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x24, 0x0);
  371. /* disable all niu interrupts */
  372. QLCWR32(adapter, QLCNIC_CRB_NIU + 0x40, 0xff);
  373. /* disable xge rx/tx */
  374. QLCWR32(adapter, QLCNIC_CRB_NIU + 0x70000, 0x00);
  375. /* disable xg1 rx/tx */
  376. QLCWR32(adapter, QLCNIC_CRB_NIU + 0x80000, 0x00);
  377. /* disable sideband mac */
  378. QLCWR32(adapter, QLCNIC_CRB_NIU + 0x90000, 0x00);
  379. /* disable ap0 mac */
  380. QLCWR32(adapter, QLCNIC_CRB_NIU + 0xa0000, 0x00);
  381. /* disable ap1 mac */
  382. QLCWR32(adapter, QLCNIC_CRB_NIU + 0xb0000, 0x00);
  383. /* halt sre */
  384. val = QLCRD32(adapter, QLCNIC_CRB_SRE + 0x1000);
  385. QLCWR32(adapter, QLCNIC_CRB_SRE + 0x1000, val & (~(0x1)));
  386. /* halt epg */
  387. QLCWR32(adapter, QLCNIC_CRB_EPG + 0x1300, 0x1);
  388. /* halt timers */
  389. QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x0, 0x0);
  390. QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x8, 0x0);
  391. QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x10, 0x0);
  392. QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x18, 0x0);
  393. QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x100, 0x0);
  394. QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x200, 0x0);
  395. /* halt pegs */
  396. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x3c, 1);
  397. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x3c, 1);
  398. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x3c, 1);
  399. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x3c, 1);
  400. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x3c, 1);
  401. msleep(20);
  402. qlcnic_rom_unlock(adapter);
  403. /* big hammer don't reset CAM block on reset */
  404. QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff);
  405. /* Init HW CRB block */
  406. if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) ||
  407. qlcnic_rom_fast_read(adapter, 4, &n) != 0) {
  408. dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n);
  409. return -EIO;
  410. }
  411. offset = n & 0xffffU;
  412. n = (n >> 16) & 0xffffU;
  413. if (n >= 1024) {
  414. dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n");
  415. return -EIO;
  416. }
  417. buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
  418. if (buf == NULL) {
  419. dev_err(&pdev->dev, "Unable to calloc memory for rom read.\n");
  420. return -ENOMEM;
  421. }
  422. for (i = 0; i < n; i++) {
  423. if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
  424. qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
  425. kfree(buf);
  426. return -EIO;
  427. }
  428. buf[i].addr = addr;
  429. buf[i].data = val;
  430. }
  431. for (i = 0; i < n; i++) {
  432. off = qlcnic_decode_crb_addr(buf[i].addr);
  433. if (off == QLCNIC_ADDR_ERROR) {
  434. dev_err(&pdev->dev, "CRB init value out of range %x\n",
  435. buf[i].addr);
  436. continue;
  437. }
  438. off += QLCNIC_PCI_CRBSPACE;
  439. if (off & 1)
  440. continue;
  441. /* skipping cold reboot MAGIC */
  442. if (off == QLCNIC_CAM_RAM(0x1fc))
  443. continue;
  444. if (off == (QLCNIC_CRB_I2C0 + 0x1c))
  445. continue;
  446. if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */
  447. continue;
  448. if (off == (ROMUSB_GLB + 0xa8))
  449. continue;
  450. if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
  451. continue;
  452. if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
  453. continue;
  454. if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
  455. continue;
  456. if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET)
  457. continue;
  458. /* skip the function enable register */
  459. if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION))
  460. continue;
  461. if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2))
  462. continue;
  463. if ((off & 0x0ff00000) == QLCNIC_CRB_SMB)
  464. continue;
  465. init_delay = 1;
  466. /* After writing this register, HW needs time for CRB */
  467. /* to quiet down (else crb_window returns 0xffffffff) */
  468. if (off == QLCNIC_ROMUSB_GLB_SW_RESET)
  469. init_delay = 1000;
  470. QLCWR32(adapter, off, buf[i].data);
  471. msleep(init_delay);
  472. }
  473. kfree(buf);
  474. /* Initialize protocol process engine */
  475. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e);
  476. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8);
  477. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8);
  478. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0);
  479. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0);
  480. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0);
  481. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0);
  482. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0);
  483. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0);
  484. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0);
  485. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0);
  486. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x8, 0);
  487. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0);
  488. msleep(1);
  489. QLCWR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0);
  490. QLCWR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0);
  491. return 0;
  492. }
  493. static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter)
  494. {
  495. u32 val;
  496. int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT;
  497. do {
  498. val = QLCRD32(adapter, CRB_CMDPEG_STATE);
  499. switch (val) {
  500. case PHAN_INITIALIZE_COMPLETE:
  501. case PHAN_INITIALIZE_ACK:
  502. return 0;
  503. case PHAN_INITIALIZE_FAILED:
  504. goto out_err;
  505. default:
  506. break;
  507. }
  508. msleep(QLCNIC_CMDPEG_CHECK_DELAY);
  509. } while (--retries);
  510. QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
  511. out_err:
  512. dev_err(&adapter->pdev->dev, "Command Peg initialization not "
  513. "complete, state: 0x%x.\n", val);
  514. return -EIO;
  515. }
  516. static int
  517. qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter)
  518. {
  519. u32 val;
  520. int retries = QLCNIC_RCVPEG_CHECK_RETRY_COUNT;
  521. do {
  522. val = QLCRD32(adapter, CRB_RCVPEG_STATE);
  523. if (val == PHAN_PEG_RCV_INITIALIZED)
  524. return 0;
  525. msleep(QLCNIC_RCVPEG_CHECK_DELAY);
  526. } while (--retries);
  527. if (!retries) {
  528. dev_err(&adapter->pdev->dev, "Receive Peg initialization not "
  529. "complete, state: 0x%x.\n", val);
  530. return -EIO;
  531. }
  532. return 0;
  533. }
  534. int
  535. qlcnic_check_fw_status(struct qlcnic_adapter *adapter)
  536. {
  537. int err;
  538. err = qlcnic_cmd_peg_ready(adapter);
  539. if (err)
  540. return err;
  541. err = qlcnic_receive_peg_ready(adapter);
  542. if (err)
  543. return err;
  544. QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
  545. return err;
  546. }
  547. int
  548. qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) {
  549. int timeo;
  550. u32 val;
  551. val = QLCRD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO);
  552. val = QLC_DEV_GET_DRV(val, adapter->portnum);
  553. if ((val & 0x3) != QLCNIC_TYPE_NIC) {
  554. dev_err(&adapter->pdev->dev,
  555. "Not an Ethernet NIC func=%u\n", val);
  556. return -EIO;
  557. }
  558. adapter->physical_port = (val >> 2);
  559. if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo))
  560. timeo = QLCNIC_INIT_TIMEOUT_SECS;
  561. adapter->dev_init_timeo = timeo;
  562. if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo))
  563. timeo = QLCNIC_RESET_TIMEOUT_SECS;
  564. adapter->reset_ack_timeo = timeo;
  565. return 0;
  566. }
  567. static int qlcnic_get_flt_entry(struct qlcnic_adapter *adapter, u8 region,
  568. struct qlcnic_flt_entry *region_entry)
  569. {
  570. struct qlcnic_flt_header flt_hdr;
  571. struct qlcnic_flt_entry *flt_entry;
  572. int i = 0, ret;
  573. u32 entry_size;
  574. memset(region_entry, 0, sizeof(struct qlcnic_flt_entry));
  575. ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION,
  576. (u8 *)&flt_hdr,
  577. sizeof(struct qlcnic_flt_header));
  578. if (ret) {
  579. dev_warn(&adapter->pdev->dev,
  580. "error reading flash layout header\n");
  581. return -EIO;
  582. }
  583. entry_size = flt_hdr.len - sizeof(struct qlcnic_flt_header);
  584. flt_entry = (struct qlcnic_flt_entry *)vzalloc(entry_size);
  585. if (flt_entry == NULL) {
  586. dev_warn(&adapter->pdev->dev, "error allocating memory\n");
  587. return -EIO;
  588. }
  589. ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION +
  590. sizeof(struct qlcnic_flt_header),
  591. (u8 *)flt_entry, entry_size);
  592. if (ret) {
  593. dev_warn(&adapter->pdev->dev,
  594. "error reading flash layout entries\n");
  595. goto err_out;
  596. }
  597. while (i < (entry_size/sizeof(struct qlcnic_flt_entry))) {
  598. if (flt_entry[i].region == region)
  599. break;
  600. i++;
  601. }
  602. if (i >= (entry_size/sizeof(struct qlcnic_flt_entry))) {
  603. dev_warn(&adapter->pdev->dev,
  604. "region=%x not found in %d regions\n", region, i);
  605. ret = -EIO;
  606. goto err_out;
  607. }
  608. memcpy(region_entry, &flt_entry[i], sizeof(struct qlcnic_flt_entry));
  609. err_out:
  610. vfree(flt_entry);
  611. return ret;
  612. }
  613. int
  614. qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter)
  615. {
  616. struct qlcnic_flt_entry fw_entry;
  617. u32 ver = -1, min_ver;
  618. int ret;
  619. if (adapter->ahw->revision_id == QLCNIC_P3P_C0)
  620. ret = qlcnic_get_flt_entry(adapter, QLCNIC_C0_FW_IMAGE_REGION,
  621. &fw_entry);
  622. else
  623. ret = qlcnic_get_flt_entry(adapter, QLCNIC_B0_FW_IMAGE_REGION,
  624. &fw_entry);
  625. if (!ret)
  626. /* 0-4:-signature, 4-8:-fw version */
  627. qlcnic_rom_fast_read(adapter, fw_entry.start_addr + 4,
  628. (int *)&ver);
  629. else
  630. qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET,
  631. (int *)&ver);
  632. ver = QLCNIC_DECODE_VERSION(ver);
  633. min_ver = QLCNIC_MIN_FW_VERSION;
  634. if (ver < min_ver) {
  635. dev_err(&adapter->pdev->dev,
  636. "firmware version %d.%d.%d unsupported."
  637. "Min supported version %d.%d.%d\n",
  638. _major(ver), _minor(ver), _build(ver),
  639. _major(min_ver), _minor(min_ver), _build(min_ver));
  640. return -EINVAL;
  641. }
  642. return 0;
  643. }
  644. static int
  645. qlcnic_has_mn(struct qlcnic_adapter *adapter)
  646. {
  647. u32 capability;
  648. capability = 0;
  649. capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY);
  650. if (capability & QLCNIC_PEG_TUNE_MN_PRESENT)
  651. return 1;
  652. return 0;
  653. }
  654. static
  655. struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
  656. {
  657. u32 i;
  658. struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
  659. __le32 entries = cpu_to_le32(directory->num_entries);
  660. for (i = 0; i < entries; i++) {
  661. __le32 offs = cpu_to_le32(directory->findex) +
  662. (i * cpu_to_le32(directory->entry_size));
  663. __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8));
  664. if (tab_type == section)
  665. return (struct uni_table_desc *) &unirom[offs];
  666. }
  667. return NULL;
  668. }
  669. #define FILEHEADER_SIZE (14 * 4)
  670. static int
  671. qlcnic_validate_header(struct qlcnic_adapter *adapter)
  672. {
  673. const u8 *unirom = adapter->fw->data;
  674. struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
  675. __le32 fw_file_size = adapter->fw->size;
  676. __le32 entries;
  677. __le32 entry_size;
  678. __le32 tab_size;
  679. if (fw_file_size < FILEHEADER_SIZE)
  680. return -EINVAL;
  681. entries = cpu_to_le32(directory->num_entries);
  682. entry_size = cpu_to_le32(directory->entry_size);
  683. tab_size = cpu_to_le32(directory->findex) + (entries * entry_size);
  684. if (fw_file_size < tab_size)
  685. return -EINVAL;
  686. return 0;
  687. }
  688. static int
  689. qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
  690. {
  691. struct uni_table_desc *tab_desc;
  692. struct uni_data_desc *descr;
  693. const u8 *unirom = adapter->fw->data;
  694. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  695. QLCNIC_UNI_BOOTLD_IDX_OFF));
  696. __le32 offs;
  697. __le32 tab_size;
  698. __le32 data_size;
  699. tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
  700. if (!tab_desc)
  701. return -EINVAL;
  702. tab_size = cpu_to_le32(tab_desc->findex) +
  703. (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
  704. if (adapter->fw->size < tab_size)
  705. return -EINVAL;
  706. offs = cpu_to_le32(tab_desc->findex) +
  707. (cpu_to_le32(tab_desc->entry_size) * (idx));
  708. descr = (struct uni_data_desc *)&unirom[offs];
  709. data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
  710. if (adapter->fw->size < data_size)
  711. return -EINVAL;
  712. return 0;
  713. }
  714. static int
  715. qlcnic_validate_fw(struct qlcnic_adapter *adapter)
  716. {
  717. struct uni_table_desc *tab_desc;
  718. struct uni_data_desc *descr;
  719. const u8 *unirom = adapter->fw->data;
  720. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  721. QLCNIC_UNI_FIRMWARE_IDX_OFF));
  722. __le32 offs;
  723. __le32 tab_size;
  724. __le32 data_size;
  725. tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
  726. if (!tab_desc)
  727. return -EINVAL;
  728. tab_size = cpu_to_le32(tab_desc->findex) +
  729. (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
  730. if (adapter->fw->size < tab_size)
  731. return -EINVAL;
  732. offs = cpu_to_le32(tab_desc->findex) +
  733. (cpu_to_le32(tab_desc->entry_size) * (idx));
  734. descr = (struct uni_data_desc *)&unirom[offs];
  735. data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
  736. if (adapter->fw->size < data_size)
  737. return -EINVAL;
  738. return 0;
  739. }
  740. static int
  741. qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
  742. {
  743. struct uni_table_desc *ptab_descr;
  744. const u8 *unirom = adapter->fw->data;
  745. int mn_present = qlcnic_has_mn(adapter);
  746. __le32 entries;
  747. __le32 entry_size;
  748. __le32 tab_size;
  749. u32 i;
  750. ptab_descr = qlcnic_get_table_desc(unirom,
  751. QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
  752. if (!ptab_descr)
  753. return -EINVAL;
  754. entries = cpu_to_le32(ptab_descr->num_entries);
  755. entry_size = cpu_to_le32(ptab_descr->entry_size);
  756. tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size);
  757. if (adapter->fw->size < tab_size)
  758. return -EINVAL;
  759. nomn:
  760. for (i = 0; i < entries; i++) {
  761. __le32 flags, file_chiprev, offs;
  762. u8 chiprev = adapter->ahw->revision_id;
  763. u32 flagbit;
  764. offs = cpu_to_le32(ptab_descr->findex) +
  765. (i * cpu_to_le32(ptab_descr->entry_size));
  766. flags = cpu_to_le32(*((int *)&unirom[offs] +
  767. QLCNIC_UNI_FLAGS_OFF));
  768. file_chiprev = cpu_to_le32(*((int *)&unirom[offs] +
  769. QLCNIC_UNI_CHIP_REV_OFF));
  770. flagbit = mn_present ? 1 : 2;
  771. if ((chiprev == file_chiprev) &&
  772. ((1ULL << flagbit) & flags)) {
  773. adapter->file_prd_off = offs;
  774. return 0;
  775. }
  776. }
  777. if (mn_present) {
  778. mn_present = 0;
  779. goto nomn;
  780. }
  781. return -EINVAL;
  782. }
  783. static int
  784. qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
  785. {
  786. if (qlcnic_validate_header(adapter)) {
  787. dev_err(&adapter->pdev->dev,
  788. "unified image: header validation failed\n");
  789. return -EINVAL;
  790. }
  791. if (qlcnic_validate_product_offs(adapter)) {
  792. dev_err(&adapter->pdev->dev,
  793. "unified image: product validation failed\n");
  794. return -EINVAL;
  795. }
  796. if (qlcnic_validate_bootld(adapter)) {
  797. dev_err(&adapter->pdev->dev,
  798. "unified image: bootld validation failed\n");
  799. return -EINVAL;
  800. }
  801. if (qlcnic_validate_fw(adapter)) {
  802. dev_err(&adapter->pdev->dev,
  803. "unified image: firmware validation failed\n");
  804. return -EINVAL;
  805. }
  806. return 0;
  807. }
  808. static
  809. struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter,
  810. u32 section, u32 idx_offset)
  811. {
  812. const u8 *unirom = adapter->fw->data;
  813. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  814. idx_offset));
  815. struct uni_table_desc *tab_desc;
  816. __le32 offs;
  817. tab_desc = qlcnic_get_table_desc(unirom, section);
  818. if (tab_desc == NULL)
  819. return NULL;
  820. offs = cpu_to_le32(tab_desc->findex) +
  821. (cpu_to_le32(tab_desc->entry_size) * idx);
  822. return (struct uni_data_desc *)&unirom[offs];
  823. }
  824. static u8 *
  825. qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter)
  826. {
  827. u32 offs = QLCNIC_BOOTLD_START;
  828. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  829. offs = cpu_to_le32((qlcnic_get_data_desc(adapter,
  830. QLCNIC_UNI_DIR_SECT_BOOTLD,
  831. QLCNIC_UNI_BOOTLD_IDX_OFF))->findex);
  832. return (u8 *)&adapter->fw->data[offs];
  833. }
  834. static u8 *
  835. qlcnic_get_fw_offs(struct qlcnic_adapter *adapter)
  836. {
  837. u32 offs = QLCNIC_IMAGE_START;
  838. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  839. offs = cpu_to_le32((qlcnic_get_data_desc(adapter,
  840. QLCNIC_UNI_DIR_SECT_FW,
  841. QLCNIC_UNI_FIRMWARE_IDX_OFF))->findex);
  842. return (u8 *)&adapter->fw->data[offs];
  843. }
  844. static __le32
  845. qlcnic_get_fw_size(struct qlcnic_adapter *adapter)
  846. {
  847. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  848. return cpu_to_le32((qlcnic_get_data_desc(adapter,
  849. QLCNIC_UNI_DIR_SECT_FW,
  850. QLCNIC_UNI_FIRMWARE_IDX_OFF))->size);
  851. else
  852. return cpu_to_le32(
  853. *(u32 *)&adapter->fw->data[QLCNIC_FW_SIZE_OFFSET]);
  854. }
  855. static __le32
  856. qlcnic_get_fw_version(struct qlcnic_adapter *adapter)
  857. {
  858. struct uni_data_desc *fw_data_desc;
  859. const struct firmware *fw = adapter->fw;
  860. __le32 major, minor, sub;
  861. const u8 *ver_str;
  862. int i, ret;
  863. if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE)
  864. return cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET]);
  865. fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
  866. QLCNIC_UNI_FIRMWARE_IDX_OFF);
  867. ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) +
  868. cpu_to_le32(fw_data_desc->size) - 17;
  869. for (i = 0; i < 12; i++) {
  870. if (!strncmp(&ver_str[i], "REV=", 4)) {
  871. ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
  872. &major, &minor, &sub);
  873. if (ret != 3)
  874. return 0;
  875. else
  876. return major + (minor << 8) + (sub << 16);
  877. }
  878. }
  879. return 0;
  880. }
  881. static __le32
  882. qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
  883. {
  884. const struct firmware *fw = adapter->fw;
  885. __le32 bios_ver, prd_off = adapter->file_prd_off;
  886. if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE)
  887. return cpu_to_le32(
  888. *(u32 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET]);
  889. bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off])
  890. + QLCNIC_UNI_BIOS_VERSION_OFF));
  891. return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
  892. }
  893. static void qlcnic_rom_lock_recovery(struct qlcnic_adapter *adapter)
  894. {
  895. if (qlcnic_pcie_sem_lock(adapter, 2, QLCNIC_ROM_LOCK_ID))
  896. dev_info(&adapter->pdev->dev, "Resetting rom_lock\n");
  897. qlcnic_pcie_sem_unlock(adapter, 2);
  898. }
  899. static int
  900. qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter)
  901. {
  902. u32 heartbeat, ret = -EIO;
  903. int retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT;
  904. adapter->heartbeat = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
  905. do {
  906. msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS);
  907. heartbeat = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
  908. if (heartbeat != adapter->heartbeat) {
  909. ret = QLCNIC_RCODE_SUCCESS;
  910. break;
  911. }
  912. } while (--retries);
  913. return ret;
  914. }
  915. int
  916. qlcnic_need_fw_reset(struct qlcnic_adapter *adapter)
  917. {
  918. if ((adapter->flags & QLCNIC_FW_HANG) ||
  919. qlcnic_check_fw_hearbeat(adapter)) {
  920. qlcnic_rom_lock_recovery(adapter);
  921. return 1;
  922. }
  923. if (adapter->need_fw_reset)
  924. return 1;
  925. if (adapter->fw)
  926. return 1;
  927. return 0;
  928. }
  929. static const char *fw_name[] = {
  930. QLCNIC_UNIFIED_ROMIMAGE_NAME,
  931. QLCNIC_FLASH_ROMIMAGE_NAME,
  932. };
  933. int
  934. qlcnic_load_firmware(struct qlcnic_adapter *adapter)
  935. {
  936. u64 *ptr64;
  937. u32 i, flashaddr, size;
  938. const struct firmware *fw = adapter->fw;
  939. struct pci_dev *pdev = adapter->pdev;
  940. dev_info(&pdev->dev, "loading firmware from %s\n",
  941. fw_name[adapter->fw_type]);
  942. if (fw) {
  943. __le64 data;
  944. size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
  945. ptr64 = (u64 *)qlcnic_get_bootld_offs(adapter);
  946. flashaddr = QLCNIC_BOOTLD_START;
  947. for (i = 0; i < size; i++) {
  948. data = cpu_to_le64(ptr64[i]);
  949. if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data))
  950. return -EIO;
  951. flashaddr += 8;
  952. }
  953. size = (__force u32)qlcnic_get_fw_size(adapter) / 8;
  954. ptr64 = (u64 *)qlcnic_get_fw_offs(adapter);
  955. flashaddr = QLCNIC_IMAGE_START;
  956. for (i = 0; i < size; i++) {
  957. data = cpu_to_le64(ptr64[i]);
  958. if (qlcnic_pci_mem_write_2M(adapter,
  959. flashaddr, data))
  960. return -EIO;
  961. flashaddr += 8;
  962. }
  963. size = (__force u32)qlcnic_get_fw_size(adapter) % 8;
  964. if (size) {
  965. data = cpu_to_le64(ptr64[i]);
  966. if (qlcnic_pci_mem_write_2M(adapter,
  967. flashaddr, data))
  968. return -EIO;
  969. }
  970. } else {
  971. u64 data;
  972. u32 hi, lo;
  973. int ret;
  974. struct qlcnic_flt_entry bootld_entry;
  975. ret = qlcnic_get_flt_entry(adapter, QLCNIC_BOOTLD_REGION,
  976. &bootld_entry);
  977. if (!ret) {
  978. size = bootld_entry.size / 8;
  979. flashaddr = bootld_entry.start_addr;
  980. } else {
  981. size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
  982. flashaddr = QLCNIC_BOOTLD_START;
  983. dev_info(&pdev->dev,
  984. "using legacy method to get flash fw region");
  985. }
  986. for (i = 0; i < size; i++) {
  987. if (qlcnic_rom_fast_read(adapter,
  988. flashaddr, (int *)&lo) != 0)
  989. return -EIO;
  990. if (qlcnic_rom_fast_read(adapter,
  991. flashaddr + 4, (int *)&hi) != 0)
  992. return -EIO;
  993. data = (((u64)hi << 32) | lo);
  994. if (qlcnic_pci_mem_write_2M(adapter,
  995. flashaddr, data))
  996. return -EIO;
  997. flashaddr += 8;
  998. }
  999. }
  1000. msleep(1);
  1001. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020);
  1002. QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e);
  1003. return 0;
  1004. }
  1005. static int
  1006. qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
  1007. {
  1008. __le32 val;
  1009. u32 ver, bios, min_size;
  1010. struct pci_dev *pdev = adapter->pdev;
  1011. const struct firmware *fw = adapter->fw;
  1012. u8 fw_type = adapter->fw_type;
  1013. if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
  1014. if (qlcnic_validate_unified_romimage(adapter))
  1015. return -EINVAL;
  1016. min_size = QLCNIC_UNI_FW_MIN_SIZE;
  1017. } else {
  1018. val = cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]);
  1019. if ((__force u32)val != QLCNIC_BDINFO_MAGIC)
  1020. return -EINVAL;
  1021. min_size = QLCNIC_FW_MIN_SIZE;
  1022. }
  1023. if (fw->size < min_size)
  1024. return -EINVAL;
  1025. val = qlcnic_get_fw_version(adapter);
  1026. ver = QLCNIC_DECODE_VERSION(val);
  1027. if (ver < QLCNIC_MIN_FW_VERSION) {
  1028. dev_err(&pdev->dev,
  1029. "%s: firmware version %d.%d.%d unsupported\n",
  1030. fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
  1031. return -EINVAL;
  1032. }
  1033. val = qlcnic_get_bios_version(adapter);
  1034. qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios);
  1035. if ((__force u32)val != bios) {
  1036. dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
  1037. fw_name[fw_type]);
  1038. return -EINVAL;
  1039. }
  1040. QLCWR32(adapter, QLCNIC_CAM_RAM(0x1fc), QLCNIC_BDINFO_MAGIC);
  1041. return 0;
  1042. }
  1043. static void
  1044. qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter)
  1045. {
  1046. u8 fw_type;
  1047. switch (adapter->fw_type) {
  1048. case QLCNIC_UNKNOWN_ROMIMAGE:
  1049. fw_type = QLCNIC_UNIFIED_ROMIMAGE;
  1050. break;
  1051. case QLCNIC_UNIFIED_ROMIMAGE:
  1052. default:
  1053. fw_type = QLCNIC_FLASH_ROMIMAGE;
  1054. break;
  1055. }
  1056. adapter->fw_type = fw_type;
  1057. }
  1058. void qlcnic_request_firmware(struct qlcnic_adapter *adapter)
  1059. {
  1060. struct pci_dev *pdev = adapter->pdev;
  1061. int rc;
  1062. adapter->fw_type = QLCNIC_UNKNOWN_ROMIMAGE;
  1063. next:
  1064. qlcnic_get_next_fwtype(adapter);
  1065. if (adapter->fw_type == QLCNIC_FLASH_ROMIMAGE) {
  1066. adapter->fw = NULL;
  1067. } else {
  1068. rc = request_firmware(&adapter->fw,
  1069. fw_name[adapter->fw_type], &pdev->dev);
  1070. if (rc != 0)
  1071. goto next;
  1072. rc = qlcnic_validate_firmware(adapter);
  1073. if (rc != 0) {
  1074. release_firmware(adapter->fw);
  1075. msleep(1);
  1076. goto next;
  1077. }
  1078. }
  1079. }
  1080. void
  1081. qlcnic_release_firmware(struct qlcnic_adapter *adapter)
  1082. {
  1083. release_firmware(adapter->fw);
  1084. adapter->fw = NULL;
  1085. }
  1086. static void
  1087. qlcnic_handle_linkevent(struct qlcnic_adapter *adapter,
  1088. struct qlcnic_fw_msg *msg)
  1089. {
  1090. u32 cable_OUI;
  1091. u16 cable_len;
  1092. u16 link_speed;
  1093. u8 link_status, module, duplex, autoneg;
  1094. u8 lb_status = 0;
  1095. struct net_device *netdev = adapter->netdev;
  1096. adapter->has_link_events = 1;
  1097. cable_OUI = msg->body[1] & 0xffffffff;
  1098. cable_len = (msg->body[1] >> 32) & 0xffff;
  1099. link_speed = (msg->body[1] >> 48) & 0xffff;
  1100. link_status = msg->body[2] & 0xff;
  1101. duplex = (msg->body[2] >> 16) & 0xff;
  1102. autoneg = (msg->body[2] >> 24) & 0xff;
  1103. lb_status = (msg->body[2] >> 32) & 0x3;
  1104. module = (msg->body[2] >> 8) & 0xff;
  1105. if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE)
  1106. dev_info(&netdev->dev, "unsupported cable: OUI 0x%x, "
  1107. "length %d\n", cable_OUI, cable_len);
  1108. else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN)
  1109. dev_info(&netdev->dev, "unsupported cable length %d\n",
  1110. cable_len);
  1111. if (!link_status && (lb_status == QLCNIC_ILB_MODE ||
  1112. lb_status == QLCNIC_ELB_MODE))
  1113. adapter->ahw->loopback_state |= QLCNIC_LINKEVENT;
  1114. qlcnic_advert_link_change(adapter, link_status);
  1115. if (duplex == LINKEVENT_FULL_DUPLEX)
  1116. adapter->link_duplex = DUPLEX_FULL;
  1117. else
  1118. adapter->link_duplex = DUPLEX_HALF;
  1119. adapter->module_type = module;
  1120. adapter->link_autoneg = autoneg;
  1121. if (link_status) {
  1122. adapter->link_speed = link_speed;
  1123. } else {
  1124. adapter->link_speed = SPEED_UNKNOWN;
  1125. adapter->link_duplex = DUPLEX_UNKNOWN;
  1126. }
  1127. }
  1128. static void
  1129. qlcnic_handle_fw_message(int desc_cnt, int index,
  1130. struct qlcnic_host_sds_ring *sds_ring)
  1131. {
  1132. struct qlcnic_fw_msg msg;
  1133. struct status_desc *desc;
  1134. struct qlcnic_adapter *adapter;
  1135. struct device *dev;
  1136. int i = 0, opcode, ret;
  1137. while (desc_cnt > 0 && i < 8) {
  1138. desc = &sds_ring->desc_head[index];
  1139. msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
  1140. msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
  1141. index = get_next_index(index, sds_ring->num_desc);
  1142. desc_cnt--;
  1143. }
  1144. adapter = sds_ring->adapter;
  1145. dev = &adapter->pdev->dev;
  1146. opcode = qlcnic_get_nic_msg_opcode(msg.body[0]);
  1147. switch (opcode) {
  1148. case QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
  1149. qlcnic_handle_linkevent(adapter, &msg);
  1150. break;
  1151. case QLCNIC_C2H_OPCODE_CONFIG_LOOPBACK:
  1152. ret = (u32)(msg.body[1]);
  1153. switch (ret) {
  1154. case 0:
  1155. adapter->ahw->loopback_state |= QLCNIC_LB_RESPONSE;
  1156. break;
  1157. case 1:
  1158. dev_info(dev, "loopback already in progress\n");
  1159. adapter->diag_cnt = -QLCNIC_TEST_IN_PROGRESS;
  1160. break;
  1161. case 2:
  1162. dev_info(dev, "loopback cable is not connected\n");
  1163. adapter->diag_cnt = -QLCNIC_LB_CABLE_NOT_CONN;
  1164. break;
  1165. default:
  1166. dev_info(dev, "loopback configure request failed,"
  1167. " ret %x\n", ret);
  1168. adapter->diag_cnt = -QLCNIC_UNDEFINED_ERROR;
  1169. break;
  1170. }
  1171. break;
  1172. default:
  1173. break;
  1174. }
  1175. }
  1176. static int
  1177. qlcnic_alloc_rx_skb(struct qlcnic_adapter *adapter,
  1178. struct qlcnic_host_rds_ring *rds_ring,
  1179. struct qlcnic_rx_buffer *buffer)
  1180. {
  1181. struct sk_buff *skb;
  1182. dma_addr_t dma;
  1183. struct pci_dev *pdev = adapter->pdev;
  1184. skb = netdev_alloc_skb(adapter->netdev, rds_ring->skb_size);
  1185. if (!skb) {
  1186. adapter->stats.skb_alloc_failure++;
  1187. return -ENOMEM;
  1188. }
  1189. skb_reserve(skb, NET_IP_ALIGN);
  1190. dma = pci_map_single(pdev, skb->data,
  1191. rds_ring->dma_size, PCI_DMA_FROMDEVICE);
  1192. if (pci_dma_mapping_error(pdev, dma)) {
  1193. adapter->stats.rx_dma_map_error++;
  1194. dev_kfree_skb_any(skb);
  1195. return -ENOMEM;
  1196. }
  1197. buffer->skb = skb;
  1198. buffer->dma = dma;
  1199. return 0;
  1200. }
  1201. static struct sk_buff *qlcnic_process_rxbuf(struct qlcnic_adapter *adapter,
  1202. struct qlcnic_host_rds_ring *rds_ring, u16 index, u16 cksum)
  1203. {
  1204. struct qlcnic_rx_buffer *buffer;
  1205. struct sk_buff *skb;
  1206. buffer = &rds_ring->rx_buf_arr[index];
  1207. if (unlikely(buffer->skb == NULL)) {
  1208. WARN_ON(1);
  1209. return NULL;
  1210. }
  1211. pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
  1212. PCI_DMA_FROMDEVICE);
  1213. skb = buffer->skb;
  1214. if (likely((adapter->netdev->features & NETIF_F_RXCSUM) &&
  1215. (cksum == STATUS_CKSUM_OK || cksum == STATUS_CKSUM_LOOP))) {
  1216. adapter->stats.csummed++;
  1217. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1218. } else {
  1219. skb_checksum_none_assert(skb);
  1220. }
  1221. skb->dev = adapter->netdev;
  1222. buffer->skb = NULL;
  1223. return skb;
  1224. }
  1225. static inline int
  1226. qlcnic_check_rx_tagging(struct qlcnic_adapter *adapter, struct sk_buff *skb,
  1227. u16 *vlan_tag)
  1228. {
  1229. struct ethhdr *eth_hdr;
  1230. if (!__vlan_get_tag(skb, vlan_tag)) {
  1231. eth_hdr = (struct ethhdr *) skb->data;
  1232. memmove(skb->data + VLAN_HLEN, eth_hdr, ETH_ALEN * 2);
  1233. skb_pull(skb, VLAN_HLEN);
  1234. }
  1235. if (!adapter->pvid)
  1236. return 0;
  1237. if (*vlan_tag == adapter->pvid) {
  1238. /* Outer vlan tag. Packet should follow non-vlan path */
  1239. *vlan_tag = 0xffff;
  1240. return 0;
  1241. }
  1242. if (adapter->flags & QLCNIC_TAGGING_ENABLED)
  1243. return 0;
  1244. return -EINVAL;
  1245. }
  1246. static struct qlcnic_rx_buffer *
  1247. qlcnic_process_rcv(struct qlcnic_adapter *adapter,
  1248. struct qlcnic_host_sds_ring *sds_ring,
  1249. int ring, u64 sts_data0)
  1250. {
  1251. struct net_device *netdev = adapter->netdev;
  1252. struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
  1253. struct qlcnic_rx_buffer *buffer;
  1254. struct sk_buff *skb;
  1255. struct qlcnic_host_rds_ring *rds_ring;
  1256. int index, length, cksum, pkt_offset;
  1257. u16 vid = 0xffff;
  1258. if (unlikely(ring >= adapter->max_rds_rings))
  1259. return NULL;
  1260. rds_ring = &recv_ctx->rds_rings[ring];
  1261. index = qlcnic_get_sts_refhandle(sts_data0);
  1262. if (unlikely(index >= rds_ring->num_desc))
  1263. return NULL;
  1264. buffer = &rds_ring->rx_buf_arr[index];
  1265. length = qlcnic_get_sts_totallength(sts_data0);
  1266. cksum = qlcnic_get_sts_status(sts_data0);
  1267. pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0);
  1268. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum);
  1269. if (!skb)
  1270. return buffer;
  1271. if (length > rds_ring->skb_size)
  1272. skb_put(skb, rds_ring->skb_size);
  1273. else
  1274. skb_put(skb, length);
  1275. if (pkt_offset)
  1276. skb_pull(skb, pkt_offset);
  1277. if (unlikely(qlcnic_check_rx_tagging(adapter, skb, &vid))) {
  1278. adapter->stats.rxdropped++;
  1279. dev_kfree_skb(skb);
  1280. return buffer;
  1281. }
  1282. skb->protocol = eth_type_trans(skb, netdev);
  1283. if (vid != 0xffff)
  1284. __vlan_hwaccel_put_tag(skb, vid);
  1285. napi_gro_receive(&sds_ring->napi, skb);
  1286. adapter->stats.rx_pkts++;
  1287. adapter->stats.rxbytes += length;
  1288. return buffer;
  1289. }
  1290. #define QLC_TCP_HDR_SIZE 20
  1291. #define QLC_TCP_TS_OPTION_SIZE 12
  1292. #define QLC_TCP_TS_HDR_SIZE (QLC_TCP_HDR_SIZE + QLC_TCP_TS_OPTION_SIZE)
  1293. static struct qlcnic_rx_buffer *
  1294. qlcnic_process_lro(struct qlcnic_adapter *adapter,
  1295. struct qlcnic_host_sds_ring *sds_ring,
  1296. int ring, u64 sts_data0, u64 sts_data1)
  1297. {
  1298. struct net_device *netdev = adapter->netdev;
  1299. struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
  1300. struct qlcnic_rx_buffer *buffer;
  1301. struct sk_buff *skb;
  1302. struct qlcnic_host_rds_ring *rds_ring;
  1303. struct iphdr *iph;
  1304. struct tcphdr *th;
  1305. bool push, timestamp;
  1306. int l2_hdr_offset, l4_hdr_offset;
  1307. int index;
  1308. u16 lro_length, length, data_offset;
  1309. u32 seq_number;
  1310. u16 vid = 0xffff;
  1311. if (unlikely(ring > adapter->max_rds_rings))
  1312. return NULL;
  1313. rds_ring = &recv_ctx->rds_rings[ring];
  1314. index = qlcnic_get_lro_sts_refhandle(sts_data0);
  1315. if (unlikely(index > rds_ring->num_desc))
  1316. return NULL;
  1317. buffer = &rds_ring->rx_buf_arr[index];
  1318. timestamp = qlcnic_get_lro_sts_timestamp(sts_data0);
  1319. lro_length = qlcnic_get_lro_sts_length(sts_data0);
  1320. l2_hdr_offset = qlcnic_get_lro_sts_l2_hdr_offset(sts_data0);
  1321. l4_hdr_offset = qlcnic_get_lro_sts_l4_hdr_offset(sts_data0);
  1322. push = qlcnic_get_lro_sts_push_flag(sts_data0);
  1323. seq_number = qlcnic_get_lro_sts_seq_number(sts_data1);
  1324. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
  1325. if (!skb)
  1326. return buffer;
  1327. if (timestamp)
  1328. data_offset = l4_hdr_offset + QLC_TCP_TS_HDR_SIZE;
  1329. else
  1330. data_offset = l4_hdr_offset + QLC_TCP_HDR_SIZE;
  1331. skb_put(skb, lro_length + data_offset);
  1332. skb_pull(skb, l2_hdr_offset);
  1333. if (unlikely(qlcnic_check_rx_tagging(adapter, skb, &vid))) {
  1334. adapter->stats.rxdropped++;
  1335. dev_kfree_skb(skb);
  1336. return buffer;
  1337. }
  1338. skb->protocol = eth_type_trans(skb, netdev);
  1339. iph = (struct iphdr *)skb->data;
  1340. th = (struct tcphdr *)(skb->data + (iph->ihl << 2));
  1341. length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
  1342. iph->tot_len = htons(length);
  1343. iph->check = 0;
  1344. iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
  1345. th->psh = push;
  1346. th->seq = htonl(seq_number);
  1347. length = skb->len;
  1348. if (vid != 0xffff)
  1349. __vlan_hwaccel_put_tag(skb, vid);
  1350. netif_receive_skb(skb);
  1351. adapter->stats.lro_pkts++;
  1352. adapter->stats.lrobytes += length;
  1353. return buffer;
  1354. }
  1355. int
  1356. qlcnic_process_rcv_ring(struct qlcnic_host_sds_ring *sds_ring, int max)
  1357. {
  1358. struct qlcnic_adapter *adapter = sds_ring->adapter;
  1359. struct list_head *cur;
  1360. struct status_desc *desc;
  1361. struct qlcnic_rx_buffer *rxbuf;
  1362. u64 sts_data0, sts_data1;
  1363. int count = 0;
  1364. int opcode, ring, desc_cnt;
  1365. u32 consumer = sds_ring->consumer;
  1366. while (count < max) {
  1367. desc = &sds_ring->desc_head[consumer];
  1368. sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
  1369. if (!(sts_data0 & STATUS_OWNER_HOST))
  1370. break;
  1371. desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0);
  1372. opcode = qlcnic_get_sts_opcode(sts_data0);
  1373. switch (opcode) {
  1374. case QLCNIC_RXPKT_DESC:
  1375. case QLCNIC_OLD_RXPKT_DESC:
  1376. case QLCNIC_SYN_OFFLOAD:
  1377. ring = qlcnic_get_sts_type(sts_data0);
  1378. rxbuf = qlcnic_process_rcv(adapter, sds_ring,
  1379. ring, sts_data0);
  1380. break;
  1381. case QLCNIC_LRO_DESC:
  1382. ring = qlcnic_get_lro_sts_type(sts_data0);
  1383. sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
  1384. rxbuf = qlcnic_process_lro(adapter, sds_ring,
  1385. ring, sts_data0, sts_data1);
  1386. break;
  1387. case QLCNIC_RESPONSE_DESC:
  1388. qlcnic_handle_fw_message(desc_cnt, consumer, sds_ring);
  1389. default:
  1390. goto skip;
  1391. }
  1392. WARN_ON(desc_cnt > 1);
  1393. if (likely(rxbuf))
  1394. list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
  1395. else
  1396. adapter->stats.null_rxbuf++;
  1397. skip:
  1398. for (; desc_cnt > 0; desc_cnt--) {
  1399. desc = &sds_ring->desc_head[consumer];
  1400. desc->status_desc_data[0] =
  1401. cpu_to_le64(STATUS_OWNER_PHANTOM);
  1402. consumer = get_next_index(consumer, sds_ring->num_desc);
  1403. }
  1404. count++;
  1405. }
  1406. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  1407. struct qlcnic_host_rds_ring *rds_ring =
  1408. &adapter->recv_ctx->rds_rings[ring];
  1409. if (!list_empty(&sds_ring->free_list[ring])) {
  1410. list_for_each(cur, &sds_ring->free_list[ring]) {
  1411. rxbuf = list_entry(cur,
  1412. struct qlcnic_rx_buffer, list);
  1413. qlcnic_alloc_rx_skb(adapter, rds_ring, rxbuf);
  1414. }
  1415. spin_lock(&rds_ring->lock);
  1416. list_splice_tail_init(&sds_ring->free_list[ring],
  1417. &rds_ring->free_list);
  1418. spin_unlock(&rds_ring->lock);
  1419. }
  1420. qlcnic_post_rx_buffers_nodb(adapter, rds_ring);
  1421. }
  1422. if (count) {
  1423. sds_ring->consumer = consumer;
  1424. writel(consumer, sds_ring->crb_sts_consumer);
  1425. }
  1426. return count;
  1427. }
  1428. void
  1429. qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter,
  1430. struct qlcnic_host_rds_ring *rds_ring)
  1431. {
  1432. struct rcv_desc *pdesc;
  1433. struct qlcnic_rx_buffer *buffer;
  1434. int count = 0;
  1435. u32 producer;
  1436. struct list_head *head;
  1437. producer = rds_ring->producer;
  1438. head = &rds_ring->free_list;
  1439. while (!list_empty(head)) {
  1440. buffer = list_entry(head->next, struct qlcnic_rx_buffer, list);
  1441. if (!buffer->skb) {
  1442. if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer))
  1443. break;
  1444. }
  1445. count++;
  1446. list_del(&buffer->list);
  1447. /* make a rcv descriptor */
  1448. pdesc = &rds_ring->desc_head[producer];
  1449. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1450. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1451. pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
  1452. producer = get_next_index(producer, rds_ring->num_desc);
  1453. }
  1454. if (count) {
  1455. rds_ring->producer = producer;
  1456. writel((producer-1) & (rds_ring->num_desc-1),
  1457. rds_ring->crb_rcv_producer);
  1458. }
  1459. }
  1460. static void
  1461. qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter,
  1462. struct qlcnic_host_rds_ring *rds_ring)
  1463. {
  1464. struct rcv_desc *pdesc;
  1465. struct qlcnic_rx_buffer *buffer;
  1466. int count = 0;
  1467. uint32_t producer;
  1468. struct list_head *head;
  1469. if (!spin_trylock(&rds_ring->lock))
  1470. return;
  1471. producer = rds_ring->producer;
  1472. head = &rds_ring->free_list;
  1473. while (!list_empty(head)) {
  1474. buffer = list_entry(head->next, struct qlcnic_rx_buffer, list);
  1475. if (!buffer->skb) {
  1476. if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer))
  1477. break;
  1478. }
  1479. count++;
  1480. list_del(&buffer->list);
  1481. /* make a rcv descriptor */
  1482. pdesc = &rds_ring->desc_head[producer];
  1483. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1484. pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
  1485. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1486. producer = get_next_index(producer, rds_ring->num_desc);
  1487. }
  1488. if (count) {
  1489. rds_ring->producer = producer;
  1490. writel((producer - 1) & (rds_ring->num_desc - 1),
  1491. rds_ring->crb_rcv_producer);
  1492. }
  1493. spin_unlock(&rds_ring->lock);
  1494. }
  1495. static void dump_skb(struct sk_buff *skb, struct qlcnic_adapter *adapter)
  1496. {
  1497. int i;
  1498. unsigned char *data = skb->data;
  1499. printk(KERN_INFO "\n");
  1500. for (i = 0; i < skb->len; i++) {
  1501. QLCDB(adapter, DRV, "%02x ", data[i]);
  1502. if ((i & 0x0f) == 8)
  1503. printk(KERN_INFO "\n");
  1504. }
  1505. }
  1506. void qlcnic_process_rcv_diag(struct qlcnic_adapter *adapter,
  1507. struct qlcnic_host_sds_ring *sds_ring,
  1508. int ring, u64 sts_data0)
  1509. {
  1510. struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
  1511. struct sk_buff *skb;
  1512. struct qlcnic_host_rds_ring *rds_ring;
  1513. int index, length, cksum, pkt_offset;
  1514. if (unlikely(ring >= adapter->max_rds_rings))
  1515. return;
  1516. rds_ring = &recv_ctx->rds_rings[ring];
  1517. index = qlcnic_get_sts_refhandle(sts_data0);
  1518. length = qlcnic_get_sts_totallength(sts_data0);
  1519. if (unlikely(index >= rds_ring->num_desc))
  1520. return;
  1521. cksum = qlcnic_get_sts_status(sts_data0);
  1522. pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0);
  1523. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum);
  1524. if (!skb)
  1525. return;
  1526. if (length > rds_ring->skb_size)
  1527. skb_put(skb, rds_ring->skb_size);
  1528. else
  1529. skb_put(skb, length);
  1530. if (pkt_offset)
  1531. skb_pull(skb, pkt_offset);
  1532. if (!qlcnic_check_loopback_buff(skb->data, adapter->mac_addr))
  1533. adapter->diag_cnt++;
  1534. else
  1535. dump_skb(skb, adapter);
  1536. dev_kfree_skb_any(skb);
  1537. adapter->stats.rx_pkts++;
  1538. adapter->stats.rxbytes += length;
  1539. return;
  1540. }
  1541. void
  1542. qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring)
  1543. {
  1544. struct qlcnic_adapter *adapter = sds_ring->adapter;
  1545. struct status_desc *desc;
  1546. u64 sts_data0;
  1547. int ring, opcode, desc_cnt;
  1548. u32 consumer = sds_ring->consumer;
  1549. desc = &sds_ring->desc_head[consumer];
  1550. sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
  1551. if (!(sts_data0 & STATUS_OWNER_HOST))
  1552. return;
  1553. desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0);
  1554. opcode = qlcnic_get_sts_opcode(sts_data0);
  1555. switch (opcode) {
  1556. case QLCNIC_RESPONSE_DESC:
  1557. qlcnic_handle_fw_message(desc_cnt, consumer, sds_ring);
  1558. break;
  1559. default:
  1560. ring = qlcnic_get_sts_type(sts_data0);
  1561. qlcnic_process_rcv_diag(adapter, sds_ring, ring, sts_data0);
  1562. break;
  1563. }
  1564. for (; desc_cnt > 0; desc_cnt--) {
  1565. desc = &sds_ring->desc_head[consumer];
  1566. desc->status_desc_data[0] = cpu_to_le64(STATUS_OWNER_PHANTOM);
  1567. consumer = get_next_index(consumer, sds_ring->num_desc);
  1568. }
  1569. sds_ring->consumer = consumer;
  1570. writel(consumer, sds_ring->crb_sts_consumer);
  1571. }
  1572. void
  1573. qlcnic_fetch_mac(struct qlcnic_adapter *adapter, u32 off1, u32 off2,
  1574. u8 alt_mac, u8 *mac)
  1575. {
  1576. u32 mac_low, mac_high;
  1577. int i;
  1578. mac_low = off1;
  1579. mac_high = off2;
  1580. if (alt_mac) {
  1581. mac_low |= (mac_low >> 16) | (mac_high << 16);
  1582. mac_high >>= 16;
  1583. }
  1584. for (i = 0; i < 2; i++)
  1585. mac[i] = (u8)(mac_high >> ((1 - i) * 8));
  1586. for (i = 2; i < 6; i++)
  1587. mac[i] = (u8)(mac_low >> ((5 - i) * 8));
  1588. }