mx1_camera.c 22 KB

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  1. /*
  2. * V4L2 Driver for i.MXL/i.MXL camera (CSI) host
  3. *
  4. * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
  5. * Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
  6. *
  7. * Based on PXA SoC camera driver
  8. * Copyright (C) 2006, Sascha Hauer, Pengutronix
  9. * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/clk.h>
  16. #include <linux/delay.h>
  17. #include <linux/device.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/errno.h>
  20. #include <linux/fs.h>
  21. #include <linux/init.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/io.h>
  24. #include <linux/kernel.h>
  25. #include <linux/mm.h>
  26. #include <linux/module.h>
  27. #include <linux/moduleparam.h>
  28. #include <linux/mutex.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/sched.h>
  31. #include <linux/slab.h>
  32. #include <linux/time.h>
  33. #include <linux/videodev2.h>
  34. #include <media/soc_camera.h>
  35. #include <media/v4l2-common.h>
  36. #include <media/v4l2-dev.h>
  37. #include <media/videobuf-dma-contig.h>
  38. #include <media/soc_mediabus.h>
  39. #include <asm/dma.h>
  40. #include <asm/fiq.h>
  41. #include <mach/dma-mx1-mx2.h>
  42. #include <mach/hardware.h>
  43. #include <mach/mx1_camera.h>
  44. /*
  45. * CSI registers
  46. */
  47. #define CSICR1 0x00 /* CSI Control Register 1 */
  48. #define CSISR 0x08 /* CSI Status Register */
  49. #define CSIRXR 0x10 /* CSI RxFIFO Register */
  50. #define CSICR1_RXFF_LEVEL(x) (((x) & 0x3) << 19)
  51. #define CSICR1_SOF_POL (1 << 17)
  52. #define CSICR1_SOF_INTEN (1 << 16)
  53. #define CSICR1_MCLKDIV(x) (((x) & 0xf) << 12)
  54. #define CSICR1_MCLKEN (1 << 9)
  55. #define CSICR1_FCC (1 << 8)
  56. #define CSICR1_BIG_ENDIAN (1 << 7)
  57. #define CSICR1_CLR_RXFIFO (1 << 5)
  58. #define CSICR1_GCLK_MODE (1 << 4)
  59. #define CSICR1_DATA_POL (1 << 2)
  60. #define CSICR1_REDGE (1 << 1)
  61. #define CSICR1_EN (1 << 0)
  62. #define CSISR_SFF_OR_INT (1 << 25)
  63. #define CSISR_RFF_OR_INT (1 << 24)
  64. #define CSISR_STATFF_INT (1 << 21)
  65. #define CSISR_RXFF_INT (1 << 18)
  66. #define CSISR_SOF_INT (1 << 16)
  67. #define CSISR_DRDY (1 << 0)
  68. #define DRIVER_VERSION "0.0.2"
  69. #define DRIVER_NAME "mx1-camera"
  70. #define CSI_IRQ_MASK (CSISR_SFF_OR_INT | CSISR_RFF_OR_INT | \
  71. CSISR_STATFF_INT | CSISR_RXFF_INT | CSISR_SOF_INT)
  72. #define CSI_BUS_FLAGS (V4L2_MBUS_MASTER | V4L2_MBUS_HSYNC_ACTIVE_HIGH | \
  73. V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_LOW | \
  74. V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING | \
  75. V4L2_MBUS_DATA_ACTIVE_HIGH | V4L2_MBUS_DATA_ACTIVE_LOW)
  76. #define MAX_VIDEO_MEM 16 /* Video memory limit in megabytes */
  77. /*
  78. * Structures
  79. */
  80. /* buffer for one video frame */
  81. struct mx1_buffer {
  82. /* common v4l buffer stuff -- must be first */
  83. struct videobuf_buffer vb;
  84. enum v4l2_mbus_pixelcode code;
  85. int inwork;
  86. };
  87. /*
  88. * i.MX1/i.MXL is only supposed to handle one camera on its Camera Sensor
  89. * Interface. If anyone ever builds hardware to enable more than
  90. * one camera, they will have to modify this driver too
  91. */
  92. struct mx1_camera_dev {
  93. struct soc_camera_host soc_host;
  94. struct soc_camera_device *icd;
  95. struct mx1_camera_pdata *pdata;
  96. struct mx1_buffer *active;
  97. struct resource *res;
  98. struct clk *clk;
  99. struct list_head capture;
  100. void __iomem *base;
  101. int dma_chan;
  102. unsigned int irq;
  103. unsigned long mclk;
  104. spinlock_t lock;
  105. };
  106. /*
  107. * Videobuf operations
  108. */
  109. static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
  110. unsigned int *size)
  111. {
  112. struct soc_camera_device *icd = vq->priv_data;
  113. *size = icd->sizeimage;
  114. if (!*count)
  115. *count = 32;
  116. if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
  117. *count = (MAX_VIDEO_MEM * 1024 * 1024) / *size;
  118. dev_dbg(icd->parent, "count=%d, size=%d\n", *count, *size);
  119. return 0;
  120. }
  121. static void free_buffer(struct videobuf_queue *vq, struct mx1_buffer *buf)
  122. {
  123. struct soc_camera_device *icd = vq->priv_data;
  124. struct videobuf_buffer *vb = &buf->vb;
  125. BUG_ON(in_interrupt());
  126. dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  127. vb, vb->baddr, vb->bsize);
  128. /*
  129. * This waits until this buffer is out of danger, i.e., until it is no
  130. * longer in STATE_QUEUED or STATE_ACTIVE
  131. */
  132. videobuf_waiton(vq, vb, 0, 0);
  133. videobuf_dma_contig_free(vq, vb);
  134. vb->state = VIDEOBUF_NEEDS_INIT;
  135. }
  136. static int mx1_videobuf_prepare(struct videobuf_queue *vq,
  137. struct videobuf_buffer *vb, enum v4l2_field field)
  138. {
  139. struct soc_camera_device *icd = vq->priv_data;
  140. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  141. int ret;
  142. dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  143. vb, vb->baddr, vb->bsize);
  144. /* Added list head initialization on alloc */
  145. WARN_ON(!list_empty(&vb->queue));
  146. BUG_ON(NULL == icd->current_fmt);
  147. /*
  148. * I think, in buf_prepare you only have to protect global data,
  149. * the actual buffer is yours
  150. */
  151. buf->inwork = 1;
  152. if (buf->code != icd->current_fmt->code ||
  153. vb->width != icd->user_width ||
  154. vb->height != icd->user_height ||
  155. vb->field != field) {
  156. buf->code = icd->current_fmt->code;
  157. vb->width = icd->user_width;
  158. vb->height = icd->user_height;
  159. vb->field = field;
  160. vb->state = VIDEOBUF_NEEDS_INIT;
  161. }
  162. vb->size = icd->sizeimage;
  163. if (0 != vb->baddr && vb->bsize < vb->size) {
  164. ret = -EINVAL;
  165. goto out;
  166. }
  167. if (vb->state == VIDEOBUF_NEEDS_INIT) {
  168. ret = videobuf_iolock(vq, vb, NULL);
  169. if (ret)
  170. goto fail;
  171. vb->state = VIDEOBUF_PREPARED;
  172. }
  173. buf->inwork = 0;
  174. return 0;
  175. fail:
  176. free_buffer(vq, buf);
  177. out:
  178. buf->inwork = 0;
  179. return ret;
  180. }
  181. static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev)
  182. {
  183. struct videobuf_buffer *vbuf = &pcdev->active->vb;
  184. struct device *dev = pcdev->icd->parent;
  185. int ret;
  186. if (unlikely(!pcdev->active)) {
  187. dev_err(dev, "DMA End IRQ with no active buffer\n");
  188. return -EFAULT;
  189. }
  190. /* setup sg list for future DMA */
  191. ret = imx_dma_setup_single(pcdev->dma_chan,
  192. videobuf_to_dma_contig(vbuf),
  193. vbuf->size, pcdev->res->start +
  194. CSIRXR, DMA_MODE_READ);
  195. if (unlikely(ret))
  196. dev_err(dev, "Failed to setup DMA sg list\n");
  197. return ret;
  198. }
  199. /* Called under spinlock_irqsave(&pcdev->lock, ...) */
  200. static void mx1_videobuf_queue(struct videobuf_queue *vq,
  201. struct videobuf_buffer *vb)
  202. {
  203. struct soc_camera_device *icd = vq->priv_data;
  204. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  205. struct mx1_camera_dev *pcdev = ici->priv;
  206. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  207. dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  208. vb, vb->baddr, vb->bsize);
  209. list_add_tail(&vb->queue, &pcdev->capture);
  210. vb->state = VIDEOBUF_ACTIVE;
  211. if (!pcdev->active) {
  212. pcdev->active = buf;
  213. /* setup sg list for future DMA */
  214. if (!mx1_camera_setup_dma(pcdev)) {
  215. unsigned int temp;
  216. /* enable SOF irq */
  217. temp = __raw_readl(pcdev->base + CSICR1) |
  218. CSICR1_SOF_INTEN;
  219. __raw_writel(temp, pcdev->base + CSICR1);
  220. }
  221. }
  222. }
  223. static void mx1_videobuf_release(struct videobuf_queue *vq,
  224. struct videobuf_buffer *vb)
  225. {
  226. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  227. #ifdef DEBUG
  228. struct soc_camera_device *icd = vq->priv_data;
  229. struct device *dev = icd->parent;
  230. dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  231. vb, vb->baddr, vb->bsize);
  232. switch (vb->state) {
  233. case VIDEOBUF_ACTIVE:
  234. dev_dbg(dev, "%s (active)\n", __func__);
  235. break;
  236. case VIDEOBUF_QUEUED:
  237. dev_dbg(dev, "%s (queued)\n", __func__);
  238. break;
  239. case VIDEOBUF_PREPARED:
  240. dev_dbg(dev, "%s (prepared)\n", __func__);
  241. break;
  242. default:
  243. dev_dbg(dev, "%s (unknown)\n", __func__);
  244. break;
  245. }
  246. #endif
  247. free_buffer(vq, buf);
  248. }
  249. static void mx1_camera_wakeup(struct mx1_camera_dev *pcdev,
  250. struct videobuf_buffer *vb,
  251. struct mx1_buffer *buf)
  252. {
  253. /* _init is used to debug races, see comment in mx1_camera_reqbufs() */
  254. list_del_init(&vb->queue);
  255. vb->state = VIDEOBUF_DONE;
  256. do_gettimeofday(&vb->ts);
  257. vb->field_count++;
  258. wake_up(&vb->done);
  259. if (list_empty(&pcdev->capture)) {
  260. pcdev->active = NULL;
  261. return;
  262. }
  263. pcdev->active = list_entry(pcdev->capture.next,
  264. struct mx1_buffer, vb.queue);
  265. /* setup sg list for future DMA */
  266. if (likely(!mx1_camera_setup_dma(pcdev))) {
  267. unsigned int temp;
  268. /* enable SOF irq */
  269. temp = __raw_readl(pcdev->base + CSICR1) | CSICR1_SOF_INTEN;
  270. __raw_writel(temp, pcdev->base + CSICR1);
  271. }
  272. }
  273. static void mx1_camera_dma_irq(int channel, void *data)
  274. {
  275. struct mx1_camera_dev *pcdev = data;
  276. struct device *dev = pcdev->icd->parent;
  277. struct mx1_buffer *buf;
  278. struct videobuf_buffer *vb;
  279. unsigned long flags;
  280. spin_lock_irqsave(&pcdev->lock, flags);
  281. imx_dma_disable(channel);
  282. if (unlikely(!pcdev->active)) {
  283. dev_err(dev, "DMA End IRQ with no active buffer\n");
  284. goto out;
  285. }
  286. vb = &pcdev->active->vb;
  287. buf = container_of(vb, struct mx1_buffer, vb);
  288. WARN_ON(buf->inwork || list_empty(&vb->queue));
  289. dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  290. vb, vb->baddr, vb->bsize);
  291. mx1_camera_wakeup(pcdev, vb, buf);
  292. out:
  293. spin_unlock_irqrestore(&pcdev->lock, flags);
  294. }
  295. static struct videobuf_queue_ops mx1_videobuf_ops = {
  296. .buf_setup = mx1_videobuf_setup,
  297. .buf_prepare = mx1_videobuf_prepare,
  298. .buf_queue = mx1_videobuf_queue,
  299. .buf_release = mx1_videobuf_release,
  300. };
  301. static void mx1_camera_init_videobuf(struct videobuf_queue *q,
  302. struct soc_camera_device *icd)
  303. {
  304. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  305. struct mx1_camera_dev *pcdev = ici->priv;
  306. videobuf_queue_dma_contig_init(q, &mx1_videobuf_ops, icd->parent,
  307. &pcdev->lock, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  308. V4L2_FIELD_NONE,
  309. sizeof(struct mx1_buffer), icd, &icd->video_lock);
  310. }
  311. static int mclk_get_divisor(struct mx1_camera_dev *pcdev)
  312. {
  313. unsigned int mclk = pcdev->mclk;
  314. unsigned long div;
  315. unsigned long lcdclk;
  316. lcdclk = clk_get_rate(pcdev->clk);
  317. /*
  318. * We verify platform_mclk_10khz != 0, so if anyone breaks it, here
  319. * they get a nice Oops
  320. */
  321. div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
  322. dev_dbg(pcdev->icd->parent,
  323. "System clock %lukHz, target freq %dkHz, divisor %lu\n",
  324. lcdclk / 1000, mclk / 1000, div);
  325. return div;
  326. }
  327. static void mx1_camera_activate(struct mx1_camera_dev *pcdev)
  328. {
  329. unsigned int csicr1 = CSICR1_EN;
  330. dev_dbg(pcdev->icd->parent, "Activate device\n");
  331. clk_enable(pcdev->clk);
  332. /* enable CSI before doing anything else */
  333. __raw_writel(csicr1, pcdev->base + CSICR1);
  334. csicr1 |= CSICR1_MCLKEN | CSICR1_FCC | CSICR1_GCLK_MODE;
  335. csicr1 |= CSICR1_MCLKDIV(mclk_get_divisor(pcdev));
  336. csicr1 |= CSICR1_RXFF_LEVEL(2); /* 16 words */
  337. __raw_writel(csicr1, pcdev->base + CSICR1);
  338. }
  339. static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev)
  340. {
  341. dev_dbg(pcdev->icd->parent, "Deactivate device\n");
  342. /* Disable all CSI interface */
  343. __raw_writel(0x00, pcdev->base + CSICR1);
  344. clk_disable(pcdev->clk);
  345. }
  346. /*
  347. * The following two functions absolutely depend on the fact, that
  348. * there can be only one camera on i.MX1/i.MXL camera sensor interface
  349. */
  350. static int mx1_camera_add_device(struct soc_camera_device *icd)
  351. {
  352. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  353. struct mx1_camera_dev *pcdev = ici->priv;
  354. if (pcdev->icd)
  355. return -EBUSY;
  356. dev_info(icd->parent, "MX1 Camera driver attached to camera %d\n",
  357. icd->devnum);
  358. mx1_camera_activate(pcdev);
  359. pcdev->icd = icd;
  360. return 0;
  361. }
  362. static void mx1_camera_remove_device(struct soc_camera_device *icd)
  363. {
  364. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  365. struct mx1_camera_dev *pcdev = ici->priv;
  366. unsigned int csicr1;
  367. BUG_ON(icd != pcdev->icd);
  368. /* disable interrupts */
  369. csicr1 = __raw_readl(pcdev->base + CSICR1) & ~CSI_IRQ_MASK;
  370. __raw_writel(csicr1, pcdev->base + CSICR1);
  371. /* Stop DMA engine */
  372. imx_dma_disable(pcdev->dma_chan);
  373. dev_info(icd->parent, "MX1 Camera driver detached from camera %d\n",
  374. icd->devnum);
  375. mx1_camera_deactivate(pcdev);
  376. pcdev->icd = NULL;
  377. }
  378. static int mx1_camera_set_crop(struct soc_camera_device *icd,
  379. struct v4l2_crop *a)
  380. {
  381. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  382. return v4l2_subdev_call(sd, video, s_crop, a);
  383. }
  384. static int mx1_camera_set_bus_param(struct soc_camera_device *icd)
  385. {
  386. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  387. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  388. struct mx1_camera_dev *pcdev = ici->priv;
  389. struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
  390. unsigned long common_flags;
  391. unsigned int csicr1;
  392. int ret;
  393. /* MX1 supports only 8bit buswidth */
  394. ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
  395. if (!ret) {
  396. common_flags = soc_mbus_config_compatible(&cfg, CSI_BUS_FLAGS);
  397. if (!common_flags) {
  398. dev_warn(icd->parent,
  399. "Flags incompatible: camera 0x%x, host 0x%x\n",
  400. cfg.flags, CSI_BUS_FLAGS);
  401. return -EINVAL;
  402. }
  403. } else if (ret != -ENOIOCTLCMD) {
  404. return ret;
  405. } else {
  406. common_flags = CSI_BUS_FLAGS;
  407. }
  408. /* Make choises, based on platform choice */
  409. if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) &&
  410. (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) {
  411. if (!pcdev->pdata ||
  412. pcdev->pdata->flags & MX1_CAMERA_VSYNC_HIGH)
  413. common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW;
  414. else
  415. common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH;
  416. }
  417. if ((common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) &&
  418. (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)) {
  419. if (!pcdev->pdata ||
  420. pcdev->pdata->flags & MX1_CAMERA_PCLK_RISING)
  421. common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_FALLING;
  422. else
  423. common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_RISING;
  424. }
  425. if ((common_flags & V4L2_MBUS_DATA_ACTIVE_HIGH) &&
  426. (common_flags & V4L2_MBUS_DATA_ACTIVE_LOW)) {
  427. if (!pcdev->pdata ||
  428. pcdev->pdata->flags & MX1_CAMERA_DATA_HIGH)
  429. common_flags &= ~V4L2_MBUS_DATA_ACTIVE_LOW;
  430. else
  431. common_flags &= ~V4L2_MBUS_DATA_ACTIVE_HIGH;
  432. }
  433. cfg.flags = common_flags;
  434. ret = v4l2_subdev_call(sd, video, s_mbus_config, &cfg);
  435. if (ret < 0 && ret != -ENOIOCTLCMD) {
  436. dev_dbg(icd->parent, "camera s_mbus_config(0x%lx) returned %d\n",
  437. common_flags, ret);
  438. return ret;
  439. }
  440. csicr1 = __raw_readl(pcdev->base + CSICR1);
  441. if (common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
  442. csicr1 |= CSICR1_REDGE;
  443. if (common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
  444. csicr1 |= CSICR1_SOF_POL;
  445. if (common_flags & V4L2_MBUS_DATA_ACTIVE_LOW)
  446. csicr1 |= CSICR1_DATA_POL;
  447. __raw_writel(csicr1, pcdev->base + CSICR1);
  448. return 0;
  449. }
  450. static int mx1_camera_set_fmt(struct soc_camera_device *icd,
  451. struct v4l2_format *f)
  452. {
  453. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  454. const struct soc_camera_format_xlate *xlate;
  455. struct v4l2_pix_format *pix = &f->fmt.pix;
  456. struct v4l2_mbus_framefmt mf;
  457. int ret, buswidth;
  458. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  459. if (!xlate) {
  460. dev_warn(icd->parent, "Format %x not found\n",
  461. pix->pixelformat);
  462. return -EINVAL;
  463. }
  464. buswidth = xlate->host_fmt->bits_per_sample;
  465. if (buswidth > 8) {
  466. dev_warn(icd->parent,
  467. "bits-per-sample %d for format %x unsupported\n",
  468. buswidth, pix->pixelformat);
  469. return -EINVAL;
  470. }
  471. mf.width = pix->width;
  472. mf.height = pix->height;
  473. mf.field = pix->field;
  474. mf.colorspace = pix->colorspace;
  475. mf.code = xlate->code;
  476. ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
  477. if (ret < 0)
  478. return ret;
  479. if (mf.code != xlate->code)
  480. return -EINVAL;
  481. pix->width = mf.width;
  482. pix->height = mf.height;
  483. pix->field = mf.field;
  484. pix->colorspace = mf.colorspace;
  485. icd->current_fmt = xlate;
  486. return ret;
  487. }
  488. static int mx1_camera_try_fmt(struct soc_camera_device *icd,
  489. struct v4l2_format *f)
  490. {
  491. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  492. const struct soc_camera_format_xlate *xlate;
  493. struct v4l2_pix_format *pix = &f->fmt.pix;
  494. struct v4l2_mbus_framefmt mf;
  495. int ret;
  496. /* TODO: limit to mx1 hardware capabilities */
  497. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  498. if (!xlate) {
  499. dev_warn(icd->parent, "Format %x not found\n",
  500. pix->pixelformat);
  501. return -EINVAL;
  502. }
  503. mf.width = pix->width;
  504. mf.height = pix->height;
  505. mf.field = pix->field;
  506. mf.colorspace = pix->colorspace;
  507. mf.code = xlate->code;
  508. /* limit to sensor capabilities */
  509. ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
  510. if (ret < 0)
  511. return ret;
  512. pix->width = mf.width;
  513. pix->height = mf.height;
  514. pix->field = mf.field;
  515. pix->colorspace = mf.colorspace;
  516. return 0;
  517. }
  518. static int mx1_camera_reqbufs(struct soc_camera_device *icd,
  519. struct v4l2_requestbuffers *p)
  520. {
  521. int i;
  522. /*
  523. * This is for locking debugging only. I removed spinlocks and now I
  524. * check whether .prepare is ever called on a linked buffer, or whether
  525. * a dma IRQ can occur for an in-work or unlinked buffer. Until now
  526. * it hadn't triggered
  527. */
  528. for (i = 0; i < p->count; i++) {
  529. struct mx1_buffer *buf = container_of(icd->vb_vidq.bufs[i],
  530. struct mx1_buffer, vb);
  531. buf->inwork = 0;
  532. INIT_LIST_HEAD(&buf->vb.queue);
  533. }
  534. return 0;
  535. }
  536. static unsigned int mx1_camera_poll(struct file *file, poll_table *pt)
  537. {
  538. struct soc_camera_device *icd = file->private_data;
  539. struct mx1_buffer *buf;
  540. buf = list_entry(icd->vb_vidq.stream.next, struct mx1_buffer,
  541. vb.stream);
  542. poll_wait(file, &buf->vb.done, pt);
  543. if (buf->vb.state == VIDEOBUF_DONE ||
  544. buf->vb.state == VIDEOBUF_ERROR)
  545. return POLLIN | POLLRDNORM;
  546. return 0;
  547. }
  548. static int mx1_camera_querycap(struct soc_camera_host *ici,
  549. struct v4l2_capability *cap)
  550. {
  551. /* cap->name is set by the friendly caller:-> */
  552. strlcpy(cap->card, "i.MX1/i.MXL Camera", sizeof(cap->card));
  553. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
  554. return 0;
  555. }
  556. static struct soc_camera_host_ops mx1_soc_camera_host_ops = {
  557. .owner = THIS_MODULE,
  558. .add = mx1_camera_add_device,
  559. .remove = mx1_camera_remove_device,
  560. .set_bus_param = mx1_camera_set_bus_param,
  561. .set_crop = mx1_camera_set_crop,
  562. .set_fmt = mx1_camera_set_fmt,
  563. .try_fmt = mx1_camera_try_fmt,
  564. .init_videobuf = mx1_camera_init_videobuf,
  565. .reqbufs = mx1_camera_reqbufs,
  566. .poll = mx1_camera_poll,
  567. .querycap = mx1_camera_querycap,
  568. };
  569. static struct fiq_handler fh = {
  570. .name = "csi_sof"
  571. };
  572. static int __init mx1_camera_probe(struct platform_device *pdev)
  573. {
  574. struct mx1_camera_dev *pcdev;
  575. struct resource *res;
  576. struct pt_regs regs;
  577. struct clk *clk;
  578. void __iomem *base;
  579. unsigned int irq;
  580. int err = 0;
  581. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  582. irq = platform_get_irq(pdev, 0);
  583. if (!res || (int)irq <= 0) {
  584. err = -ENODEV;
  585. goto exit;
  586. }
  587. clk = clk_get(&pdev->dev, "csi_clk");
  588. if (IS_ERR(clk)) {
  589. err = PTR_ERR(clk);
  590. goto exit;
  591. }
  592. pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
  593. if (!pcdev) {
  594. dev_err(&pdev->dev, "Could not allocate pcdev\n");
  595. err = -ENOMEM;
  596. goto exit_put_clk;
  597. }
  598. pcdev->res = res;
  599. pcdev->clk = clk;
  600. pcdev->pdata = pdev->dev.platform_data;
  601. if (pcdev->pdata)
  602. pcdev->mclk = pcdev->pdata->mclk_10khz * 10000;
  603. if (!pcdev->mclk) {
  604. dev_warn(&pdev->dev,
  605. "mclk_10khz == 0! Please, fix your platform data. "
  606. "Using default 20MHz\n");
  607. pcdev->mclk = 20000000;
  608. }
  609. INIT_LIST_HEAD(&pcdev->capture);
  610. spin_lock_init(&pcdev->lock);
  611. /*
  612. * Request the regions.
  613. */
  614. if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
  615. err = -EBUSY;
  616. goto exit_kfree;
  617. }
  618. base = ioremap(res->start, resource_size(res));
  619. if (!base) {
  620. err = -ENOMEM;
  621. goto exit_release;
  622. }
  623. pcdev->irq = irq;
  624. pcdev->base = base;
  625. /* request dma */
  626. pcdev->dma_chan = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_HIGH);
  627. if (pcdev->dma_chan < 0) {
  628. dev_err(&pdev->dev, "Can't request DMA for MX1 CSI\n");
  629. err = -EBUSY;
  630. goto exit_iounmap;
  631. }
  632. dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_chan);
  633. imx_dma_setup_handlers(pcdev->dma_chan, mx1_camera_dma_irq, NULL,
  634. pcdev);
  635. imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
  636. IMX_DMA_MEMSIZE_32, MX1_DMA_REQ_CSI_R, 0);
  637. /* burst length : 16 words = 64 bytes */
  638. imx_dma_config_burstlen(pcdev->dma_chan, 0);
  639. /* request irq */
  640. err = claim_fiq(&fh);
  641. if (err) {
  642. dev_err(&pdev->dev, "Camera interrupt register failed \n");
  643. goto exit_free_dma;
  644. }
  645. set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
  646. &mx1_camera_sof_fiq_start);
  647. regs.ARM_r8 = (long)MX1_DMA_DIMR;
  648. regs.ARM_r9 = (long)MX1_DMA_CCR(pcdev->dma_chan);
  649. regs.ARM_r10 = (long)pcdev->base + CSICR1;
  650. regs.ARM_fp = (long)pcdev->base + CSISR;
  651. regs.ARM_sp = 1 << pcdev->dma_chan;
  652. set_fiq_regs(&regs);
  653. mxc_set_irq_fiq(irq, 1);
  654. enable_fiq(irq);
  655. pcdev->soc_host.drv_name = DRIVER_NAME;
  656. pcdev->soc_host.ops = &mx1_soc_camera_host_ops;
  657. pcdev->soc_host.priv = pcdev;
  658. pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
  659. pcdev->soc_host.nr = pdev->id;
  660. err = soc_camera_host_register(&pcdev->soc_host);
  661. if (err)
  662. goto exit_free_irq;
  663. dev_info(&pdev->dev, "MX1 Camera driver loaded\n");
  664. return 0;
  665. exit_free_irq:
  666. disable_fiq(irq);
  667. mxc_set_irq_fiq(irq, 0);
  668. release_fiq(&fh);
  669. exit_free_dma:
  670. imx_dma_free(pcdev->dma_chan);
  671. exit_iounmap:
  672. iounmap(base);
  673. exit_release:
  674. release_mem_region(res->start, resource_size(res));
  675. exit_kfree:
  676. kfree(pcdev);
  677. exit_put_clk:
  678. clk_put(clk);
  679. exit:
  680. return err;
  681. }
  682. static int __exit mx1_camera_remove(struct platform_device *pdev)
  683. {
  684. struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
  685. struct mx1_camera_dev *pcdev = container_of(soc_host,
  686. struct mx1_camera_dev, soc_host);
  687. struct resource *res;
  688. imx_dma_free(pcdev->dma_chan);
  689. disable_fiq(pcdev->irq);
  690. mxc_set_irq_fiq(pcdev->irq, 0);
  691. release_fiq(&fh);
  692. clk_put(pcdev->clk);
  693. soc_camera_host_unregister(soc_host);
  694. iounmap(pcdev->base);
  695. res = pcdev->res;
  696. release_mem_region(res->start, resource_size(res));
  697. kfree(pcdev);
  698. dev_info(&pdev->dev, "MX1 Camera driver unloaded\n");
  699. return 0;
  700. }
  701. static struct platform_driver mx1_camera_driver = {
  702. .driver = {
  703. .name = DRIVER_NAME,
  704. },
  705. .remove = __exit_p(mx1_camera_remove),
  706. };
  707. static int __init mx1_camera_init(void)
  708. {
  709. return platform_driver_probe(&mx1_camera_driver, mx1_camera_probe);
  710. }
  711. static void __exit mx1_camera_exit(void)
  712. {
  713. return platform_driver_unregister(&mx1_camera_driver);
  714. }
  715. module_init(mx1_camera_init);
  716. module_exit(mx1_camera_exit);
  717. MODULE_DESCRIPTION("i.MX1/i.MXL SoC Camera Host driver");
  718. MODULE_AUTHOR("Paulius Zaleckas <paulius.zaleckas@teltonika.lt>");
  719. MODULE_LICENSE("GPL v2");
  720. MODULE_VERSION(DRIVER_VERSION);
  721. MODULE_ALIAS("platform:" DRIVER_NAME);