ocrdma.h 8.4 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex RoCE Device Driver for *
  3. * RoCE (RDMA over Converged Ethernet) adapters. *
  4. * Copyright (C) 2008-2012 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * *
  8. * This program is free software; you can redistribute it and/or *
  9. * modify it under the terms of version 2 of the GNU General *
  10. * Public License as published by the Free Software Foundation. *
  11. * This program is distributed in the hope that it will be useful. *
  12. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  13. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  14. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  15. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  16. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  17. * more details, a copy of which can be found in the file COPYING *
  18. * included with this package. *
  19. *
  20. * Contact Information:
  21. * linux-drivers@emulex.com
  22. *
  23. * Emulex
  24. * 3333 Susan Street
  25. * Costa Mesa, CA 92626
  26. *******************************************************************/
  27. #ifndef __OCRDMA_H__
  28. #define __OCRDMA_H__
  29. #include <linux/mutex.h>
  30. #include <linux/list.h>
  31. #include <linux/spinlock.h>
  32. #include <linux/pci.h>
  33. #include <rdma/ib_verbs.h>
  34. #include <rdma/ib_user_verbs.h>
  35. #include <be_roce.h>
  36. #include "ocrdma_sli.h"
  37. #define OCRDMA_ROCE_DEV_VERSION "1.0.0"
  38. #define OCRDMA_NODE_DESC "Emulex OneConnect RoCE HCA"
  39. #define ocrdma_err(format, arg...) printk(KERN_ERR format, ##arg)
  40. #define OCRDMA_MAX_AH 512
  41. #define OCRDMA_UVERBS(CMD_NAME) (1ull << IB_USER_VERBS_CMD_##CMD_NAME)
  42. struct ocrdma_dev_attr {
  43. u8 fw_ver[32];
  44. u32 vendor_id;
  45. u32 device_id;
  46. u16 max_pd;
  47. u16 max_cq;
  48. u16 max_cqe;
  49. u16 max_qp;
  50. u16 max_wqe;
  51. u16 max_rqe;
  52. u32 max_inline_data;
  53. int max_send_sge;
  54. int max_recv_sge;
  55. int max_mr;
  56. u64 max_mr_size;
  57. u32 max_num_mr_pbl;
  58. int max_fmr;
  59. int max_map_per_fmr;
  60. int max_pages_per_frmr;
  61. u16 max_ord_per_qp;
  62. u16 max_ird_per_qp;
  63. int device_cap_flags;
  64. u8 cq_overflow_detect;
  65. u8 srq_supported;
  66. u32 wqe_size;
  67. u32 rqe_size;
  68. u32 ird_page_size;
  69. u8 local_ca_ack_delay;
  70. u8 ird;
  71. u8 num_ird_pages;
  72. };
  73. struct ocrdma_pbl {
  74. void *va;
  75. dma_addr_t pa;
  76. };
  77. struct ocrdma_queue_info {
  78. void *va;
  79. dma_addr_t dma;
  80. u32 size;
  81. u16 len;
  82. u16 entry_size; /* Size of an element in the queue */
  83. u16 id; /* qid, where to ring the doorbell. */
  84. u16 head, tail;
  85. bool created;
  86. atomic_t used; /* Number of valid elements in the queue */
  87. };
  88. struct ocrdma_eq {
  89. struct ocrdma_queue_info q;
  90. u32 vector;
  91. int cq_cnt;
  92. struct ocrdma_dev *dev;
  93. char irq_name[32];
  94. };
  95. struct ocrdma_mq {
  96. struct ocrdma_queue_info sq;
  97. struct ocrdma_queue_info cq;
  98. bool rearm_cq;
  99. };
  100. struct mqe_ctx {
  101. struct mutex lock; /* for serializing mailbox commands on MQ */
  102. wait_queue_head_t cmd_wait;
  103. u32 tag;
  104. u16 cqe_status;
  105. u16 ext_status;
  106. bool cmd_done;
  107. };
  108. struct ocrdma_dev {
  109. struct ib_device ibdev;
  110. struct ocrdma_dev_attr attr;
  111. struct mutex dev_lock; /* provides syncronise access to device data */
  112. spinlock_t flush_q_lock ____cacheline_aligned;
  113. struct ocrdma_cq **cq_tbl;
  114. struct ocrdma_qp **qp_tbl;
  115. struct ocrdma_eq meq;
  116. struct ocrdma_eq *qp_eq_tbl;
  117. int eq_cnt;
  118. u16 base_eqid;
  119. u16 max_eq;
  120. union ib_gid *sgid_tbl;
  121. /* provided synchronization to sgid table for
  122. * updating gid entries triggered by notifier.
  123. */
  124. spinlock_t sgid_lock;
  125. int gsi_qp_created;
  126. struct ocrdma_cq *gsi_sqcq;
  127. struct ocrdma_cq *gsi_rqcq;
  128. struct {
  129. struct ocrdma_av *va;
  130. dma_addr_t pa;
  131. u32 size;
  132. u32 num_ah;
  133. /* provide synchronization for av
  134. * entry allocations.
  135. */
  136. spinlock_t lock;
  137. u32 ahid;
  138. struct ocrdma_pbl pbl;
  139. } av_tbl;
  140. void *mbx_cmd;
  141. struct ocrdma_mq mq;
  142. struct mqe_ctx mqe_ctx;
  143. struct be_dev_info nic_info;
  144. struct list_head entry;
  145. struct rcu_head rcu;
  146. int id;
  147. };
  148. struct ocrdma_cq {
  149. struct ib_cq ibcq;
  150. struct ocrdma_dev *dev;
  151. struct ocrdma_cqe *va;
  152. u32 phase;
  153. u32 getp; /* pointer to pending wrs to
  154. * return to stack, wrap arounds
  155. * at max_hw_cqe
  156. */
  157. u32 max_hw_cqe;
  158. bool phase_change;
  159. bool armed, solicited;
  160. bool arm_needed;
  161. spinlock_t cq_lock ____cacheline_aligned; /* provide synchronization
  162. * to cq polling
  163. */
  164. /* syncronizes cq completion handler invoked from multiple context */
  165. spinlock_t comp_handler_lock ____cacheline_aligned;
  166. u16 id;
  167. u16 eqn;
  168. struct ocrdma_ucontext *ucontext;
  169. dma_addr_t pa;
  170. u32 len;
  171. atomic_t use_cnt;
  172. /* head of all qp's sq and rq for which cqes need to be flushed
  173. * by the software.
  174. */
  175. struct list_head sq_head, rq_head;
  176. };
  177. struct ocrdma_pd {
  178. struct ib_pd ibpd;
  179. struct ocrdma_dev *dev;
  180. struct ocrdma_ucontext *uctx;
  181. atomic_t use_cnt;
  182. u32 id;
  183. int num_dpp_qp;
  184. u32 dpp_page;
  185. bool dpp_enabled;
  186. };
  187. struct ocrdma_ah {
  188. struct ib_ah ibah;
  189. struct ocrdma_dev *dev;
  190. struct ocrdma_av *av;
  191. u16 sgid_index;
  192. u32 id;
  193. };
  194. struct ocrdma_qp_hwq_info {
  195. u8 *va; /* virtual address */
  196. u32 max_sges;
  197. u32 head, tail;
  198. u32 entry_size;
  199. u32 max_cnt;
  200. u32 max_wqe_idx;
  201. u16 dbid; /* qid, where to ring the doorbell. */
  202. u32 len;
  203. dma_addr_t pa;
  204. };
  205. struct ocrdma_srq {
  206. struct ib_srq ibsrq;
  207. struct ocrdma_dev *dev;
  208. u8 __iomem *db;
  209. /* provide synchronization to multiple context(s) posting rqe */
  210. spinlock_t q_lock ____cacheline_aligned;
  211. struct ocrdma_qp_hwq_info rq;
  212. struct ocrdma_pd *pd;
  213. atomic_t use_cnt;
  214. u32 id;
  215. u64 *rqe_wr_id_tbl;
  216. u32 *idx_bit_fields;
  217. u32 bit_fields_len;
  218. };
  219. struct ocrdma_qp {
  220. struct ib_qp ibqp;
  221. struct ocrdma_dev *dev;
  222. u8 __iomem *sq_db;
  223. /* provide synchronization to multiple context(s) posting wqe, rqe */
  224. spinlock_t q_lock ____cacheline_aligned;
  225. struct ocrdma_qp_hwq_info sq;
  226. struct {
  227. uint64_t wrid;
  228. uint16_t dpp_wqe_idx;
  229. uint16_t dpp_wqe;
  230. uint8_t signaled;
  231. uint8_t rsvd[3];
  232. } *wqe_wr_id_tbl;
  233. u32 max_inline_data;
  234. struct ocrdma_cq *sq_cq;
  235. /* list maintained per CQ to flush SQ errors */
  236. struct list_head sq_entry;
  237. u8 __iomem *rq_db;
  238. struct ocrdma_qp_hwq_info rq;
  239. u64 *rqe_wr_id_tbl;
  240. struct ocrdma_cq *rq_cq;
  241. struct ocrdma_srq *srq;
  242. /* list maintained per CQ to flush RQ errors */
  243. struct list_head rq_entry;
  244. enum ocrdma_qp_state state; /* QP state */
  245. int cap_flags;
  246. u32 max_ord, max_ird;
  247. u32 id;
  248. struct ocrdma_pd *pd;
  249. enum ib_qp_type qp_type;
  250. int sgid_idx;
  251. u32 qkey;
  252. bool dpp_enabled;
  253. u8 *ird_q_va;
  254. };
  255. #define OCRDMA_GET_NUM_POSTED_SHIFT_VAL(qp) \
  256. (((qp->dev->nic_info.dev_family == OCRDMA_GEN2_FAMILY) && \
  257. (qp->id < 64)) ? 24 : 16)
  258. struct ocrdma_hw_mr {
  259. struct ocrdma_dev *dev;
  260. u32 lkey;
  261. u8 fr_mr;
  262. u8 remote_atomic;
  263. u8 remote_rd;
  264. u8 remote_wr;
  265. u8 local_rd;
  266. u8 local_wr;
  267. u8 mw_bind;
  268. u8 rsvd;
  269. u64 len;
  270. struct ocrdma_pbl *pbl_table;
  271. u32 num_pbls;
  272. u32 num_pbes;
  273. u32 pbl_size;
  274. u32 pbe_size;
  275. u64 fbo;
  276. u64 va;
  277. };
  278. struct ocrdma_mr {
  279. struct ib_mr ibmr;
  280. struct ib_umem *umem;
  281. struct ocrdma_hw_mr hwmr;
  282. struct ocrdma_pd *pd;
  283. };
  284. struct ocrdma_ucontext {
  285. struct ib_ucontext ibucontext;
  286. struct ocrdma_dev *dev;
  287. struct list_head mm_head;
  288. struct mutex mm_list_lock; /* protects list entries of mm type */
  289. struct {
  290. u32 *va;
  291. dma_addr_t pa;
  292. u32 len;
  293. } ah_tbl;
  294. };
  295. struct ocrdma_mm {
  296. struct {
  297. u64 phy_addr;
  298. unsigned long len;
  299. } key;
  300. struct list_head entry;
  301. };
  302. static inline struct ocrdma_dev *get_ocrdma_dev(struct ib_device *ibdev)
  303. {
  304. return container_of(ibdev, struct ocrdma_dev, ibdev);
  305. }
  306. static inline struct ocrdma_ucontext *get_ocrdma_ucontext(struct ib_ucontext
  307. *ibucontext)
  308. {
  309. return container_of(ibucontext, struct ocrdma_ucontext, ibucontext);
  310. }
  311. static inline struct ocrdma_pd *get_ocrdma_pd(struct ib_pd *ibpd)
  312. {
  313. return container_of(ibpd, struct ocrdma_pd, ibpd);
  314. }
  315. static inline struct ocrdma_cq *get_ocrdma_cq(struct ib_cq *ibcq)
  316. {
  317. return container_of(ibcq, struct ocrdma_cq, ibcq);
  318. }
  319. static inline struct ocrdma_qp *get_ocrdma_qp(struct ib_qp *ibqp)
  320. {
  321. return container_of(ibqp, struct ocrdma_qp, ibqp);
  322. }
  323. static inline struct ocrdma_mr *get_ocrdma_mr(struct ib_mr *ibmr)
  324. {
  325. return container_of(ibmr, struct ocrdma_mr, ibmr);
  326. }
  327. static inline struct ocrdma_ah *get_ocrdma_ah(struct ib_ah *ibah)
  328. {
  329. return container_of(ibah, struct ocrdma_ah, ibah);
  330. }
  331. static inline struct ocrdma_srq *get_ocrdma_srq(struct ib_srq *ibsrq)
  332. {
  333. return container_of(ibsrq, struct ocrdma_srq, ibsrq);
  334. }
  335. #endif