at91_adc.c 19 KB

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  1. /*
  2. * Driver for the ADC present in the Atmel AT91 evaluation boards.
  3. *
  4. * Copyright 2011 Free Electrons
  5. *
  6. * Licensed under the GPLv2 or later.
  7. */
  8. #include <linux/bitmap.h>
  9. #include <linux/bitops.h>
  10. #include <linux/clk.h>
  11. #include <linux/err.h>
  12. #include <linux/io.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/jiffies.h>
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/of.h>
  18. #include <linux/of_device.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/sched.h>
  21. #include <linux/slab.h>
  22. #include <linux/wait.h>
  23. #include <linux/platform_data/at91_adc.h>
  24. #include <linux/iio/iio.h>
  25. #include <linux/iio/buffer.h>
  26. #include <linux/iio/kfifo_buf.h>
  27. #include <linux/iio/trigger.h>
  28. #include <linux/iio/trigger_consumer.h>
  29. #include <mach/at91_adc.h>
  30. #define AT91_ADC_CHAN(st, ch) \
  31. (st->registers->channel_base + (ch * 4))
  32. #define at91_adc_readl(st, reg) \
  33. (readl_relaxed(st->reg_base + reg))
  34. #define at91_adc_writel(st, reg, val) \
  35. (writel_relaxed(val, st->reg_base + reg))
  36. struct at91_adc_state {
  37. struct clk *adc_clk;
  38. u16 *buffer;
  39. unsigned long channels_mask;
  40. struct clk *clk;
  41. bool done;
  42. int irq;
  43. bool irq_enabled;
  44. u16 last_value;
  45. struct mutex lock;
  46. u8 num_channels;
  47. void __iomem *reg_base;
  48. struct at91_adc_reg_desc *registers;
  49. u8 startup_time;
  50. struct iio_trigger **trig;
  51. struct at91_adc_trigger *trigger_list;
  52. u32 trigger_number;
  53. bool use_external;
  54. u32 vref_mv;
  55. wait_queue_head_t wq_data_avail;
  56. };
  57. static irqreturn_t at91_adc_trigger_handler(int irq, void *p)
  58. {
  59. struct iio_poll_func *pf = p;
  60. struct iio_dev *idev = pf->indio_dev;
  61. struct at91_adc_state *st = iio_priv(idev);
  62. struct iio_buffer *buffer = idev->buffer;
  63. int i, j = 0;
  64. for (i = 0; i < idev->masklength; i++) {
  65. if (!test_bit(i, idev->active_scan_mask))
  66. continue;
  67. st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, i));
  68. j++;
  69. }
  70. if (idev->scan_timestamp) {
  71. s64 *timestamp = (s64 *)((u8 *)st->buffer +
  72. ALIGN(j, sizeof(s64)));
  73. *timestamp = pf->timestamp;
  74. }
  75. buffer->access->store_to(buffer, (u8 *)st->buffer, pf->timestamp);
  76. iio_trigger_notify_done(idev->trig);
  77. st->irq_enabled = true;
  78. /* Needed to ACK the DRDY interruption */
  79. at91_adc_readl(st, AT91_ADC_LCDR);
  80. enable_irq(st->irq);
  81. return IRQ_HANDLED;
  82. }
  83. static irqreturn_t at91_adc_eoc_trigger(int irq, void *private)
  84. {
  85. struct iio_dev *idev = private;
  86. struct at91_adc_state *st = iio_priv(idev);
  87. u32 status = at91_adc_readl(st, st->registers->status_register);
  88. if (!(status & st->registers->drdy_mask))
  89. return IRQ_HANDLED;
  90. if (iio_buffer_enabled(idev)) {
  91. disable_irq_nosync(irq);
  92. st->irq_enabled = false;
  93. iio_trigger_poll(idev->trig, iio_get_time_ns());
  94. } else {
  95. st->last_value = at91_adc_readl(st, AT91_ADC_LCDR);
  96. st->done = true;
  97. wake_up_interruptible(&st->wq_data_avail);
  98. }
  99. return IRQ_HANDLED;
  100. }
  101. static int at91_adc_channel_init(struct iio_dev *idev)
  102. {
  103. struct at91_adc_state *st = iio_priv(idev);
  104. struct iio_chan_spec *chan_array, *timestamp;
  105. int bit, idx = 0;
  106. idev->num_channels = bitmap_weight(&st->channels_mask,
  107. st->num_channels) + 1;
  108. chan_array = devm_kzalloc(&idev->dev,
  109. ((idev->num_channels + 1) *
  110. sizeof(struct iio_chan_spec)),
  111. GFP_KERNEL);
  112. if (!chan_array)
  113. return -ENOMEM;
  114. for_each_set_bit(bit, &st->channels_mask, st->num_channels) {
  115. struct iio_chan_spec *chan = chan_array + idx;
  116. chan->type = IIO_VOLTAGE;
  117. chan->indexed = 1;
  118. chan->channel = bit;
  119. chan->scan_index = idx;
  120. chan->scan_type.sign = 'u';
  121. chan->scan_type.realbits = 10;
  122. chan->scan_type.storagebits = 16;
  123. chan->info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT |
  124. IIO_CHAN_INFO_RAW_SEPARATE_BIT;
  125. idx++;
  126. }
  127. timestamp = chan_array + idx;
  128. timestamp->type = IIO_TIMESTAMP;
  129. timestamp->channel = -1;
  130. timestamp->scan_index = idx;
  131. timestamp->scan_type.sign = 's';
  132. timestamp->scan_type.realbits = 64;
  133. timestamp->scan_type.storagebits = 64;
  134. idev->channels = chan_array;
  135. return idev->num_channels;
  136. }
  137. static u8 at91_adc_get_trigger_value_by_name(struct iio_dev *idev,
  138. struct at91_adc_trigger *triggers,
  139. const char *trigger_name)
  140. {
  141. struct at91_adc_state *st = iio_priv(idev);
  142. u8 value = 0;
  143. int i;
  144. for (i = 0; i < st->trigger_number; i++) {
  145. char *name = kasprintf(GFP_KERNEL,
  146. "%s-dev%d-%s",
  147. idev->name,
  148. idev->id,
  149. triggers[i].name);
  150. if (!name)
  151. return -ENOMEM;
  152. if (strcmp(trigger_name, name) == 0) {
  153. value = triggers[i].value;
  154. kfree(name);
  155. break;
  156. }
  157. kfree(name);
  158. }
  159. return value;
  160. }
  161. static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
  162. {
  163. struct iio_dev *idev = trig->private_data;
  164. struct at91_adc_state *st = iio_priv(idev);
  165. struct iio_buffer *buffer = idev->buffer;
  166. struct at91_adc_reg_desc *reg = st->registers;
  167. u32 status = at91_adc_readl(st, reg->trigger_register);
  168. u8 value;
  169. u8 bit;
  170. value = at91_adc_get_trigger_value_by_name(idev,
  171. st->trigger_list,
  172. idev->trig->name);
  173. if (value == 0)
  174. return -EINVAL;
  175. if (state) {
  176. st->buffer = kmalloc(idev->scan_bytes, GFP_KERNEL);
  177. if (st->buffer == NULL)
  178. return -ENOMEM;
  179. at91_adc_writel(st, reg->trigger_register,
  180. status | value);
  181. for_each_set_bit(bit, buffer->scan_mask,
  182. st->num_channels) {
  183. struct iio_chan_spec const *chan = idev->channels + bit;
  184. at91_adc_writel(st, AT91_ADC_CHER,
  185. AT91_ADC_CH(chan->channel));
  186. }
  187. at91_adc_writel(st, AT91_ADC_IER, reg->drdy_mask);
  188. } else {
  189. at91_adc_writel(st, AT91_ADC_IDR, reg->drdy_mask);
  190. at91_adc_writel(st, reg->trigger_register,
  191. status & ~value);
  192. for_each_set_bit(bit, buffer->scan_mask,
  193. st->num_channels) {
  194. struct iio_chan_spec const *chan = idev->channels + bit;
  195. at91_adc_writel(st, AT91_ADC_CHDR,
  196. AT91_ADC_CH(chan->channel));
  197. }
  198. kfree(st->buffer);
  199. }
  200. return 0;
  201. }
  202. static const struct iio_trigger_ops at91_adc_trigger_ops = {
  203. .owner = THIS_MODULE,
  204. .set_trigger_state = &at91_adc_configure_trigger,
  205. };
  206. static struct iio_trigger *at91_adc_allocate_trigger(struct iio_dev *idev,
  207. struct at91_adc_trigger *trigger)
  208. {
  209. struct iio_trigger *trig;
  210. int ret;
  211. trig = iio_trigger_alloc("%s-dev%d-%s", idev->name,
  212. idev->id, trigger->name);
  213. if (trig == NULL)
  214. return NULL;
  215. trig->dev.parent = idev->dev.parent;
  216. trig->private_data = idev;
  217. trig->ops = &at91_adc_trigger_ops;
  218. ret = iio_trigger_register(trig);
  219. if (ret)
  220. return NULL;
  221. return trig;
  222. }
  223. static int at91_adc_trigger_init(struct iio_dev *idev)
  224. {
  225. struct at91_adc_state *st = iio_priv(idev);
  226. int i, ret;
  227. st->trig = devm_kzalloc(&idev->dev,
  228. st->trigger_number * sizeof(st->trig),
  229. GFP_KERNEL);
  230. if (st->trig == NULL) {
  231. ret = -ENOMEM;
  232. goto error_ret;
  233. }
  234. for (i = 0; i < st->trigger_number; i++) {
  235. if (st->trigger_list[i].is_external && !(st->use_external))
  236. continue;
  237. st->trig[i] = at91_adc_allocate_trigger(idev,
  238. st->trigger_list + i);
  239. if (st->trig[i] == NULL) {
  240. dev_err(&idev->dev,
  241. "Could not allocate trigger %d\n", i);
  242. ret = -ENOMEM;
  243. goto error_trigger;
  244. }
  245. }
  246. return 0;
  247. error_trigger:
  248. for (i--; i >= 0; i--) {
  249. iio_trigger_unregister(st->trig[i]);
  250. iio_trigger_free(st->trig[i]);
  251. }
  252. error_ret:
  253. return ret;
  254. }
  255. static void at91_adc_trigger_remove(struct iio_dev *idev)
  256. {
  257. struct at91_adc_state *st = iio_priv(idev);
  258. int i;
  259. for (i = 0; i < st->trigger_number; i++) {
  260. iio_trigger_unregister(st->trig[i]);
  261. iio_trigger_free(st->trig[i]);
  262. }
  263. }
  264. static const struct iio_buffer_setup_ops at91_adc_buffer_ops = {
  265. .preenable = &iio_sw_buffer_preenable,
  266. .postenable = &iio_triggered_buffer_postenable,
  267. .predisable = &iio_triggered_buffer_predisable,
  268. };
  269. static int at91_adc_buffer_init(struct iio_dev *idev)
  270. {
  271. int ret;
  272. idev->buffer = iio_kfifo_allocate(idev);
  273. if (!idev->buffer) {
  274. ret = -ENOMEM;
  275. goto error_ret;
  276. }
  277. idev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
  278. &at91_adc_trigger_handler,
  279. IRQF_ONESHOT,
  280. idev,
  281. "%s-consumer%d",
  282. idev->name,
  283. idev->id);
  284. if (idev->pollfunc == NULL) {
  285. ret = -ENOMEM;
  286. goto error_pollfunc;
  287. }
  288. idev->setup_ops = &at91_adc_buffer_ops;
  289. idev->modes |= INDIO_BUFFER_TRIGGERED;
  290. ret = iio_buffer_register(idev,
  291. idev->channels,
  292. idev->num_channels);
  293. if (ret)
  294. goto error_register;
  295. return 0;
  296. error_register:
  297. iio_dealloc_pollfunc(idev->pollfunc);
  298. error_pollfunc:
  299. iio_kfifo_free(idev->buffer);
  300. error_ret:
  301. return ret;
  302. }
  303. static void at91_adc_buffer_remove(struct iio_dev *idev)
  304. {
  305. iio_buffer_unregister(idev);
  306. iio_dealloc_pollfunc(idev->pollfunc);
  307. iio_kfifo_free(idev->buffer);
  308. }
  309. static int at91_adc_read_raw(struct iio_dev *idev,
  310. struct iio_chan_spec const *chan,
  311. int *val, int *val2, long mask)
  312. {
  313. struct at91_adc_state *st = iio_priv(idev);
  314. int ret;
  315. switch (mask) {
  316. case IIO_CHAN_INFO_RAW:
  317. mutex_lock(&st->lock);
  318. at91_adc_writel(st, AT91_ADC_CHER,
  319. AT91_ADC_CH(chan->channel));
  320. at91_adc_writel(st, AT91_ADC_IER, st->registers->drdy_mask);
  321. at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_START);
  322. ret = wait_event_interruptible_timeout(st->wq_data_avail,
  323. st->done,
  324. msecs_to_jiffies(1000));
  325. if (ret == 0)
  326. return -ETIMEDOUT;
  327. else if (ret < 0)
  328. return ret;
  329. *val = st->last_value;
  330. at91_adc_writel(st, AT91_ADC_CHDR,
  331. AT91_ADC_CH(chan->channel));
  332. at91_adc_writel(st, AT91_ADC_IDR, st->registers->drdy_mask);
  333. st->last_value = 0;
  334. st->done = false;
  335. mutex_unlock(&st->lock);
  336. return IIO_VAL_INT;
  337. case IIO_CHAN_INFO_SCALE:
  338. *val = (st->vref_mv * 1000) >> chan->scan_type.realbits;
  339. *val2 = 0;
  340. return IIO_VAL_INT_PLUS_MICRO;
  341. default:
  342. break;
  343. }
  344. return -EINVAL;
  345. }
  346. static int at91_adc_probe_dt(struct at91_adc_state *st,
  347. struct platform_device *pdev)
  348. {
  349. struct iio_dev *idev = iio_priv_to_dev(st);
  350. struct device_node *node = pdev->dev.of_node;
  351. struct device_node *trig_node;
  352. int i = 0, ret;
  353. u32 prop;
  354. if (!node)
  355. return -EINVAL;
  356. st->use_external = of_property_read_bool(node, "atmel,adc-use-external-triggers");
  357. if (of_property_read_u32(node, "atmel,adc-channels-used", &prop)) {
  358. dev_err(&idev->dev, "Missing adc-channels-used property in the DT.\n");
  359. ret = -EINVAL;
  360. goto error_ret;
  361. }
  362. st->channels_mask = prop;
  363. if (of_property_read_u32(node, "atmel,adc-num-channels", &prop)) {
  364. dev_err(&idev->dev, "Missing adc-num-channels property in the DT.\n");
  365. ret = -EINVAL;
  366. goto error_ret;
  367. }
  368. st->num_channels = prop;
  369. if (of_property_read_u32(node, "atmel,adc-startup-time", &prop)) {
  370. dev_err(&idev->dev, "Missing adc-startup-time property in the DT.\n");
  371. ret = -EINVAL;
  372. goto error_ret;
  373. }
  374. st->startup_time = prop;
  375. if (of_property_read_u32(node, "atmel,adc-vref", &prop)) {
  376. dev_err(&idev->dev, "Missing adc-vref property in the DT.\n");
  377. ret = -EINVAL;
  378. goto error_ret;
  379. }
  380. st->vref_mv = prop;
  381. st->registers = devm_kzalloc(&idev->dev,
  382. sizeof(struct at91_adc_reg_desc),
  383. GFP_KERNEL);
  384. if (!st->registers) {
  385. dev_err(&idev->dev, "Could not allocate register memory.\n");
  386. ret = -ENOMEM;
  387. goto error_ret;
  388. }
  389. if (of_property_read_u32(node, "atmel,adc-channel-base", &prop)) {
  390. dev_err(&idev->dev, "Missing adc-channel-base property in the DT.\n");
  391. ret = -EINVAL;
  392. goto error_ret;
  393. }
  394. st->registers->channel_base = prop;
  395. if (of_property_read_u32(node, "atmel,adc-drdy-mask", &prop)) {
  396. dev_err(&idev->dev, "Missing adc-drdy-mask property in the DT.\n");
  397. ret = -EINVAL;
  398. goto error_ret;
  399. }
  400. st->registers->drdy_mask = prop;
  401. if (of_property_read_u32(node, "atmel,adc-status-register", &prop)) {
  402. dev_err(&idev->dev, "Missing adc-status-register property in the DT.\n");
  403. ret = -EINVAL;
  404. goto error_ret;
  405. }
  406. st->registers->status_register = prop;
  407. if (of_property_read_u32(node, "atmel,adc-trigger-register", &prop)) {
  408. dev_err(&idev->dev, "Missing adc-trigger-register property in the DT.\n");
  409. ret = -EINVAL;
  410. goto error_ret;
  411. }
  412. st->registers->trigger_register = prop;
  413. st->trigger_number = of_get_child_count(node);
  414. st->trigger_list = devm_kzalloc(&idev->dev, st->trigger_number *
  415. sizeof(struct at91_adc_trigger),
  416. GFP_KERNEL);
  417. if (!st->trigger_list) {
  418. dev_err(&idev->dev, "Could not allocate trigger list memory.\n");
  419. ret = -ENOMEM;
  420. goto error_ret;
  421. }
  422. for_each_child_of_node(node, trig_node) {
  423. struct at91_adc_trigger *trig = st->trigger_list + i;
  424. const char *name;
  425. if (of_property_read_string(trig_node, "trigger-name", &name)) {
  426. dev_err(&idev->dev, "Missing trigger-name property in the DT.\n");
  427. ret = -EINVAL;
  428. goto error_ret;
  429. }
  430. trig->name = name;
  431. if (of_property_read_u32(trig_node, "trigger-value", &prop)) {
  432. dev_err(&idev->dev, "Missing trigger-value property in the DT.\n");
  433. ret = -EINVAL;
  434. goto error_ret;
  435. }
  436. trig->value = prop;
  437. trig->is_external = of_property_read_bool(trig_node, "trigger-external");
  438. i++;
  439. }
  440. return 0;
  441. error_ret:
  442. return ret;
  443. }
  444. static int at91_adc_probe_pdata(struct at91_adc_state *st,
  445. struct platform_device *pdev)
  446. {
  447. struct at91_adc_data *pdata = pdev->dev.platform_data;
  448. if (!pdata)
  449. return -EINVAL;
  450. st->use_external = pdata->use_external_triggers;
  451. st->vref_mv = pdata->vref;
  452. st->channels_mask = pdata->channels_used;
  453. st->num_channels = pdata->num_channels;
  454. st->startup_time = pdata->startup_time;
  455. st->trigger_number = pdata->trigger_number;
  456. st->trigger_list = pdata->trigger_list;
  457. st->registers = pdata->registers;
  458. return 0;
  459. }
  460. static const struct iio_info at91_adc_info = {
  461. .driver_module = THIS_MODULE,
  462. .read_raw = &at91_adc_read_raw,
  463. };
  464. static int __devinit at91_adc_probe(struct platform_device *pdev)
  465. {
  466. unsigned int prsc, mstrclk, ticks, adc_clk;
  467. int ret;
  468. struct iio_dev *idev;
  469. struct at91_adc_state *st;
  470. struct resource *res;
  471. idev = iio_device_alloc(sizeof(struct at91_adc_state));
  472. if (idev == NULL) {
  473. ret = -ENOMEM;
  474. goto error_ret;
  475. }
  476. st = iio_priv(idev);
  477. if (pdev->dev.of_node)
  478. ret = at91_adc_probe_dt(st, pdev);
  479. else
  480. ret = at91_adc_probe_pdata(st, pdev);
  481. if (ret) {
  482. dev_err(&pdev->dev, "No platform data available.\n");
  483. ret = -EINVAL;
  484. goto error_free_device;
  485. }
  486. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  487. if (!res) {
  488. dev_err(&pdev->dev, "No resource defined\n");
  489. ret = -ENXIO;
  490. goto error_ret;
  491. }
  492. platform_set_drvdata(pdev, idev);
  493. idev->dev.parent = &pdev->dev;
  494. idev->name = dev_name(&pdev->dev);
  495. idev->modes = INDIO_DIRECT_MODE;
  496. idev->info = &at91_adc_info;
  497. st->irq = platform_get_irq(pdev, 0);
  498. if (st->irq < 0) {
  499. dev_err(&pdev->dev, "No IRQ ID is designated\n");
  500. ret = -ENODEV;
  501. goto error_free_device;
  502. }
  503. if (!request_mem_region(res->start, resource_size(res),
  504. "AT91 adc registers")) {
  505. dev_err(&pdev->dev, "Resources are unavailable.\n");
  506. ret = -EBUSY;
  507. goto error_free_device;
  508. }
  509. st->reg_base = ioremap(res->start, resource_size(res));
  510. if (!st->reg_base) {
  511. dev_err(&pdev->dev, "Failed to map registers.\n");
  512. ret = -ENOMEM;
  513. goto error_release_mem;
  514. }
  515. /*
  516. * Disable all IRQs before setting up the handler
  517. */
  518. at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_SWRST);
  519. at91_adc_writel(st, AT91_ADC_IDR, 0xFFFFFFFF);
  520. ret = request_irq(st->irq,
  521. at91_adc_eoc_trigger,
  522. 0,
  523. pdev->dev.driver->name,
  524. idev);
  525. if (ret) {
  526. dev_err(&pdev->dev, "Failed to allocate IRQ.\n");
  527. goto error_unmap_reg;
  528. }
  529. st->clk = clk_get(&pdev->dev, "adc_clk");
  530. if (IS_ERR(st->clk)) {
  531. dev_err(&pdev->dev, "Failed to get the clock.\n");
  532. ret = PTR_ERR(st->clk);
  533. goto error_free_irq;
  534. }
  535. ret = clk_prepare(st->clk);
  536. if (ret) {
  537. dev_err(&pdev->dev, "Could not prepare the clock.\n");
  538. goto error_free_clk;
  539. }
  540. ret = clk_enable(st->clk);
  541. if (ret) {
  542. dev_err(&pdev->dev, "Could not enable the clock.\n");
  543. goto error_unprepare_clk;
  544. }
  545. st->adc_clk = clk_get(&pdev->dev, "adc_op_clk");
  546. if (IS_ERR(st->adc_clk)) {
  547. dev_err(&pdev->dev, "Failed to get the ADC clock.\n");
  548. ret = PTR_ERR(st->clk);
  549. goto error_disable_clk;
  550. }
  551. ret = clk_prepare(st->adc_clk);
  552. if (ret) {
  553. dev_err(&pdev->dev, "Could not prepare the ADC clock.\n");
  554. goto error_free_adc_clk;
  555. }
  556. ret = clk_enable(st->adc_clk);
  557. if (ret) {
  558. dev_err(&pdev->dev, "Could not enable the ADC clock.\n");
  559. goto error_unprepare_adc_clk;
  560. }
  561. /*
  562. * Prescaler rate computation using the formula from the Atmel's
  563. * datasheet : ADC Clock = MCK / ((Prescaler + 1) * 2), ADC Clock being
  564. * specified by the electrical characteristics of the board.
  565. */
  566. mstrclk = clk_get_rate(st->clk);
  567. adc_clk = clk_get_rate(st->adc_clk);
  568. prsc = (mstrclk / (2 * adc_clk)) - 1;
  569. if (!st->startup_time) {
  570. dev_err(&pdev->dev, "No startup time available.\n");
  571. ret = -EINVAL;
  572. goto error_disable_adc_clk;
  573. }
  574. /*
  575. * Number of ticks needed to cover the startup time of the ADC as
  576. * defined in the electrical characteristics of the board, divided by 8.
  577. * The formula thus is : Startup Time = (ticks + 1) * 8 / ADC Clock
  578. */
  579. ticks = round_up((st->startup_time * adc_clk /
  580. 1000000) - 1, 8) / 8;
  581. at91_adc_writel(st, AT91_ADC_MR,
  582. (AT91_ADC_PRESCAL_(prsc) & AT91_ADC_PRESCAL) |
  583. (AT91_ADC_STARTUP_(ticks) & AT91_ADC_STARTUP));
  584. /* Setup the ADC channels available on the board */
  585. ret = at91_adc_channel_init(idev);
  586. if (ret < 0) {
  587. dev_err(&pdev->dev, "Couldn't initialize the channels.\n");
  588. goto error_disable_adc_clk;
  589. }
  590. init_waitqueue_head(&st->wq_data_avail);
  591. mutex_init(&st->lock);
  592. ret = at91_adc_buffer_init(idev);
  593. if (ret < 0) {
  594. dev_err(&pdev->dev, "Couldn't initialize the buffer.\n");
  595. goto error_disable_adc_clk;
  596. }
  597. ret = at91_adc_trigger_init(idev);
  598. if (ret < 0) {
  599. dev_err(&pdev->dev, "Couldn't setup the triggers.\n");
  600. goto error_unregister_buffer;
  601. }
  602. ret = iio_device_register(idev);
  603. if (ret < 0) {
  604. dev_err(&pdev->dev, "Couldn't register the device.\n");
  605. goto error_remove_triggers;
  606. }
  607. return 0;
  608. error_remove_triggers:
  609. at91_adc_trigger_remove(idev);
  610. error_unregister_buffer:
  611. at91_adc_buffer_remove(idev);
  612. error_disable_adc_clk:
  613. clk_disable(st->adc_clk);
  614. error_unprepare_adc_clk:
  615. clk_unprepare(st->adc_clk);
  616. error_free_adc_clk:
  617. clk_put(st->adc_clk);
  618. error_disable_clk:
  619. clk_disable(st->clk);
  620. error_unprepare_clk:
  621. clk_unprepare(st->clk);
  622. error_free_clk:
  623. clk_put(st->clk);
  624. error_free_irq:
  625. free_irq(st->irq, idev);
  626. error_unmap_reg:
  627. iounmap(st->reg_base);
  628. error_release_mem:
  629. release_mem_region(res->start, resource_size(res));
  630. error_free_device:
  631. iio_device_free(idev);
  632. error_ret:
  633. return ret;
  634. }
  635. static int __devexit at91_adc_remove(struct platform_device *pdev)
  636. {
  637. struct iio_dev *idev = platform_get_drvdata(pdev);
  638. struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  639. struct at91_adc_state *st = iio_priv(idev);
  640. iio_device_unregister(idev);
  641. at91_adc_trigger_remove(idev);
  642. at91_adc_buffer_remove(idev);
  643. clk_disable_unprepare(st->adc_clk);
  644. clk_put(st->adc_clk);
  645. clk_disable(st->clk);
  646. clk_unprepare(st->clk);
  647. clk_put(st->clk);
  648. free_irq(st->irq, idev);
  649. iounmap(st->reg_base);
  650. release_mem_region(res->start, resource_size(res));
  651. iio_device_free(idev);
  652. return 0;
  653. }
  654. static const struct of_device_id at91_adc_dt_ids[] = {
  655. { .compatible = "atmel,at91sam9260-adc" },
  656. {},
  657. };
  658. MODULE_DEVICE_TABLE(of, at91_adc_dt_ids);
  659. static struct platform_driver at91_adc_driver = {
  660. .probe = at91_adc_probe,
  661. .remove = __devexit_p(at91_adc_remove),
  662. .driver = {
  663. .name = "at91_adc",
  664. .of_match_table = of_match_ptr(at91_adc_dt_ids),
  665. },
  666. };
  667. module_platform_driver(at91_adc_driver);
  668. MODULE_LICENSE("GPL");
  669. MODULE_DESCRIPTION("Atmel AT91 ADC Driver");
  670. MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");