radeon_irq_kms.c 7.4 KB

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  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Jerome Glisse.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Dave Airlie
  25. * Alex Deucher
  26. * Jerome Glisse
  27. */
  28. #include "drmP.h"
  29. #include "drm_crtc_helper.h"
  30. #include "radeon_drm.h"
  31. #include "radeon_reg.h"
  32. #include "radeon.h"
  33. #include "atom.h"
  34. irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
  35. {
  36. struct drm_device *dev = (struct drm_device *) arg;
  37. struct radeon_device *rdev = dev->dev_private;
  38. return radeon_irq_process(rdev);
  39. }
  40. /*
  41. * Handle hotplug events outside the interrupt handler proper.
  42. */
  43. static void radeon_hotplug_work_func(struct work_struct *work)
  44. {
  45. struct radeon_device *rdev = container_of(work, struct radeon_device,
  46. hotplug_work);
  47. struct drm_device *dev = rdev->ddev;
  48. struct drm_mode_config *mode_config = &dev->mode_config;
  49. struct drm_connector *connector;
  50. if (mode_config->num_connector) {
  51. list_for_each_entry(connector, &mode_config->connector_list, head)
  52. radeon_connector_hotplug(connector);
  53. }
  54. /* Just fire off a uevent and let userspace tell us what to do */
  55. drm_helper_hpd_irq_event(dev);
  56. }
  57. void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
  58. {
  59. struct radeon_device *rdev = dev->dev_private;
  60. unsigned i;
  61. /* Disable *all* interrupts */
  62. for (i = 0; i < RADEON_NUM_RINGS; i++)
  63. rdev->irq.sw_int[i] = false;
  64. rdev->irq.gui_idle = false;
  65. for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
  66. rdev->irq.hpd[i] = false;
  67. for (i = 0; i < RADEON_MAX_CRTCS; i++) {
  68. rdev->irq.crtc_vblank_int[i] = false;
  69. rdev->irq.pflip[i] = false;
  70. rdev->irq.afmt[i] = false;
  71. }
  72. radeon_irq_set(rdev);
  73. /* Clear bits */
  74. radeon_irq_process(rdev);
  75. }
  76. int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
  77. {
  78. struct radeon_device *rdev = dev->dev_private;
  79. unsigned i;
  80. dev->max_vblank_count = 0x001fffff;
  81. for (i = 0; i < RADEON_NUM_RINGS; i++)
  82. rdev->irq.sw_int[i] = true;
  83. radeon_irq_set(rdev);
  84. return 0;
  85. }
  86. void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
  87. {
  88. struct radeon_device *rdev = dev->dev_private;
  89. unsigned i;
  90. if (rdev == NULL) {
  91. return;
  92. }
  93. /* Disable *all* interrupts */
  94. for (i = 0; i < RADEON_NUM_RINGS; i++)
  95. rdev->irq.sw_int[i] = false;
  96. rdev->irq.gui_idle = false;
  97. for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
  98. rdev->irq.hpd[i] = false;
  99. for (i = 0; i < RADEON_MAX_CRTCS; i++) {
  100. rdev->irq.crtc_vblank_int[i] = false;
  101. rdev->irq.pflip[i] = false;
  102. rdev->irq.afmt[i] = false;
  103. }
  104. radeon_irq_set(rdev);
  105. }
  106. static bool radeon_msi_ok(struct radeon_device *rdev)
  107. {
  108. /* RV370/RV380 was first asic with MSI support */
  109. if (rdev->family < CHIP_RV380)
  110. return false;
  111. /* MSIs don't work on AGP */
  112. if (rdev->flags & RADEON_IS_AGP)
  113. return false;
  114. /* force MSI on */
  115. if (radeon_msi == 1)
  116. return true;
  117. else if (radeon_msi == 0)
  118. return false;
  119. /* Quirks */
  120. /* HP RS690 only seems to work with MSIs. */
  121. if ((rdev->pdev->device == 0x791f) &&
  122. (rdev->pdev->subsystem_vendor == 0x103c) &&
  123. (rdev->pdev->subsystem_device == 0x30c2))
  124. return true;
  125. /* Dell RS690 only seems to work with MSIs. */
  126. if ((rdev->pdev->device == 0x791f) &&
  127. (rdev->pdev->subsystem_vendor == 0x1028) &&
  128. (rdev->pdev->subsystem_device == 0x01fc))
  129. return true;
  130. /* Dell RS690 only seems to work with MSIs. */
  131. if ((rdev->pdev->device == 0x791f) &&
  132. (rdev->pdev->subsystem_vendor == 0x1028) &&
  133. (rdev->pdev->subsystem_device == 0x01fd))
  134. return true;
  135. /* RV515 seems to have MSI issues where it loses
  136. * MSI rearms occasionally. This leads to lockups and freezes.
  137. * disable it by default.
  138. */
  139. if (rdev->family == CHIP_RV515)
  140. return false;
  141. if (rdev->flags & RADEON_IS_IGP) {
  142. /* APUs work fine with MSIs */
  143. if (rdev->family >= CHIP_PALM)
  144. return true;
  145. /* lots of IGPs have problems with MSIs */
  146. return false;
  147. }
  148. return true;
  149. }
  150. int radeon_irq_kms_init(struct radeon_device *rdev)
  151. {
  152. int i;
  153. int r = 0;
  154. INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
  155. INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
  156. spin_lock_init(&rdev->irq.sw_lock);
  157. for (i = 0; i < rdev->num_crtc; i++)
  158. spin_lock_init(&rdev->irq.pflip_lock[i]);
  159. r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
  160. if (r) {
  161. return r;
  162. }
  163. /* enable msi */
  164. rdev->msi_enabled = 0;
  165. if (radeon_msi_ok(rdev)) {
  166. int ret = pci_enable_msi(rdev->pdev);
  167. if (!ret) {
  168. rdev->msi_enabled = 1;
  169. dev_info(rdev->dev, "radeon: using MSI.\n");
  170. }
  171. }
  172. rdev->irq.installed = true;
  173. r = drm_irq_install(rdev->ddev);
  174. if (r) {
  175. rdev->irq.installed = false;
  176. return r;
  177. }
  178. DRM_INFO("radeon: irq initialized.\n");
  179. return 0;
  180. }
  181. void radeon_irq_kms_fini(struct radeon_device *rdev)
  182. {
  183. drm_vblank_cleanup(rdev->ddev);
  184. if (rdev->irq.installed) {
  185. drm_irq_uninstall(rdev->ddev);
  186. rdev->irq.installed = false;
  187. if (rdev->msi_enabled)
  188. pci_disable_msi(rdev->pdev);
  189. }
  190. flush_work_sync(&rdev->hotplug_work);
  191. }
  192. void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
  193. {
  194. unsigned long irqflags;
  195. spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
  196. if (rdev->ddev->irq_enabled && (++rdev->irq.sw_refcount[ring] == 1)) {
  197. rdev->irq.sw_int[ring] = true;
  198. radeon_irq_set(rdev);
  199. }
  200. spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
  201. }
  202. void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
  203. {
  204. unsigned long irqflags;
  205. spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
  206. BUG_ON(rdev->ddev->irq_enabled && rdev->irq.sw_refcount[ring] <= 0);
  207. if (rdev->ddev->irq_enabled && (--rdev->irq.sw_refcount[ring] == 0)) {
  208. rdev->irq.sw_int[ring] = false;
  209. radeon_irq_set(rdev);
  210. }
  211. spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
  212. }
  213. void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
  214. {
  215. unsigned long irqflags;
  216. if (crtc < 0 || crtc >= rdev->num_crtc)
  217. return;
  218. spin_lock_irqsave(&rdev->irq.pflip_lock[crtc], irqflags);
  219. if (rdev->ddev->irq_enabled && (++rdev->irq.pflip_refcount[crtc] == 1)) {
  220. rdev->irq.pflip[crtc] = true;
  221. radeon_irq_set(rdev);
  222. }
  223. spin_unlock_irqrestore(&rdev->irq.pflip_lock[crtc], irqflags);
  224. }
  225. void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
  226. {
  227. unsigned long irqflags;
  228. if (crtc < 0 || crtc >= rdev->num_crtc)
  229. return;
  230. spin_lock_irqsave(&rdev->irq.pflip_lock[crtc], irqflags);
  231. BUG_ON(rdev->ddev->irq_enabled && rdev->irq.pflip_refcount[crtc] <= 0);
  232. if (rdev->ddev->irq_enabled && (--rdev->irq.pflip_refcount[crtc] == 0)) {
  233. rdev->irq.pflip[crtc] = false;
  234. radeon_irq_set(rdev);
  235. }
  236. spin_unlock_irqrestore(&rdev->irq.pflip_lock[crtc], irqflags);
  237. }