radeon_gem.c 14 KB

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  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Jerome Glisse.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Dave Airlie
  25. * Alex Deucher
  26. * Jerome Glisse
  27. */
  28. #include "drmP.h"
  29. #include "drm.h"
  30. #include "radeon_drm.h"
  31. #include "radeon.h"
  32. int radeon_gem_object_init(struct drm_gem_object *obj)
  33. {
  34. BUG();
  35. return 0;
  36. }
  37. void radeon_gem_object_free(struct drm_gem_object *gobj)
  38. {
  39. struct radeon_bo *robj = gem_to_radeon_bo(gobj);
  40. if (robj) {
  41. if (robj->gem_base.import_attach)
  42. drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
  43. radeon_bo_unref(&robj);
  44. }
  45. }
  46. int radeon_gem_object_create(struct radeon_device *rdev, int size,
  47. int alignment, int initial_domain,
  48. bool discardable, bool kernel,
  49. struct drm_gem_object **obj)
  50. {
  51. struct radeon_bo *robj;
  52. int r;
  53. *obj = NULL;
  54. /* At least align on page size */
  55. if (alignment < PAGE_SIZE) {
  56. alignment = PAGE_SIZE;
  57. }
  58. r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, NULL, &robj);
  59. if (r) {
  60. if (r != -ERESTARTSYS)
  61. DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
  62. size, initial_domain, alignment, r);
  63. return r;
  64. }
  65. *obj = &robj->gem_base;
  66. mutex_lock(&rdev->gem.mutex);
  67. list_add_tail(&robj->list, &rdev->gem.objects);
  68. mutex_unlock(&rdev->gem.mutex);
  69. return 0;
  70. }
  71. int radeon_gem_set_domain(struct drm_gem_object *gobj,
  72. uint32_t rdomain, uint32_t wdomain)
  73. {
  74. struct radeon_bo *robj;
  75. uint32_t domain;
  76. int r;
  77. /* FIXME: reeimplement */
  78. robj = gem_to_radeon_bo(gobj);
  79. /* work out where to validate the buffer to */
  80. domain = wdomain;
  81. if (!domain) {
  82. domain = rdomain;
  83. }
  84. if (!domain) {
  85. /* Do nothings */
  86. printk(KERN_WARNING "Set domain without domain !\n");
  87. return 0;
  88. }
  89. if (domain == RADEON_GEM_DOMAIN_CPU) {
  90. /* Asking for cpu access wait for object idle */
  91. r = radeon_bo_wait(robj, NULL, false);
  92. if (r) {
  93. printk(KERN_ERR "Failed to wait for object !\n");
  94. return r;
  95. }
  96. }
  97. return 0;
  98. }
  99. int radeon_gem_init(struct radeon_device *rdev)
  100. {
  101. INIT_LIST_HEAD(&rdev->gem.objects);
  102. return 0;
  103. }
  104. void radeon_gem_fini(struct radeon_device *rdev)
  105. {
  106. radeon_bo_force_delete(rdev);
  107. }
  108. /*
  109. * Call from drm_gem_handle_create which appear in both new and open ioctl
  110. * case.
  111. */
  112. int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
  113. {
  114. return 0;
  115. }
  116. void radeon_gem_object_close(struct drm_gem_object *obj,
  117. struct drm_file *file_priv)
  118. {
  119. struct radeon_bo *rbo = gem_to_radeon_bo(obj);
  120. struct radeon_device *rdev = rbo->rdev;
  121. struct radeon_fpriv *fpriv = file_priv->driver_priv;
  122. struct radeon_vm *vm = &fpriv->vm;
  123. struct radeon_bo_va *bo_va, *tmp;
  124. if (rdev->family < CHIP_CAYMAN) {
  125. return;
  126. }
  127. if (radeon_bo_reserve(rbo, false)) {
  128. return;
  129. }
  130. list_for_each_entry_safe(bo_va, tmp, &rbo->va, bo_list) {
  131. if (bo_va->vm == vm) {
  132. /* remove from this vm address space */
  133. mutex_lock(&vm->mutex);
  134. list_del(&bo_va->vm_list);
  135. mutex_unlock(&vm->mutex);
  136. list_del(&bo_va->bo_list);
  137. kfree(bo_va);
  138. }
  139. }
  140. radeon_bo_unreserve(rbo);
  141. }
  142. static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
  143. {
  144. if (r == -EDEADLK) {
  145. radeon_mutex_lock(&rdev->cs_mutex);
  146. r = radeon_gpu_reset(rdev);
  147. if (!r)
  148. r = -EAGAIN;
  149. radeon_mutex_unlock(&rdev->cs_mutex);
  150. }
  151. return r;
  152. }
  153. /*
  154. * GEM ioctls.
  155. */
  156. int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
  157. struct drm_file *filp)
  158. {
  159. struct radeon_device *rdev = dev->dev_private;
  160. struct drm_radeon_gem_info *args = data;
  161. struct ttm_mem_type_manager *man;
  162. unsigned i;
  163. man = &rdev->mman.bdev.man[TTM_PL_VRAM];
  164. args->vram_size = rdev->mc.real_vram_size;
  165. args->vram_visible = (u64)man->size << PAGE_SHIFT;
  166. if (rdev->stollen_vga_memory)
  167. args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
  168. args->vram_visible -= radeon_fbdev_total_size(rdev);
  169. args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE*64*1024;
  170. for(i = 0; i < RADEON_NUM_RINGS; ++i)
  171. args->gart_size -= rdev->ring[i].ring_size;
  172. return 0;
  173. }
  174. int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
  175. struct drm_file *filp)
  176. {
  177. /* TODO: implement */
  178. DRM_ERROR("unimplemented %s\n", __func__);
  179. return -ENOSYS;
  180. }
  181. int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
  182. struct drm_file *filp)
  183. {
  184. /* TODO: implement */
  185. DRM_ERROR("unimplemented %s\n", __func__);
  186. return -ENOSYS;
  187. }
  188. int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
  189. struct drm_file *filp)
  190. {
  191. struct radeon_device *rdev = dev->dev_private;
  192. struct drm_radeon_gem_create *args = data;
  193. struct drm_gem_object *gobj;
  194. uint32_t handle;
  195. int r;
  196. /* create a gem object to contain this object in */
  197. args->size = roundup(args->size, PAGE_SIZE);
  198. r = radeon_gem_object_create(rdev, args->size, args->alignment,
  199. args->initial_domain, false,
  200. false, &gobj);
  201. if (r) {
  202. r = radeon_gem_handle_lockup(rdev, r);
  203. return r;
  204. }
  205. r = drm_gem_handle_create(filp, gobj, &handle);
  206. /* drop reference from allocate - handle holds it now */
  207. drm_gem_object_unreference_unlocked(gobj);
  208. if (r) {
  209. r = radeon_gem_handle_lockup(rdev, r);
  210. return r;
  211. }
  212. args->handle = handle;
  213. return 0;
  214. }
  215. int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
  216. struct drm_file *filp)
  217. {
  218. /* transition the BO to a domain -
  219. * just validate the BO into a certain domain */
  220. struct drm_radeon_gem_set_domain *args = data;
  221. struct drm_gem_object *gobj;
  222. struct radeon_bo *robj;
  223. int r;
  224. /* for now if someone requests domain CPU -
  225. * just make sure the buffer is finished with */
  226. /* just do a BO wait for now */
  227. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  228. if (gobj == NULL) {
  229. return -ENOENT;
  230. }
  231. robj = gem_to_radeon_bo(gobj);
  232. r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
  233. drm_gem_object_unreference_unlocked(gobj);
  234. r = radeon_gem_handle_lockup(robj->rdev, r);
  235. return r;
  236. }
  237. int radeon_mode_dumb_mmap(struct drm_file *filp,
  238. struct drm_device *dev,
  239. uint32_t handle, uint64_t *offset_p)
  240. {
  241. struct drm_gem_object *gobj;
  242. struct radeon_bo *robj;
  243. gobj = drm_gem_object_lookup(dev, filp, handle);
  244. if (gobj == NULL) {
  245. return -ENOENT;
  246. }
  247. robj = gem_to_radeon_bo(gobj);
  248. *offset_p = radeon_bo_mmap_offset(robj);
  249. drm_gem_object_unreference_unlocked(gobj);
  250. return 0;
  251. }
  252. int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
  253. struct drm_file *filp)
  254. {
  255. struct drm_radeon_gem_mmap *args = data;
  256. return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
  257. }
  258. int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
  259. struct drm_file *filp)
  260. {
  261. struct drm_radeon_gem_busy *args = data;
  262. struct drm_gem_object *gobj;
  263. struct radeon_bo *robj;
  264. int r;
  265. uint32_t cur_placement = 0;
  266. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  267. if (gobj == NULL) {
  268. return -ENOENT;
  269. }
  270. robj = gem_to_radeon_bo(gobj);
  271. r = radeon_bo_wait(robj, &cur_placement, true);
  272. switch (cur_placement) {
  273. case TTM_PL_VRAM:
  274. args->domain = RADEON_GEM_DOMAIN_VRAM;
  275. break;
  276. case TTM_PL_TT:
  277. args->domain = RADEON_GEM_DOMAIN_GTT;
  278. break;
  279. case TTM_PL_SYSTEM:
  280. args->domain = RADEON_GEM_DOMAIN_CPU;
  281. default:
  282. break;
  283. }
  284. drm_gem_object_unreference_unlocked(gobj);
  285. r = radeon_gem_handle_lockup(robj->rdev, r);
  286. return r;
  287. }
  288. int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
  289. struct drm_file *filp)
  290. {
  291. struct drm_radeon_gem_wait_idle *args = data;
  292. struct drm_gem_object *gobj;
  293. struct radeon_bo *robj;
  294. int r;
  295. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  296. if (gobj == NULL) {
  297. return -ENOENT;
  298. }
  299. robj = gem_to_radeon_bo(gobj);
  300. r = radeon_bo_wait(robj, NULL, false);
  301. /* callback hw specific functions if any */
  302. if (robj->rdev->asic->ioctl_wait_idle)
  303. robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
  304. drm_gem_object_unreference_unlocked(gobj);
  305. r = radeon_gem_handle_lockup(robj->rdev, r);
  306. return r;
  307. }
  308. int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
  309. struct drm_file *filp)
  310. {
  311. struct drm_radeon_gem_set_tiling *args = data;
  312. struct drm_gem_object *gobj;
  313. struct radeon_bo *robj;
  314. int r = 0;
  315. DRM_DEBUG("%d \n", args->handle);
  316. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  317. if (gobj == NULL)
  318. return -ENOENT;
  319. robj = gem_to_radeon_bo(gobj);
  320. r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
  321. drm_gem_object_unreference_unlocked(gobj);
  322. return r;
  323. }
  324. int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
  325. struct drm_file *filp)
  326. {
  327. struct drm_radeon_gem_get_tiling *args = data;
  328. struct drm_gem_object *gobj;
  329. struct radeon_bo *rbo;
  330. int r = 0;
  331. DRM_DEBUG("\n");
  332. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  333. if (gobj == NULL)
  334. return -ENOENT;
  335. rbo = gem_to_radeon_bo(gobj);
  336. r = radeon_bo_reserve(rbo, false);
  337. if (unlikely(r != 0))
  338. goto out;
  339. radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
  340. radeon_bo_unreserve(rbo);
  341. out:
  342. drm_gem_object_unreference_unlocked(gobj);
  343. return r;
  344. }
  345. int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
  346. struct drm_file *filp)
  347. {
  348. struct drm_radeon_gem_va *args = data;
  349. struct drm_gem_object *gobj;
  350. struct radeon_device *rdev = dev->dev_private;
  351. struct radeon_fpriv *fpriv = filp->driver_priv;
  352. struct radeon_bo *rbo;
  353. struct radeon_bo_va *bo_va;
  354. u32 invalid_flags;
  355. int r = 0;
  356. if (!rdev->vm_manager.enabled) {
  357. args->operation = RADEON_VA_RESULT_ERROR;
  358. return -ENOTTY;
  359. }
  360. /* !! DONT REMOVE !!
  361. * We don't support vm_id yet, to be sure we don't have have broken
  362. * userspace, reject anyone trying to use non 0 value thus moving
  363. * forward we can use those fields without breaking existant userspace
  364. */
  365. if (args->vm_id) {
  366. args->operation = RADEON_VA_RESULT_ERROR;
  367. return -EINVAL;
  368. }
  369. if (args->offset < RADEON_VA_RESERVED_SIZE) {
  370. dev_err(&dev->pdev->dev,
  371. "offset 0x%lX is in reserved area 0x%X\n",
  372. (unsigned long)args->offset,
  373. RADEON_VA_RESERVED_SIZE);
  374. args->operation = RADEON_VA_RESULT_ERROR;
  375. return -EINVAL;
  376. }
  377. /* don't remove, we need to enforce userspace to set the snooped flag
  378. * otherwise we will endup with broken userspace and we won't be able
  379. * to enable this feature without adding new interface
  380. */
  381. invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
  382. if ((args->flags & invalid_flags)) {
  383. dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
  384. args->flags, invalid_flags);
  385. args->operation = RADEON_VA_RESULT_ERROR;
  386. return -EINVAL;
  387. }
  388. if (!(args->flags & RADEON_VM_PAGE_SNOOPED)) {
  389. dev_err(&dev->pdev->dev, "only supported snooped mapping for now\n");
  390. args->operation = RADEON_VA_RESULT_ERROR;
  391. return -EINVAL;
  392. }
  393. switch (args->operation) {
  394. case RADEON_VA_MAP:
  395. case RADEON_VA_UNMAP:
  396. break;
  397. default:
  398. dev_err(&dev->pdev->dev, "unsupported operation %d\n",
  399. args->operation);
  400. args->operation = RADEON_VA_RESULT_ERROR;
  401. return -EINVAL;
  402. }
  403. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  404. if (gobj == NULL) {
  405. args->operation = RADEON_VA_RESULT_ERROR;
  406. return -ENOENT;
  407. }
  408. rbo = gem_to_radeon_bo(gobj);
  409. r = radeon_bo_reserve(rbo, false);
  410. if (r) {
  411. args->operation = RADEON_VA_RESULT_ERROR;
  412. drm_gem_object_unreference_unlocked(gobj);
  413. return r;
  414. }
  415. switch (args->operation) {
  416. case RADEON_VA_MAP:
  417. bo_va = radeon_bo_va(rbo, &fpriv->vm);
  418. if (bo_va) {
  419. args->operation = RADEON_VA_RESULT_VA_EXIST;
  420. args->offset = bo_va->soffset;
  421. goto out;
  422. }
  423. r = radeon_vm_bo_add(rdev, &fpriv->vm, rbo,
  424. args->offset, args->flags);
  425. break;
  426. case RADEON_VA_UNMAP:
  427. r = radeon_vm_bo_rmv(rdev, &fpriv->vm, rbo);
  428. break;
  429. default:
  430. break;
  431. }
  432. args->operation = RADEON_VA_RESULT_OK;
  433. if (r) {
  434. args->operation = RADEON_VA_RESULT_ERROR;
  435. }
  436. out:
  437. radeon_bo_unreserve(rbo);
  438. drm_gem_object_unreference_unlocked(gobj);
  439. return r;
  440. }
  441. int radeon_mode_dumb_create(struct drm_file *file_priv,
  442. struct drm_device *dev,
  443. struct drm_mode_create_dumb *args)
  444. {
  445. struct radeon_device *rdev = dev->dev_private;
  446. struct drm_gem_object *gobj;
  447. uint32_t handle;
  448. int r;
  449. args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
  450. args->size = args->pitch * args->height;
  451. args->size = ALIGN(args->size, PAGE_SIZE);
  452. r = radeon_gem_object_create(rdev, args->size, 0,
  453. RADEON_GEM_DOMAIN_VRAM,
  454. false, ttm_bo_type_device,
  455. &gobj);
  456. if (r)
  457. return -ENOMEM;
  458. r = drm_gem_handle_create(file_priv, gobj, &handle);
  459. /* drop reference from allocate - handle holds it now */
  460. drm_gem_object_unreference_unlocked(gobj);
  461. if (r) {
  462. return r;
  463. }
  464. args->handle = handle;
  465. return 0;
  466. }
  467. int radeon_mode_dumb_destroy(struct drm_file *file_priv,
  468. struct drm_device *dev,
  469. uint32_t handle)
  470. {
  471. return drm_gem_handle_delete(file_priv, handle);
  472. }