intel_lvds.c 32 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include "drmP.h"
  34. #include "drm.h"
  35. #include "drm_crtc.h"
  36. #include "drm_edid.h"
  37. #include "intel_drv.h"
  38. #include "i915_drm.h"
  39. #include "i915_drv.h"
  40. #include <linux/acpi.h>
  41. /* Private structure for the integrated LVDS support */
  42. struct intel_lvds {
  43. struct intel_encoder base;
  44. struct edid *edid;
  45. int fitting_mode;
  46. u32 pfit_control;
  47. u32 pfit_pgm_ratios;
  48. bool pfit_dirty;
  49. struct drm_display_mode *fixed_mode;
  50. };
  51. static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
  52. {
  53. return container_of(encoder, struct intel_lvds, base.base);
  54. }
  55. static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
  56. {
  57. return container_of(intel_attached_encoder(connector),
  58. struct intel_lvds, base);
  59. }
  60. /**
  61. * Sets the power state for the panel.
  62. */
  63. static void intel_lvds_enable(struct intel_lvds *intel_lvds)
  64. {
  65. struct drm_device *dev = intel_lvds->base.base.dev;
  66. struct drm_i915_private *dev_priv = dev->dev_private;
  67. u32 ctl_reg, lvds_reg, stat_reg;
  68. if (HAS_PCH_SPLIT(dev)) {
  69. ctl_reg = PCH_PP_CONTROL;
  70. lvds_reg = PCH_LVDS;
  71. stat_reg = PCH_PP_STATUS;
  72. } else {
  73. ctl_reg = PP_CONTROL;
  74. lvds_reg = LVDS;
  75. stat_reg = PP_STATUS;
  76. }
  77. I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  78. if (intel_lvds->pfit_dirty) {
  79. /*
  80. * Enable automatic panel scaling so that non-native modes
  81. * fill the screen. The panel fitter should only be
  82. * adjusted whilst the pipe is disabled, according to
  83. * register description and PRM.
  84. */
  85. DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  86. intel_lvds->pfit_control,
  87. intel_lvds->pfit_pgm_ratios);
  88. I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
  89. I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
  90. intel_lvds->pfit_dirty = false;
  91. }
  92. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  93. POSTING_READ(lvds_reg);
  94. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  95. DRM_ERROR("timed out waiting for panel to power on\n");
  96. intel_panel_enable_backlight(dev);
  97. }
  98. static void intel_lvds_disable(struct intel_lvds *intel_lvds)
  99. {
  100. struct drm_device *dev = intel_lvds->base.base.dev;
  101. struct drm_i915_private *dev_priv = dev->dev_private;
  102. u32 ctl_reg, lvds_reg, stat_reg;
  103. if (HAS_PCH_SPLIT(dev)) {
  104. ctl_reg = PCH_PP_CONTROL;
  105. lvds_reg = PCH_LVDS;
  106. stat_reg = PCH_PP_STATUS;
  107. } else {
  108. ctl_reg = PP_CONTROL;
  109. lvds_reg = LVDS;
  110. stat_reg = PP_STATUS;
  111. }
  112. intel_panel_disable_backlight(dev);
  113. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  114. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  115. DRM_ERROR("timed out waiting for panel to power off\n");
  116. if (intel_lvds->pfit_control) {
  117. I915_WRITE(PFIT_CONTROL, 0);
  118. intel_lvds->pfit_dirty = true;
  119. }
  120. I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
  121. POSTING_READ(lvds_reg);
  122. }
  123. static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
  124. {
  125. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  126. if (mode == DRM_MODE_DPMS_ON)
  127. intel_lvds_enable(intel_lvds);
  128. else
  129. intel_lvds_disable(intel_lvds);
  130. /* XXX: We never power down the LVDS pairs. */
  131. }
  132. static int intel_lvds_mode_valid(struct drm_connector *connector,
  133. struct drm_display_mode *mode)
  134. {
  135. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  136. struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
  137. if (mode->hdisplay > fixed_mode->hdisplay)
  138. return MODE_PANEL;
  139. if (mode->vdisplay > fixed_mode->vdisplay)
  140. return MODE_PANEL;
  141. return MODE_OK;
  142. }
  143. static void
  144. centre_horizontally(struct drm_display_mode *mode,
  145. int width)
  146. {
  147. u32 border, sync_pos, blank_width, sync_width;
  148. /* keep the hsync and hblank widths constant */
  149. sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  150. blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  151. sync_pos = (blank_width - sync_width + 1) / 2;
  152. border = (mode->hdisplay - width + 1) / 2;
  153. border += border & 1; /* make the border even */
  154. mode->crtc_hdisplay = width;
  155. mode->crtc_hblank_start = width + border;
  156. mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  157. mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  158. mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  159. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  160. }
  161. static void
  162. centre_vertically(struct drm_display_mode *mode,
  163. int height)
  164. {
  165. u32 border, sync_pos, blank_width, sync_width;
  166. /* keep the vsync and vblank widths constant */
  167. sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  168. blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  169. sync_pos = (blank_width - sync_width + 1) / 2;
  170. border = (mode->vdisplay - height + 1) / 2;
  171. mode->crtc_vdisplay = height;
  172. mode->crtc_vblank_start = height + border;
  173. mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  174. mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  175. mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  176. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  177. }
  178. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  179. {
  180. /*
  181. * Floating point operation is not supported. So the FACTOR
  182. * is defined, which can avoid the floating point computation
  183. * when calculating the panel ratio.
  184. */
  185. #define ACCURACY 12
  186. #define FACTOR (1 << ACCURACY)
  187. u32 ratio = source * FACTOR / target;
  188. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  189. }
  190. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  191. struct drm_display_mode *mode,
  192. struct drm_display_mode *adjusted_mode)
  193. {
  194. struct drm_device *dev = encoder->dev;
  195. struct drm_i915_private *dev_priv = dev->dev_private;
  196. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  197. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  198. struct drm_encoder *tmp_encoder;
  199. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  200. int pipe;
  201. /* Should never happen!! */
  202. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  203. DRM_ERROR("Can't support LVDS on pipe A\n");
  204. return false;
  205. }
  206. /* Should never happen!! */
  207. list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
  208. if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
  209. DRM_ERROR("Can't enable LVDS and another "
  210. "encoder on the same pipe\n");
  211. return false;
  212. }
  213. }
  214. /*
  215. * We have timings from the BIOS for the panel, put them in
  216. * to the adjusted mode. The CRTC will be set up for this mode,
  217. * with the panel scaling set up to source from the H/VDisplay
  218. * of the original mode.
  219. */
  220. intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
  221. if (HAS_PCH_SPLIT(dev)) {
  222. intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
  223. mode, adjusted_mode);
  224. return true;
  225. }
  226. /* Native modes don't need fitting */
  227. if (adjusted_mode->hdisplay == mode->hdisplay &&
  228. adjusted_mode->vdisplay == mode->vdisplay)
  229. goto out;
  230. /* 965+ wants fuzzy fitting */
  231. if (INTEL_INFO(dev)->gen >= 4)
  232. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  233. PFIT_FILTER_FUZZY);
  234. /*
  235. * Enable automatic panel scaling for non-native modes so that they fill
  236. * the screen. Should be enabled before the pipe is enabled, according
  237. * to register description and PRM.
  238. * Change the value here to see the borders for debugging
  239. */
  240. for_each_pipe(pipe)
  241. I915_WRITE(BCLRPAT(pipe), 0);
  242. drm_mode_set_crtcinfo(adjusted_mode, 0);
  243. switch (intel_lvds->fitting_mode) {
  244. case DRM_MODE_SCALE_CENTER:
  245. /*
  246. * For centered modes, we have to calculate border widths &
  247. * heights and modify the values programmed into the CRTC.
  248. */
  249. centre_horizontally(adjusted_mode, mode->hdisplay);
  250. centre_vertically(adjusted_mode, mode->vdisplay);
  251. border = LVDS_BORDER_ENABLE;
  252. break;
  253. case DRM_MODE_SCALE_ASPECT:
  254. /* Scale but preserve the aspect ratio */
  255. if (INTEL_INFO(dev)->gen >= 4) {
  256. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  257. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  258. /* 965+ is easy, it does everything in hw */
  259. if (scaled_width > scaled_height)
  260. pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
  261. else if (scaled_width < scaled_height)
  262. pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
  263. else if (adjusted_mode->hdisplay != mode->hdisplay)
  264. pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  265. } else {
  266. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  267. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  268. /*
  269. * For earlier chips we have to calculate the scaling
  270. * ratio by hand and program it into the
  271. * PFIT_PGM_RATIO register
  272. */
  273. if (scaled_width > scaled_height) { /* pillar */
  274. centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
  275. border = LVDS_BORDER_ENABLE;
  276. if (mode->vdisplay != adjusted_mode->vdisplay) {
  277. u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
  278. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  279. bits << PFIT_VERT_SCALE_SHIFT);
  280. pfit_control |= (PFIT_ENABLE |
  281. VERT_INTERP_BILINEAR |
  282. HORIZ_INTERP_BILINEAR);
  283. }
  284. } else if (scaled_width < scaled_height) { /* letter */
  285. centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
  286. border = LVDS_BORDER_ENABLE;
  287. if (mode->hdisplay != adjusted_mode->hdisplay) {
  288. u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
  289. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  290. bits << PFIT_VERT_SCALE_SHIFT);
  291. pfit_control |= (PFIT_ENABLE |
  292. VERT_INTERP_BILINEAR |
  293. HORIZ_INTERP_BILINEAR);
  294. }
  295. } else
  296. /* Aspects match, Let hw scale both directions */
  297. pfit_control |= (PFIT_ENABLE |
  298. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  299. VERT_INTERP_BILINEAR |
  300. HORIZ_INTERP_BILINEAR);
  301. }
  302. break;
  303. case DRM_MODE_SCALE_FULLSCREEN:
  304. /*
  305. * Full scaling, even if it changes the aspect ratio.
  306. * Fortunately this is all done for us in hw.
  307. */
  308. if (mode->vdisplay != adjusted_mode->vdisplay ||
  309. mode->hdisplay != adjusted_mode->hdisplay) {
  310. pfit_control |= PFIT_ENABLE;
  311. if (INTEL_INFO(dev)->gen >= 4)
  312. pfit_control |= PFIT_SCALING_AUTO;
  313. else
  314. pfit_control |= (VERT_AUTO_SCALE |
  315. VERT_INTERP_BILINEAR |
  316. HORIZ_AUTO_SCALE |
  317. HORIZ_INTERP_BILINEAR);
  318. }
  319. break;
  320. default:
  321. break;
  322. }
  323. out:
  324. /* If not enabling scaling, be consistent and always use 0. */
  325. if ((pfit_control & PFIT_ENABLE) == 0) {
  326. pfit_control = 0;
  327. pfit_pgm_ratios = 0;
  328. }
  329. /* Make sure pre-965 set dither correctly */
  330. if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
  331. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  332. if (pfit_control != intel_lvds->pfit_control ||
  333. pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
  334. intel_lvds->pfit_control = pfit_control;
  335. intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
  336. intel_lvds->pfit_dirty = true;
  337. }
  338. dev_priv->lvds_border_bits = border;
  339. /*
  340. * XXX: It would be nice to support lower refresh rates on the
  341. * panels to reduce power consumption, and perhaps match the
  342. * user's requested refresh rate.
  343. */
  344. return true;
  345. }
  346. static void intel_lvds_prepare(struct drm_encoder *encoder)
  347. {
  348. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  349. /*
  350. * Prior to Ironlake, we must disable the pipe if we want to adjust
  351. * the panel fitter. However at all other times we can just reset
  352. * the registers regardless.
  353. */
  354. if (!HAS_PCH_SPLIT(encoder->dev) && intel_lvds->pfit_dirty)
  355. intel_lvds_disable(intel_lvds);
  356. }
  357. static void intel_lvds_commit(struct drm_encoder *encoder)
  358. {
  359. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  360. /* Always do a full power on as we do not know what state
  361. * we were left in.
  362. */
  363. intel_lvds_enable(intel_lvds);
  364. }
  365. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  366. struct drm_display_mode *mode,
  367. struct drm_display_mode *adjusted_mode)
  368. {
  369. /*
  370. * The LVDS pin pair will already have been turned on in the
  371. * intel_crtc_mode_set since it has a large impact on the DPLL
  372. * settings.
  373. */
  374. }
  375. /**
  376. * Detect the LVDS connection.
  377. *
  378. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  379. * connected and closed means disconnected. We also send hotplug events as
  380. * needed, using lid status notification from the input layer.
  381. */
  382. static enum drm_connector_status
  383. intel_lvds_detect(struct drm_connector *connector, bool force)
  384. {
  385. struct drm_device *dev = connector->dev;
  386. enum drm_connector_status status;
  387. status = intel_panel_detect(dev);
  388. if (status != connector_status_unknown)
  389. return status;
  390. return connector_status_connected;
  391. }
  392. /**
  393. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  394. */
  395. static int intel_lvds_get_modes(struct drm_connector *connector)
  396. {
  397. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  398. struct drm_device *dev = connector->dev;
  399. struct drm_display_mode *mode;
  400. if (intel_lvds->edid)
  401. return drm_add_edid_modes(connector, intel_lvds->edid);
  402. mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
  403. if (mode == NULL)
  404. return 0;
  405. drm_mode_probed_add(connector, mode);
  406. return 1;
  407. }
  408. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  409. {
  410. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  411. return 1;
  412. }
  413. /* The GPU hangs up on these systems if modeset is performed on LID open */
  414. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  415. {
  416. .callback = intel_no_modeset_on_lid_dmi_callback,
  417. .ident = "Toshiba Tecra A11",
  418. .matches = {
  419. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  420. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  421. },
  422. },
  423. { } /* terminating entry */
  424. };
  425. /*
  426. * Lid events. Note the use of 'modeset_on_lid':
  427. * - we set it on lid close, and reset it on open
  428. * - we use it as a "only once" bit (ie we ignore
  429. * duplicate events where it was already properly
  430. * set/reset)
  431. * - the suspend/resume paths will also set it to
  432. * zero, since they restore the mode ("lid open").
  433. */
  434. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  435. void *unused)
  436. {
  437. struct drm_i915_private *dev_priv =
  438. container_of(nb, struct drm_i915_private, lid_notifier);
  439. struct drm_device *dev = dev_priv->dev;
  440. struct drm_connector *connector = dev_priv->int_lvds_connector;
  441. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  442. return NOTIFY_OK;
  443. /*
  444. * check and update the status of LVDS connector after receiving
  445. * the LID nofication event.
  446. */
  447. if (connector)
  448. connector->status = connector->funcs->detect(connector,
  449. false);
  450. /* Don't force modeset on machines where it causes a GPU lockup */
  451. if (dmi_check_system(intel_no_modeset_on_lid))
  452. return NOTIFY_OK;
  453. if (!acpi_lid_open()) {
  454. dev_priv->modeset_on_lid = 1;
  455. return NOTIFY_OK;
  456. }
  457. if (!dev_priv->modeset_on_lid)
  458. return NOTIFY_OK;
  459. dev_priv->modeset_on_lid = 0;
  460. mutex_lock(&dev->mode_config.mutex);
  461. drm_helper_resume_force_mode(dev);
  462. mutex_unlock(&dev->mode_config.mutex);
  463. return NOTIFY_OK;
  464. }
  465. /**
  466. * intel_lvds_destroy - unregister and free LVDS structures
  467. * @connector: connector to free
  468. *
  469. * Unregister the DDC bus for this connector then free the driver private
  470. * structure.
  471. */
  472. static void intel_lvds_destroy(struct drm_connector *connector)
  473. {
  474. struct drm_device *dev = connector->dev;
  475. struct drm_i915_private *dev_priv = dev->dev_private;
  476. intel_panel_destroy_backlight(dev);
  477. if (dev_priv->lid_notifier.notifier_call)
  478. acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
  479. drm_sysfs_connector_remove(connector);
  480. drm_connector_cleanup(connector);
  481. kfree(connector);
  482. }
  483. static int intel_lvds_set_property(struct drm_connector *connector,
  484. struct drm_property *property,
  485. uint64_t value)
  486. {
  487. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  488. struct drm_device *dev = connector->dev;
  489. if (property == dev->mode_config.scaling_mode_property) {
  490. struct drm_crtc *crtc = intel_lvds->base.base.crtc;
  491. if (value == DRM_MODE_SCALE_NONE) {
  492. DRM_DEBUG_KMS("no scaling not supported\n");
  493. return -EINVAL;
  494. }
  495. if (intel_lvds->fitting_mode == value) {
  496. /* the LVDS scaling property is not changed */
  497. return 0;
  498. }
  499. intel_lvds->fitting_mode = value;
  500. if (crtc && crtc->enabled) {
  501. /*
  502. * If the CRTC is enabled, the display will be changed
  503. * according to the new panel fitting mode.
  504. */
  505. drm_crtc_helper_set_mode(crtc, &crtc->mode,
  506. crtc->x, crtc->y, crtc->fb);
  507. }
  508. }
  509. return 0;
  510. }
  511. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  512. .dpms = intel_lvds_dpms,
  513. .mode_fixup = intel_lvds_mode_fixup,
  514. .prepare = intel_lvds_prepare,
  515. .mode_set = intel_lvds_mode_set,
  516. .commit = intel_lvds_commit,
  517. };
  518. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  519. .get_modes = intel_lvds_get_modes,
  520. .mode_valid = intel_lvds_mode_valid,
  521. .best_encoder = intel_best_encoder,
  522. };
  523. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  524. .dpms = drm_helper_connector_dpms,
  525. .detect = intel_lvds_detect,
  526. .fill_modes = drm_helper_probe_single_connector_modes,
  527. .set_property = intel_lvds_set_property,
  528. .destroy = intel_lvds_destroy,
  529. };
  530. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  531. .destroy = intel_encoder_destroy,
  532. };
  533. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  534. {
  535. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  536. return 1;
  537. }
  538. /* These systems claim to have LVDS, but really don't */
  539. static const struct dmi_system_id intel_no_lvds[] = {
  540. {
  541. .callback = intel_no_lvds_dmi_callback,
  542. .ident = "Apple Mac Mini (Core series)",
  543. .matches = {
  544. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  545. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  546. },
  547. },
  548. {
  549. .callback = intel_no_lvds_dmi_callback,
  550. .ident = "Apple Mac Mini (Core 2 series)",
  551. .matches = {
  552. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  553. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  554. },
  555. },
  556. {
  557. .callback = intel_no_lvds_dmi_callback,
  558. .ident = "MSI IM-945GSE-A",
  559. .matches = {
  560. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  561. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  562. },
  563. },
  564. {
  565. .callback = intel_no_lvds_dmi_callback,
  566. .ident = "Dell Studio Hybrid",
  567. .matches = {
  568. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  569. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  570. },
  571. },
  572. {
  573. .callback = intel_no_lvds_dmi_callback,
  574. .ident = "Dell OptiPlex FX170",
  575. .matches = {
  576. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  577. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  578. },
  579. },
  580. {
  581. .callback = intel_no_lvds_dmi_callback,
  582. .ident = "AOpen Mini PC",
  583. .matches = {
  584. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  585. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  586. },
  587. },
  588. {
  589. .callback = intel_no_lvds_dmi_callback,
  590. .ident = "AOpen Mini PC MP915",
  591. .matches = {
  592. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  593. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  594. },
  595. },
  596. {
  597. .callback = intel_no_lvds_dmi_callback,
  598. .ident = "AOpen i915GMm-HFS",
  599. .matches = {
  600. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  601. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  602. },
  603. },
  604. {
  605. .callback = intel_no_lvds_dmi_callback,
  606. .ident = "AOpen i45GMx-I",
  607. .matches = {
  608. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  609. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  610. },
  611. },
  612. {
  613. .callback = intel_no_lvds_dmi_callback,
  614. .ident = "Aopen i945GTt-VFA",
  615. .matches = {
  616. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  617. },
  618. },
  619. {
  620. .callback = intel_no_lvds_dmi_callback,
  621. .ident = "Clientron U800",
  622. .matches = {
  623. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  624. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  625. },
  626. },
  627. {
  628. .callback = intel_no_lvds_dmi_callback,
  629. .ident = "Clientron E830",
  630. .matches = {
  631. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  632. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  633. },
  634. },
  635. {
  636. .callback = intel_no_lvds_dmi_callback,
  637. .ident = "Asus EeeBox PC EB1007",
  638. .matches = {
  639. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  640. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  641. },
  642. },
  643. {
  644. .callback = intel_no_lvds_dmi_callback,
  645. .ident = "Asus AT5NM10T-I",
  646. .matches = {
  647. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  648. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  649. },
  650. },
  651. {
  652. .callback = intel_no_lvds_dmi_callback,
  653. .ident = "Hewlett-Packard HP t5740e Thin Client",
  654. .matches = {
  655. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  656. DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
  657. },
  658. },
  659. {
  660. .callback = intel_no_lvds_dmi_callback,
  661. .ident = "Hewlett-Packard t5745",
  662. .matches = {
  663. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  664. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  665. },
  666. },
  667. {
  668. .callback = intel_no_lvds_dmi_callback,
  669. .ident = "Hewlett-Packard st5747",
  670. .matches = {
  671. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  672. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  673. },
  674. },
  675. {
  676. .callback = intel_no_lvds_dmi_callback,
  677. .ident = "MSI Wind Box DC500",
  678. .matches = {
  679. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  680. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  681. },
  682. },
  683. { } /* terminating entry */
  684. };
  685. /**
  686. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  687. * @dev: drm device
  688. * @connector: LVDS connector
  689. *
  690. * Find the reduced downclock for LVDS in EDID.
  691. */
  692. static void intel_find_lvds_downclock(struct drm_device *dev,
  693. struct drm_display_mode *fixed_mode,
  694. struct drm_connector *connector)
  695. {
  696. struct drm_i915_private *dev_priv = dev->dev_private;
  697. struct drm_display_mode *scan;
  698. int temp_downclock;
  699. temp_downclock = fixed_mode->clock;
  700. list_for_each_entry(scan, &connector->probed_modes, head) {
  701. /*
  702. * If one mode has the same resolution with the fixed_panel
  703. * mode while they have the different refresh rate, it means
  704. * that the reduced downclock is found for the LVDS. In such
  705. * case we can set the different FPx0/1 to dynamically select
  706. * between low and high frequency.
  707. */
  708. if (scan->hdisplay == fixed_mode->hdisplay &&
  709. scan->hsync_start == fixed_mode->hsync_start &&
  710. scan->hsync_end == fixed_mode->hsync_end &&
  711. scan->htotal == fixed_mode->htotal &&
  712. scan->vdisplay == fixed_mode->vdisplay &&
  713. scan->vsync_start == fixed_mode->vsync_start &&
  714. scan->vsync_end == fixed_mode->vsync_end &&
  715. scan->vtotal == fixed_mode->vtotal) {
  716. if (scan->clock < temp_downclock) {
  717. /*
  718. * The downclock is already found. But we
  719. * expect to find the lower downclock.
  720. */
  721. temp_downclock = scan->clock;
  722. }
  723. }
  724. }
  725. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  726. /* We found the downclock for LVDS. */
  727. dev_priv->lvds_downclock_avail = 1;
  728. dev_priv->lvds_downclock = temp_downclock;
  729. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  730. "Normal clock %dKhz, downclock %dKhz\n",
  731. fixed_mode->clock, temp_downclock);
  732. }
  733. }
  734. /*
  735. * Enumerate the child dev array parsed from VBT to check whether
  736. * the LVDS is present.
  737. * If it is present, return 1.
  738. * If it is not present, return false.
  739. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  740. */
  741. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  742. u8 *i2c_pin)
  743. {
  744. struct drm_i915_private *dev_priv = dev->dev_private;
  745. int i;
  746. if (!dev_priv->child_dev_num)
  747. return true;
  748. for (i = 0; i < dev_priv->child_dev_num; i++) {
  749. struct child_device_config *child = dev_priv->child_dev + i;
  750. /* If the device type is not LFP, continue.
  751. * We have to check both the new identifiers as well as the
  752. * old for compatibility with some BIOSes.
  753. */
  754. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  755. child->device_type != DEVICE_TYPE_LFP)
  756. continue;
  757. if (intel_gmbus_is_port_valid(child->i2c_pin))
  758. *i2c_pin = child->i2c_pin;
  759. /* However, we cannot trust the BIOS writers to populate
  760. * the VBT correctly. Since LVDS requires additional
  761. * information from AIM blocks, a non-zero addin offset is
  762. * a good indicator that the LVDS is actually present.
  763. */
  764. if (child->addin_offset)
  765. return true;
  766. /* But even then some BIOS writers perform some black magic
  767. * and instantiate the device without reference to any
  768. * additional data. Trust that if the VBT was written into
  769. * the OpRegion then they have validated the LVDS's existence.
  770. */
  771. if (dev_priv->opregion.vbt)
  772. return true;
  773. }
  774. return false;
  775. }
  776. static bool intel_lvds_supported(struct drm_device *dev)
  777. {
  778. /* With the introduction of the PCH we gained a dedicated
  779. * LVDS presence pin, use it. */
  780. if (HAS_PCH_SPLIT(dev))
  781. return true;
  782. /* Otherwise LVDS was only attached to mobile products,
  783. * except for the inglorious 830gm */
  784. return IS_MOBILE(dev) && !IS_I830(dev);
  785. }
  786. /**
  787. * intel_lvds_init - setup LVDS connectors on this device
  788. * @dev: drm device
  789. *
  790. * Create the connector, register the LVDS DDC bus, and try to figure out what
  791. * modes we can display on the LVDS panel (if present).
  792. */
  793. bool intel_lvds_init(struct drm_device *dev)
  794. {
  795. struct drm_i915_private *dev_priv = dev->dev_private;
  796. struct intel_lvds *intel_lvds;
  797. struct intel_encoder *intel_encoder;
  798. struct intel_connector *intel_connector;
  799. struct drm_connector *connector;
  800. struct drm_encoder *encoder;
  801. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  802. struct drm_crtc *crtc;
  803. u32 lvds;
  804. int pipe;
  805. u8 pin;
  806. if (!intel_lvds_supported(dev))
  807. return false;
  808. /* Skip init on machines we know falsely report LVDS */
  809. if (dmi_check_system(intel_no_lvds))
  810. return false;
  811. pin = GMBUS_PORT_PANEL;
  812. if (!lvds_is_present_in_vbt(dev, &pin)) {
  813. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  814. return false;
  815. }
  816. if (HAS_PCH_SPLIT(dev)) {
  817. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  818. return false;
  819. if (dev_priv->edp.support) {
  820. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  821. return false;
  822. }
  823. }
  824. intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
  825. if (!intel_lvds) {
  826. return false;
  827. }
  828. intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
  829. if (!intel_connector) {
  830. kfree(intel_lvds);
  831. return false;
  832. }
  833. if (!HAS_PCH_SPLIT(dev)) {
  834. intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
  835. }
  836. intel_encoder = &intel_lvds->base;
  837. encoder = &intel_encoder->base;
  838. connector = &intel_connector->base;
  839. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  840. DRM_MODE_CONNECTOR_LVDS);
  841. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  842. DRM_MODE_ENCODER_LVDS);
  843. intel_connector_attach_encoder(intel_connector, intel_encoder);
  844. intel_encoder->type = INTEL_OUTPUT_LVDS;
  845. intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
  846. if (HAS_PCH_SPLIT(dev))
  847. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  848. else
  849. intel_encoder->crtc_mask = (1 << 1);
  850. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  851. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  852. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  853. connector->interlace_allowed = false;
  854. connector->doublescan_allowed = false;
  855. /* create the scaling mode property */
  856. drm_mode_create_scaling_mode_property(dev);
  857. /*
  858. * the initial panel fitting mode will be FULL_SCREEN.
  859. */
  860. drm_connector_attach_property(&intel_connector->base,
  861. dev->mode_config.scaling_mode_property,
  862. DRM_MODE_SCALE_ASPECT);
  863. intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
  864. /*
  865. * LVDS discovery:
  866. * 1) check for EDID on DDC
  867. * 2) check for VBT data
  868. * 3) check to see if LVDS is already on
  869. * if none of the above, no panel
  870. * 4) make sure lid is open
  871. * if closed, act like it's not there for now
  872. */
  873. /*
  874. * Attempt to get the fixed panel mode from DDC. Assume that the
  875. * preferred mode is the right one.
  876. */
  877. intel_lvds->edid = drm_get_edid(connector,
  878. intel_gmbus_get_adapter(dev_priv,
  879. pin));
  880. if (intel_lvds->edid) {
  881. if (drm_add_edid_modes(connector,
  882. intel_lvds->edid)) {
  883. drm_mode_connector_update_edid_property(connector,
  884. intel_lvds->edid);
  885. } else {
  886. kfree(intel_lvds->edid);
  887. intel_lvds->edid = NULL;
  888. }
  889. }
  890. if (!intel_lvds->edid) {
  891. /* Didn't get an EDID, so
  892. * Set wide sync ranges so we get all modes
  893. * handed to valid_mode for checking
  894. */
  895. connector->display_info.min_vfreq = 0;
  896. connector->display_info.max_vfreq = 200;
  897. connector->display_info.min_hfreq = 0;
  898. connector->display_info.max_hfreq = 200;
  899. }
  900. list_for_each_entry(scan, &connector->probed_modes, head) {
  901. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  902. intel_lvds->fixed_mode =
  903. drm_mode_duplicate(dev, scan);
  904. intel_find_lvds_downclock(dev,
  905. intel_lvds->fixed_mode,
  906. connector);
  907. goto out;
  908. }
  909. }
  910. /* Failed to get EDID, what about VBT? */
  911. if (dev_priv->lfp_lvds_vbt_mode) {
  912. intel_lvds->fixed_mode =
  913. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  914. if (intel_lvds->fixed_mode) {
  915. intel_lvds->fixed_mode->type |=
  916. DRM_MODE_TYPE_PREFERRED;
  917. goto out;
  918. }
  919. }
  920. /*
  921. * If we didn't get EDID, try checking if the panel is already turned
  922. * on. If so, assume that whatever is currently programmed is the
  923. * correct mode.
  924. */
  925. /* Ironlake: FIXME if still fail, not try pipe mode now */
  926. if (HAS_PCH_SPLIT(dev))
  927. goto failed;
  928. lvds = I915_READ(LVDS);
  929. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  930. crtc = intel_get_crtc_for_pipe(dev, pipe);
  931. if (crtc && (lvds & LVDS_PORT_EN)) {
  932. intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
  933. if (intel_lvds->fixed_mode) {
  934. intel_lvds->fixed_mode->type |=
  935. DRM_MODE_TYPE_PREFERRED;
  936. goto out;
  937. }
  938. }
  939. /* If we still don't have a mode after all that, give up. */
  940. if (!intel_lvds->fixed_mode)
  941. goto failed;
  942. out:
  943. if (HAS_PCH_SPLIT(dev)) {
  944. u32 pwm;
  945. pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0;
  946. /* make sure PWM is enabled and locked to the LVDS pipe */
  947. pwm = I915_READ(BLC_PWM_CPU_CTL2);
  948. if (pipe == 0 && (pwm & PWM_PIPE_B))
  949. I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~PWM_ENABLE);
  950. if (pipe)
  951. pwm |= PWM_PIPE_B;
  952. else
  953. pwm &= ~PWM_PIPE_B;
  954. I915_WRITE(BLC_PWM_CPU_CTL2, pwm | PWM_ENABLE);
  955. pwm = I915_READ(BLC_PWM_PCH_CTL1);
  956. pwm |= PWM_PCH_ENABLE;
  957. I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
  958. /*
  959. * Unlock registers and just
  960. * leave them unlocked
  961. */
  962. I915_WRITE(PCH_PP_CONTROL,
  963. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  964. } else {
  965. /*
  966. * Unlock registers and just
  967. * leave them unlocked
  968. */
  969. I915_WRITE(PP_CONTROL,
  970. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  971. }
  972. dev_priv->lid_notifier.notifier_call = intel_lid_notify;
  973. if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
  974. DRM_DEBUG_KMS("lid notifier registration failed\n");
  975. dev_priv->lid_notifier.notifier_call = NULL;
  976. }
  977. /* keep the LVDS connector */
  978. dev_priv->int_lvds_connector = connector;
  979. drm_sysfs_connector_add(connector);
  980. intel_panel_setup_backlight(dev);
  981. return true;
  982. failed:
  983. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  984. drm_connector_cleanup(connector);
  985. drm_encoder_cleanup(encoder);
  986. kfree(intel_lvds);
  987. kfree(intel_connector);
  988. return false;
  989. }