psb_drv.c 19 KB

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  1. /**************************************************************************
  2. * Copyright (c) 2007-2011, Intel Corporation.
  3. * All Rights Reserved.
  4. * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
  5. * All Rights Reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms and conditions of the GNU General Public License,
  9. * version 2, as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. **************************************************************************/
  21. #include <drm/drmP.h>
  22. #include <drm/drm.h>
  23. #include "gma_drm.h"
  24. #include "psb_drv.h"
  25. #include "framebuffer.h"
  26. #include "psb_reg.h"
  27. #include "psb_intel_reg.h"
  28. #include "intel_bios.h"
  29. #include "mid_bios.h"
  30. #include <drm/drm_pciids.h>
  31. #include "power.h"
  32. #include <linux/cpu.h>
  33. #include <linux/notifier.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/pm_runtime.h>
  36. #include <acpi/video.h>
  37. #include <linux/module.h>
  38. static int drm_psb_trap_pagefaults;
  39. static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  40. MODULE_PARM_DESC(trap_pagefaults, "Error and reset on MMU pagefaults");
  41. module_param_named(trap_pagefaults, drm_psb_trap_pagefaults, int, 0600);
  42. static DEFINE_PCI_DEVICE_TABLE(pciidlist) = {
  43. { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
  44. { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
  45. #if defined(CONFIG_DRM_GMA600)
  46. { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  47. { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  48. { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  49. { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  50. { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  51. { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  52. { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  53. { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  54. /* Atom E620 */
  55. { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
  56. #endif
  57. #if defined(CONFIG_DRM_MEDFIELD)
  58. {0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  59. {0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  60. {0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  61. {0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  62. {0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  63. {0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  64. {0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  65. {0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  66. #endif
  67. #if defined(CONFIG_DRM_GMA3600)
  68. { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  69. { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  70. { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  71. { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  72. { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  73. { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  74. { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  75. { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  76. { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  77. { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  78. { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  79. { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  80. { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  81. { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  82. { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  83. { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  84. #endif
  85. { 0, }
  86. };
  87. MODULE_DEVICE_TABLE(pci, pciidlist);
  88. /*
  89. * Standard IOCTLs.
  90. */
  91. #define DRM_IOCTL_GMA_ADB \
  92. DRM_IOWR(DRM_GMA_ADB + DRM_COMMAND_BASE, uint32_t)
  93. #define DRM_IOCTL_GMA_MODE_OPERATION \
  94. DRM_IOWR(DRM_GMA_MODE_OPERATION + DRM_COMMAND_BASE, \
  95. struct drm_psb_mode_operation_arg)
  96. #define DRM_IOCTL_GMA_STOLEN_MEMORY \
  97. DRM_IOWR(DRM_GMA_STOLEN_MEMORY + DRM_COMMAND_BASE, \
  98. struct drm_psb_stolen_memory_arg)
  99. #define DRM_IOCTL_GMA_GAMMA \
  100. DRM_IOWR(DRM_GMA_GAMMA + DRM_COMMAND_BASE, \
  101. struct drm_psb_dpst_lut_arg)
  102. #define DRM_IOCTL_GMA_DPST_BL \
  103. DRM_IOWR(DRM_GMA_DPST_BL + DRM_COMMAND_BASE, \
  104. uint32_t)
  105. #define DRM_IOCTL_GMA_GET_PIPE_FROM_CRTC_ID \
  106. DRM_IOWR(DRM_GMA_GET_PIPE_FROM_CRTC_ID + DRM_COMMAND_BASE, \
  107. struct drm_psb_get_pipe_from_crtc_id_arg)
  108. #define DRM_IOCTL_GMA_GEM_CREATE \
  109. DRM_IOWR(DRM_GMA_GEM_CREATE + DRM_COMMAND_BASE, \
  110. struct drm_psb_gem_create)
  111. #define DRM_IOCTL_GMA_GEM_MMAP \
  112. DRM_IOWR(DRM_GMA_GEM_MMAP + DRM_COMMAND_BASE, \
  113. struct drm_psb_gem_mmap)
  114. static int psb_adb_ioctl(struct drm_device *dev, void *data,
  115. struct drm_file *file_priv);
  116. static int psb_mode_operation_ioctl(struct drm_device *dev, void *data,
  117. struct drm_file *file_priv);
  118. static int psb_stolen_memory_ioctl(struct drm_device *dev, void *data,
  119. struct drm_file *file_priv);
  120. static int psb_gamma_ioctl(struct drm_device *dev, void *data,
  121. struct drm_file *file_priv);
  122. static int psb_dpst_bl_ioctl(struct drm_device *dev, void *data,
  123. struct drm_file *file_priv);
  124. static struct drm_ioctl_desc psb_ioctls[] = {
  125. DRM_IOCTL_DEF_DRV(GMA_ADB, psb_adb_ioctl, DRM_AUTH),
  126. DRM_IOCTL_DEF_DRV(GMA_MODE_OPERATION, psb_mode_operation_ioctl,
  127. DRM_AUTH),
  128. DRM_IOCTL_DEF_DRV(GMA_STOLEN_MEMORY, psb_stolen_memory_ioctl,
  129. DRM_AUTH),
  130. DRM_IOCTL_DEF_DRV(GMA_GAMMA, psb_gamma_ioctl, DRM_AUTH),
  131. DRM_IOCTL_DEF_DRV(GMA_DPST_BL, psb_dpst_bl_ioctl, DRM_AUTH),
  132. DRM_IOCTL_DEF_DRV(GMA_GET_PIPE_FROM_CRTC_ID,
  133. psb_intel_get_pipe_from_crtc_id, 0),
  134. DRM_IOCTL_DEF_DRV(GMA_GEM_CREATE, psb_gem_create_ioctl,
  135. DRM_UNLOCKED | DRM_AUTH),
  136. DRM_IOCTL_DEF_DRV(GMA_GEM_MMAP, psb_gem_mmap_ioctl,
  137. DRM_UNLOCKED | DRM_AUTH),
  138. };
  139. static void psb_lastclose(struct drm_device *dev)
  140. {
  141. return;
  142. }
  143. static int psb_do_init(struct drm_device *dev)
  144. {
  145. struct drm_psb_private *dev_priv = dev->dev_private;
  146. struct psb_gtt *pg = &dev_priv->gtt;
  147. uint32_t stolen_gtt;
  148. int ret = -ENOMEM;
  149. if (pg->mmu_gatt_start & 0x0FFFFFFF) {
  150. dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
  151. ret = -EINVAL;
  152. goto out_err;
  153. }
  154. stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
  155. stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
  156. stolen_gtt =
  157. (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
  158. dev_priv->gatt_free_offset = pg->mmu_gatt_start +
  159. (stolen_gtt << PAGE_SHIFT) * 1024;
  160. spin_lock_init(&dev_priv->irqmask_lock);
  161. spin_lock_init(&dev_priv->lock_2d);
  162. PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
  163. PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
  164. PSB_RSGX32(PSB_CR_BIF_BANK1);
  165. PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_MMU_ER_MASK,
  166. PSB_CR_BIF_CTRL);
  167. psb_spank(dev_priv);
  168. /* mmu_gatt ?? */
  169. PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
  170. return 0;
  171. out_err:
  172. return ret;
  173. }
  174. static int psb_driver_unload(struct drm_device *dev)
  175. {
  176. struct drm_psb_private *dev_priv = dev->dev_private;
  177. /* Kill vblank etc here */
  178. if (dev_priv) {
  179. if (dev_priv->backlight_device)
  180. gma_backlight_exit(dev);
  181. psb_modeset_cleanup(dev);
  182. if (dev_priv->ops->chip_teardown)
  183. dev_priv->ops->chip_teardown(dev);
  184. psb_intel_opregion_fini(dev);
  185. if (dev_priv->pf_pd) {
  186. psb_mmu_free_pagedir(dev_priv->pf_pd);
  187. dev_priv->pf_pd = NULL;
  188. }
  189. if (dev_priv->mmu) {
  190. struct psb_gtt *pg = &dev_priv->gtt;
  191. down_read(&pg->sem);
  192. psb_mmu_remove_pfn_sequence(
  193. psb_mmu_get_default_pd
  194. (dev_priv->mmu),
  195. pg->mmu_gatt_start,
  196. dev_priv->vram_stolen_size >> PAGE_SHIFT);
  197. up_read(&pg->sem);
  198. psb_mmu_driver_takedown(dev_priv->mmu);
  199. dev_priv->mmu = NULL;
  200. }
  201. psb_gtt_takedown(dev);
  202. if (dev_priv->scratch_page) {
  203. set_pages_wb(dev_priv->scratch_page, 1);
  204. __free_page(dev_priv->scratch_page);
  205. dev_priv->scratch_page = NULL;
  206. }
  207. if (dev_priv->vdc_reg) {
  208. iounmap(dev_priv->vdc_reg);
  209. dev_priv->vdc_reg = NULL;
  210. }
  211. if (dev_priv->sgx_reg) {
  212. iounmap(dev_priv->sgx_reg);
  213. dev_priv->sgx_reg = NULL;
  214. }
  215. /* Destroy VBT data */
  216. psb_intel_destroy_bios(dev);
  217. kfree(dev_priv);
  218. dev->dev_private = NULL;
  219. }
  220. gma_power_uninit(dev);
  221. return 0;
  222. }
  223. static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
  224. {
  225. struct drm_psb_private *dev_priv;
  226. unsigned long resource_start;
  227. unsigned long irqflags;
  228. int ret = -ENOMEM;
  229. struct drm_connector *connector;
  230. struct psb_intel_encoder *psb_intel_encoder;
  231. dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
  232. if (dev_priv == NULL)
  233. return -ENOMEM;
  234. dev_priv->ops = (struct psb_ops *)chipset;
  235. dev_priv->dev = dev;
  236. dev->dev_private = (void *) dev_priv;
  237. pci_set_master(dev->pdev);
  238. dev_priv->num_pipe = dev_priv->ops->pipes;
  239. resource_start = pci_resource_start(dev->pdev, PSB_MMIO_RESOURCE);
  240. dev_priv->vdc_reg =
  241. ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
  242. if (!dev_priv->vdc_reg)
  243. goto out_err;
  244. dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
  245. PSB_SGX_SIZE);
  246. if (!dev_priv->sgx_reg)
  247. goto out_err;
  248. psb_intel_opregion_setup(dev);
  249. ret = dev_priv->ops->chip_setup(dev);
  250. if (ret)
  251. goto out_err;
  252. /* Init OSPM support */
  253. gma_power_init(dev);
  254. ret = -ENOMEM;
  255. dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
  256. if (!dev_priv->scratch_page)
  257. goto out_err;
  258. set_pages_uc(dev_priv->scratch_page, 1);
  259. ret = psb_gtt_init(dev, 0);
  260. if (ret)
  261. goto out_err;
  262. dev_priv->mmu = psb_mmu_driver_init((void *)0,
  263. drm_psb_trap_pagefaults, 0,
  264. dev_priv);
  265. if (!dev_priv->mmu)
  266. goto out_err;
  267. dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
  268. if (!dev_priv->pf_pd)
  269. goto out_err;
  270. psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
  271. psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
  272. ret = psb_do_init(dev);
  273. if (ret)
  274. return ret;
  275. PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
  276. PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
  277. acpi_video_register();
  278. ret = drm_vblank_init(dev, dev_priv->num_pipe);
  279. if (ret)
  280. goto out_err;
  281. /*
  282. * Install interrupt handlers prior to powering off SGX or else we will
  283. * crash.
  284. */
  285. dev_priv->vdc_irq_mask = 0;
  286. dev_priv->pipestat[0] = 0;
  287. dev_priv->pipestat[1] = 0;
  288. dev_priv->pipestat[2] = 0;
  289. spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
  290. PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
  291. PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
  292. PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
  293. spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
  294. drm_irq_install(dev);
  295. dev->vblank_disable_allowed = 1;
  296. dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
  297. dev->driver->get_vblank_counter = psb_get_vblank_counter;
  298. psb_modeset_init(dev);
  299. psb_fbdev_init(dev);
  300. drm_kms_helper_poll_init(dev);
  301. /* Only add backlight support if we have LVDS output */
  302. list_for_each_entry(connector, &dev->mode_config.connector_list,
  303. head) {
  304. psb_intel_encoder = psb_intel_attached_encoder(connector);
  305. switch (psb_intel_encoder->type) {
  306. case INTEL_OUTPUT_LVDS:
  307. case INTEL_OUTPUT_MIPI:
  308. ret = gma_backlight_init(dev);
  309. break;
  310. }
  311. }
  312. if (ret)
  313. return ret;
  314. #if 0
  315. /*enable runtime pm at last*/
  316. pm_runtime_enable(&dev->pdev->dev);
  317. pm_runtime_set_active(&dev->pdev->dev);
  318. #endif
  319. /*Intel drm driver load is done, continue doing pvr load*/
  320. return 0;
  321. out_err:
  322. psb_driver_unload(dev);
  323. return ret;
  324. }
  325. static int psb_driver_device_is_agp(struct drm_device *dev)
  326. {
  327. return 0;
  328. }
  329. static inline void get_brightness(struct backlight_device *bd)
  330. {
  331. #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
  332. if (bd) {
  333. bd->props.brightness = bd->ops->get_brightness(bd);
  334. backlight_update_status(bd);
  335. }
  336. #endif
  337. }
  338. static int psb_dpst_bl_ioctl(struct drm_device *dev, void *data,
  339. struct drm_file *file_priv)
  340. {
  341. struct drm_psb_private *dev_priv = psb_priv(dev);
  342. uint32_t *arg = data;
  343. dev_priv->blc_adj2 = *arg;
  344. get_brightness(dev_priv->backlight_device);
  345. return 0;
  346. }
  347. static int psb_adb_ioctl(struct drm_device *dev, void *data,
  348. struct drm_file *file_priv)
  349. {
  350. struct drm_psb_private *dev_priv = psb_priv(dev);
  351. uint32_t *arg = data;
  352. dev_priv->blc_adj1 = *arg;
  353. get_brightness(dev_priv->backlight_device);
  354. return 0;
  355. }
  356. static int psb_gamma_ioctl(struct drm_device *dev, void *data,
  357. struct drm_file *file_priv)
  358. {
  359. struct drm_psb_dpst_lut_arg *lut_arg = data;
  360. struct drm_mode_object *obj;
  361. struct drm_crtc *crtc;
  362. struct drm_connector *connector;
  363. struct psb_intel_crtc *psb_intel_crtc;
  364. int i = 0;
  365. int32_t obj_id;
  366. obj_id = lut_arg->output_id;
  367. obj = drm_mode_object_find(dev, obj_id, DRM_MODE_OBJECT_CONNECTOR);
  368. if (!obj) {
  369. dev_dbg(dev->dev, "Invalid Connector object.\n");
  370. return -EINVAL;
  371. }
  372. connector = obj_to_connector(obj);
  373. crtc = connector->encoder->crtc;
  374. psb_intel_crtc = to_psb_intel_crtc(crtc);
  375. for (i = 0; i < 256; i++)
  376. psb_intel_crtc->lut_adj[i] = lut_arg->lut[i];
  377. psb_intel_crtc_load_lut(crtc);
  378. return 0;
  379. }
  380. static int psb_mode_operation_ioctl(struct drm_device *dev, void *data,
  381. struct drm_file *file_priv)
  382. {
  383. uint32_t obj_id;
  384. uint16_t op;
  385. struct drm_mode_modeinfo *umode;
  386. struct drm_display_mode *mode = NULL;
  387. struct drm_psb_mode_operation_arg *arg;
  388. struct drm_mode_object *obj;
  389. struct drm_connector *connector;
  390. struct drm_connector_helper_funcs *connector_funcs;
  391. int ret = 0;
  392. int resp = MODE_OK;
  393. arg = (struct drm_psb_mode_operation_arg *)data;
  394. obj_id = arg->obj_id;
  395. op = arg->operation;
  396. switch (op) {
  397. case PSB_MODE_OPERATION_MODE_VALID:
  398. umode = &arg->mode;
  399. mutex_lock(&dev->mode_config.mutex);
  400. obj = drm_mode_object_find(dev, obj_id,
  401. DRM_MODE_OBJECT_CONNECTOR);
  402. if (!obj) {
  403. ret = -EINVAL;
  404. goto mode_op_out;
  405. }
  406. connector = obj_to_connector(obj);
  407. mode = drm_mode_create(dev);
  408. if (!mode) {
  409. ret = -ENOMEM;
  410. goto mode_op_out;
  411. }
  412. /* drm_crtc_convert_umode(mode, umode); */
  413. {
  414. mode->clock = umode->clock;
  415. mode->hdisplay = umode->hdisplay;
  416. mode->hsync_start = umode->hsync_start;
  417. mode->hsync_end = umode->hsync_end;
  418. mode->htotal = umode->htotal;
  419. mode->hskew = umode->hskew;
  420. mode->vdisplay = umode->vdisplay;
  421. mode->vsync_start = umode->vsync_start;
  422. mode->vsync_end = umode->vsync_end;
  423. mode->vtotal = umode->vtotal;
  424. mode->vscan = umode->vscan;
  425. mode->vrefresh = umode->vrefresh;
  426. mode->flags = umode->flags;
  427. mode->type = umode->type;
  428. strncpy(mode->name, umode->name, DRM_DISPLAY_MODE_LEN);
  429. mode->name[DRM_DISPLAY_MODE_LEN-1] = 0;
  430. }
  431. connector_funcs = (struct drm_connector_helper_funcs *)
  432. connector->helper_private;
  433. if (connector_funcs->mode_valid) {
  434. resp = connector_funcs->mode_valid(connector, mode);
  435. arg->data = resp;
  436. }
  437. /*do some clean up work*/
  438. if (mode)
  439. drm_mode_destroy(dev, mode);
  440. mode_op_out:
  441. mutex_unlock(&dev->mode_config.mutex);
  442. return ret;
  443. default:
  444. dev_dbg(dev->dev, "Unsupported psb mode operation\n");
  445. return -EOPNOTSUPP;
  446. }
  447. return 0;
  448. }
  449. static int psb_stolen_memory_ioctl(struct drm_device *dev, void *data,
  450. struct drm_file *file_priv)
  451. {
  452. struct drm_psb_private *dev_priv = psb_priv(dev);
  453. struct drm_psb_stolen_memory_arg *arg = data;
  454. arg->base = dev_priv->stolen_base;
  455. arg->size = dev_priv->vram_stolen_size;
  456. return 0;
  457. }
  458. static int psb_driver_open(struct drm_device *dev, struct drm_file *priv)
  459. {
  460. return 0;
  461. }
  462. static void psb_driver_close(struct drm_device *dev, struct drm_file *priv)
  463. {
  464. }
  465. static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd,
  466. unsigned long arg)
  467. {
  468. struct drm_file *file_priv = filp->private_data;
  469. struct drm_device *dev = file_priv->minor->dev;
  470. struct drm_psb_private *dev_priv = dev->dev_private;
  471. static unsigned int runtime_allowed;
  472. if (runtime_allowed == 1 && dev_priv->is_lvds_on) {
  473. runtime_allowed++;
  474. pm_runtime_allow(&dev->pdev->dev);
  475. dev_priv->rpm_enabled = 1;
  476. }
  477. return drm_ioctl(filp, cmd, arg);
  478. /* FIXME: do we need to wrap the other side of this */
  479. }
  480. /* When a client dies:
  481. * - Check for and clean up flipped page state
  482. */
  483. static void psb_driver_preclose(struct drm_device *dev, struct drm_file *priv)
  484. {
  485. }
  486. static void psb_remove(struct pci_dev *pdev)
  487. {
  488. struct drm_device *dev = pci_get_drvdata(pdev);
  489. drm_put_dev(dev);
  490. }
  491. static const struct dev_pm_ops psb_pm_ops = {
  492. .resume = gma_power_resume,
  493. .suspend = gma_power_suspend,
  494. .runtime_suspend = psb_runtime_suspend,
  495. .runtime_resume = psb_runtime_resume,
  496. .runtime_idle = psb_runtime_idle,
  497. };
  498. static const struct vm_operations_struct psb_gem_vm_ops = {
  499. .fault = psb_gem_fault,
  500. .open = drm_gem_vm_open,
  501. .close = drm_gem_vm_close,
  502. };
  503. static const struct file_operations psb_gem_fops = {
  504. .owner = THIS_MODULE,
  505. .open = drm_open,
  506. .release = drm_release,
  507. .unlocked_ioctl = psb_unlocked_ioctl,
  508. .mmap = drm_gem_mmap,
  509. .poll = drm_poll,
  510. .fasync = drm_fasync,
  511. .read = drm_read,
  512. };
  513. static struct drm_driver driver = {
  514. .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | \
  515. DRIVER_IRQ_VBL | DRIVER_MODESET | DRIVER_GEM ,
  516. .load = psb_driver_load,
  517. .unload = psb_driver_unload,
  518. .ioctls = psb_ioctls,
  519. .num_ioctls = DRM_ARRAY_SIZE(psb_ioctls),
  520. .device_is_agp = psb_driver_device_is_agp,
  521. .irq_preinstall = psb_irq_preinstall,
  522. .irq_postinstall = psb_irq_postinstall,
  523. .irq_uninstall = psb_irq_uninstall,
  524. .irq_handler = psb_irq_handler,
  525. .enable_vblank = psb_enable_vblank,
  526. .disable_vblank = psb_disable_vblank,
  527. .get_vblank_counter = psb_get_vblank_counter,
  528. .lastclose = psb_lastclose,
  529. .open = psb_driver_open,
  530. .preclose = psb_driver_preclose,
  531. .postclose = psb_driver_close,
  532. .reclaim_buffers = drm_core_reclaim_buffers,
  533. .gem_init_object = psb_gem_init_object,
  534. .gem_free_object = psb_gem_free_object,
  535. .gem_vm_ops = &psb_gem_vm_ops,
  536. .dumb_create = psb_gem_dumb_create,
  537. .dumb_map_offset = psb_gem_dumb_map_gtt,
  538. .dumb_destroy = psb_gem_dumb_destroy,
  539. .fops = &psb_gem_fops,
  540. .name = DRIVER_NAME,
  541. .desc = DRIVER_DESC,
  542. .date = PSB_DRM_DRIVER_DATE,
  543. .major = PSB_DRM_DRIVER_MAJOR,
  544. .minor = PSB_DRM_DRIVER_MINOR,
  545. .patchlevel = PSB_DRM_DRIVER_PATCHLEVEL
  546. };
  547. static struct pci_driver psb_pci_driver = {
  548. .name = DRIVER_NAME,
  549. .id_table = pciidlist,
  550. .probe = psb_probe,
  551. .remove = psb_remove,
  552. .driver = {
  553. .pm = &psb_pm_ops,
  554. }
  555. };
  556. static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  557. {
  558. return drm_get_pci_dev(pdev, ent, &driver);
  559. }
  560. static int __init psb_init(void)
  561. {
  562. return drm_pci_init(&driver, &psb_pci_driver);
  563. }
  564. static void __exit psb_exit(void)
  565. {
  566. drm_pci_exit(&driver, &psb_pci_driver);
  567. }
  568. late_initcall(psb_init);
  569. module_exit(psb_exit);
  570. MODULE_AUTHOR("Alan Cox <alan@linux.intel.com> and others");
  571. MODULE_DESCRIPTION(DRIVER_DESC);
  572. MODULE_LICENSE("GPL");