Kconfig 9.5 KB

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  1. menuconfig CRYPTO_HW
  2. bool "Hardware crypto devices"
  3. default y
  4. ---help---
  5. Say Y here to get to see options for hardware crypto devices and
  6. processors. This option alone does not add any kernel code.
  7. If you say N, all options in this submenu will be skipped and disabled.
  8. if CRYPTO_HW
  9. config CRYPTO_DEV_PADLOCK
  10. tristate "Support for VIA PadLock ACE"
  11. depends on X86 && !UML
  12. help
  13. Some VIA processors come with an integrated crypto engine
  14. (so called VIA PadLock ACE, Advanced Cryptography Engine)
  15. that provides instructions for very fast cryptographic
  16. operations with supported algorithms.
  17. The instructions are used only when the CPU supports them.
  18. Otherwise software encryption is used.
  19. config CRYPTO_DEV_PADLOCK_AES
  20. tristate "PadLock driver for AES algorithm"
  21. depends on CRYPTO_DEV_PADLOCK
  22. select CRYPTO_BLKCIPHER
  23. select CRYPTO_AES
  24. help
  25. Use VIA PadLock for AES algorithm.
  26. Available in VIA C3 and newer CPUs.
  27. If unsure say M. The compiled module will be
  28. called padlock-aes.
  29. config CRYPTO_DEV_PADLOCK_SHA
  30. tristate "PadLock driver for SHA1 and SHA256 algorithms"
  31. depends on CRYPTO_DEV_PADLOCK
  32. select CRYPTO_HASH
  33. select CRYPTO_SHA1
  34. select CRYPTO_SHA256
  35. help
  36. Use VIA PadLock for SHA1/SHA256 algorithms.
  37. Available in VIA C7 and newer processors.
  38. If unsure say M. The compiled module will be
  39. called padlock-sha.
  40. config CRYPTO_DEV_GEODE
  41. tristate "Support for the Geode LX AES engine"
  42. depends on X86_32 && PCI
  43. select CRYPTO_ALGAPI
  44. select CRYPTO_BLKCIPHER
  45. help
  46. Say 'Y' here to use the AMD Geode LX processor on-board AES
  47. engine for the CryptoAPI AES algorithm.
  48. To compile this driver as a module, choose M here: the module
  49. will be called geode-aes.
  50. config ZCRYPT
  51. tristate "Support for PCI-attached cryptographic adapters"
  52. depends on S390
  53. select HW_RANDOM
  54. help
  55. Select this option if you want to use a PCI-attached cryptographic
  56. adapter like:
  57. + PCI Cryptographic Accelerator (PCICA)
  58. + PCI Cryptographic Coprocessor (PCICC)
  59. + PCI-X Cryptographic Coprocessor (PCIXCC)
  60. + Crypto Express2 Coprocessor (CEX2C)
  61. + Crypto Express2 Accelerator (CEX2A)
  62. + Crypto Express3 Coprocessor (CEX3C)
  63. + Crypto Express3 Accelerator (CEX3A)
  64. config CRYPTO_SHA1_S390
  65. tristate "SHA1 digest algorithm"
  66. depends on S390
  67. select CRYPTO_HASH
  68. help
  69. This is the s390 hardware accelerated implementation of the
  70. SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
  71. It is available as of z990.
  72. config CRYPTO_SHA256_S390
  73. tristate "SHA256 digest algorithm"
  74. depends on S390
  75. select CRYPTO_HASH
  76. help
  77. This is the s390 hardware accelerated implementation of the
  78. SHA256 secure hash standard (DFIPS 180-2).
  79. It is available as of z9.
  80. config CRYPTO_SHA512_S390
  81. tristate "SHA384 and SHA512 digest algorithm"
  82. depends on S390
  83. select CRYPTO_HASH
  84. help
  85. This is the s390 hardware accelerated implementation of the
  86. SHA512 secure hash standard.
  87. It is available as of z10.
  88. config CRYPTO_DES_S390
  89. tristate "DES and Triple DES cipher algorithms"
  90. depends on S390
  91. select CRYPTO_ALGAPI
  92. select CRYPTO_BLKCIPHER
  93. select CRYPTO_DES
  94. help
  95. This is the s390 hardware accelerated implementation of the
  96. DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
  97. As of z990 the ECB and CBC mode are hardware accelerated.
  98. As of z196 the CTR mode is hardware accelerated.
  99. config CRYPTO_AES_S390
  100. tristate "AES cipher algorithms"
  101. depends on S390
  102. select CRYPTO_ALGAPI
  103. select CRYPTO_BLKCIPHER
  104. help
  105. This is the s390 hardware accelerated implementation of the
  106. AES cipher algorithms (FIPS-197).
  107. As of z9 the ECB and CBC modes are hardware accelerated
  108. for 128 bit keys.
  109. As of z10 the ECB and CBC modes are hardware accelerated
  110. for all AES key sizes.
  111. As of z196 the CTR mode is hardware accelerated for all AES
  112. key sizes and XTS mode is hardware accelerated for 256 and
  113. 512 bit keys.
  114. config S390_PRNG
  115. tristate "Pseudo random number generator device driver"
  116. depends on S390
  117. default "m"
  118. help
  119. Select this option if you want to use the s390 pseudo random number
  120. generator. The PRNG is part of the cryptographic processor functions
  121. and uses triple-DES to generate secure random numbers like the
  122. ANSI X9.17 standard. User-space programs access the
  123. pseudo-random-number device through the char device /dev/prandom.
  124. It is available as of z9.
  125. config CRYPTO_GHASH_S390
  126. tristate "GHASH digest algorithm"
  127. depends on S390
  128. select CRYPTO_HASH
  129. help
  130. This is the s390 hardware accelerated implementation of the
  131. GHASH message digest algorithm for GCM (Galois/Counter Mode).
  132. It is available as of z196.
  133. config CRYPTO_DEV_MV_CESA
  134. tristate "Marvell's Cryptographic Engine"
  135. depends on PLAT_ORION
  136. select CRYPTO_ALGAPI
  137. select CRYPTO_AES
  138. select CRYPTO_BLKCIPHER2
  139. select CRYPTO_HASH
  140. help
  141. This driver allows you to utilize the Cryptographic Engines and
  142. Security Accelerator (CESA) which can be found on the Marvell Orion
  143. and Kirkwood SoCs, such as QNAP's TS-209.
  144. Currently the driver supports AES in ECB and CBC mode without DMA.
  145. config CRYPTO_DEV_NIAGARA2
  146. tristate "Niagara2 Stream Processing Unit driver"
  147. select CRYPTO_DES
  148. select CRYPTO_ALGAPI
  149. depends on SPARC64
  150. help
  151. Each core of a Niagara2 processor contains a Stream
  152. Processing Unit, which itself contains several cryptographic
  153. sub-units. One set provides the Modular Arithmetic Unit,
  154. used for SSL offload. The other set provides the Cipher
  155. Group, which can perform encryption, decryption, hashing,
  156. checksumming, and raw copies.
  157. config CRYPTO_DEV_HIFN_795X
  158. tristate "Driver HIFN 795x crypto accelerator chips"
  159. select CRYPTO_DES
  160. select CRYPTO_ALGAPI
  161. select CRYPTO_BLKCIPHER
  162. select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
  163. depends on PCI
  164. depends on !ARCH_DMA_ADDR_T_64BIT
  165. help
  166. This option allows you to have support for HIFN 795x crypto adapters.
  167. config CRYPTO_DEV_HIFN_795X_RNG
  168. bool "HIFN 795x random number generator"
  169. depends on CRYPTO_DEV_HIFN_795X
  170. help
  171. Select this option if you want to enable the random number generator
  172. on the HIFN 795x crypto adapters.
  173. source drivers/crypto/caam/Kconfig
  174. config CRYPTO_DEV_TALITOS
  175. tristate "Talitos Freescale Security Engine (SEC)"
  176. select CRYPTO_ALGAPI
  177. select CRYPTO_AUTHENC
  178. select HW_RANDOM
  179. depends on FSL_SOC
  180. help
  181. Say 'Y' here to use the Freescale Security Engine (SEC)
  182. to offload cryptographic algorithm computation.
  183. The Freescale SEC is present on PowerQUICC 'E' processors, such
  184. as the MPC8349E and MPC8548E.
  185. To compile this driver as a module, choose M here: the module
  186. will be called talitos.
  187. config CRYPTO_DEV_IXP4XX
  188. tristate "Driver for IXP4xx crypto hardware acceleration"
  189. depends on ARCH_IXP4XX
  190. select CRYPTO_DES
  191. select CRYPTO_ALGAPI
  192. select CRYPTO_AUTHENC
  193. select CRYPTO_BLKCIPHER
  194. help
  195. Driver for the IXP4xx NPE crypto engine.
  196. config CRYPTO_DEV_PPC4XX
  197. tristate "Driver AMCC PPC4xx crypto accelerator"
  198. depends on PPC && 4xx
  199. select CRYPTO_HASH
  200. select CRYPTO_ALGAPI
  201. select CRYPTO_BLKCIPHER
  202. help
  203. This option allows you to have support for AMCC crypto acceleration.
  204. config CRYPTO_DEV_OMAP_SHAM
  205. tristate "Support for OMAP SHA1/MD5 hw accelerator"
  206. depends on ARCH_OMAP2 || ARCH_OMAP3
  207. select CRYPTO_SHA1
  208. select CRYPTO_MD5
  209. help
  210. OMAP processors have SHA1/MD5 hw accelerator. Select this if you
  211. want to use the OMAP module for SHA1/MD5 algorithms.
  212. config CRYPTO_DEV_OMAP_AES
  213. tristate "Support for OMAP AES hw engine"
  214. depends on ARCH_OMAP2 || ARCH_OMAP3
  215. select CRYPTO_AES
  216. help
  217. OMAP processors have AES module accelerator. Select this if you
  218. want to use the OMAP module for AES algorithms.
  219. config CRYPTO_DEV_PICOXCELL
  220. tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
  221. depends on ARCH_PICOXCELL && HAVE_CLK
  222. select CRYPTO_AES
  223. select CRYPTO_AUTHENC
  224. select CRYPTO_ALGAPI
  225. select CRYPTO_DES
  226. select CRYPTO_CBC
  227. select CRYPTO_ECB
  228. select CRYPTO_SEQIV
  229. help
  230. This option enables support for the hardware offload engines in the
  231. Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
  232. and for 3gpp Layer 2 ciphering support.
  233. Saying m here will build a module named pipcoxcell_crypto.
  234. config CRYPTO_DEV_S5P
  235. tristate "Support for Samsung S5PV210 crypto accelerator"
  236. depends on ARCH_S5PV210
  237. select CRYPTO_AES
  238. select CRYPTO_ALGAPI
  239. select CRYPTO_BLKCIPHER
  240. help
  241. This option allows you to have support for S5P crypto acceleration.
  242. Select this to offload Samsung S5PV210 or S5PC110 from AES
  243. algorithms execution.
  244. config CRYPTO_DEV_TEGRA_AES
  245. tristate "Support for TEGRA AES hw engine"
  246. depends on ARCH_TEGRA
  247. select CRYPTO_AES
  248. help
  249. TEGRA processors have AES module accelerator. Select this if you
  250. want to use the TEGRA module for AES algorithms.
  251. To compile this driver as a module, choose M here: the module
  252. will be called tegra-aes.
  253. config CRYPTO_DEV_NX
  254. tristate "Support for Power7+ in-Nest cryptographic accleration"
  255. depends on PPC64 && IBMVIO
  256. select CRYPTO_AES
  257. select CRYPTO_CBC
  258. select CRYPTO_ECB
  259. select CRYPTO_CCM
  260. select CRYPTO_GCM
  261. select CRYPTO_AUTHENC
  262. select CRYPTO_XCBC
  263. select CRYPTO_SHA256
  264. select CRYPTO_SHA512
  265. help
  266. Support for Power7+ in-Nest cryptographic acceleration. This
  267. module supports acceleration for AES and SHA2 algorithms. If you
  268. choose 'M' here, this module will be called nx_crypto.
  269. config CRYPTO_DEV_UX500
  270. tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
  271. depends on ARCH_U8500
  272. select CRYPTO_ALGAPI
  273. help
  274. Driver for ST-Ericsson UX500 crypto engine.
  275. if CRYPTO_DEV_UX500
  276. source "drivers/crypto/ux500/Kconfig"
  277. endif # if CRYPTO_DEV_UX500
  278. endif # CRYPTO_HW