omap-rng.c 4.6 KB

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  1. /*
  2. * omap-rng.c - RNG driver for TI OMAP CPU family
  3. *
  4. * Author: Deepak Saxena <dsaxena@plexity.net>
  5. *
  6. * Copyright 2005 (c) MontaVista Software, Inc.
  7. *
  8. * Mostly based on original driver:
  9. *
  10. * Copyright (C) 2005 Nokia Corporation
  11. * Author: Juha Yrjölä <juha.yrjola@nokia.com>
  12. *
  13. * This file is licensed under the terms of the GNU General Public
  14. * License version 2. This program is licensed "as is" without any
  15. * warranty of any kind, whether express or implied.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/init.h>
  19. #include <linux/random.h>
  20. #include <linux/clk.h>
  21. #include <linux/err.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/hw_random.h>
  24. #include <linux/delay.h>
  25. #include <asm/io.h>
  26. #include <plat/cpu.h>
  27. #define RNG_OUT_REG 0x00 /* Output register */
  28. #define RNG_STAT_REG 0x04 /* Status register
  29. [0] = STAT_BUSY */
  30. #define RNG_ALARM_REG 0x24 /* Alarm register
  31. [7:0] = ALARM_COUNTER */
  32. #define RNG_CONFIG_REG 0x28 /* Configuration register
  33. [11:6] = RESET_COUNT
  34. [5:3] = RING2_DELAY
  35. [2:0] = RING1_DELAY */
  36. #define RNG_REV_REG 0x3c /* Revision register
  37. [7:0] = REV_NB */
  38. #define RNG_MASK_REG 0x40 /* Mask and reset register
  39. [2] = IT_EN
  40. [1] = SOFTRESET
  41. [0] = AUTOIDLE */
  42. #define RNG_SYSSTATUS 0x44 /* System status
  43. [0] = RESETDONE */
  44. static void __iomem *rng_base;
  45. static struct clk *rng_ick;
  46. static struct platform_device *rng_dev;
  47. static inline u32 omap_rng_read_reg(int reg)
  48. {
  49. return __raw_readl(rng_base + reg);
  50. }
  51. static inline void omap_rng_write_reg(int reg, u32 val)
  52. {
  53. __raw_writel(val, rng_base + reg);
  54. }
  55. static int omap_rng_data_present(struct hwrng *rng, int wait)
  56. {
  57. int data, i;
  58. for (i = 0; i < 20; i++) {
  59. data = omap_rng_read_reg(RNG_STAT_REG) ? 0 : 1;
  60. if (data || !wait)
  61. break;
  62. /* RNG produces data fast enough (2+ MBit/sec, even
  63. * during "rngtest" loads, that these delays don't
  64. * seem to trigger. We *could* use the RNG IRQ, but
  65. * that'd be higher overhead ... so why bother?
  66. */
  67. udelay(10);
  68. }
  69. return data;
  70. }
  71. static int omap_rng_data_read(struct hwrng *rng, u32 *data)
  72. {
  73. *data = omap_rng_read_reg(RNG_OUT_REG);
  74. return 4;
  75. }
  76. static struct hwrng omap_rng_ops = {
  77. .name = "omap",
  78. .data_present = omap_rng_data_present,
  79. .data_read = omap_rng_data_read,
  80. };
  81. static int __devinit omap_rng_probe(struct platform_device *pdev)
  82. {
  83. struct resource *res;
  84. int ret;
  85. /*
  86. * A bit ugly, and it will never actually happen but there can
  87. * be only one RNG and this catches any bork
  88. */
  89. if (rng_dev)
  90. return -EBUSY;
  91. if (cpu_is_omap24xx()) {
  92. rng_ick = clk_get(&pdev->dev, "ick");
  93. if (IS_ERR(rng_ick)) {
  94. dev_err(&pdev->dev, "Could not get rng_ick\n");
  95. ret = PTR_ERR(rng_ick);
  96. return ret;
  97. } else
  98. clk_enable(rng_ick);
  99. }
  100. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  101. rng_base = devm_request_and_ioremap(&pdev->dev, res);
  102. if (!rng_base) {
  103. ret = -ENOMEM;
  104. goto err_ioremap;
  105. }
  106. dev_set_drvdata(&pdev->dev, res);
  107. ret = hwrng_register(&omap_rng_ops);
  108. if (ret)
  109. goto err_register;
  110. dev_info(&pdev->dev, "OMAP Random Number Generator ver. %02x\n",
  111. omap_rng_read_reg(RNG_REV_REG));
  112. omap_rng_write_reg(RNG_MASK_REG, 0x1);
  113. rng_dev = pdev;
  114. return 0;
  115. err_register:
  116. rng_base = NULL;
  117. err_ioremap:
  118. if (cpu_is_omap24xx()) {
  119. clk_disable(rng_ick);
  120. clk_put(rng_ick);
  121. }
  122. return ret;
  123. }
  124. static int __exit omap_rng_remove(struct platform_device *pdev)
  125. {
  126. hwrng_unregister(&omap_rng_ops);
  127. omap_rng_write_reg(RNG_MASK_REG, 0x0);
  128. if (cpu_is_omap24xx()) {
  129. clk_disable(rng_ick);
  130. clk_put(rng_ick);
  131. }
  132. rng_base = NULL;
  133. return 0;
  134. }
  135. #ifdef CONFIG_PM
  136. static int omap_rng_suspend(struct platform_device *pdev, pm_message_t message)
  137. {
  138. omap_rng_write_reg(RNG_MASK_REG, 0x0);
  139. return 0;
  140. }
  141. static int omap_rng_resume(struct platform_device *pdev)
  142. {
  143. omap_rng_write_reg(RNG_MASK_REG, 0x1);
  144. return 0;
  145. }
  146. #else
  147. #define omap_rng_suspend NULL
  148. #define omap_rng_resume NULL
  149. #endif
  150. /* work with hotplug and coldplug */
  151. MODULE_ALIAS("platform:omap_rng");
  152. static struct platform_driver omap_rng_driver = {
  153. .driver = {
  154. .name = "omap_rng",
  155. .owner = THIS_MODULE,
  156. },
  157. .probe = omap_rng_probe,
  158. .remove = __exit_p(omap_rng_remove),
  159. .suspend = omap_rng_suspend,
  160. .resume = omap_rng_resume
  161. };
  162. static int __init omap_rng_init(void)
  163. {
  164. if (!cpu_is_omap16xx() && !cpu_is_omap24xx())
  165. return -ENODEV;
  166. return platform_driver_register(&omap_rng_driver);
  167. }
  168. static void __exit omap_rng_exit(void)
  169. {
  170. platform_driver_unregister(&omap_rng_driver);
  171. }
  172. module_init(omap_rng_init);
  173. module_exit(omap_rng_exit);
  174. MODULE_AUTHOR("Deepak Saxena (and others)");
  175. MODULE_LICENSE("GPL");