board-mackerel.c 39 KB

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  1. /*
  2. * mackerel board support
  3. *
  4. * Copyright (C) 2010 Renesas Solutions Corp.
  5. * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. *
  7. * based on ap4evb
  8. * Copyright (C) 2010 Magnus Damm
  9. * Copyright (C) 2008 Yoshihiro Shimoda
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; version 2 of the License.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  23. */
  24. #include <linux/delay.h>
  25. #include <linux/kernel.h>
  26. #include <linux/init.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/irq.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/gpio.h>
  31. #include <linux/input.h>
  32. #include <linux/io.h>
  33. #include <linux/i2c.h>
  34. #include <linux/leds.h>
  35. #include <linux/mfd/tmio.h>
  36. #include <linux/mmc/host.h>
  37. #include <linux/mmc/sh_mmcif.h>
  38. #include <linux/mmc/sh_mobile_sdhi.h>
  39. #include <linux/mtd/mtd.h>
  40. #include <linux/mtd/partitions.h>
  41. #include <linux/mtd/physmap.h>
  42. #include <linux/mtd/sh_flctl.h>
  43. #include <linux/pm_clock.h>
  44. #include <linux/smsc911x.h>
  45. #include <linux/sh_intc.h>
  46. #include <linux/tca6416_keypad.h>
  47. #include <linux/usb/renesas_usbhs.h>
  48. #include <linux/dma-mapping.h>
  49. #include <video/sh_mobile_hdmi.h>
  50. #include <video/sh_mobile_lcdc.h>
  51. #include <media/sh_mobile_ceu.h>
  52. #include <media/soc_camera.h>
  53. #include <media/soc_camera_platform.h>
  54. #include <sound/sh_fsi.h>
  55. #include <sound/simple_card.h>
  56. #include <mach/common.h>
  57. #include <mach/irqs.h>
  58. #include <mach/sh7372.h>
  59. #include <asm/mach/arch.h>
  60. #include <asm/mach-types.h>
  61. /*
  62. * Address Interface BusWidth note
  63. * ------------------------------------------------------------------
  64. * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
  65. * 0x0800_0000 user area -
  66. * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
  67. * 0x1400_0000 Ether (LAN9220) 16bit
  68. * 0x1600_0000 user area - cannot use with NAND
  69. * 0x1800_0000 user area -
  70. * 0x1A00_0000 -
  71. * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
  72. */
  73. /*
  74. * CPU mode
  75. *
  76. * SW4 | Boot Area| Master | Remarks
  77. * 1 | 2 | 3 | 4 | 5 | 6 | 8 | | Processor|
  78. * ----+-----+-----+-----+-----+-----+-----+----------+----------+--------------
  79. * ON | ON | OFF | ON | ON | OFF | OFF | External | System | External ROM
  80. * ON | ON | ON | ON | ON | OFF | OFF | External | System | ROM Debug
  81. * ON | ON | X | ON | OFF | OFF | OFF | Built-in | System | ROM Debug
  82. * X | OFF | X | X | X | X | OFF | Built-in | System | MaskROM
  83. * OFF | X | X | X | X | X | OFF | Built-in | System | MaskROM
  84. * X | X | X | OFF | X | X | OFF | Built-in | System | MaskROM
  85. * OFF | ON | OFF | X | X | OFF | ON | External | System | Standalone
  86. * ON | OFF | OFF | X | X | OFF | ON | External | Realtime | Standalone
  87. */
  88. /*
  89. * NOR Flash ROM
  90. *
  91. * SW1 | SW2 | SW7 | NOR Flash ROM
  92. * bit1 | bit1 bit2 | bit1 | Memory allocation
  93. * ------+------------+------+------------------
  94. * OFF | ON OFF | ON | Area 0
  95. * OFF | ON OFF | OFF | Area 4
  96. */
  97. /*
  98. * SMSC 9220
  99. *
  100. * SW1 SMSC 9220
  101. * -----------------------
  102. * ON access disable
  103. * OFF access enable
  104. */
  105. /*
  106. * NAND Flash ROM
  107. *
  108. * SW1 | SW2 | SW7 | NAND Flash ROM
  109. * bit1 | bit1 bit2 | bit2 | Memory allocation
  110. * ------+------------+------+------------------
  111. * OFF | ON OFF | ON | FCE 0
  112. * OFF | ON OFF | OFF | FCE 1
  113. */
  114. /*
  115. * External interrupt pin settings
  116. *
  117. * IRQX | pin setting | device | level
  118. * ------+--------------------+--------------------+-------
  119. * IRQ0 | ICR1A.IRQ0SA=0010 | SDHI2 card detect | Low
  120. * IRQ6 | ICR1A.IRQ6SA=0011 | Ether(LAN9220) | High
  121. * IRQ7 | ICR1A.IRQ7SA=0010 | LCD Touch Panel | Low
  122. * IRQ8 | ICR2A.IRQ8SA=0010 | MMC/SD card detect | Low
  123. * IRQ9 | ICR2A.IRQ9SA=0010 | KEY(TCA6408) | Low
  124. * IRQ21 | ICR4A.IRQ21SA=0011 | Sensor(ADXL345) | High
  125. * IRQ22 | ICR4A.IRQ22SA=0011 | Sensor(AK8975) | High
  126. */
  127. /*
  128. * USB
  129. *
  130. * USB0 : CN22 : Function
  131. * USB1 : CN31 : Function/Host *1
  132. *
  133. * J30 (for CN31) *1
  134. * ----------+---------------+-------------
  135. * 1-2 short | VBUS 5V | Host
  136. * open | external VBUS | Function
  137. *
  138. * CAUTION
  139. *
  140. * renesas_usbhs driver can use external interrupt mode
  141. * (which come from USB-PHY) or autonomy mode (it use own interrupt)
  142. * for detecting connection/disconnection when Function.
  143. * USB will be power OFF while it has been disconnecting
  144. * if external interrupt mode, and it is always power ON if autonomy mode,
  145. *
  146. * mackerel can not use external interrupt (IRQ7-PORT167) mode on "USB0",
  147. * because Touchscreen is using IRQ7-PORT40.
  148. * It is impossible to use IRQ7 demux on this board.
  149. */
  150. /*
  151. * SDHI0 (CN12)
  152. *
  153. * SW56 : OFF
  154. *
  155. */
  156. /* MMC /SDHI1 (CN7)
  157. *
  158. * I/O voltage : 1.8v
  159. *
  160. * Power voltage : 1.8v or 3.3v
  161. * J22 : select power voltage *1
  162. * 1-2 pin : 1.8v
  163. * 2-3 pin : 3.3v
  164. *
  165. * *1
  166. * Please change J22 depends the card to be used.
  167. * MMC's OCR field set to support either voltage for the card inserted.
  168. *
  169. * SW1 | SW33
  170. * | bit1 | bit2 | bit3 | bit4
  171. * -------------+------+------+------+-------
  172. * MMC0 OFF | OFF | X | ON | X (Use MMCIF)
  173. * SDHI1 OFF | ON | X | OFF | X (Use MFD_SH_MOBILE_SDHI)
  174. *
  175. */
  176. /*
  177. * SDHI2 (CN23)
  178. *
  179. * microSD card sloct
  180. *
  181. */
  182. /*
  183. * FSI - AK4642
  184. *
  185. * it needs amixer settings for playing
  186. *
  187. * amixer set "Headphone" on
  188. * amixer set "HPOUTL Mixer DACH" on
  189. * amixer set "HPOUTR Mixer DACH" on
  190. */
  191. /*
  192. * FIXME !!
  193. *
  194. * gpio_no_direction
  195. * gpio_pull_down
  196. * are quick_hack.
  197. *
  198. * current gpio frame work doesn't have
  199. * the method to control only pull up/down/free.
  200. * this function should be replaced by correct gpio function
  201. */
  202. static void __init gpio_no_direction(u32 addr)
  203. {
  204. __raw_writeb(0x00, addr);
  205. }
  206. static void __init gpio_pull_down(u32 addr)
  207. {
  208. u8 data = __raw_readb(addr);
  209. data &= 0x0F;
  210. data |= 0xA0;
  211. __raw_writeb(data, addr);
  212. }
  213. /* MTD */
  214. static struct mtd_partition nor_flash_partitions[] = {
  215. {
  216. .name = "loader",
  217. .offset = 0x00000000,
  218. .size = 512 * 1024,
  219. .mask_flags = MTD_WRITEABLE,
  220. },
  221. {
  222. .name = "bootenv",
  223. .offset = MTDPART_OFS_APPEND,
  224. .size = 512 * 1024,
  225. .mask_flags = MTD_WRITEABLE,
  226. },
  227. {
  228. .name = "kernel_ro",
  229. .offset = MTDPART_OFS_APPEND,
  230. .size = 8 * 1024 * 1024,
  231. .mask_flags = MTD_WRITEABLE,
  232. },
  233. {
  234. .name = "kernel",
  235. .offset = MTDPART_OFS_APPEND,
  236. .size = 8 * 1024 * 1024,
  237. },
  238. {
  239. .name = "data",
  240. .offset = MTDPART_OFS_APPEND,
  241. .size = MTDPART_SIZ_FULL,
  242. },
  243. };
  244. static struct physmap_flash_data nor_flash_data = {
  245. .width = 2,
  246. .parts = nor_flash_partitions,
  247. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  248. };
  249. static struct resource nor_flash_resources[] = {
  250. [0] = {
  251. .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
  252. .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
  253. .flags = IORESOURCE_MEM,
  254. }
  255. };
  256. static struct platform_device nor_flash_device = {
  257. .name = "physmap-flash",
  258. .dev = {
  259. .platform_data = &nor_flash_data,
  260. },
  261. .num_resources = ARRAY_SIZE(nor_flash_resources),
  262. .resource = nor_flash_resources,
  263. };
  264. /* SMSC */
  265. static struct resource smc911x_resources[] = {
  266. {
  267. .start = 0x14000000,
  268. .end = 0x16000000 - 1,
  269. .flags = IORESOURCE_MEM,
  270. }, {
  271. .start = evt2irq(0x02c0) /* IRQ6A */,
  272. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  273. },
  274. };
  275. static struct smsc911x_platform_config smsc911x_info = {
  276. .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
  277. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  278. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  279. };
  280. static struct platform_device smc911x_device = {
  281. .name = "smsc911x",
  282. .id = -1,
  283. .num_resources = ARRAY_SIZE(smc911x_resources),
  284. .resource = smc911x_resources,
  285. .dev = {
  286. .platform_data = &smsc911x_info,
  287. },
  288. };
  289. /* MERAM */
  290. static struct sh_mobile_meram_info mackerel_meram_info = {
  291. .addr_mode = SH_MOBILE_MERAM_MODE1,
  292. };
  293. static struct resource meram_resources[] = {
  294. [0] = {
  295. .name = "regs",
  296. .start = 0xe8000000,
  297. .end = 0xe807ffff,
  298. .flags = IORESOURCE_MEM,
  299. },
  300. [1] = {
  301. .name = "meram",
  302. .start = 0xe8080000,
  303. .end = 0xe81fffff,
  304. .flags = IORESOURCE_MEM,
  305. },
  306. };
  307. static struct platform_device meram_device = {
  308. .name = "sh_mobile_meram",
  309. .id = 0,
  310. .num_resources = ARRAY_SIZE(meram_resources),
  311. .resource = meram_resources,
  312. .dev = {
  313. .platform_data = &mackerel_meram_info,
  314. },
  315. };
  316. /* LCDC */
  317. static struct fb_videomode mackerel_lcdc_modes[] = {
  318. {
  319. .name = "WVGA Panel",
  320. .xres = 800,
  321. .yres = 480,
  322. .left_margin = 220,
  323. .right_margin = 110,
  324. .hsync_len = 70,
  325. .upper_margin = 20,
  326. .lower_margin = 5,
  327. .vsync_len = 5,
  328. .sync = 0,
  329. },
  330. };
  331. static int mackerel_set_brightness(int brightness)
  332. {
  333. gpio_set_value(GPIO_PORT31, brightness);
  334. return 0;
  335. }
  336. static int mackerel_get_brightness(void)
  337. {
  338. return gpio_get_value(GPIO_PORT31);
  339. }
  340. static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
  341. .icb[0] = {
  342. .meram_size = 0x40,
  343. },
  344. .icb[1] = {
  345. .meram_size = 0x40,
  346. },
  347. };
  348. static struct sh_mobile_lcdc_info lcdc_info = {
  349. .meram_dev = &mackerel_meram_info,
  350. .clock_source = LCDC_CLK_BUS,
  351. .ch[0] = {
  352. .chan = LCDC_CHAN_MAINLCD,
  353. .fourcc = V4L2_PIX_FMT_RGB565,
  354. .lcd_modes = mackerel_lcdc_modes,
  355. .num_modes = ARRAY_SIZE(mackerel_lcdc_modes),
  356. .interface_type = RGB24,
  357. .clock_divider = 3,
  358. .flags = 0,
  359. .panel_cfg = {
  360. .width = 152,
  361. .height = 91,
  362. },
  363. .bl_info = {
  364. .name = "sh_mobile_lcdc_bl",
  365. .max_brightness = 1,
  366. .set_brightness = mackerel_set_brightness,
  367. .get_brightness = mackerel_get_brightness,
  368. },
  369. .meram_cfg = &lcd_meram_cfg,
  370. }
  371. };
  372. static struct resource lcdc_resources[] = {
  373. [0] = {
  374. .name = "LCDC",
  375. .start = 0xfe940000,
  376. .end = 0xfe943fff,
  377. .flags = IORESOURCE_MEM,
  378. },
  379. [1] = {
  380. .start = intcs_evt2irq(0x580),
  381. .flags = IORESOURCE_IRQ,
  382. },
  383. };
  384. static struct platform_device lcdc_device = {
  385. .name = "sh_mobile_lcdc_fb",
  386. .num_resources = ARRAY_SIZE(lcdc_resources),
  387. .resource = lcdc_resources,
  388. .dev = {
  389. .platform_data = &lcdc_info,
  390. .coherent_dma_mask = ~0,
  391. },
  392. };
  393. /* HDMI */
  394. static struct sh_mobile_hdmi_info hdmi_info = {
  395. .flags = HDMI_SND_SRC_SPDIF,
  396. };
  397. static struct resource hdmi_resources[] = {
  398. [0] = {
  399. .name = "HDMI",
  400. .start = 0xe6be0000,
  401. .end = 0xe6be00ff,
  402. .flags = IORESOURCE_MEM,
  403. },
  404. [1] = {
  405. /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
  406. .start = evt2irq(0x17e0),
  407. .flags = IORESOURCE_IRQ,
  408. },
  409. };
  410. static struct platform_device hdmi_device = {
  411. .name = "sh-mobile-hdmi",
  412. .num_resources = ARRAY_SIZE(hdmi_resources),
  413. .resource = hdmi_resources,
  414. .id = -1,
  415. .dev = {
  416. .platform_data = &hdmi_info,
  417. },
  418. };
  419. static const struct sh_mobile_meram_cfg hdmi_meram_cfg = {
  420. .icb[0] = {
  421. .meram_size = 0x100,
  422. },
  423. .icb[1] = {
  424. .meram_size = 0x100,
  425. },
  426. };
  427. static struct sh_mobile_lcdc_info hdmi_lcdc_info = {
  428. .meram_dev = &mackerel_meram_info,
  429. .clock_source = LCDC_CLK_EXTERNAL,
  430. .ch[0] = {
  431. .chan = LCDC_CHAN_MAINLCD,
  432. .fourcc = V4L2_PIX_FMT_RGB565,
  433. .interface_type = RGB24,
  434. .clock_divider = 1,
  435. .flags = LCDC_FLAGS_DWPOL,
  436. .meram_cfg = &hdmi_meram_cfg,
  437. .tx_dev = &hdmi_device,
  438. }
  439. };
  440. static struct resource hdmi_lcdc_resources[] = {
  441. [0] = {
  442. .name = "LCDC1",
  443. .start = 0xfe944000,
  444. .end = 0xfe947fff,
  445. .flags = IORESOURCE_MEM,
  446. },
  447. [1] = {
  448. .start = intcs_evt2irq(0x1780),
  449. .flags = IORESOURCE_IRQ,
  450. },
  451. };
  452. static struct platform_device hdmi_lcdc_device = {
  453. .name = "sh_mobile_lcdc_fb",
  454. .num_resources = ARRAY_SIZE(hdmi_lcdc_resources),
  455. .resource = hdmi_lcdc_resources,
  456. .id = 1,
  457. .dev = {
  458. .platform_data = &hdmi_lcdc_info,
  459. .coherent_dma_mask = ~0,
  460. },
  461. };
  462. static struct asoc_simple_dai_init_info fsi2_hdmi_init_info = {
  463. .cpu_daifmt = SND_SOC_DAIFMT_CBM_CFM,
  464. };
  465. static struct asoc_simple_card_info fsi2_hdmi_info = {
  466. .name = "HDMI",
  467. .card = "FSI2B-HDMI",
  468. .cpu_dai = "fsib-dai",
  469. .codec = "sh-mobile-hdmi",
  470. .platform = "sh_fsi2",
  471. .codec_dai = "sh_mobile_hdmi-hifi",
  472. .init = &fsi2_hdmi_init_info,
  473. };
  474. static struct platform_device fsi_hdmi_device = {
  475. .name = "asoc-simple-card",
  476. .id = 1,
  477. .dev = {
  478. .platform_data = &fsi2_hdmi_info,
  479. },
  480. };
  481. static void __init hdmi_init_pm_clock(void)
  482. {
  483. struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
  484. int ret;
  485. long rate;
  486. if (IS_ERR(hdmi_ick)) {
  487. ret = PTR_ERR(hdmi_ick);
  488. pr_err("Cannot get HDMI ICK: %d\n", ret);
  489. goto out;
  490. }
  491. ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
  492. if (ret < 0) {
  493. pr_err("Cannot set PLLC2 parent: %d, %d users\n",
  494. ret, sh7372_pllc2_clk.usecount);
  495. goto out;
  496. }
  497. pr_debug("PLLC2 initial frequency %lu\n",
  498. clk_get_rate(&sh7372_pllc2_clk));
  499. rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
  500. if (rate < 0) {
  501. pr_err("Cannot get suitable rate: %ld\n", rate);
  502. ret = rate;
  503. goto out;
  504. }
  505. ret = clk_set_rate(&sh7372_pllc2_clk, rate);
  506. if (ret < 0) {
  507. pr_err("Cannot set rate %ld: %d\n", rate, ret);
  508. goto out;
  509. }
  510. pr_debug("PLLC2 set frequency %lu\n", rate);
  511. ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
  512. if (ret < 0)
  513. pr_err("Cannot set HDMI parent: %d\n", ret);
  514. out:
  515. if (!IS_ERR(hdmi_ick))
  516. clk_put(hdmi_ick);
  517. }
  518. /* USBHS0 is connected to CN22 which takes a USB Mini-B plug
  519. *
  520. * The sh7372 SoC has IRQ7 set aside for USBHS0 hotplug,
  521. * but on this particular board IRQ7 is already used by
  522. * the touch screen. This leaves us with software polling.
  523. */
  524. #define USBHS0_POLL_INTERVAL (HZ * 5)
  525. struct usbhs_private {
  526. unsigned int usbphyaddr;
  527. unsigned int usbcrcaddr;
  528. struct renesas_usbhs_platform_info info;
  529. struct delayed_work work;
  530. struct platform_device *pdev;
  531. };
  532. #define usbhs_get_priv(pdev) \
  533. container_of(renesas_usbhs_get_info(pdev), \
  534. struct usbhs_private, info)
  535. #define usbhs_is_connected(priv) \
  536. (!((1 << 7) & __raw_readw(priv->usbcrcaddr)))
  537. static int usbhs_get_vbus(struct platform_device *pdev)
  538. {
  539. return usbhs_is_connected(usbhs_get_priv(pdev));
  540. }
  541. static void usbhs_phy_reset(struct platform_device *pdev)
  542. {
  543. struct usbhs_private *priv = usbhs_get_priv(pdev);
  544. /* init phy */
  545. __raw_writew(0x8a0a, priv->usbcrcaddr);
  546. }
  547. static int usbhs0_get_id(struct platform_device *pdev)
  548. {
  549. return USBHS_GADGET;
  550. }
  551. static void usbhs0_work_function(struct work_struct *work)
  552. {
  553. struct usbhs_private *priv = container_of(work, struct usbhs_private,
  554. work.work);
  555. renesas_usbhs_call_notify_hotplug(priv->pdev);
  556. schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
  557. }
  558. static int usbhs0_hardware_init(struct platform_device *pdev)
  559. {
  560. struct usbhs_private *priv = usbhs_get_priv(pdev);
  561. priv->pdev = pdev;
  562. INIT_DELAYED_WORK(&priv->work, usbhs0_work_function);
  563. schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
  564. return 0;
  565. }
  566. static void usbhs0_hardware_exit(struct platform_device *pdev)
  567. {
  568. struct usbhs_private *priv = usbhs_get_priv(pdev);
  569. cancel_delayed_work_sync(&priv->work);
  570. }
  571. static struct usbhs_private usbhs0_private = {
  572. .usbcrcaddr = 0xe605810c, /* USBCR2 */
  573. .info = {
  574. .platform_callback = {
  575. .hardware_init = usbhs0_hardware_init,
  576. .hardware_exit = usbhs0_hardware_exit,
  577. .phy_reset = usbhs_phy_reset,
  578. .get_id = usbhs0_get_id,
  579. .get_vbus = usbhs_get_vbus,
  580. },
  581. .driver_param = {
  582. .buswait_bwait = 4,
  583. .d0_tx_id = SHDMA_SLAVE_USB0_TX,
  584. .d1_rx_id = SHDMA_SLAVE_USB0_RX,
  585. },
  586. },
  587. };
  588. static struct resource usbhs0_resources[] = {
  589. [0] = {
  590. .name = "USBHS0",
  591. .start = 0xe6890000,
  592. .end = 0xe68900e6 - 1,
  593. .flags = IORESOURCE_MEM,
  594. },
  595. [1] = {
  596. .start = evt2irq(0x1ca0) /* USB0_USB0I0 */,
  597. .flags = IORESOURCE_IRQ,
  598. },
  599. };
  600. static struct platform_device usbhs0_device = {
  601. .name = "renesas_usbhs",
  602. .id = 0,
  603. .dev = {
  604. .platform_data = &usbhs0_private.info,
  605. },
  606. .num_resources = ARRAY_SIZE(usbhs0_resources),
  607. .resource = usbhs0_resources,
  608. };
  609. /* USBHS1 is connected to CN31 which takes a USB Mini-AB plug
  610. *
  611. * Use J30 to select between Host and Function. This setting
  612. * can however not be detected by software. Hotplug of USBHS1
  613. * is provided via IRQ8.
  614. *
  615. * Current USB1 works as "USB Host".
  616. * - set J30 "short"
  617. *
  618. * If you want to use it as "USB gadget",
  619. * - J30 "open"
  620. * - modify usbhs1_get_id() USBHS_HOST -> USBHS_GADGET
  621. * - add .get_vbus = usbhs_get_vbus in usbhs1_private
  622. */
  623. #define IRQ8 evt2irq(0x0300)
  624. #define USB_PHY_MODE (1 << 4)
  625. #define USB_PHY_INT_EN ((1 << 3) | (1 << 2))
  626. #define USB_PHY_ON (1 << 1)
  627. #define USB_PHY_OFF (1 << 0)
  628. #define USB_PHY_INT_CLR (USB_PHY_ON | USB_PHY_OFF)
  629. static irqreturn_t usbhs1_interrupt(int irq, void *data)
  630. {
  631. struct platform_device *pdev = data;
  632. struct usbhs_private *priv = usbhs_get_priv(pdev);
  633. dev_dbg(&pdev->dev, "%s\n", __func__);
  634. renesas_usbhs_call_notify_hotplug(pdev);
  635. /* clear status */
  636. __raw_writew(__raw_readw(priv->usbphyaddr) | USB_PHY_INT_CLR,
  637. priv->usbphyaddr);
  638. return IRQ_HANDLED;
  639. }
  640. static int usbhs1_hardware_init(struct platform_device *pdev)
  641. {
  642. struct usbhs_private *priv = usbhs_get_priv(pdev);
  643. int ret;
  644. /* clear interrupt status */
  645. __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
  646. ret = request_irq(IRQ8, usbhs1_interrupt, IRQF_TRIGGER_HIGH,
  647. dev_name(&pdev->dev), pdev);
  648. if (ret) {
  649. dev_err(&pdev->dev, "request_irq err\n");
  650. return ret;
  651. }
  652. /* enable USB phy interrupt */
  653. __raw_writew(USB_PHY_MODE | USB_PHY_INT_EN, priv->usbphyaddr);
  654. return 0;
  655. }
  656. static void usbhs1_hardware_exit(struct platform_device *pdev)
  657. {
  658. struct usbhs_private *priv = usbhs_get_priv(pdev);
  659. /* clear interrupt status */
  660. __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
  661. free_irq(IRQ8, pdev);
  662. }
  663. static int usbhs1_get_id(struct platform_device *pdev)
  664. {
  665. return USBHS_HOST;
  666. }
  667. static u32 usbhs1_pipe_cfg[] = {
  668. USB_ENDPOINT_XFER_CONTROL,
  669. USB_ENDPOINT_XFER_ISOC,
  670. USB_ENDPOINT_XFER_ISOC,
  671. USB_ENDPOINT_XFER_BULK,
  672. USB_ENDPOINT_XFER_BULK,
  673. USB_ENDPOINT_XFER_BULK,
  674. USB_ENDPOINT_XFER_INT,
  675. USB_ENDPOINT_XFER_INT,
  676. USB_ENDPOINT_XFER_INT,
  677. USB_ENDPOINT_XFER_BULK,
  678. USB_ENDPOINT_XFER_BULK,
  679. USB_ENDPOINT_XFER_BULK,
  680. USB_ENDPOINT_XFER_BULK,
  681. USB_ENDPOINT_XFER_BULK,
  682. USB_ENDPOINT_XFER_BULK,
  683. USB_ENDPOINT_XFER_BULK,
  684. };
  685. static struct usbhs_private usbhs1_private = {
  686. .usbphyaddr = 0xe60581e2, /* USBPHY1INTAP */
  687. .usbcrcaddr = 0xe6058130, /* USBCR4 */
  688. .info = {
  689. .platform_callback = {
  690. .hardware_init = usbhs1_hardware_init,
  691. .hardware_exit = usbhs1_hardware_exit,
  692. .get_id = usbhs1_get_id,
  693. .phy_reset = usbhs_phy_reset,
  694. },
  695. .driver_param = {
  696. .buswait_bwait = 4,
  697. .has_otg = 1,
  698. .pipe_type = usbhs1_pipe_cfg,
  699. .pipe_size = ARRAY_SIZE(usbhs1_pipe_cfg),
  700. .d0_tx_id = SHDMA_SLAVE_USB1_TX,
  701. .d1_rx_id = SHDMA_SLAVE_USB1_RX,
  702. },
  703. },
  704. };
  705. static struct resource usbhs1_resources[] = {
  706. [0] = {
  707. .name = "USBHS1",
  708. .start = 0xe68b0000,
  709. .end = 0xe68b00e6 - 1,
  710. .flags = IORESOURCE_MEM,
  711. },
  712. [1] = {
  713. .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
  714. .flags = IORESOURCE_IRQ,
  715. },
  716. };
  717. static struct platform_device usbhs1_device = {
  718. .name = "renesas_usbhs",
  719. .id = 1,
  720. .dev = {
  721. .platform_data = &usbhs1_private.info,
  722. },
  723. .num_resources = ARRAY_SIZE(usbhs1_resources),
  724. .resource = usbhs1_resources,
  725. };
  726. /* LED */
  727. static struct gpio_led mackerel_leds[] = {
  728. {
  729. .name = "led0",
  730. .gpio = GPIO_PORT0,
  731. .default_state = LEDS_GPIO_DEFSTATE_ON,
  732. },
  733. {
  734. .name = "led1",
  735. .gpio = GPIO_PORT1,
  736. .default_state = LEDS_GPIO_DEFSTATE_ON,
  737. },
  738. {
  739. .name = "led2",
  740. .gpio = GPIO_PORT2,
  741. .default_state = LEDS_GPIO_DEFSTATE_ON,
  742. },
  743. {
  744. .name = "led3",
  745. .gpio = GPIO_PORT159,
  746. .default_state = LEDS_GPIO_DEFSTATE_ON,
  747. }
  748. };
  749. static struct gpio_led_platform_data mackerel_leds_pdata = {
  750. .leds = mackerel_leds,
  751. .num_leds = ARRAY_SIZE(mackerel_leds),
  752. };
  753. static struct platform_device leds_device = {
  754. .name = "leds-gpio",
  755. .id = 0,
  756. .dev = {
  757. .platform_data = &mackerel_leds_pdata,
  758. },
  759. };
  760. /* FSI */
  761. #define IRQ_FSI evt2irq(0x1840)
  762. static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
  763. {
  764. int ret;
  765. if (rate <= 0)
  766. return 0;
  767. if (!enable) {
  768. clk_disable(clk);
  769. return 0;
  770. }
  771. ret = clk_set_rate(clk, clk_round_rate(clk, rate));
  772. if (ret < 0)
  773. return ret;
  774. return clk_enable(clk);
  775. }
  776. static int fsi_b_set_rate(struct device *dev, int rate, int enable)
  777. {
  778. struct clk *fsib_clk;
  779. struct clk *fdiv_clk = &sh7372_fsidivb_clk;
  780. long fsib_rate = 0;
  781. long fdiv_rate = 0;
  782. int ackmd_bpfmd;
  783. int ret;
  784. /* clock start */
  785. switch (rate) {
  786. case 44100:
  787. fsib_rate = rate * 256;
  788. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  789. break;
  790. case 48000:
  791. fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
  792. fdiv_rate = rate * 256;
  793. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  794. break;
  795. default:
  796. pr_err("unsupported rate in FSI2 port B\n");
  797. return -EINVAL;
  798. }
  799. /* FSI B setting */
  800. fsib_clk = clk_get(dev, "ickb");
  801. if (IS_ERR(fsib_clk))
  802. return -EIO;
  803. /* fsib */
  804. ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
  805. if (ret < 0)
  806. goto fsi_set_rate_end;
  807. /* FSI DIV */
  808. ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
  809. if (ret < 0) {
  810. /* disable FSI B */
  811. if (enable)
  812. __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
  813. goto fsi_set_rate_end;
  814. }
  815. ret = ackmd_bpfmd;
  816. fsi_set_rate_end:
  817. clk_put(fsib_clk);
  818. return ret;
  819. }
  820. static struct sh_fsi_platform_info fsi_info = {
  821. .port_a = {
  822. .flags = SH_FSI_BRS_INV,
  823. .tx_id = SHDMA_SLAVE_FSIA_TX,
  824. .rx_id = SHDMA_SLAVE_FSIA_RX,
  825. },
  826. .port_b = {
  827. .flags = SH_FSI_BRS_INV |
  828. SH_FSI_BRM_INV |
  829. SH_FSI_LRS_INV |
  830. SH_FSI_FMT_SPDIF,
  831. .set_rate = fsi_b_set_rate,
  832. }
  833. };
  834. static struct resource fsi_resources[] = {
  835. [0] = {
  836. /* we need 0xFE1F0000 to access DMA
  837. * instead of 0xFE3C0000 */
  838. .name = "FSI",
  839. .start = 0xFE1F0000,
  840. .end = 0xFE1F0400 - 1,
  841. .flags = IORESOURCE_MEM,
  842. },
  843. [1] = {
  844. .start = IRQ_FSI,
  845. .flags = IORESOURCE_IRQ,
  846. },
  847. };
  848. static struct platform_device fsi_device = {
  849. .name = "sh_fsi2",
  850. .id = -1,
  851. .num_resources = ARRAY_SIZE(fsi_resources),
  852. .resource = fsi_resources,
  853. .dev = {
  854. .platform_data = &fsi_info,
  855. },
  856. };
  857. static struct asoc_simple_dai_init_info fsi2_ak4643_init_info = {
  858. .fmt = SND_SOC_DAIFMT_LEFT_J,
  859. .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM,
  860. .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
  861. .sysclk = 11289600,
  862. };
  863. static struct asoc_simple_card_info fsi2_ak4643_info = {
  864. .name = "AK4643",
  865. .card = "FSI2A-AK4643",
  866. .cpu_dai = "fsia-dai",
  867. .codec = "ak4642-codec.0-0013",
  868. .platform = "sh_fsi2",
  869. .codec_dai = "ak4642-hifi",
  870. .init = &fsi2_ak4643_init_info,
  871. };
  872. static struct platform_device fsi_ak4643_device = {
  873. .name = "asoc-simple-card",
  874. .dev = {
  875. .platform_data = &fsi2_ak4643_info,
  876. },
  877. };
  878. /* FLCTL */
  879. static struct mtd_partition nand_partition_info[] = {
  880. {
  881. .name = "system",
  882. .offset = 0,
  883. .size = 128 * 1024 * 1024,
  884. },
  885. {
  886. .name = "userdata",
  887. .offset = MTDPART_OFS_APPEND,
  888. .size = 256 * 1024 * 1024,
  889. },
  890. {
  891. .name = "cache",
  892. .offset = MTDPART_OFS_APPEND,
  893. .size = 128 * 1024 * 1024,
  894. },
  895. };
  896. static struct resource nand_flash_resources[] = {
  897. [0] = {
  898. .start = 0xe6a30000,
  899. .end = 0xe6a3009b,
  900. .flags = IORESOURCE_MEM,
  901. }
  902. };
  903. static struct sh_flctl_platform_data nand_flash_data = {
  904. .parts = nand_partition_info,
  905. .nr_parts = ARRAY_SIZE(nand_partition_info),
  906. .flcmncr_val = CLK_16B_12L_4H | TYPESEL_SET
  907. | SHBUSSEL | SEL_16BIT | SNAND_E,
  908. .use_holden = 1,
  909. };
  910. static struct platform_device nand_flash_device = {
  911. .name = "sh_flctl",
  912. .resource = nand_flash_resources,
  913. .num_resources = ARRAY_SIZE(nand_flash_resources),
  914. .dev = {
  915. .platform_data = &nand_flash_data,
  916. },
  917. };
  918. /*
  919. * The card detect pin of the top SD/MMC slot (CN7) is active low and is
  920. * connected to GPIO A22 of SH7372 (GPIO_PORT41).
  921. */
  922. static int slot_cn7_get_cd(struct platform_device *pdev)
  923. {
  924. return !gpio_get_value(GPIO_PORT41);
  925. }
  926. /* SDHI0 */
  927. static struct sh_mobile_sdhi_info sdhi0_info = {
  928. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  929. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  930. .tmio_flags = TMIO_MMC_USE_GPIO_CD,
  931. .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
  932. .cd_gpio = GPIO_PORT172,
  933. };
  934. static struct resource sdhi0_resources[] = {
  935. [0] = {
  936. .name = "SDHI0",
  937. .start = 0xe6850000,
  938. .end = 0xe68500ff,
  939. .flags = IORESOURCE_MEM,
  940. },
  941. [1] = {
  942. .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
  943. .flags = IORESOURCE_IRQ,
  944. },
  945. [2] = {
  946. .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
  947. .flags = IORESOURCE_IRQ,
  948. },
  949. [3] = {
  950. .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
  951. .flags = IORESOURCE_IRQ,
  952. },
  953. };
  954. static struct platform_device sdhi0_device = {
  955. .name = "sh_mobile_sdhi",
  956. .num_resources = ARRAY_SIZE(sdhi0_resources),
  957. .resource = sdhi0_resources,
  958. .id = 0,
  959. .dev = {
  960. .platform_data = &sdhi0_info,
  961. },
  962. };
  963. #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
  964. /* SDHI1 */
  965. static struct sh_mobile_sdhi_info sdhi1_info = {
  966. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  967. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  968. .tmio_ocr_mask = MMC_VDD_165_195,
  969. .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
  970. .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  971. MMC_CAP_NEEDS_POLL,
  972. .get_cd = slot_cn7_get_cd,
  973. };
  974. static struct resource sdhi1_resources[] = {
  975. [0] = {
  976. .name = "SDHI1",
  977. .start = 0xe6860000,
  978. .end = 0xe68600ff,
  979. .flags = IORESOURCE_MEM,
  980. },
  981. [1] = {
  982. .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
  983. .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
  984. .flags = IORESOURCE_IRQ,
  985. },
  986. [2] = {
  987. .name = SH_MOBILE_SDHI_IRQ_SDCARD,
  988. .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
  989. .flags = IORESOURCE_IRQ,
  990. },
  991. [3] = {
  992. .name = SH_MOBILE_SDHI_IRQ_SDIO,
  993. .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
  994. .flags = IORESOURCE_IRQ,
  995. },
  996. };
  997. static struct platform_device sdhi1_device = {
  998. .name = "sh_mobile_sdhi",
  999. .num_resources = ARRAY_SIZE(sdhi1_resources),
  1000. .resource = sdhi1_resources,
  1001. .id = 1,
  1002. .dev = {
  1003. .platform_data = &sdhi1_info,
  1004. },
  1005. };
  1006. #endif
  1007. /*
  1008. * The card detect pin of the top SD/MMC slot (CN23) is active low and is
  1009. * connected to GPIO SCIFB_SCK of SH7372 (GPIO_PORT162).
  1010. */
  1011. static int slot_cn23_get_cd(struct platform_device *pdev)
  1012. {
  1013. return !gpio_get_value(GPIO_PORT162);
  1014. }
  1015. /* SDHI2 */
  1016. static struct sh_mobile_sdhi_info sdhi2_info = {
  1017. .dma_slave_tx = SHDMA_SLAVE_SDHI2_TX,
  1018. .dma_slave_rx = SHDMA_SLAVE_SDHI2_RX,
  1019. .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
  1020. .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  1021. MMC_CAP_NEEDS_POLL,
  1022. .get_cd = slot_cn23_get_cd,
  1023. };
  1024. static struct resource sdhi2_resources[] = {
  1025. [0] = {
  1026. .name = "SDHI2",
  1027. .start = 0xe6870000,
  1028. .end = 0xe68700ff,
  1029. .flags = IORESOURCE_MEM,
  1030. },
  1031. [1] = {
  1032. .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
  1033. .start = evt2irq(0x1200), /* SDHI2_SDHI2I0 */
  1034. .flags = IORESOURCE_IRQ,
  1035. },
  1036. [2] = {
  1037. .name = SH_MOBILE_SDHI_IRQ_SDCARD,
  1038. .start = evt2irq(0x1220), /* SDHI2_SDHI2I1 */
  1039. .flags = IORESOURCE_IRQ,
  1040. },
  1041. [3] = {
  1042. .name = SH_MOBILE_SDHI_IRQ_SDIO,
  1043. .start = evt2irq(0x1240), /* SDHI2_SDHI2I2 */
  1044. .flags = IORESOURCE_IRQ,
  1045. },
  1046. };
  1047. static struct platform_device sdhi2_device = {
  1048. .name = "sh_mobile_sdhi",
  1049. .num_resources = ARRAY_SIZE(sdhi2_resources),
  1050. .resource = sdhi2_resources,
  1051. .id = 2,
  1052. .dev = {
  1053. .platform_data = &sdhi2_info,
  1054. },
  1055. };
  1056. /* SH_MMCIF */
  1057. static struct resource sh_mmcif_resources[] = {
  1058. [0] = {
  1059. .name = "MMCIF",
  1060. .start = 0xE6BD0000,
  1061. .end = 0xE6BD00FF,
  1062. .flags = IORESOURCE_MEM,
  1063. },
  1064. [1] = {
  1065. /* MMC ERR */
  1066. .start = evt2irq(0x1ac0),
  1067. .flags = IORESOURCE_IRQ,
  1068. },
  1069. [2] = {
  1070. /* MMC NOR */
  1071. .start = evt2irq(0x1ae0),
  1072. .flags = IORESOURCE_IRQ,
  1073. },
  1074. };
  1075. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  1076. .sup_pclk = 0,
  1077. .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  1078. .caps = MMC_CAP_4_BIT_DATA |
  1079. MMC_CAP_8_BIT_DATA |
  1080. MMC_CAP_NEEDS_POLL,
  1081. .get_cd = slot_cn7_get_cd,
  1082. .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
  1083. .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
  1084. };
  1085. static struct platform_device sh_mmcif_device = {
  1086. .name = "sh_mmcif",
  1087. .id = 0,
  1088. .dev = {
  1089. .dma_mask = NULL,
  1090. .coherent_dma_mask = 0xffffffff,
  1091. .platform_data = &sh_mmcif_plat,
  1092. },
  1093. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  1094. .resource = sh_mmcif_resources,
  1095. };
  1096. static int mackerel_camera_add(struct soc_camera_device *icd);
  1097. static void mackerel_camera_del(struct soc_camera_device *icd);
  1098. static int camera_set_capture(struct soc_camera_platform_info *info,
  1099. int enable)
  1100. {
  1101. return 0; /* camera sensor always enabled */
  1102. }
  1103. static struct soc_camera_platform_info camera_info = {
  1104. .format_name = "UYVY",
  1105. .format_depth = 16,
  1106. .format = {
  1107. .code = V4L2_MBUS_FMT_UYVY8_2X8,
  1108. .colorspace = V4L2_COLORSPACE_SMPTE170M,
  1109. .field = V4L2_FIELD_NONE,
  1110. .width = 640,
  1111. .height = 480,
  1112. },
  1113. .mbus_param = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
  1114. V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
  1115. V4L2_MBUS_DATA_ACTIVE_HIGH,
  1116. .mbus_type = V4L2_MBUS_PARALLEL,
  1117. .set_capture = camera_set_capture,
  1118. };
  1119. static struct soc_camera_link camera_link = {
  1120. .bus_id = 0,
  1121. .add_device = mackerel_camera_add,
  1122. .del_device = mackerel_camera_del,
  1123. .module_name = "soc_camera_platform",
  1124. .priv = &camera_info,
  1125. };
  1126. static struct platform_device *camera_device;
  1127. static void mackerel_camera_release(struct device *dev)
  1128. {
  1129. soc_camera_platform_release(&camera_device);
  1130. }
  1131. static int mackerel_camera_add(struct soc_camera_device *icd)
  1132. {
  1133. return soc_camera_platform_add(icd, &camera_device, &camera_link,
  1134. mackerel_camera_release, 0);
  1135. }
  1136. static void mackerel_camera_del(struct soc_camera_device *icd)
  1137. {
  1138. soc_camera_platform_del(icd, camera_device, &camera_link);
  1139. }
  1140. static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
  1141. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  1142. .max_width = 8188,
  1143. .max_height = 8188,
  1144. };
  1145. static struct resource ceu_resources[] = {
  1146. [0] = {
  1147. .name = "CEU",
  1148. .start = 0xfe910000,
  1149. .end = 0xfe91009f,
  1150. .flags = IORESOURCE_MEM,
  1151. },
  1152. [1] = {
  1153. .start = intcs_evt2irq(0x880),
  1154. .flags = IORESOURCE_IRQ,
  1155. },
  1156. [2] = {
  1157. /* place holder for contiguous memory */
  1158. },
  1159. };
  1160. static struct platform_device ceu_device = {
  1161. .name = "sh_mobile_ceu",
  1162. .id = 0, /* "ceu0" clock */
  1163. .num_resources = ARRAY_SIZE(ceu_resources),
  1164. .resource = ceu_resources,
  1165. .dev = {
  1166. .platform_data = &sh_mobile_ceu_info,
  1167. .coherent_dma_mask = 0xffffffff,
  1168. },
  1169. };
  1170. static struct platform_device mackerel_camera = {
  1171. .name = "soc-camera-pdrv",
  1172. .id = 0,
  1173. .dev = {
  1174. .platform_data = &camera_link,
  1175. },
  1176. };
  1177. static struct platform_device *mackerel_devices[] __initdata = {
  1178. &nor_flash_device,
  1179. &smc911x_device,
  1180. &lcdc_device,
  1181. &usbhs1_device,
  1182. &usbhs0_device,
  1183. &leds_device,
  1184. &fsi_device,
  1185. &fsi_ak4643_device,
  1186. &fsi_hdmi_device,
  1187. &nand_flash_device,
  1188. &sdhi0_device,
  1189. #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
  1190. &sdhi1_device,
  1191. #endif
  1192. &sdhi2_device,
  1193. &sh_mmcif_device,
  1194. &ceu_device,
  1195. &mackerel_camera,
  1196. &hdmi_device,
  1197. &hdmi_lcdc_device,
  1198. &meram_device,
  1199. };
  1200. /* Keypad Initialization */
  1201. #define KEYPAD_BUTTON(ev_type, ev_code, act_low) \
  1202. { \
  1203. .type = ev_type, \
  1204. .code = ev_code, \
  1205. .active_low = act_low, \
  1206. }
  1207. #define KEYPAD_BUTTON_LOW(event_code) KEYPAD_BUTTON(EV_KEY, event_code, 1)
  1208. static struct tca6416_button mackerel_gpio_keys[] = {
  1209. KEYPAD_BUTTON_LOW(KEY_HOME),
  1210. KEYPAD_BUTTON_LOW(KEY_MENU),
  1211. KEYPAD_BUTTON_LOW(KEY_BACK),
  1212. KEYPAD_BUTTON_LOW(KEY_POWER),
  1213. };
  1214. static struct tca6416_keys_platform_data mackerel_tca6416_keys_info = {
  1215. .buttons = mackerel_gpio_keys,
  1216. .nbuttons = ARRAY_SIZE(mackerel_gpio_keys),
  1217. .rep = 1,
  1218. .use_polling = 0,
  1219. .pinmask = 0x000F,
  1220. };
  1221. /* I2C */
  1222. #define IRQ7 evt2irq(0x02e0)
  1223. #define IRQ9 evt2irq(0x0320)
  1224. static struct i2c_board_info i2c0_devices[] = {
  1225. {
  1226. I2C_BOARD_INFO("ak4643", 0x13),
  1227. },
  1228. /* Keypad */
  1229. {
  1230. I2C_BOARD_INFO("tca6408-keys", 0x20),
  1231. .platform_data = &mackerel_tca6416_keys_info,
  1232. .irq = IRQ9,
  1233. },
  1234. /* Touchscreen */
  1235. {
  1236. I2C_BOARD_INFO("st1232-ts", 0x55),
  1237. .irq = IRQ7,
  1238. },
  1239. };
  1240. #define IRQ21 evt2irq(0x32a0)
  1241. static struct i2c_board_info i2c1_devices[] = {
  1242. /* Accelerometer */
  1243. {
  1244. I2C_BOARD_INFO("adxl34x", 0x53),
  1245. .irq = IRQ21,
  1246. },
  1247. };
  1248. #define GPIO_PORT9CR 0xE6051009
  1249. #define GPIO_PORT10CR 0xE605100A
  1250. #define GPIO_PORT167CR 0xE60520A7
  1251. #define GPIO_PORT168CR 0xE60520A8
  1252. #define SRCR4 0xe61580bc
  1253. #define USCCR1 0xE6058144
  1254. static void __init mackerel_init(void)
  1255. {
  1256. u32 srcr4;
  1257. struct clk *clk;
  1258. /* External clock source */
  1259. clk_set_rate(&sh7372_dv_clki_clk, 27000000);
  1260. sh7372_pinmux_init();
  1261. /* enable SCIFA0 */
  1262. gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
  1263. gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
  1264. /* enable SMSC911X */
  1265. gpio_request(GPIO_FN_CS5A, NULL);
  1266. gpio_request(GPIO_FN_IRQ6_39, NULL);
  1267. /* LCDC */
  1268. gpio_request(GPIO_FN_LCDD23, NULL);
  1269. gpio_request(GPIO_FN_LCDD22, NULL);
  1270. gpio_request(GPIO_FN_LCDD21, NULL);
  1271. gpio_request(GPIO_FN_LCDD20, NULL);
  1272. gpio_request(GPIO_FN_LCDD19, NULL);
  1273. gpio_request(GPIO_FN_LCDD18, NULL);
  1274. gpio_request(GPIO_FN_LCDD17, NULL);
  1275. gpio_request(GPIO_FN_LCDD16, NULL);
  1276. gpio_request(GPIO_FN_LCDD15, NULL);
  1277. gpio_request(GPIO_FN_LCDD14, NULL);
  1278. gpio_request(GPIO_FN_LCDD13, NULL);
  1279. gpio_request(GPIO_FN_LCDD12, NULL);
  1280. gpio_request(GPIO_FN_LCDD11, NULL);
  1281. gpio_request(GPIO_FN_LCDD10, NULL);
  1282. gpio_request(GPIO_FN_LCDD9, NULL);
  1283. gpio_request(GPIO_FN_LCDD8, NULL);
  1284. gpio_request(GPIO_FN_LCDD7, NULL);
  1285. gpio_request(GPIO_FN_LCDD6, NULL);
  1286. gpio_request(GPIO_FN_LCDD5, NULL);
  1287. gpio_request(GPIO_FN_LCDD4, NULL);
  1288. gpio_request(GPIO_FN_LCDD3, NULL);
  1289. gpio_request(GPIO_FN_LCDD2, NULL);
  1290. gpio_request(GPIO_FN_LCDD1, NULL);
  1291. gpio_request(GPIO_FN_LCDD0, NULL);
  1292. gpio_request(GPIO_FN_LCDDISP, NULL);
  1293. gpio_request(GPIO_FN_LCDDCK, NULL);
  1294. gpio_request(GPIO_PORT31, NULL); /* backlight */
  1295. gpio_direction_output(GPIO_PORT31, 0); /* off by default */
  1296. gpio_request(GPIO_PORT151, NULL); /* LCDDON */
  1297. gpio_direction_output(GPIO_PORT151, 1);
  1298. /* USBHS0 */
  1299. gpio_request(GPIO_FN_VBUS0_0, NULL);
  1300. gpio_pull_down(GPIO_PORT168CR); /* VBUS0_0 pull down */
  1301. /* USBHS1 */
  1302. gpio_request(GPIO_FN_VBUS0_1, NULL);
  1303. gpio_pull_down(GPIO_PORT167CR); /* VBUS0_1 pull down */
  1304. gpio_request(GPIO_FN_IDIN_1_113, NULL);
  1305. /* enable FSI2 port A (ak4643) */
  1306. gpio_request(GPIO_FN_FSIAIBT, NULL);
  1307. gpio_request(GPIO_FN_FSIAILR, NULL);
  1308. gpio_request(GPIO_FN_FSIAISLD, NULL);
  1309. gpio_request(GPIO_FN_FSIAOSLD, NULL);
  1310. gpio_request(GPIO_PORT161, NULL);
  1311. gpio_direction_output(GPIO_PORT161, 0); /* slave */
  1312. gpio_request(GPIO_PORT9, NULL);
  1313. gpio_request(GPIO_PORT10, NULL);
  1314. gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
  1315. gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
  1316. intc_set_priority(IRQ_FSI, 3); /* irq priority FSI(3) > SMSC911X(2) */
  1317. /* setup FSI2 port B (HDMI) */
  1318. gpio_request(GPIO_FN_FSIBCK, NULL);
  1319. __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
  1320. /* set SPU2 clock to 119.6 MHz */
  1321. clk = clk_get(NULL, "spu_clk");
  1322. if (!IS_ERR(clk)) {
  1323. clk_set_rate(clk, clk_round_rate(clk, 119600000));
  1324. clk_put(clk);
  1325. }
  1326. /* enable Keypad */
  1327. gpio_request(GPIO_FN_IRQ9_42, NULL);
  1328. irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
  1329. /* enable Touchscreen */
  1330. gpio_request(GPIO_FN_IRQ7_40, NULL);
  1331. irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
  1332. /* enable Accelerometer */
  1333. gpio_request(GPIO_FN_IRQ21, NULL);
  1334. irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
  1335. /* enable SDHI0 */
  1336. gpio_request(GPIO_FN_SDHIWP0, NULL);
  1337. gpio_request(GPIO_FN_SDHICMD0, NULL);
  1338. gpio_request(GPIO_FN_SDHICLK0, NULL);
  1339. gpio_request(GPIO_FN_SDHID0_3, NULL);
  1340. gpio_request(GPIO_FN_SDHID0_2, NULL);
  1341. gpio_request(GPIO_FN_SDHID0_1, NULL);
  1342. gpio_request(GPIO_FN_SDHID0_0, NULL);
  1343. #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
  1344. /* enable SDHI1 */
  1345. gpio_request(GPIO_FN_SDHICMD1, NULL);
  1346. gpio_request(GPIO_FN_SDHICLK1, NULL);
  1347. gpio_request(GPIO_FN_SDHID1_3, NULL);
  1348. gpio_request(GPIO_FN_SDHID1_2, NULL);
  1349. gpio_request(GPIO_FN_SDHID1_1, NULL);
  1350. gpio_request(GPIO_FN_SDHID1_0, NULL);
  1351. #endif
  1352. /* card detect pin for MMC slot (CN7) */
  1353. gpio_request(GPIO_PORT41, NULL);
  1354. gpio_direction_input(GPIO_PORT41);
  1355. /* enable SDHI2 */
  1356. gpio_request(GPIO_FN_SDHICMD2, NULL);
  1357. gpio_request(GPIO_FN_SDHICLK2, NULL);
  1358. gpio_request(GPIO_FN_SDHID2_3, NULL);
  1359. gpio_request(GPIO_FN_SDHID2_2, NULL);
  1360. gpio_request(GPIO_FN_SDHID2_1, NULL);
  1361. gpio_request(GPIO_FN_SDHID2_0, NULL);
  1362. /* card detect pin for microSD slot (CN23) */
  1363. gpio_request(GPIO_PORT162, NULL);
  1364. gpio_direction_input(GPIO_PORT162);
  1365. /* MMCIF */
  1366. gpio_request(GPIO_FN_MMCD0_0, NULL);
  1367. gpio_request(GPIO_FN_MMCD0_1, NULL);
  1368. gpio_request(GPIO_FN_MMCD0_2, NULL);
  1369. gpio_request(GPIO_FN_MMCD0_3, NULL);
  1370. gpio_request(GPIO_FN_MMCD0_4, NULL);
  1371. gpio_request(GPIO_FN_MMCD0_5, NULL);
  1372. gpio_request(GPIO_FN_MMCD0_6, NULL);
  1373. gpio_request(GPIO_FN_MMCD0_7, NULL);
  1374. gpio_request(GPIO_FN_MMCCMD0, NULL);
  1375. gpio_request(GPIO_FN_MMCCLK0, NULL);
  1376. /* FLCTL */
  1377. gpio_request(GPIO_FN_D0_NAF0, NULL);
  1378. gpio_request(GPIO_FN_D1_NAF1, NULL);
  1379. gpio_request(GPIO_FN_D2_NAF2, NULL);
  1380. gpio_request(GPIO_FN_D3_NAF3, NULL);
  1381. gpio_request(GPIO_FN_D4_NAF4, NULL);
  1382. gpio_request(GPIO_FN_D5_NAF5, NULL);
  1383. gpio_request(GPIO_FN_D6_NAF6, NULL);
  1384. gpio_request(GPIO_FN_D7_NAF7, NULL);
  1385. gpio_request(GPIO_FN_D8_NAF8, NULL);
  1386. gpio_request(GPIO_FN_D9_NAF9, NULL);
  1387. gpio_request(GPIO_FN_D10_NAF10, NULL);
  1388. gpio_request(GPIO_FN_D11_NAF11, NULL);
  1389. gpio_request(GPIO_FN_D12_NAF12, NULL);
  1390. gpio_request(GPIO_FN_D13_NAF13, NULL);
  1391. gpio_request(GPIO_FN_D14_NAF14, NULL);
  1392. gpio_request(GPIO_FN_D15_NAF15, NULL);
  1393. gpio_request(GPIO_FN_FCE0, NULL);
  1394. gpio_request(GPIO_FN_WE0_FWE, NULL);
  1395. gpio_request(GPIO_FN_FRB, NULL);
  1396. gpio_request(GPIO_FN_A4_FOE, NULL);
  1397. gpio_request(GPIO_FN_A5_FCDE, NULL);
  1398. gpio_request(GPIO_FN_RD_FSC, NULL);
  1399. /* enable GPS module (GT-720F) */
  1400. gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
  1401. gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
  1402. /* CEU */
  1403. gpio_request(GPIO_FN_VIO_CLK, NULL);
  1404. gpio_request(GPIO_FN_VIO_VD, NULL);
  1405. gpio_request(GPIO_FN_VIO_HD, NULL);
  1406. gpio_request(GPIO_FN_VIO_FIELD, NULL);
  1407. gpio_request(GPIO_FN_VIO_CKO, NULL);
  1408. gpio_request(GPIO_FN_VIO_D7, NULL);
  1409. gpio_request(GPIO_FN_VIO_D6, NULL);
  1410. gpio_request(GPIO_FN_VIO_D5, NULL);
  1411. gpio_request(GPIO_FN_VIO_D4, NULL);
  1412. gpio_request(GPIO_FN_VIO_D3, NULL);
  1413. gpio_request(GPIO_FN_VIO_D2, NULL);
  1414. gpio_request(GPIO_FN_VIO_D1, NULL);
  1415. gpio_request(GPIO_FN_VIO_D0, NULL);
  1416. /* HDMI */
  1417. gpio_request(GPIO_FN_HDMI_HPD, NULL);
  1418. gpio_request(GPIO_FN_HDMI_CEC, NULL);
  1419. /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
  1420. srcr4 = __raw_readl(SRCR4);
  1421. __raw_writel(srcr4 | (1 << 13), SRCR4);
  1422. udelay(50);
  1423. __raw_writel(srcr4 & ~(1 << 13), SRCR4);
  1424. i2c_register_board_info(0, i2c0_devices,
  1425. ARRAY_SIZE(i2c0_devices));
  1426. i2c_register_board_info(1, i2c1_devices,
  1427. ARRAY_SIZE(i2c1_devices));
  1428. sh7372_add_standard_devices();
  1429. platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
  1430. sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device);
  1431. sh7372_add_device_to_domain(&sh7372_a4lc, &hdmi_lcdc_device);
  1432. sh7372_add_device_to_domain(&sh7372_a4lc, &meram_device);
  1433. sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device);
  1434. sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs0_device);
  1435. sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs1_device);
  1436. sh7372_add_device_to_domain(&sh7372_a3sp, &nand_flash_device);
  1437. sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device);
  1438. sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device);
  1439. #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
  1440. sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device);
  1441. #endif
  1442. sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi2_device);
  1443. sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device);
  1444. hdmi_init_pm_clock();
  1445. sh7372_pm_init();
  1446. pm_clk_add(&fsi_device.dev, "spu2");
  1447. pm_clk_add(&hdmi_lcdc_device.dev, "hdmi");
  1448. }
  1449. MACHINE_START(MACKEREL, "mackerel")
  1450. .map_io = sh7372_map_io,
  1451. .init_early = sh7372_add_early_devices,
  1452. .init_irq = sh7372_init_irq,
  1453. .handle_irq = shmobile_handle_irq_intc,
  1454. .init_machine = mackerel_init,
  1455. .init_late = shmobile_init_late,
  1456. .timer = &shmobile_timer,
  1457. MACHINE_END