board-ap4evb.c 33 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474
  1. /*
  2. * AP4EVB board support
  3. *
  4. * Copyright (C) 2010 Magnus Damm
  5. * Copyright (C) 2008 Yoshihiro Shimoda
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/clk.h>
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/delay.h>
  27. #include <linux/mfd/tmio.h>
  28. #include <linux/mmc/host.h>
  29. #include <linux/mmc/sh_mobile_sdhi.h>
  30. #include <linux/mtd/mtd.h>
  31. #include <linux/mtd/partitions.h>
  32. #include <linux/mtd/physmap.h>
  33. #include <linux/mmc/sh_mmcif.h>
  34. #include <linux/i2c.h>
  35. #include <linux/i2c/tsc2007.h>
  36. #include <linux/io.h>
  37. #include <linux/smsc911x.h>
  38. #include <linux/sh_intc.h>
  39. #include <linux/sh_clk.h>
  40. #include <linux/gpio.h>
  41. #include <linux/input.h>
  42. #include <linux/leds.h>
  43. #include <linux/input/sh_keysc.h>
  44. #include <linux/usb/r8a66597.h>
  45. #include <linux/pm_clock.h>
  46. #include <linux/dma-mapping.h>
  47. #include <media/sh_mobile_ceu.h>
  48. #include <media/sh_mobile_csi2.h>
  49. #include <media/soc_camera.h>
  50. #include <sound/sh_fsi.h>
  51. #include <sound/simple_card.h>
  52. #include <video/sh_mobile_hdmi.h>
  53. #include <video/sh_mobile_lcdc.h>
  54. #include <video/sh_mipi_dsi.h>
  55. #include <mach/common.h>
  56. #include <mach/irqs.h>
  57. #include <mach/sh7372.h>
  58. #include <asm/mach-types.h>
  59. #include <asm/mach/arch.h>
  60. #include <asm/setup.h>
  61. /*
  62. * Address Interface BusWidth note
  63. * ------------------------------------------------------------------
  64. * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
  65. * 0x0800_0000 user area -
  66. * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
  67. * 0x1400_0000 Ether (LAN9220) 16bit
  68. * 0x1600_0000 user area - cannot use with NAND
  69. * 0x1800_0000 user area -
  70. * 0x1A00_0000 -
  71. * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
  72. */
  73. /*
  74. * NOR Flash ROM
  75. *
  76. * SW1 | SW2 | SW7 | NOR Flash ROM
  77. * bit1 | bit1 bit2 | bit1 | Memory allocation
  78. * ------+------------+------+------------------
  79. * OFF | ON OFF | ON | Area 0
  80. * OFF | ON OFF | OFF | Area 4
  81. */
  82. /*
  83. * NAND Flash ROM
  84. *
  85. * SW1 | SW2 | SW7 | NAND Flash ROM
  86. * bit1 | bit1 bit2 | bit2 | Memory allocation
  87. * ------+------------+------+------------------
  88. * OFF | ON OFF | ON | FCE 0
  89. * OFF | ON OFF | OFF | FCE 1
  90. */
  91. /*
  92. * SMSC 9220
  93. *
  94. * SW1 SMSC 9220
  95. * -----------------------
  96. * ON access disable
  97. * OFF access enable
  98. */
  99. /*
  100. * LCD / IRQ / KEYSC / IrDA
  101. *
  102. * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
  103. * LCD = 2nd LCDC (WVGA)
  104. *
  105. * | SW43 |
  106. * SW3 | ON | OFF |
  107. * -------------+-----------------------+---------------+
  108. * ON | KEY / IrDA | LCD |
  109. * OFF | KEY / IrDA / IRQ | IRQ |
  110. *
  111. *
  112. * QHD / WVGA display
  113. *
  114. * You can choice display type on menuconfig.
  115. * Then, check above dip-switch.
  116. */
  117. /*
  118. * USB
  119. *
  120. * J7 : 1-2 MAX3355E VBUS
  121. * 2-3 DC 5.0V
  122. *
  123. * S39: bit2: off
  124. */
  125. /*
  126. * FSI/FSMI
  127. *
  128. * SW41 : ON : SH-Mobile AP4 Audio Mode
  129. * : OFF : Bluetooth Audio Mode
  130. */
  131. /*
  132. * MMC0/SDHI1 (CN7)
  133. *
  134. * J22 : select card voltage
  135. * 1-2 pin : 1.8v
  136. * 2-3 pin : 3.3v
  137. *
  138. * SW1 | SW33
  139. * | bit1 | bit2 | bit3 | bit4
  140. * ------------+------+------+------+-------
  141. * MMC0 OFF | OFF | ON | ON | X
  142. * SDHI1 OFF | ON | X | OFF | ON
  143. *
  144. * voltage lebel
  145. * CN7 : 1.8v
  146. * CN12: 3.3v
  147. */
  148. /* MTD */
  149. static struct mtd_partition nor_flash_partitions[] = {
  150. {
  151. .name = "loader",
  152. .offset = 0x00000000,
  153. .size = 512 * 1024,
  154. .mask_flags = MTD_WRITEABLE,
  155. },
  156. {
  157. .name = "bootenv",
  158. .offset = MTDPART_OFS_APPEND,
  159. .size = 512 * 1024,
  160. .mask_flags = MTD_WRITEABLE,
  161. },
  162. {
  163. .name = "kernel_ro",
  164. .offset = MTDPART_OFS_APPEND,
  165. .size = 8 * 1024 * 1024,
  166. .mask_flags = MTD_WRITEABLE,
  167. },
  168. {
  169. .name = "kernel",
  170. .offset = MTDPART_OFS_APPEND,
  171. .size = 8 * 1024 * 1024,
  172. },
  173. {
  174. .name = "data",
  175. .offset = MTDPART_OFS_APPEND,
  176. .size = MTDPART_SIZ_FULL,
  177. },
  178. };
  179. static struct physmap_flash_data nor_flash_data = {
  180. .width = 2,
  181. .parts = nor_flash_partitions,
  182. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  183. };
  184. static struct resource nor_flash_resources[] = {
  185. [0] = {
  186. .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
  187. .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
  188. .flags = IORESOURCE_MEM,
  189. }
  190. };
  191. static struct platform_device nor_flash_device = {
  192. .name = "physmap-flash",
  193. .dev = {
  194. .platform_data = &nor_flash_data,
  195. },
  196. .num_resources = ARRAY_SIZE(nor_flash_resources),
  197. .resource = nor_flash_resources,
  198. };
  199. /* SMSC 9220 */
  200. static struct resource smc911x_resources[] = {
  201. {
  202. .start = 0x14000000,
  203. .end = 0x16000000 - 1,
  204. .flags = IORESOURCE_MEM,
  205. }, {
  206. .start = evt2irq(0x02c0) /* IRQ6A */,
  207. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  208. },
  209. };
  210. static struct smsc911x_platform_config smsc911x_info = {
  211. .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
  212. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  213. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  214. };
  215. static struct platform_device smc911x_device = {
  216. .name = "smsc911x",
  217. .id = -1,
  218. .num_resources = ARRAY_SIZE(smc911x_resources),
  219. .resource = smc911x_resources,
  220. .dev = {
  221. .platform_data = &smsc911x_info,
  222. },
  223. };
  224. /*
  225. * The card detect pin of the top SD/MMC slot (CN7) is active low and is
  226. * connected to GPIO A22 of SH7372 (GPIO_PORT41).
  227. */
  228. static int slot_cn7_get_cd(struct platform_device *pdev)
  229. {
  230. return !gpio_get_value(GPIO_PORT41);
  231. }
  232. /* MERAM */
  233. static struct sh_mobile_meram_info meram_info = {
  234. .addr_mode = SH_MOBILE_MERAM_MODE1,
  235. };
  236. static struct resource meram_resources[] = {
  237. [0] = {
  238. .name = "regs",
  239. .start = 0xe8000000,
  240. .end = 0xe807ffff,
  241. .flags = IORESOURCE_MEM,
  242. },
  243. [1] = {
  244. .name = "meram",
  245. .start = 0xe8080000,
  246. .end = 0xe81fffff,
  247. .flags = IORESOURCE_MEM,
  248. },
  249. };
  250. static struct platform_device meram_device = {
  251. .name = "sh_mobile_meram",
  252. .id = 0,
  253. .num_resources = ARRAY_SIZE(meram_resources),
  254. .resource = meram_resources,
  255. .dev = {
  256. .platform_data = &meram_info,
  257. },
  258. };
  259. /* SH_MMCIF */
  260. static struct resource sh_mmcif_resources[] = {
  261. [0] = {
  262. .name = "MMCIF",
  263. .start = 0xE6BD0000,
  264. .end = 0xE6BD00FF,
  265. .flags = IORESOURCE_MEM,
  266. },
  267. [1] = {
  268. /* MMC ERR */
  269. .start = evt2irq(0x1ac0),
  270. .flags = IORESOURCE_IRQ,
  271. },
  272. [2] = {
  273. /* MMC NOR */
  274. .start = evt2irq(0x1ae0),
  275. .flags = IORESOURCE_IRQ,
  276. },
  277. };
  278. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  279. .sup_pclk = 0,
  280. .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  281. .caps = MMC_CAP_4_BIT_DATA |
  282. MMC_CAP_8_BIT_DATA |
  283. MMC_CAP_NEEDS_POLL,
  284. .get_cd = slot_cn7_get_cd,
  285. .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
  286. .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
  287. };
  288. static struct platform_device sh_mmcif_device = {
  289. .name = "sh_mmcif",
  290. .id = 0,
  291. .dev = {
  292. .dma_mask = NULL,
  293. .coherent_dma_mask = 0xffffffff,
  294. .platform_data = &sh_mmcif_plat,
  295. },
  296. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  297. .resource = sh_mmcif_resources,
  298. };
  299. /* SDHI0 */
  300. static struct sh_mobile_sdhi_info sdhi0_info = {
  301. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  302. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  303. .tmio_caps = MMC_CAP_SDIO_IRQ,
  304. };
  305. static struct resource sdhi0_resources[] = {
  306. [0] = {
  307. .name = "SDHI0",
  308. .start = 0xe6850000,
  309. .end = 0xe68500ff,
  310. .flags = IORESOURCE_MEM,
  311. },
  312. [1] = {
  313. .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
  314. .flags = IORESOURCE_IRQ,
  315. },
  316. [2] = {
  317. .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
  318. .flags = IORESOURCE_IRQ,
  319. },
  320. [3] = {
  321. .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
  322. .flags = IORESOURCE_IRQ,
  323. },
  324. };
  325. static struct platform_device sdhi0_device = {
  326. .name = "sh_mobile_sdhi",
  327. .num_resources = ARRAY_SIZE(sdhi0_resources),
  328. .resource = sdhi0_resources,
  329. .id = 0,
  330. .dev = {
  331. .platform_data = &sdhi0_info,
  332. },
  333. };
  334. /* SDHI1 */
  335. static struct sh_mobile_sdhi_info sdhi1_info = {
  336. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  337. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  338. .tmio_ocr_mask = MMC_VDD_165_195,
  339. .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
  340. .tmio_caps = MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ,
  341. .get_cd = slot_cn7_get_cd,
  342. };
  343. static struct resource sdhi1_resources[] = {
  344. [0] = {
  345. .name = "SDHI1",
  346. .start = 0xe6860000,
  347. .end = 0xe68600ff,
  348. .flags = IORESOURCE_MEM,
  349. },
  350. [1] = {
  351. .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
  352. .flags = IORESOURCE_IRQ,
  353. },
  354. [2] = {
  355. .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
  356. .flags = IORESOURCE_IRQ,
  357. },
  358. [3] = {
  359. .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
  360. .flags = IORESOURCE_IRQ,
  361. },
  362. };
  363. static struct platform_device sdhi1_device = {
  364. .name = "sh_mobile_sdhi",
  365. .num_resources = ARRAY_SIZE(sdhi1_resources),
  366. .resource = sdhi1_resources,
  367. .id = 1,
  368. .dev = {
  369. .platform_data = &sdhi1_info,
  370. },
  371. };
  372. /* USB1 */
  373. static void usb1_host_port_power(int port, int power)
  374. {
  375. if (!power) /* only power-on supported for now */
  376. return;
  377. /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
  378. __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
  379. }
  380. static struct r8a66597_platdata usb1_host_data = {
  381. .on_chip = 1,
  382. .port_power = usb1_host_port_power,
  383. };
  384. static struct resource usb1_host_resources[] = {
  385. [0] = {
  386. .name = "USBHS",
  387. .start = 0xE68B0000,
  388. .end = 0xE68B00E6 - 1,
  389. .flags = IORESOURCE_MEM,
  390. },
  391. [1] = {
  392. .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
  393. .flags = IORESOURCE_IRQ,
  394. },
  395. };
  396. static struct platform_device usb1_host_device = {
  397. .name = "r8a66597_hcd",
  398. .id = 1,
  399. .dev = {
  400. .dma_mask = NULL, /* not use dma */
  401. .coherent_dma_mask = 0xffffffff,
  402. .platform_data = &usb1_host_data,
  403. },
  404. .num_resources = ARRAY_SIZE(usb1_host_resources),
  405. .resource = usb1_host_resources,
  406. };
  407. /*
  408. * QHD display
  409. */
  410. #ifdef CONFIG_AP4EVB_QHD
  411. /* KEYSC (Needs SW43 set to ON) */
  412. static struct sh_keysc_info keysc_info = {
  413. .mode = SH_KEYSC_MODE_1,
  414. .scan_timing = 3,
  415. .delay = 2500,
  416. .keycodes = {
  417. KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
  418. KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
  419. KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
  420. KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
  421. KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
  422. },
  423. };
  424. static struct resource keysc_resources[] = {
  425. [0] = {
  426. .name = "KEYSC",
  427. .start = 0xe61b0000,
  428. .end = 0xe61b0063,
  429. .flags = IORESOURCE_MEM,
  430. },
  431. [1] = {
  432. .start = evt2irq(0x0be0), /* KEYSC_KEY */
  433. .flags = IORESOURCE_IRQ,
  434. },
  435. };
  436. static struct platform_device keysc_device = {
  437. .name = "sh_keysc",
  438. .id = 0, /* "keysc0" clock */
  439. .num_resources = ARRAY_SIZE(keysc_resources),
  440. .resource = keysc_resources,
  441. .dev = {
  442. .platform_data = &keysc_info,
  443. },
  444. };
  445. /* MIPI-DSI */
  446. static int sh_mipi_set_dot_clock(struct platform_device *pdev,
  447. void __iomem *base,
  448. int enable)
  449. {
  450. struct clk *pck = clk_get(&pdev->dev, "dsip_clk");
  451. if (IS_ERR(pck))
  452. return PTR_ERR(pck);
  453. if (enable) {
  454. /*
  455. * DSIPCLK = 24MHz
  456. * D-PHY = DSIPCLK * ((0x6*2)+1) = 312MHz (see .phyctrl)
  457. * HsByteCLK = D-PHY/8 = 39MHz
  458. *
  459. * X * Y * FPS =
  460. * (544+72+600+16) * (961+8+8+2) * 30 = 36.1MHz
  461. */
  462. clk_set_rate(pck, clk_round_rate(pck, 24000000));
  463. clk_enable(pck);
  464. } else {
  465. clk_disable(pck);
  466. }
  467. clk_put(pck);
  468. return 0;
  469. }
  470. static struct resource mipidsi0_resources[] = {
  471. [0] = {
  472. .start = 0xffc60000,
  473. .end = 0xffc63073,
  474. .flags = IORESOURCE_MEM,
  475. },
  476. [1] = {
  477. .start = 0xffc68000,
  478. .end = 0xffc680ef,
  479. .flags = IORESOURCE_MEM,
  480. },
  481. };
  482. static struct sh_mobile_lcdc_info lcdc_info;
  483. static struct sh_mipi_dsi_info mipidsi0_info = {
  484. .data_format = MIPI_RGB888,
  485. .lcd_chan = &lcdc_info.ch[0],
  486. .lane = 2,
  487. .vsynw_offset = 17,
  488. .phyctrl = 0x6 << 8,
  489. .flags = SH_MIPI_DSI_SYNC_PULSES_MODE |
  490. SH_MIPI_DSI_HSbyteCLK,
  491. .set_dot_clock = sh_mipi_set_dot_clock,
  492. };
  493. static struct platform_device mipidsi0_device = {
  494. .name = "sh-mipi-dsi",
  495. .num_resources = ARRAY_SIZE(mipidsi0_resources),
  496. .resource = mipidsi0_resources,
  497. .id = 0,
  498. .dev = {
  499. .platform_data = &mipidsi0_info,
  500. },
  501. };
  502. static struct platform_device *qhd_devices[] __initdata = {
  503. &mipidsi0_device,
  504. &keysc_device,
  505. };
  506. #endif /* CONFIG_AP4EVB_QHD */
  507. /* LCDC0 */
  508. static const struct fb_videomode ap4evb_lcdc_modes[] = {
  509. {
  510. #ifdef CONFIG_AP4EVB_QHD
  511. .name = "R63302(QHD)",
  512. .xres = 544,
  513. .yres = 961,
  514. .left_margin = 72,
  515. .right_margin = 600,
  516. .hsync_len = 16,
  517. .upper_margin = 8,
  518. .lower_margin = 8,
  519. .vsync_len = 2,
  520. .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
  521. #else
  522. .name = "WVGA Panel",
  523. .xres = 800,
  524. .yres = 480,
  525. .left_margin = 220,
  526. .right_margin = 110,
  527. .hsync_len = 70,
  528. .upper_margin = 20,
  529. .lower_margin = 5,
  530. .vsync_len = 5,
  531. .sync = 0,
  532. #endif
  533. },
  534. };
  535. static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
  536. .icb[0] = {
  537. .meram_size = 0x40,
  538. },
  539. .icb[1] = {
  540. .meram_size = 0x40,
  541. },
  542. };
  543. static struct sh_mobile_lcdc_info lcdc_info = {
  544. .meram_dev = &meram_info,
  545. .ch[0] = {
  546. .chan = LCDC_CHAN_MAINLCD,
  547. .fourcc = V4L2_PIX_FMT_RGB565,
  548. .lcd_modes = ap4evb_lcdc_modes,
  549. .num_modes = ARRAY_SIZE(ap4evb_lcdc_modes),
  550. .meram_cfg = &lcd_meram_cfg,
  551. #ifdef CONFIG_AP4EVB_QHD
  552. .tx_dev = &mipidsi0_device,
  553. #endif
  554. }
  555. };
  556. static struct resource lcdc_resources[] = {
  557. [0] = {
  558. .name = "LCDC",
  559. .start = 0xfe940000, /* P4-only space */
  560. .end = 0xfe943fff,
  561. .flags = IORESOURCE_MEM,
  562. },
  563. [1] = {
  564. .start = intcs_evt2irq(0x580),
  565. .flags = IORESOURCE_IRQ,
  566. },
  567. };
  568. static struct platform_device lcdc_device = {
  569. .name = "sh_mobile_lcdc_fb",
  570. .num_resources = ARRAY_SIZE(lcdc_resources),
  571. .resource = lcdc_resources,
  572. .dev = {
  573. .platform_data = &lcdc_info,
  574. .coherent_dma_mask = ~0,
  575. },
  576. };
  577. /* FSI */
  578. #define IRQ_FSI evt2irq(0x1840)
  579. static int __fsi_set_rate(struct clk *clk, long rate, int enable)
  580. {
  581. int ret = 0;
  582. if (rate <= 0)
  583. return ret;
  584. if (enable) {
  585. ret = clk_set_rate(clk, rate);
  586. if (0 == ret)
  587. ret = clk_enable(clk);
  588. } else {
  589. clk_disable(clk);
  590. }
  591. return ret;
  592. }
  593. static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
  594. {
  595. return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable);
  596. }
  597. static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable)
  598. {
  599. struct clk *fsia_ick;
  600. struct clk *fsiack;
  601. int ret = -EIO;
  602. fsia_ick = clk_get(dev, "icka");
  603. if (IS_ERR(fsia_ick))
  604. return PTR_ERR(fsia_ick);
  605. /*
  606. * FSIACK is connected to AK4642,
  607. * and use external clock pin from it.
  608. * it is parent of fsia_ick now.
  609. */
  610. fsiack = clk_get_parent(fsia_ick);
  611. if (!fsiack)
  612. goto fsia_ick_out;
  613. /*
  614. * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick
  615. *
  616. ** FIXME **
  617. * Because the freq_table of external clk (fsiack) are all 0,
  618. * the return value of clk_round_rate became 0.
  619. * So, it use __fsi_set_rate here.
  620. */
  621. ret = __fsi_set_rate(fsiack, rate, enable);
  622. if (ret < 0)
  623. goto fsiack_out;
  624. ret = __fsi_set_round_rate(fsia_ick, rate, enable);
  625. if ((ret < 0) && enable)
  626. __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */
  627. fsiack_out:
  628. clk_put(fsiack);
  629. fsia_ick_out:
  630. clk_put(fsia_ick);
  631. return 0;
  632. }
  633. static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
  634. {
  635. struct clk *fsib_clk;
  636. struct clk *fdiv_clk = &sh7372_fsidivb_clk;
  637. long fsib_rate = 0;
  638. long fdiv_rate = 0;
  639. int ackmd_bpfmd;
  640. int ret;
  641. switch (rate) {
  642. case 44100:
  643. fsib_rate = rate * 256;
  644. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  645. break;
  646. case 48000:
  647. fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
  648. fdiv_rate = rate * 256;
  649. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  650. break;
  651. default:
  652. pr_err("unsupported rate in FSI2 port B\n");
  653. return -EINVAL;
  654. }
  655. /* FSI B setting */
  656. fsib_clk = clk_get(dev, "ickb");
  657. if (IS_ERR(fsib_clk))
  658. return -EIO;
  659. ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
  660. if (ret < 0)
  661. goto fsi_set_rate_end;
  662. /* FSI DIV setting */
  663. ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
  664. if (ret < 0) {
  665. /* disable FSI B */
  666. if (enable)
  667. __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
  668. goto fsi_set_rate_end;
  669. }
  670. ret = ackmd_bpfmd;
  671. fsi_set_rate_end:
  672. clk_put(fsib_clk);
  673. return ret;
  674. }
  675. static struct sh_fsi_platform_info fsi_info = {
  676. .port_a = {
  677. .flags = SH_FSI_BRS_INV,
  678. .set_rate = fsi_ak4642_set_rate,
  679. },
  680. .port_b = {
  681. .flags = SH_FSI_BRS_INV |
  682. SH_FSI_BRM_INV |
  683. SH_FSI_LRS_INV |
  684. SH_FSI_FMT_SPDIF,
  685. .set_rate = fsi_hdmi_set_rate,
  686. },
  687. };
  688. static struct resource fsi_resources[] = {
  689. [0] = {
  690. .name = "FSI",
  691. .start = 0xFE3C0000,
  692. .end = 0xFE3C0400 - 1,
  693. .flags = IORESOURCE_MEM,
  694. },
  695. [1] = {
  696. .start = IRQ_FSI,
  697. .flags = IORESOURCE_IRQ,
  698. },
  699. };
  700. static struct platform_device fsi_device = {
  701. .name = "sh_fsi2",
  702. .id = -1,
  703. .num_resources = ARRAY_SIZE(fsi_resources),
  704. .resource = fsi_resources,
  705. .dev = {
  706. .platform_data = &fsi_info,
  707. },
  708. };
  709. static struct asoc_simple_dai_init_info fsi2_ak4643_init_info = {
  710. .fmt = SND_SOC_DAIFMT_LEFT_J,
  711. .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM,
  712. .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
  713. .sysclk = 11289600,
  714. };
  715. static struct asoc_simple_card_info fsi2_ak4643_info = {
  716. .name = "AK4643",
  717. .card = "FSI2A-AK4643",
  718. .cpu_dai = "fsia-dai",
  719. .codec = "ak4642-codec.0-0013",
  720. .platform = "sh_fsi2",
  721. .codec_dai = "ak4642-hifi",
  722. .init = &fsi2_ak4643_init_info,
  723. };
  724. static struct platform_device fsi_ak4643_device = {
  725. .name = "asoc-simple-card",
  726. .dev = {
  727. .platform_data = &fsi2_ak4643_info,
  728. },
  729. };
  730. /* LCDC1 */
  731. static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
  732. unsigned long *parent_freq);
  733. static struct sh_mobile_hdmi_info hdmi_info = {
  734. .flags = HDMI_SND_SRC_SPDIF,
  735. .clk_optimize_parent = ap4evb_clk_optimize,
  736. };
  737. static struct resource hdmi_resources[] = {
  738. [0] = {
  739. .name = "HDMI",
  740. .start = 0xe6be0000,
  741. .end = 0xe6be00ff,
  742. .flags = IORESOURCE_MEM,
  743. },
  744. [1] = {
  745. /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
  746. .start = evt2irq(0x17e0),
  747. .flags = IORESOURCE_IRQ,
  748. },
  749. };
  750. static struct platform_device hdmi_device = {
  751. .name = "sh-mobile-hdmi",
  752. .num_resources = ARRAY_SIZE(hdmi_resources),
  753. .resource = hdmi_resources,
  754. .id = -1,
  755. .dev = {
  756. .platform_data = &hdmi_info,
  757. },
  758. };
  759. static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
  760. unsigned long *parent_freq)
  761. {
  762. struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
  763. long error;
  764. if (IS_ERR(hdmi_ick)) {
  765. int ret = PTR_ERR(hdmi_ick);
  766. pr_err("Cannot get HDMI ICK: %d\n", ret);
  767. return ret;
  768. }
  769. error = clk_round_parent(hdmi_ick, target, best_freq, parent_freq, 1, 64);
  770. clk_put(hdmi_ick);
  771. return error;
  772. }
  773. static const struct sh_mobile_meram_cfg hdmi_meram_cfg = {
  774. .icb[0] = {
  775. .meram_size = 0x100,
  776. },
  777. .icb[1] = {
  778. .meram_size = 0x100,
  779. },
  780. };
  781. static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
  782. .clock_source = LCDC_CLK_EXTERNAL,
  783. .meram_dev = &meram_info,
  784. .ch[0] = {
  785. .chan = LCDC_CHAN_MAINLCD,
  786. .fourcc = V4L2_PIX_FMT_RGB565,
  787. .interface_type = RGB24,
  788. .clock_divider = 1,
  789. .flags = LCDC_FLAGS_DWPOL,
  790. .meram_cfg = &hdmi_meram_cfg,
  791. .tx_dev = &hdmi_device,
  792. }
  793. };
  794. static struct resource lcdc1_resources[] = {
  795. [0] = {
  796. .name = "LCDC1",
  797. .start = 0xfe944000,
  798. .end = 0xfe947fff,
  799. .flags = IORESOURCE_MEM,
  800. },
  801. [1] = {
  802. .start = intcs_evt2irq(0x1780),
  803. .flags = IORESOURCE_IRQ,
  804. },
  805. };
  806. static struct platform_device lcdc1_device = {
  807. .name = "sh_mobile_lcdc_fb",
  808. .num_resources = ARRAY_SIZE(lcdc1_resources),
  809. .resource = lcdc1_resources,
  810. .id = 1,
  811. .dev = {
  812. .platform_data = &sh_mobile_lcdc1_info,
  813. .coherent_dma_mask = ~0,
  814. },
  815. };
  816. static struct asoc_simple_dai_init_info fsi2_hdmi_init_info = {
  817. .cpu_daifmt = SND_SOC_DAIFMT_CBM_CFM,
  818. };
  819. static struct asoc_simple_card_info fsi2_hdmi_info = {
  820. .name = "HDMI",
  821. .card = "FSI2B-HDMI",
  822. .cpu_dai = "fsib-dai",
  823. .codec = "sh-mobile-hdmi",
  824. .platform = "sh_fsi2",
  825. .codec_dai = "sh_mobile_hdmi-hifi",
  826. .init = &fsi2_hdmi_init_info,
  827. };
  828. static struct platform_device fsi_hdmi_device = {
  829. .name = "asoc-simple-card",
  830. .id = 1,
  831. .dev = {
  832. .platform_data = &fsi2_hdmi_info,
  833. },
  834. };
  835. static struct gpio_led ap4evb_leds[] = {
  836. {
  837. .name = "led4",
  838. .gpio = GPIO_PORT185,
  839. .default_state = LEDS_GPIO_DEFSTATE_ON,
  840. },
  841. {
  842. .name = "led2",
  843. .gpio = GPIO_PORT186,
  844. .default_state = LEDS_GPIO_DEFSTATE_ON,
  845. },
  846. {
  847. .name = "led3",
  848. .gpio = GPIO_PORT187,
  849. .default_state = LEDS_GPIO_DEFSTATE_ON,
  850. },
  851. {
  852. .name = "led1",
  853. .gpio = GPIO_PORT188,
  854. .default_state = LEDS_GPIO_DEFSTATE_ON,
  855. }
  856. };
  857. static struct gpio_led_platform_data ap4evb_leds_pdata = {
  858. .num_leds = ARRAY_SIZE(ap4evb_leds),
  859. .leds = ap4evb_leds,
  860. };
  861. static struct platform_device leds_device = {
  862. .name = "leds-gpio",
  863. .id = 0,
  864. .dev = {
  865. .platform_data = &ap4evb_leds_pdata,
  866. },
  867. };
  868. static struct i2c_board_info imx074_info = {
  869. I2C_BOARD_INFO("imx074", 0x1a),
  870. };
  871. static struct soc_camera_link imx074_link = {
  872. .bus_id = 0,
  873. .board_info = &imx074_info,
  874. .i2c_adapter_id = 0,
  875. .module_name = "imx074",
  876. };
  877. static struct platform_device ap4evb_camera = {
  878. .name = "soc-camera-pdrv",
  879. .id = 0,
  880. .dev = {
  881. .platform_data = &imx074_link,
  882. },
  883. };
  884. static struct sh_csi2_client_config csi2_clients[] = {
  885. {
  886. .phy = SH_CSI2_PHY_MAIN,
  887. .lanes = 0, /* default: 2 lanes */
  888. .channel = 0,
  889. .pdev = &ap4evb_camera,
  890. },
  891. };
  892. static struct sh_csi2_pdata csi2_info = {
  893. .type = SH_CSI2C,
  894. .clients = csi2_clients,
  895. .num_clients = ARRAY_SIZE(csi2_clients),
  896. .flags = SH_CSI2_ECC | SH_CSI2_CRC,
  897. };
  898. static struct resource csi2_resources[] = {
  899. [0] = {
  900. .name = "CSI2",
  901. .start = 0xffc90000,
  902. .end = 0xffc90fff,
  903. .flags = IORESOURCE_MEM,
  904. },
  905. [1] = {
  906. .start = intcs_evt2irq(0x17a0),
  907. .flags = IORESOURCE_IRQ,
  908. },
  909. };
  910. static struct sh_mobile_ceu_companion csi2 = {
  911. .id = 0,
  912. .num_resources = ARRAY_SIZE(csi2_resources),
  913. .resource = csi2_resources,
  914. .platform_data = &csi2_info,
  915. };
  916. static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
  917. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  918. .max_width = 8188,
  919. .max_height = 8188,
  920. .csi2 = &csi2,
  921. };
  922. static struct resource ceu_resources[] = {
  923. [0] = {
  924. .name = "CEU",
  925. .start = 0xfe910000,
  926. .end = 0xfe91009f,
  927. .flags = IORESOURCE_MEM,
  928. },
  929. [1] = {
  930. .start = intcs_evt2irq(0x880),
  931. .flags = IORESOURCE_IRQ,
  932. },
  933. [2] = {
  934. /* place holder for contiguous memory */
  935. },
  936. };
  937. static struct platform_device ceu_device = {
  938. .name = "sh_mobile_ceu",
  939. .id = 0, /* "ceu0" clock */
  940. .num_resources = ARRAY_SIZE(ceu_resources),
  941. .resource = ceu_resources,
  942. .dev = {
  943. .platform_data = &sh_mobile_ceu_info,
  944. .coherent_dma_mask = 0xffffffff,
  945. },
  946. };
  947. static struct platform_device *ap4evb_devices[] __initdata = {
  948. &leds_device,
  949. &nor_flash_device,
  950. &smc911x_device,
  951. &sdhi0_device,
  952. &sdhi1_device,
  953. &usb1_host_device,
  954. &fsi_device,
  955. &fsi_ak4643_device,
  956. &fsi_hdmi_device,
  957. &sh_mmcif_device,
  958. &hdmi_device,
  959. &lcdc_device,
  960. &lcdc1_device,
  961. &ceu_device,
  962. &ap4evb_camera,
  963. &meram_device,
  964. };
  965. static void __init hdmi_init_pm_clock(void)
  966. {
  967. struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
  968. int ret;
  969. long rate;
  970. if (IS_ERR(hdmi_ick)) {
  971. ret = PTR_ERR(hdmi_ick);
  972. pr_err("Cannot get HDMI ICK: %d\n", ret);
  973. goto out;
  974. }
  975. ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
  976. if (ret < 0) {
  977. pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount);
  978. goto out;
  979. }
  980. pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk));
  981. rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
  982. if (rate < 0) {
  983. pr_err("Cannot get suitable rate: %ld\n", rate);
  984. ret = rate;
  985. goto out;
  986. }
  987. ret = clk_set_rate(&sh7372_pllc2_clk, rate);
  988. if (ret < 0) {
  989. pr_err("Cannot set rate %ld: %d\n", rate, ret);
  990. goto out;
  991. }
  992. pr_debug("PLLC2 set frequency %lu\n", rate);
  993. ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
  994. if (ret < 0)
  995. pr_err("Cannot set HDMI parent: %d\n", ret);
  996. out:
  997. if (!IS_ERR(hdmi_ick))
  998. clk_put(hdmi_ick);
  999. }
  1000. static void __init fsi_init_pm_clock(void)
  1001. {
  1002. struct clk *fsia_ick;
  1003. int ret;
  1004. fsia_ick = clk_get(&fsi_device.dev, "icka");
  1005. if (IS_ERR(fsia_ick)) {
  1006. ret = PTR_ERR(fsia_ick);
  1007. pr_err("Cannot get FSI ICK: %d\n", ret);
  1008. return;
  1009. }
  1010. ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
  1011. if (ret < 0)
  1012. pr_err("Cannot set FSI-A parent: %d\n", ret);
  1013. clk_put(fsia_ick);
  1014. }
  1015. /*
  1016. * FIXME !!
  1017. *
  1018. * gpio_no_direction
  1019. * are quick_hack.
  1020. *
  1021. * current gpio frame work doesn't have
  1022. * the method to control only pull up/down/free.
  1023. * this function should be replaced by correct gpio function
  1024. */
  1025. static void __init gpio_no_direction(u32 addr)
  1026. {
  1027. __raw_writeb(0x00, addr);
  1028. }
  1029. /* TouchScreen */
  1030. #ifdef CONFIG_AP4EVB_QHD
  1031. # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
  1032. # define GPIO_TSC_PORT GPIO_PORT123
  1033. #else /* WVGA */
  1034. # define GPIO_TSC_IRQ GPIO_FN_IRQ7_40
  1035. # define GPIO_TSC_PORT GPIO_PORT40
  1036. #endif
  1037. #define IRQ28 evt2irq(0x3380) /* IRQ28A */
  1038. #define IRQ7 evt2irq(0x02e0) /* IRQ7A */
  1039. static int ts_get_pendown_state(void)
  1040. {
  1041. int val;
  1042. gpio_free(GPIO_TSC_IRQ);
  1043. gpio_request(GPIO_TSC_PORT, NULL);
  1044. gpio_direction_input(GPIO_TSC_PORT);
  1045. val = gpio_get_value(GPIO_TSC_PORT);
  1046. gpio_request(GPIO_TSC_IRQ, NULL);
  1047. return !val;
  1048. }
  1049. static int ts_init(void)
  1050. {
  1051. gpio_request(GPIO_TSC_IRQ, NULL);
  1052. return 0;
  1053. }
  1054. static struct tsc2007_platform_data tsc2007_info = {
  1055. .model = 2007,
  1056. .x_plate_ohms = 180,
  1057. .get_pendown_state = ts_get_pendown_state,
  1058. .init_platform_hw = ts_init,
  1059. };
  1060. static struct i2c_board_info tsc_device = {
  1061. I2C_BOARD_INFO("tsc2007", 0x48),
  1062. .type = "tsc2007",
  1063. .platform_data = &tsc2007_info,
  1064. /*.irq is selected on ap4evb_init */
  1065. };
  1066. /* I2C */
  1067. static struct i2c_board_info i2c0_devices[] = {
  1068. {
  1069. I2C_BOARD_INFO("ak4643", 0x13),
  1070. },
  1071. };
  1072. static struct i2c_board_info i2c1_devices[] = {
  1073. {
  1074. I2C_BOARD_INFO("r2025sd", 0x32),
  1075. },
  1076. };
  1077. #define GPIO_PORT9CR 0xE6051009
  1078. #define GPIO_PORT10CR 0xE605100A
  1079. #define USCCR1 0xE6058144
  1080. static void __init ap4evb_init(void)
  1081. {
  1082. u32 srcr4;
  1083. struct clk *clk;
  1084. /* External clock source */
  1085. clk_set_rate(&sh7372_dv_clki_clk, 27000000);
  1086. sh7372_pinmux_init();
  1087. /* enable SCIFA0 */
  1088. gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
  1089. gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
  1090. /* enable SMSC911X */
  1091. gpio_request(GPIO_FN_CS5A, NULL);
  1092. gpio_request(GPIO_FN_IRQ6_39, NULL);
  1093. /* enable Debug switch (S6) */
  1094. gpio_request(GPIO_PORT32, NULL);
  1095. gpio_request(GPIO_PORT33, NULL);
  1096. gpio_request(GPIO_PORT34, NULL);
  1097. gpio_request(GPIO_PORT35, NULL);
  1098. gpio_direction_input(GPIO_PORT32);
  1099. gpio_direction_input(GPIO_PORT33);
  1100. gpio_direction_input(GPIO_PORT34);
  1101. gpio_direction_input(GPIO_PORT35);
  1102. gpio_export(GPIO_PORT32, 0);
  1103. gpio_export(GPIO_PORT33, 0);
  1104. gpio_export(GPIO_PORT34, 0);
  1105. gpio_export(GPIO_PORT35, 0);
  1106. /* SDHI0 */
  1107. gpio_request(GPIO_FN_SDHICD0, NULL);
  1108. gpio_request(GPIO_FN_SDHIWP0, NULL);
  1109. gpio_request(GPIO_FN_SDHICMD0, NULL);
  1110. gpio_request(GPIO_FN_SDHICLK0, NULL);
  1111. gpio_request(GPIO_FN_SDHID0_3, NULL);
  1112. gpio_request(GPIO_FN_SDHID0_2, NULL);
  1113. gpio_request(GPIO_FN_SDHID0_1, NULL);
  1114. gpio_request(GPIO_FN_SDHID0_0, NULL);
  1115. /* SDHI1 */
  1116. gpio_request(GPIO_FN_SDHICMD1, NULL);
  1117. gpio_request(GPIO_FN_SDHICLK1, NULL);
  1118. gpio_request(GPIO_FN_SDHID1_3, NULL);
  1119. gpio_request(GPIO_FN_SDHID1_2, NULL);
  1120. gpio_request(GPIO_FN_SDHID1_1, NULL);
  1121. gpio_request(GPIO_FN_SDHID1_0, NULL);
  1122. /* MMCIF */
  1123. gpio_request(GPIO_FN_MMCD0_0, NULL);
  1124. gpio_request(GPIO_FN_MMCD0_1, NULL);
  1125. gpio_request(GPIO_FN_MMCD0_2, NULL);
  1126. gpio_request(GPIO_FN_MMCD0_3, NULL);
  1127. gpio_request(GPIO_FN_MMCD0_4, NULL);
  1128. gpio_request(GPIO_FN_MMCD0_5, NULL);
  1129. gpio_request(GPIO_FN_MMCD0_6, NULL);
  1130. gpio_request(GPIO_FN_MMCD0_7, NULL);
  1131. gpio_request(GPIO_FN_MMCCMD0, NULL);
  1132. gpio_request(GPIO_FN_MMCCLK0, NULL);
  1133. /* USB enable */
  1134. gpio_request(GPIO_FN_VBUS0_1, NULL);
  1135. gpio_request(GPIO_FN_IDIN_1_18, NULL);
  1136. gpio_request(GPIO_FN_PWEN_1_115, NULL);
  1137. gpio_request(GPIO_FN_OVCN_1_114, NULL);
  1138. gpio_request(GPIO_FN_EXTLP_1, NULL);
  1139. gpio_request(GPIO_FN_OVCN2_1, NULL);
  1140. /* setup USB phy */
  1141. __raw_writew(0x8a0a, 0xE6058130); /* USBCR4 */
  1142. /* enable FSI2 port A (ak4643) */
  1143. gpio_request(GPIO_FN_FSIAIBT, NULL);
  1144. gpio_request(GPIO_FN_FSIAILR, NULL);
  1145. gpio_request(GPIO_FN_FSIAISLD, NULL);
  1146. gpio_request(GPIO_FN_FSIAOSLD, NULL);
  1147. gpio_request(GPIO_PORT161, NULL);
  1148. gpio_direction_output(GPIO_PORT161, 0); /* slave */
  1149. gpio_request(GPIO_PORT9, NULL);
  1150. gpio_request(GPIO_PORT10, NULL);
  1151. gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
  1152. gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
  1153. /* card detect pin for MMC slot (CN7) */
  1154. gpio_request(GPIO_PORT41, NULL);
  1155. gpio_direction_input(GPIO_PORT41);
  1156. /* setup FSI2 port B (HDMI) */
  1157. gpio_request(GPIO_FN_FSIBCK, NULL);
  1158. __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
  1159. /* set SPU2 clock to 119.6 MHz */
  1160. clk = clk_get(NULL, "spu_clk");
  1161. if (!IS_ERR(clk)) {
  1162. clk_set_rate(clk, clk_round_rate(clk, 119600000));
  1163. clk_put(clk);
  1164. }
  1165. /*
  1166. * set irq priority, to avoid sound chopping
  1167. * when NFS rootfs is used
  1168. * FSI(3) > SMSC911X(2)
  1169. */
  1170. intc_set_priority(IRQ_FSI, 3);
  1171. i2c_register_board_info(0, i2c0_devices,
  1172. ARRAY_SIZE(i2c0_devices));
  1173. i2c_register_board_info(1, i2c1_devices,
  1174. ARRAY_SIZE(i2c1_devices));
  1175. #ifdef CONFIG_AP4EVB_QHD
  1176. /*
  1177. * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
  1178. * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
  1179. */
  1180. /* enable KEYSC */
  1181. gpio_request(GPIO_FN_KEYOUT0, NULL);
  1182. gpio_request(GPIO_FN_KEYOUT1, NULL);
  1183. gpio_request(GPIO_FN_KEYOUT2, NULL);
  1184. gpio_request(GPIO_FN_KEYOUT3, NULL);
  1185. gpio_request(GPIO_FN_KEYOUT4, NULL);
  1186. gpio_request(GPIO_FN_KEYIN0_136, NULL);
  1187. gpio_request(GPIO_FN_KEYIN1_135, NULL);
  1188. gpio_request(GPIO_FN_KEYIN2_134, NULL);
  1189. gpio_request(GPIO_FN_KEYIN3_133, NULL);
  1190. gpio_request(GPIO_FN_KEYIN4, NULL);
  1191. /* enable TouchScreen */
  1192. irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
  1193. tsc_device.irq = IRQ28;
  1194. i2c_register_board_info(1, &tsc_device, 1);
  1195. /* LCDC0 */
  1196. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  1197. lcdc_info.ch[0].interface_type = RGB24;
  1198. lcdc_info.ch[0].clock_divider = 1;
  1199. lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
  1200. lcdc_info.ch[0].panel_cfg.width = 44;
  1201. lcdc_info.ch[0].panel_cfg.height = 79;
  1202. platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
  1203. #else
  1204. /*
  1205. * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
  1206. * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
  1207. */
  1208. gpio_request(GPIO_FN_LCDD17, NULL);
  1209. gpio_request(GPIO_FN_LCDD16, NULL);
  1210. gpio_request(GPIO_FN_LCDD15, NULL);
  1211. gpio_request(GPIO_FN_LCDD14, NULL);
  1212. gpio_request(GPIO_FN_LCDD13, NULL);
  1213. gpio_request(GPIO_FN_LCDD12, NULL);
  1214. gpio_request(GPIO_FN_LCDD11, NULL);
  1215. gpio_request(GPIO_FN_LCDD10, NULL);
  1216. gpio_request(GPIO_FN_LCDD9, NULL);
  1217. gpio_request(GPIO_FN_LCDD8, NULL);
  1218. gpio_request(GPIO_FN_LCDD7, NULL);
  1219. gpio_request(GPIO_FN_LCDD6, NULL);
  1220. gpio_request(GPIO_FN_LCDD5, NULL);
  1221. gpio_request(GPIO_FN_LCDD4, NULL);
  1222. gpio_request(GPIO_FN_LCDD3, NULL);
  1223. gpio_request(GPIO_FN_LCDD2, NULL);
  1224. gpio_request(GPIO_FN_LCDD1, NULL);
  1225. gpio_request(GPIO_FN_LCDD0, NULL);
  1226. gpio_request(GPIO_FN_LCDDISP, NULL);
  1227. gpio_request(GPIO_FN_LCDDCK, NULL);
  1228. gpio_request(GPIO_PORT189, NULL); /* backlight */
  1229. gpio_direction_output(GPIO_PORT189, 1);
  1230. gpio_request(GPIO_PORT151, NULL); /* LCDDON */
  1231. gpio_direction_output(GPIO_PORT151, 1);
  1232. lcdc_info.clock_source = LCDC_CLK_BUS;
  1233. lcdc_info.ch[0].interface_type = RGB18;
  1234. lcdc_info.ch[0].clock_divider = 3;
  1235. lcdc_info.ch[0].flags = 0;
  1236. lcdc_info.ch[0].panel_cfg.width = 152;
  1237. lcdc_info.ch[0].panel_cfg.height = 91;
  1238. /* enable TouchScreen */
  1239. irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
  1240. tsc_device.irq = IRQ7;
  1241. i2c_register_board_info(0, &tsc_device, 1);
  1242. #endif /* CONFIG_AP4EVB_QHD */
  1243. /* CEU */
  1244. /*
  1245. * TODO: reserve memory for V4L2 DMA buffers, when a suitable API
  1246. * becomes available
  1247. */
  1248. /* MIPI-CSI stuff */
  1249. gpio_request(GPIO_FN_VIO_CKO, NULL);
  1250. clk = clk_get(NULL, "vck1_clk");
  1251. if (!IS_ERR(clk)) {
  1252. clk_set_rate(clk, clk_round_rate(clk, 13000000));
  1253. clk_enable(clk);
  1254. clk_put(clk);
  1255. }
  1256. sh7372_add_standard_devices();
  1257. /* HDMI */
  1258. gpio_request(GPIO_FN_HDMI_HPD, NULL);
  1259. gpio_request(GPIO_FN_HDMI_CEC, NULL);
  1260. /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
  1261. #define SRCR4 0xe61580bc
  1262. srcr4 = __raw_readl(SRCR4);
  1263. __raw_writel(srcr4 | (1 << 13), SRCR4);
  1264. udelay(50);
  1265. __raw_writel(srcr4 & ~(1 << 13), SRCR4);
  1266. platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
  1267. sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc1_device);
  1268. sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device);
  1269. sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device);
  1270. sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device);
  1271. sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device);
  1272. sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device);
  1273. sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device);
  1274. hdmi_init_pm_clock();
  1275. fsi_init_pm_clock();
  1276. sh7372_pm_init();
  1277. pm_clk_add(&fsi_device.dev, "spu2");
  1278. pm_clk_add(&lcdc1_device.dev, "hdmi");
  1279. }
  1280. MACHINE_START(AP4EVB, "ap4evb")
  1281. .map_io = sh7372_map_io,
  1282. .init_early = sh7372_add_early_devices,
  1283. .init_irq = sh7372_init_irq,
  1284. .handle_irq = shmobile_handle_irq_intc,
  1285. .init_machine = ap4evb_init,
  1286. .init_late = shmobile_init_late,
  1287. .timer = &shmobile_timer,
  1288. MACHINE_END