usb.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533
  1. /*
  2. * Platform level USB initialization for FS USB OTG controller on omap1 and 24xx
  3. *
  4. * Copyright (C) 2004 Texas Instruments, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #include <linux/module.h>
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/io.h>
  25. #include <asm/irq.h>
  26. #include <plat/mux.h>
  27. #include <plat/usb.h>
  28. #include "common.h"
  29. /* These routines should handle the standard chip-specific modes
  30. * for usb0/1/2 ports, covering basic mux and transceiver setup.
  31. *
  32. * Some board-*.c files will need to set up additional mux options,
  33. * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
  34. */
  35. /* TESTED ON:
  36. * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
  37. * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
  38. * - 5912 OSK UDC, with *nonstandard* A-to-A cable
  39. * - 1510 Innovator UDC with bundled usb0 cable
  40. * - 1510 Innovator OHCI with bundled usb1/usb2 cable
  41. * - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
  42. * - 1710 custom development board using alternate pin group
  43. * - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
  44. */
  45. #define INT_USB_IRQ_GEN IH2_BASE + 20
  46. #define INT_USB_IRQ_NISO IH2_BASE + 30
  47. #define INT_USB_IRQ_ISO IH2_BASE + 29
  48. #define INT_USB_IRQ_HGEN INT_USB_HHC_1
  49. #define INT_USB_IRQ_OTG IH2_BASE + 8
  50. #ifdef CONFIG_USB_GADGET_OMAP
  51. static struct resource udc_resources[] = {
  52. /* order is significant! */
  53. { /* registers */
  54. .start = UDC_BASE,
  55. .end = UDC_BASE + 0xff,
  56. .flags = IORESOURCE_MEM,
  57. }, { /* general IRQ */
  58. .start = INT_USB_IRQ_GEN,
  59. .flags = IORESOURCE_IRQ,
  60. }, { /* PIO IRQ */
  61. .start = INT_USB_IRQ_NISO,
  62. .flags = IORESOURCE_IRQ,
  63. }, { /* SOF IRQ */
  64. .start = INT_USB_IRQ_ISO,
  65. .flags = IORESOURCE_IRQ,
  66. },
  67. };
  68. static u64 udc_dmamask = ~(u32)0;
  69. static struct platform_device udc_device = {
  70. .name = "omap_udc",
  71. .id = -1,
  72. .dev = {
  73. .dma_mask = &udc_dmamask,
  74. .coherent_dma_mask = 0xffffffff,
  75. },
  76. .num_resources = ARRAY_SIZE(udc_resources),
  77. .resource = udc_resources,
  78. };
  79. static inline void udc_device_init(struct omap_usb_config *pdata)
  80. {
  81. /* IRQ numbers for omap7xx */
  82. if(cpu_is_omap7xx()) {
  83. udc_resources[1].start = INT_7XX_USB_GENI;
  84. udc_resources[2].start = INT_7XX_USB_NON_ISO;
  85. udc_resources[3].start = INT_7XX_USB_ISO;
  86. }
  87. pdata->udc_device = &udc_device;
  88. }
  89. #else
  90. static inline void udc_device_init(struct omap_usb_config *pdata)
  91. {
  92. }
  93. #endif
  94. #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  95. /* The dmamask must be set for OHCI to work */
  96. static u64 ohci_dmamask = ~(u32)0;
  97. static struct resource ohci_resources[] = {
  98. {
  99. .start = OMAP_OHCI_BASE,
  100. .end = OMAP_OHCI_BASE + 0xff,
  101. .flags = IORESOURCE_MEM,
  102. },
  103. {
  104. .start = INT_USB_IRQ_HGEN,
  105. .flags = IORESOURCE_IRQ,
  106. },
  107. };
  108. static struct platform_device ohci_device = {
  109. .name = "ohci",
  110. .id = -1,
  111. .dev = {
  112. .dma_mask = &ohci_dmamask,
  113. .coherent_dma_mask = 0xffffffff,
  114. },
  115. .num_resources = ARRAY_SIZE(ohci_resources),
  116. .resource = ohci_resources,
  117. };
  118. static inline void ohci_device_init(struct omap_usb_config *pdata)
  119. {
  120. if (cpu_is_omap7xx())
  121. ohci_resources[1].start = INT_7XX_USB_HHC_1;
  122. pdata->ohci_device = &ohci_device;
  123. pdata->ocpi_enable = &ocpi_enable;
  124. }
  125. #else
  126. static inline void ohci_device_init(struct omap_usb_config *pdata)
  127. {
  128. }
  129. #endif
  130. #if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
  131. static struct resource otg_resources[] = {
  132. /* order is significant! */
  133. {
  134. .start = OTG_BASE,
  135. .end = OTG_BASE + 0xff,
  136. .flags = IORESOURCE_MEM,
  137. }, {
  138. .start = INT_USB_IRQ_OTG,
  139. .flags = IORESOURCE_IRQ,
  140. },
  141. };
  142. static struct platform_device otg_device = {
  143. .name = "omap_otg",
  144. .id = -1,
  145. .num_resources = ARRAY_SIZE(otg_resources),
  146. .resource = otg_resources,
  147. };
  148. static inline void otg_device_init(struct omap_usb_config *pdata)
  149. {
  150. if (cpu_is_omap7xx())
  151. otg_resources[1].start = INT_7XX_USB_OTG;
  152. pdata->otg_device = &otg_device;
  153. }
  154. #else
  155. static inline void otg_device_init(struct omap_usb_config *pdata)
  156. {
  157. }
  158. #endif
  159. u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
  160. {
  161. u32 syscon1 = 0;
  162. if (nwires == 0) {
  163. if (!cpu_is_omap15xx()) {
  164. u32 l;
  165. /* pulldown D+/D- */
  166. l = omap_readl(USB_TRANSCEIVER_CTRL);
  167. l &= ~(3 << 1);
  168. omap_writel(l, USB_TRANSCEIVER_CTRL);
  169. }
  170. return 0;
  171. }
  172. if (is_device) {
  173. if (cpu_is_omap7xx()) {
  174. omap_cfg_reg(AA17_7XX_USB_DM);
  175. omap_cfg_reg(W16_7XX_USB_PU_EN);
  176. omap_cfg_reg(W17_7XX_USB_VBUSI);
  177. omap_cfg_reg(W18_7XX_USB_DMCK_OUT);
  178. omap_cfg_reg(W19_7XX_USB_DCRST);
  179. } else
  180. omap_cfg_reg(W4_USB_PUEN);
  181. }
  182. if (nwires == 2) {
  183. u32 l;
  184. // omap_cfg_reg(P9_USB_DP);
  185. // omap_cfg_reg(R8_USB_DM);
  186. if (cpu_is_omap15xx()) {
  187. /* This works on 1510-Innovator */
  188. return 0;
  189. }
  190. /* NOTES:
  191. * - peripheral should configure VBUS detection!
  192. * - only peripherals may use the internal D+/D- pulldowns
  193. * - OTG support on this port not yet written
  194. */
  195. /* Don't do this for omap7xx -- it causes USB to not work correctly */
  196. if (!cpu_is_omap7xx()) {
  197. l = omap_readl(USB_TRANSCEIVER_CTRL);
  198. l &= ~(7 << 4);
  199. if (!is_device)
  200. l |= (3 << 1);
  201. omap_writel(l, USB_TRANSCEIVER_CTRL);
  202. }
  203. return 3 << 16;
  204. }
  205. /* alternate pin config, external transceiver */
  206. if (cpu_is_omap15xx()) {
  207. printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
  208. return 0;
  209. }
  210. omap_cfg_reg(V6_USB0_TXD);
  211. omap_cfg_reg(W9_USB0_TXEN);
  212. omap_cfg_reg(W5_USB0_SE0);
  213. if (nwires != 3)
  214. omap_cfg_reg(Y5_USB0_RCV);
  215. /* NOTE: SPEED and SUSP aren't configured here. OTG hosts
  216. * may be able to use I2C requests to set those bits along
  217. * with VBUS switching and overcurrent detection.
  218. */
  219. if (nwires != 6) {
  220. u32 l;
  221. l = omap_readl(USB_TRANSCEIVER_CTRL);
  222. l &= ~CONF_USB2_UNI_R;
  223. omap_writel(l, USB_TRANSCEIVER_CTRL);
  224. }
  225. switch (nwires) {
  226. case 3:
  227. syscon1 = 2;
  228. break;
  229. case 4:
  230. syscon1 = 1;
  231. break;
  232. case 6:
  233. syscon1 = 3;
  234. {
  235. u32 l;
  236. omap_cfg_reg(AA9_USB0_VP);
  237. omap_cfg_reg(R9_USB0_VM);
  238. l = omap_readl(USB_TRANSCEIVER_CTRL);
  239. l |= CONF_USB2_UNI_R;
  240. omap_writel(l, USB_TRANSCEIVER_CTRL);
  241. }
  242. break;
  243. default:
  244. printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
  245. 0, nwires);
  246. }
  247. return syscon1 << 16;
  248. }
  249. u32 __init omap1_usb1_init(unsigned nwires)
  250. {
  251. u32 syscon1 = 0;
  252. if (!cpu_is_omap15xx() && nwires != 6) {
  253. u32 l;
  254. l = omap_readl(USB_TRANSCEIVER_CTRL);
  255. l &= ~CONF_USB1_UNI_R;
  256. omap_writel(l, USB_TRANSCEIVER_CTRL);
  257. }
  258. if (nwires == 0)
  259. return 0;
  260. /* external transceiver */
  261. omap_cfg_reg(USB1_TXD);
  262. omap_cfg_reg(USB1_TXEN);
  263. if (nwires != 3)
  264. omap_cfg_reg(USB1_RCV);
  265. if (cpu_is_omap15xx()) {
  266. omap_cfg_reg(USB1_SEO);
  267. omap_cfg_reg(USB1_SPEED);
  268. // SUSP
  269. } else if (cpu_is_omap1610() || cpu_is_omap5912()) {
  270. omap_cfg_reg(W13_1610_USB1_SE0);
  271. omap_cfg_reg(R13_1610_USB1_SPEED);
  272. // SUSP
  273. } else if (cpu_is_omap1710()) {
  274. omap_cfg_reg(R13_1710_USB1_SE0);
  275. // SUSP
  276. } else {
  277. pr_debug("usb%d cpu unrecognized\n", 1);
  278. return 0;
  279. }
  280. switch (nwires) {
  281. case 2:
  282. goto bad;
  283. case 3:
  284. syscon1 = 2;
  285. break;
  286. case 4:
  287. syscon1 = 1;
  288. break;
  289. case 6:
  290. syscon1 = 3;
  291. omap_cfg_reg(USB1_VP);
  292. omap_cfg_reg(USB1_VM);
  293. if (!cpu_is_omap15xx()) {
  294. u32 l;
  295. l = omap_readl(USB_TRANSCEIVER_CTRL);
  296. l |= CONF_USB1_UNI_R;
  297. omap_writel(l, USB_TRANSCEIVER_CTRL);
  298. }
  299. break;
  300. default:
  301. bad:
  302. printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
  303. 1, nwires);
  304. }
  305. return syscon1 << 20;
  306. }
  307. u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
  308. {
  309. u32 syscon1 = 0;
  310. /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
  311. if (alt_pingroup || nwires == 0)
  312. return 0;
  313. if (!cpu_is_omap15xx() && nwires != 6) {
  314. u32 l;
  315. l = omap_readl(USB_TRANSCEIVER_CTRL);
  316. l &= ~CONF_USB2_UNI_R;
  317. omap_writel(l, USB_TRANSCEIVER_CTRL);
  318. }
  319. /* external transceiver */
  320. if (cpu_is_omap15xx()) {
  321. omap_cfg_reg(USB2_TXD);
  322. omap_cfg_reg(USB2_TXEN);
  323. omap_cfg_reg(USB2_SEO);
  324. if (nwires != 3)
  325. omap_cfg_reg(USB2_RCV);
  326. /* there is no USB2_SPEED */
  327. } else if (cpu_is_omap16xx()) {
  328. omap_cfg_reg(V6_USB2_TXD);
  329. omap_cfg_reg(W9_USB2_TXEN);
  330. omap_cfg_reg(W5_USB2_SE0);
  331. if (nwires != 3)
  332. omap_cfg_reg(Y5_USB2_RCV);
  333. // FIXME omap_cfg_reg(USB2_SPEED);
  334. } else {
  335. pr_debug("usb%d cpu unrecognized\n", 1);
  336. return 0;
  337. }
  338. // omap_cfg_reg(USB2_SUSP);
  339. switch (nwires) {
  340. case 2:
  341. goto bad;
  342. case 3:
  343. syscon1 = 2;
  344. break;
  345. case 4:
  346. syscon1 = 1;
  347. break;
  348. case 5:
  349. goto bad;
  350. case 6:
  351. syscon1 = 3;
  352. if (cpu_is_omap15xx()) {
  353. omap_cfg_reg(USB2_VP);
  354. omap_cfg_reg(USB2_VM);
  355. } else {
  356. u32 l;
  357. omap_cfg_reg(AA9_USB2_VP);
  358. omap_cfg_reg(R9_USB2_VM);
  359. l = omap_readl(USB_TRANSCEIVER_CTRL);
  360. l |= CONF_USB2_UNI_R;
  361. omap_writel(l, USB_TRANSCEIVER_CTRL);
  362. }
  363. break;
  364. default:
  365. bad:
  366. printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
  367. 2, nwires);
  368. }
  369. return syscon1 << 24;
  370. }
  371. #ifdef CONFIG_ARCH_OMAP15XX
  372. /* ULPD_DPLL_CTRL */
  373. #define DPLL_IOB (1 << 13)
  374. #define DPLL_PLL_ENABLE (1 << 4)
  375. #define DPLL_LOCK (1 << 0)
  376. /* ULPD_APLL_CTRL */
  377. #define APLL_NDPLL_SWITCH (1 << 0)
  378. static void __init omap_1510_usb_init(struct omap_usb_config *config)
  379. {
  380. unsigned int val;
  381. u16 w;
  382. config->usb0_init(config->pins[0], is_usb0_device(config));
  383. config->usb1_init(config->pins[1]);
  384. config->usb2_init(config->pins[2], 0);
  385. val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
  386. val |= (config->hmc_mode << 1);
  387. omap_writel(val, MOD_CONF_CTRL_0);
  388. printk("USB: hmc %d", config->hmc_mode);
  389. if (config->pins[0])
  390. printk(", usb0 %d wires%s", config->pins[0],
  391. is_usb0_device(config) ? " (dev)" : "");
  392. if (config->pins[1])
  393. printk(", usb1 %d wires", config->pins[1]);
  394. if (config->pins[2])
  395. printk(", usb2 %d wires", config->pins[2]);
  396. printk("\n");
  397. /* use DPLL for 48 MHz function clock */
  398. pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL),
  399. omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ));
  400. w = omap_readw(ULPD_APLL_CTRL);
  401. w &= ~APLL_NDPLL_SWITCH;
  402. omap_writew(w, ULPD_APLL_CTRL);
  403. w = omap_readw(ULPD_DPLL_CTRL);
  404. w |= DPLL_IOB | DPLL_PLL_ENABLE;
  405. omap_writew(w, ULPD_DPLL_CTRL);
  406. w = omap_readw(ULPD_SOFT_REQ);
  407. w |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
  408. omap_writew(w, ULPD_SOFT_REQ);
  409. while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK))
  410. cpu_relax();
  411. #ifdef CONFIG_USB_GADGET_OMAP
  412. if (config->register_dev) {
  413. int status;
  414. udc_device.dev.platform_data = config;
  415. status = platform_device_register(&udc_device);
  416. if (status)
  417. pr_debug("can't register UDC device, %d\n", status);
  418. /* udc driver gates 48MHz by D+ pullup */
  419. }
  420. #endif
  421. #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  422. if (config->register_host) {
  423. int status;
  424. ohci_device.dev.platform_data = config;
  425. status = platform_device_register(&ohci_device);
  426. if (status)
  427. pr_debug("can't register OHCI device, %d\n", status);
  428. /* hcd explicitly gates 48MHz */
  429. }
  430. #endif
  431. }
  432. #else
  433. static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
  434. #endif
  435. void __init omap1_usb_init(struct omap_usb_config *pdata)
  436. {
  437. pdata->usb0_init = omap1_usb0_init;
  438. pdata->usb1_init = omap1_usb1_init;
  439. pdata->usb2_init = omap1_usb2_init;
  440. udc_device_init(pdata);
  441. ohci_device_init(pdata);
  442. otg_device_init(pdata);
  443. if (cpu_is_omap7xx() || cpu_is_omap16xx())
  444. omap_otg_init(pdata);
  445. else if (cpu_is_omap15xx())
  446. omap_1510_usb_init(pdata);
  447. else
  448. printk(KERN_ERR "USB: No init for your chip yet\n");
  449. }