mach-imx6q.c 4.5 KB

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  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/clkdev.h>
  14. #include <linux/delay.h>
  15. #include <linux/init.h>
  16. #include <linux/io.h>
  17. #include <linux/irq.h>
  18. #include <linux/irqdomain.h>
  19. #include <linux/of.h>
  20. #include <linux/of_address.h>
  21. #include <linux/of_irq.h>
  22. #include <linux/of_platform.h>
  23. #include <linux/pinctrl/machine.h>
  24. #include <linux/phy.h>
  25. #include <linux/micrel_phy.h>
  26. #include <asm/smp_twd.h>
  27. #include <asm/hardware/cache-l2x0.h>
  28. #include <asm/hardware/gic.h>
  29. #include <asm/mach/arch.h>
  30. #include <asm/mach/time.h>
  31. #include <asm/system_misc.h>
  32. #include <mach/common.h>
  33. #include <mach/hardware.h>
  34. void imx6q_restart(char mode, const char *cmd)
  35. {
  36. struct device_node *np;
  37. void __iomem *wdog_base;
  38. np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
  39. wdog_base = of_iomap(np, 0);
  40. if (!wdog_base)
  41. goto soft;
  42. imx_src_prepare_restart();
  43. /* enable wdog */
  44. writew_relaxed(1 << 2, wdog_base);
  45. /* write twice to ensure the request will not get ignored */
  46. writew_relaxed(1 << 2, wdog_base);
  47. /* wait for reset to assert ... */
  48. mdelay(500);
  49. pr_err("Watchdog reset failed to assert reset\n");
  50. /* delay to allow the serial port to show the message */
  51. mdelay(50);
  52. soft:
  53. /* we'll take a jump through zero as a poor second */
  54. soft_restart(0);
  55. }
  56. /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
  57. static int ksz9021rn_phy_fixup(struct phy_device *phydev)
  58. {
  59. if (IS_ENABLED(CONFIG_PHYLIB)) {
  60. /* min rx data delay */
  61. phy_write(phydev, 0x0b, 0x8105);
  62. phy_write(phydev, 0x0c, 0x0000);
  63. /* max rx/tx clock delay, min rx/tx control delay */
  64. phy_write(phydev, 0x0b, 0x8104);
  65. phy_write(phydev, 0x0c, 0xf0f0);
  66. phy_write(phydev, 0x0b, 0x104);
  67. }
  68. return 0;
  69. }
  70. static void __init imx6q_sabrelite_cko1_setup(void)
  71. {
  72. struct clk *cko1_sel, *ahb, *cko1;
  73. unsigned long rate;
  74. cko1_sel = clk_get_sys(NULL, "cko1_sel");
  75. ahb = clk_get_sys(NULL, "ahb");
  76. cko1 = clk_get_sys(NULL, "cko1");
  77. if (IS_ERR(cko1_sel) || IS_ERR(ahb) || IS_ERR(cko1)) {
  78. pr_err("cko1 setup failed!\n");
  79. goto put_clk;
  80. }
  81. clk_set_parent(cko1_sel, ahb);
  82. rate = clk_round_rate(cko1, 16000000);
  83. clk_set_rate(cko1, rate);
  84. clk_register_clkdev(cko1, NULL, "0-000a");
  85. put_clk:
  86. if (!IS_ERR(cko1_sel))
  87. clk_put(cko1_sel);
  88. if (!IS_ERR(ahb))
  89. clk_put(ahb);
  90. if (!IS_ERR(cko1))
  91. clk_put(cko1);
  92. }
  93. static void __init imx6q_sabrelite_init(void)
  94. {
  95. if (IS_ENABLED(CONFIG_PHYLIB))
  96. phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
  97. ksz9021rn_phy_fixup);
  98. imx6q_sabrelite_cko1_setup();
  99. }
  100. static void __init imx6q_init_machine(void)
  101. {
  102. /*
  103. * This should be removed when all imx6q boards have pinctrl
  104. * states for devices defined in device tree.
  105. */
  106. pinctrl_provide_dummies();
  107. if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
  108. imx6q_sabrelite_init();
  109. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  110. imx6q_pm_init();
  111. }
  112. static void __init imx6q_map_io(void)
  113. {
  114. imx_lluart_map_io();
  115. imx_scu_map_io();
  116. imx6q_clock_map_io();
  117. }
  118. static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
  119. struct device_node *interrupt_parent)
  120. {
  121. static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
  122. gpio_irq_base -= 32;
  123. irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops,
  124. NULL);
  125. return 0;
  126. }
  127. static const struct of_device_id imx6q_irq_match[] __initconst = {
  128. { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
  129. { .compatible = "fsl,imx6q-gpio", .data = imx6q_gpio_add_irq_domain, },
  130. { /* sentinel */ }
  131. };
  132. static void __init imx6q_init_irq(void)
  133. {
  134. l2x0_of_init(0, ~0UL);
  135. imx_src_init();
  136. imx_gpc_init();
  137. of_irq_init(imx6q_irq_match);
  138. }
  139. static void __init imx6q_timer_init(void)
  140. {
  141. mx6q_clocks_init();
  142. twd_local_timer_of_register();
  143. }
  144. static struct sys_timer imx6q_timer = {
  145. .init = imx6q_timer_init,
  146. };
  147. static const char *imx6q_dt_compat[] __initdata = {
  148. "fsl,imx6q-arm2",
  149. "fsl,imx6q-sabrelite",
  150. "fsl,imx6q-sabresd",
  151. "fsl,imx6q",
  152. NULL,
  153. };
  154. DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
  155. .map_io = imx6q_map_io,
  156. .init_irq = imx6q_init_irq,
  157. .handle_irq = imx6q_handle_irq,
  158. .timer = &imx6q_timer,
  159. .init_machine = imx6q_init_machine,
  160. .dt_compat = imx6q_dt_compat,
  161. .restart = imx6q_restart,
  162. MACHINE_END