mach-universal_c210.c 29 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/platform_device.h>
  10. #include <linux/serial_core.h>
  11. #include <linux/input.h>
  12. #include <linux/i2c.h>
  13. #include <linux/gpio_keys.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/fb.h>
  17. #include <linux/mfd/max8998.h>
  18. #include <linux/regulator/machine.h>
  19. #include <linux/regulator/fixed.h>
  20. #include <linux/regulator/max8952.h>
  21. #include <linux/mmc/host.h>
  22. #include <linux/i2c-gpio.h>
  23. #include <linux/i2c/mcs.h>
  24. #include <linux/i2c/atmel_mxt_ts.h>
  25. #include <linux/platform_data/s3c-hsotg.h>
  26. #include <drm/exynos_drm.h>
  27. #include <asm/mach/arch.h>
  28. #include <asm/hardware/gic.h>
  29. #include <asm/mach-types.h>
  30. #include <plat/regs-serial.h>
  31. #include <plat/clock.h>
  32. #include <plat/cpu.h>
  33. #include <plat/devs.h>
  34. #include <plat/iic.h>
  35. #include <plat/gpio-cfg.h>
  36. #include <plat/fb.h>
  37. #include <plat/mfc.h>
  38. #include <plat/sdhci.h>
  39. #include <plat/pd.h>
  40. #include <plat/regs-fb-v4.h>
  41. #include <plat/fimc-core.h>
  42. #include <plat/s5p-time.h>
  43. #include <plat/camport.h>
  44. #include <plat/mipi_csis.h>
  45. #include <mach/map.h>
  46. #include <media/v4l2-mediabus.h>
  47. #include <media/s5p_fimc.h>
  48. #include <media/m5mols.h>
  49. #include <media/s5k6aa.h>
  50. #include "common.h"
  51. /* Following are default values for UCON, ULCON and UFCON UART registers */
  52. #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  53. S3C2410_UCON_RXILEVEL | \
  54. S3C2410_UCON_TXIRQMODE | \
  55. S3C2410_UCON_RXIRQMODE | \
  56. S3C2410_UCON_RXFIFO_TOI | \
  57. S3C2443_UCON_RXERR_IRQEN)
  58. #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
  59. #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  60. S5PV210_UFCON_TXTRIG256 | \
  61. S5PV210_UFCON_RXTRIG256)
  62. static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
  63. [0] = {
  64. .hwport = 0,
  65. .ucon = UNIVERSAL_UCON_DEFAULT,
  66. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  67. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  68. },
  69. [1] = {
  70. .hwport = 1,
  71. .ucon = UNIVERSAL_UCON_DEFAULT,
  72. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  73. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  74. },
  75. [2] = {
  76. .hwport = 2,
  77. .ucon = UNIVERSAL_UCON_DEFAULT,
  78. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  79. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  80. },
  81. [3] = {
  82. .hwport = 3,
  83. .ucon = UNIVERSAL_UCON_DEFAULT,
  84. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  85. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  86. },
  87. };
  88. static struct regulator_consumer_supply max8952_consumer =
  89. REGULATOR_SUPPLY("vdd_arm", NULL);
  90. static struct max8952_platform_data universal_max8952_pdata __initdata = {
  91. .gpio_vid0 = EXYNOS4_GPX0(3),
  92. .gpio_vid1 = EXYNOS4_GPX0(4),
  93. .gpio_en = -1, /* Not controllable, set "Always High" */
  94. .default_mode = 0, /* vid0 = 0, vid1 = 0 */
  95. .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
  96. .sync_freq = 0, /* default: fastest */
  97. .ramp_speed = 0, /* default: fastest */
  98. .reg_data = {
  99. .constraints = {
  100. .name = "VARM_1.2V",
  101. .min_uV = 770000,
  102. .max_uV = 1400000,
  103. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  104. .always_on = 1,
  105. .boot_on = 1,
  106. },
  107. .num_consumer_supplies = 1,
  108. .consumer_supplies = &max8952_consumer,
  109. },
  110. };
  111. static struct regulator_consumer_supply lp3974_buck1_consumer =
  112. REGULATOR_SUPPLY("vdd_int", NULL);
  113. static struct regulator_consumer_supply lp3974_buck2_consumer =
  114. REGULATOR_SUPPLY("vddg3d", NULL);
  115. static struct regulator_consumer_supply lp3974_buck3_consumer[] = {
  116. REGULATOR_SUPPLY("vdet", "s5p-sdo"),
  117. REGULATOR_SUPPLY("vdd_reg", "0-003c"),
  118. };
  119. static struct regulator_init_data lp3974_buck1_data = {
  120. .constraints = {
  121. .name = "VINT_1.1V",
  122. .min_uV = 750000,
  123. .max_uV = 1500000,
  124. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  125. REGULATOR_CHANGE_STATUS,
  126. .boot_on = 1,
  127. .state_mem = {
  128. .disabled = 1,
  129. },
  130. },
  131. .num_consumer_supplies = 1,
  132. .consumer_supplies = &lp3974_buck1_consumer,
  133. };
  134. static struct regulator_init_data lp3974_buck2_data = {
  135. .constraints = {
  136. .name = "VG3D_1.1V",
  137. .min_uV = 750000,
  138. .max_uV = 1500000,
  139. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  140. REGULATOR_CHANGE_STATUS,
  141. .boot_on = 1,
  142. .state_mem = {
  143. .disabled = 1,
  144. },
  145. },
  146. .num_consumer_supplies = 1,
  147. .consumer_supplies = &lp3974_buck2_consumer,
  148. };
  149. static struct regulator_init_data lp3974_buck3_data = {
  150. .constraints = {
  151. .name = "VCC_1.8V",
  152. .min_uV = 1800000,
  153. .max_uV = 1800000,
  154. .apply_uV = 1,
  155. .always_on = 1,
  156. .state_mem = {
  157. .enabled = 1,
  158. },
  159. },
  160. .num_consumer_supplies = ARRAY_SIZE(lp3974_buck3_consumer),
  161. .consumer_supplies = lp3974_buck3_consumer,
  162. };
  163. static struct regulator_init_data lp3974_buck4_data = {
  164. .constraints = {
  165. .name = "VMEM_1.2V",
  166. .min_uV = 1200000,
  167. .max_uV = 1200000,
  168. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  169. .apply_uV = 1,
  170. .state_mem = {
  171. .disabled = 1,
  172. },
  173. },
  174. };
  175. static struct regulator_init_data lp3974_ldo2_data = {
  176. .constraints = {
  177. .name = "VALIVE_1.2V",
  178. .min_uV = 1200000,
  179. .max_uV = 1200000,
  180. .apply_uV = 1,
  181. .always_on = 1,
  182. .state_mem = {
  183. .enabled = 1,
  184. },
  185. },
  186. };
  187. static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
  188. REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"),
  189. REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
  190. REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
  191. REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
  192. };
  193. static struct regulator_init_data lp3974_ldo3_data = {
  194. .constraints = {
  195. .name = "VUSB+MIPI_1.1V",
  196. .min_uV = 1100000,
  197. .max_uV = 1100000,
  198. .apply_uV = 1,
  199. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  200. .state_mem = {
  201. .disabled = 1,
  202. },
  203. },
  204. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
  205. .consumer_supplies = lp3974_ldo3_consumer,
  206. };
  207. static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
  208. REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
  209. };
  210. static struct regulator_init_data lp3974_ldo4_data = {
  211. .constraints = {
  212. .name = "VADC_3.3V",
  213. .min_uV = 3300000,
  214. .max_uV = 3300000,
  215. .apply_uV = 1,
  216. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  217. .state_mem = {
  218. .disabled = 1,
  219. },
  220. },
  221. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
  222. .consumer_supplies = lp3974_ldo4_consumer,
  223. };
  224. static struct regulator_init_data lp3974_ldo5_data = {
  225. .constraints = {
  226. .name = "VTF_2.8V",
  227. .min_uV = 2800000,
  228. .max_uV = 2800000,
  229. .apply_uV = 1,
  230. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  231. .state_mem = {
  232. .disabled = 1,
  233. },
  234. },
  235. };
  236. static struct regulator_init_data lp3974_ldo6_data = {
  237. .constraints = {
  238. .name = "LDO6",
  239. .min_uV = 2000000,
  240. .max_uV = 2000000,
  241. .apply_uV = 1,
  242. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  243. .state_mem = {
  244. .disabled = 1,
  245. },
  246. },
  247. };
  248. static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
  249. REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"),
  250. };
  251. static struct regulator_init_data lp3974_ldo7_data = {
  252. .constraints = {
  253. .name = "VLCD+VMIPI_1.8V",
  254. .min_uV = 1800000,
  255. .max_uV = 1800000,
  256. .apply_uV = 1,
  257. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  258. .state_mem = {
  259. .disabled = 1,
  260. },
  261. },
  262. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
  263. .consumer_supplies = lp3974_ldo7_consumer,
  264. };
  265. static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
  266. REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"),
  267. REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
  268. };
  269. static struct regulator_init_data lp3974_ldo8_data = {
  270. .constraints = {
  271. .name = "VUSB+VDAC_3.3V",
  272. .min_uV = 3300000,
  273. .max_uV = 3300000,
  274. .apply_uV = 1,
  275. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  276. .state_mem = {
  277. .disabled = 1,
  278. },
  279. },
  280. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
  281. .consumer_supplies = lp3974_ldo8_consumer,
  282. };
  283. static struct regulator_consumer_supply lp3974_ldo9_consumer =
  284. REGULATOR_SUPPLY("vddio", "0-003c");
  285. static struct regulator_init_data lp3974_ldo9_data = {
  286. .constraints = {
  287. .name = "VCC_2.8V",
  288. .min_uV = 2800000,
  289. .max_uV = 2800000,
  290. .apply_uV = 1,
  291. .always_on = 1,
  292. .state_mem = {
  293. .enabled = 1,
  294. },
  295. },
  296. .num_consumer_supplies = 1,
  297. .consumer_supplies = &lp3974_ldo9_consumer,
  298. };
  299. static struct regulator_init_data lp3974_ldo10_data = {
  300. .constraints = {
  301. .name = "VPLL_1.1V",
  302. .min_uV = 1100000,
  303. .max_uV = 1100000,
  304. .boot_on = 1,
  305. .apply_uV = 1,
  306. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  307. .state_mem = {
  308. .disabled = 1,
  309. },
  310. },
  311. };
  312. static struct regulator_consumer_supply lp3974_ldo11_consumer =
  313. REGULATOR_SUPPLY("dig_28", "0-001f");
  314. static struct regulator_init_data lp3974_ldo11_data = {
  315. .constraints = {
  316. .name = "CAM_AF_3.3V",
  317. .min_uV = 3300000,
  318. .max_uV = 3300000,
  319. .apply_uV = 1,
  320. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  321. .state_mem = {
  322. .disabled = 1,
  323. },
  324. },
  325. .num_consumer_supplies = 1,
  326. .consumer_supplies = &lp3974_ldo11_consumer,
  327. };
  328. static struct regulator_init_data lp3974_ldo12_data = {
  329. .constraints = {
  330. .name = "PS_2.8V",
  331. .min_uV = 2800000,
  332. .max_uV = 2800000,
  333. .apply_uV = 1,
  334. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  335. .state_mem = {
  336. .disabled = 1,
  337. },
  338. },
  339. };
  340. static struct regulator_init_data lp3974_ldo13_data = {
  341. .constraints = {
  342. .name = "VHIC_1.2V",
  343. .min_uV = 1200000,
  344. .max_uV = 1200000,
  345. .apply_uV = 1,
  346. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  347. .state_mem = {
  348. .disabled = 1,
  349. },
  350. },
  351. };
  352. static struct regulator_consumer_supply lp3974_ldo14_consumer =
  353. REGULATOR_SUPPLY("dig_18", "0-001f");
  354. static struct regulator_init_data lp3974_ldo14_data = {
  355. .constraints = {
  356. .name = "CAM_I_HOST_1.8V",
  357. .min_uV = 1800000,
  358. .max_uV = 1800000,
  359. .apply_uV = 1,
  360. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  361. .state_mem = {
  362. .disabled = 1,
  363. },
  364. },
  365. .num_consumer_supplies = 1,
  366. .consumer_supplies = &lp3974_ldo14_consumer,
  367. };
  368. static struct regulator_consumer_supply lp3974_ldo15_consumer =
  369. REGULATOR_SUPPLY("dig_12", "0-001f");
  370. static struct regulator_init_data lp3974_ldo15_data = {
  371. .constraints = {
  372. .name = "CAM_S_DIG+FM33_CORE_1.2V",
  373. .min_uV = 1200000,
  374. .max_uV = 1200000,
  375. .apply_uV = 1,
  376. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  377. .state_mem = {
  378. .disabled = 1,
  379. },
  380. },
  381. .num_consumer_supplies = 1,
  382. .consumer_supplies = &lp3974_ldo15_consumer,
  383. };
  384. static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
  385. REGULATOR_SUPPLY("vdda", "0-003c"),
  386. REGULATOR_SUPPLY("a_sensor", "0-001f"),
  387. };
  388. static struct regulator_init_data lp3974_ldo16_data = {
  389. .constraints = {
  390. .name = "CAM_S_ANA_2.8V",
  391. .min_uV = 2800000,
  392. .max_uV = 2800000,
  393. .apply_uV = 1,
  394. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  395. .state_mem = {
  396. .disabled = 1,
  397. },
  398. },
  399. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
  400. .consumer_supplies = lp3974_ldo16_consumer,
  401. };
  402. static struct regulator_init_data lp3974_ldo17_data = {
  403. .constraints = {
  404. .name = "VCC_3.0V_LCD",
  405. .min_uV = 3000000,
  406. .max_uV = 3000000,
  407. .apply_uV = 1,
  408. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  409. .boot_on = 1,
  410. .state_mem = {
  411. .disabled = 1,
  412. },
  413. },
  414. };
  415. static struct regulator_init_data lp3974_32khz_ap_data = {
  416. .constraints = {
  417. .name = "32KHz AP",
  418. .always_on = 1,
  419. .state_mem = {
  420. .enabled = 1,
  421. },
  422. },
  423. };
  424. static struct regulator_init_data lp3974_32khz_cp_data = {
  425. .constraints = {
  426. .name = "32KHz CP",
  427. .state_mem = {
  428. .disabled = 1,
  429. },
  430. },
  431. };
  432. static struct regulator_init_data lp3974_vichg_data = {
  433. .constraints = {
  434. .name = "VICHG",
  435. .state_mem = {
  436. .disabled = 1,
  437. },
  438. },
  439. };
  440. static struct regulator_init_data lp3974_esafeout1_data = {
  441. .constraints = {
  442. .name = "SAFEOUT1",
  443. .min_uV = 4800000,
  444. .max_uV = 4800000,
  445. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  446. .always_on = 1,
  447. .state_mem = {
  448. .enabled = 1,
  449. },
  450. },
  451. };
  452. static struct regulator_init_data lp3974_esafeout2_data = {
  453. .constraints = {
  454. .name = "SAFEOUT2",
  455. .boot_on = 1,
  456. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  457. .state_mem = {
  458. .enabled = 1,
  459. },
  460. },
  461. };
  462. static struct max8998_regulator_data lp3974_regulators[] = {
  463. { MAX8998_LDO2, &lp3974_ldo2_data },
  464. { MAX8998_LDO3, &lp3974_ldo3_data },
  465. { MAX8998_LDO4, &lp3974_ldo4_data },
  466. { MAX8998_LDO5, &lp3974_ldo5_data },
  467. { MAX8998_LDO6, &lp3974_ldo6_data },
  468. { MAX8998_LDO7, &lp3974_ldo7_data },
  469. { MAX8998_LDO8, &lp3974_ldo8_data },
  470. { MAX8998_LDO9, &lp3974_ldo9_data },
  471. { MAX8998_LDO10, &lp3974_ldo10_data },
  472. { MAX8998_LDO11, &lp3974_ldo11_data },
  473. { MAX8998_LDO12, &lp3974_ldo12_data },
  474. { MAX8998_LDO13, &lp3974_ldo13_data },
  475. { MAX8998_LDO14, &lp3974_ldo14_data },
  476. { MAX8998_LDO15, &lp3974_ldo15_data },
  477. { MAX8998_LDO16, &lp3974_ldo16_data },
  478. { MAX8998_LDO17, &lp3974_ldo17_data },
  479. { MAX8998_BUCK1, &lp3974_buck1_data },
  480. { MAX8998_BUCK2, &lp3974_buck2_data },
  481. { MAX8998_BUCK3, &lp3974_buck3_data },
  482. { MAX8998_BUCK4, &lp3974_buck4_data },
  483. { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
  484. { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
  485. { MAX8998_ENVICHG, &lp3974_vichg_data },
  486. { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
  487. { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
  488. };
  489. static struct max8998_platform_data universal_lp3974_pdata = {
  490. .num_regulators = ARRAY_SIZE(lp3974_regulators),
  491. .regulators = lp3974_regulators,
  492. .buck1_voltage1 = 1100000, /* INT */
  493. .buck1_voltage2 = 1000000,
  494. .buck1_voltage3 = 1100000,
  495. .buck1_voltage4 = 1000000,
  496. .buck1_set1 = EXYNOS4_GPX0(5),
  497. .buck1_set2 = EXYNOS4_GPX0(6),
  498. .buck2_voltage1 = 1200000, /* G3D */
  499. .buck2_voltage2 = 1100000,
  500. .buck1_default_idx = 0,
  501. .buck2_set3 = EXYNOS4_GPE2(0),
  502. .buck2_default_idx = 0,
  503. .wakeup = true,
  504. };
  505. enum fixed_regulator_id {
  506. FIXED_REG_ID_MMC0,
  507. FIXED_REG_ID_HDMI_5V,
  508. FIXED_REG_ID_CAM_S_IF,
  509. FIXED_REG_ID_CAM_I_CORE,
  510. FIXED_REG_ID_CAM_VT_DIO,
  511. };
  512. static struct regulator_consumer_supply hdmi_fixed_consumer =
  513. REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
  514. static struct regulator_init_data hdmi_fixed_voltage_init_data = {
  515. .constraints = {
  516. .name = "HDMI_5V",
  517. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  518. },
  519. .num_consumer_supplies = 1,
  520. .consumer_supplies = &hdmi_fixed_consumer,
  521. };
  522. static struct fixed_voltage_config hdmi_fixed_voltage_config = {
  523. .supply_name = "HDMI_EN1",
  524. .microvolts = 5000000,
  525. .gpio = EXYNOS4_GPE0(1),
  526. .enable_high = true,
  527. .init_data = &hdmi_fixed_voltage_init_data,
  528. };
  529. static struct platform_device hdmi_fixed_voltage = {
  530. .name = "reg-fixed-voltage",
  531. .id = FIXED_REG_ID_HDMI_5V,
  532. .dev = {
  533. .platform_data = &hdmi_fixed_voltage_config,
  534. },
  535. };
  536. /* GPIO I2C 5 (PMIC) */
  537. static struct i2c_board_info i2c5_devs[] __initdata = {
  538. {
  539. I2C_BOARD_INFO("max8952", 0xC0 >> 1),
  540. .platform_data = &universal_max8952_pdata,
  541. }, {
  542. I2C_BOARD_INFO("lp3974", 0xCC >> 1),
  543. .platform_data = &universal_lp3974_pdata,
  544. },
  545. };
  546. /* I2C3 (TSP) */
  547. static struct mxt_platform_data qt602240_platform_data = {
  548. .x_line = 19,
  549. .y_line = 11,
  550. .x_size = 800,
  551. .y_size = 480,
  552. .blen = 0x11,
  553. .threshold = 0x28,
  554. .voltage = 2800000, /* 2.8V */
  555. .orient = MXT_DIAGONAL,
  556. .irqflags = IRQF_TRIGGER_FALLING,
  557. };
  558. static struct i2c_board_info i2c3_devs[] __initdata = {
  559. {
  560. I2C_BOARD_INFO("qt602240_ts", 0x4a),
  561. .platform_data = &qt602240_platform_data,
  562. },
  563. };
  564. static void __init universal_tsp_init(void)
  565. {
  566. int gpio;
  567. /* TSP_LDO_ON: XMDMADDR_11 */
  568. gpio = EXYNOS4_GPE2(3);
  569. gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
  570. gpio_export(gpio, 0);
  571. /* TSP_INT: XMDMADDR_7 */
  572. gpio = EXYNOS4_GPE1(7);
  573. gpio_request(gpio, "TSP_INT");
  574. s5p_register_gpio_interrupt(gpio);
  575. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  576. s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
  577. i2c3_devs[0].irq = gpio_to_irq(gpio);
  578. }
  579. /* GPIO I2C 12 (3 Touchkey) */
  580. static uint32_t touchkey_keymap[] = {
  581. /* MCS_KEY_MAP(value, keycode) */
  582. MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
  583. MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
  584. };
  585. static struct mcs_platform_data touchkey_data = {
  586. .keymap = touchkey_keymap,
  587. .keymap_size = ARRAY_SIZE(touchkey_keymap),
  588. .key_maxval = 2,
  589. };
  590. /* GPIO I2C 3_TOUCH 2.8V */
  591. #define I2C_GPIO_BUS_12 12
  592. static struct i2c_gpio_platform_data i2c_gpio12_data = {
  593. .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
  594. .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
  595. };
  596. static struct platform_device i2c_gpio12 = {
  597. .name = "i2c-gpio",
  598. .id = I2C_GPIO_BUS_12,
  599. .dev = {
  600. .platform_data = &i2c_gpio12_data,
  601. },
  602. };
  603. static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
  604. {
  605. I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
  606. .platform_data = &touchkey_data,
  607. },
  608. };
  609. static void __init universal_touchkey_init(void)
  610. {
  611. int gpio;
  612. gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
  613. gpio_request(gpio, "3_TOUCH_INT");
  614. s5p_register_gpio_interrupt(gpio);
  615. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  616. i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
  617. gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
  618. gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
  619. }
  620. static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
  621. .frequency = 300 * 1000,
  622. .sda_delay = 200,
  623. };
  624. /* GPIO KEYS */
  625. static struct gpio_keys_button universal_gpio_keys_tables[] = {
  626. {
  627. .code = KEY_VOLUMEUP,
  628. .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
  629. .desc = "gpio-keys: KEY_VOLUMEUP",
  630. .type = EV_KEY,
  631. .active_low = 1,
  632. .debounce_interval = 1,
  633. }, {
  634. .code = KEY_VOLUMEDOWN,
  635. .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
  636. .desc = "gpio-keys: KEY_VOLUMEDOWN",
  637. .type = EV_KEY,
  638. .active_low = 1,
  639. .debounce_interval = 1,
  640. }, {
  641. .code = KEY_CONFIG,
  642. .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
  643. .desc = "gpio-keys: KEY_CONFIG",
  644. .type = EV_KEY,
  645. .active_low = 1,
  646. .debounce_interval = 1,
  647. }, {
  648. .code = KEY_CAMERA,
  649. .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
  650. .desc = "gpio-keys: KEY_CAMERA",
  651. .type = EV_KEY,
  652. .active_low = 1,
  653. .debounce_interval = 1,
  654. }, {
  655. .code = KEY_OK,
  656. .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
  657. .desc = "gpio-keys: KEY_OK",
  658. .type = EV_KEY,
  659. .active_low = 1,
  660. .debounce_interval = 1,
  661. },
  662. };
  663. static struct gpio_keys_platform_data universal_gpio_keys_data = {
  664. .buttons = universal_gpio_keys_tables,
  665. .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
  666. };
  667. static struct platform_device universal_gpio_keys = {
  668. .name = "gpio-keys",
  669. .dev = {
  670. .platform_data = &universal_gpio_keys_data,
  671. },
  672. };
  673. /* eMMC */
  674. static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
  675. .max_width = 8,
  676. .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
  677. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  678. .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
  679. .cd_type = S3C_SDHCI_CD_PERMANENT,
  680. };
  681. static struct regulator_consumer_supply mmc0_supplies[] = {
  682. REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.0"),
  683. };
  684. static struct regulator_init_data mmc0_fixed_voltage_init_data = {
  685. .constraints = {
  686. .name = "VMEM_VDD_2.8V",
  687. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  688. },
  689. .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
  690. .consumer_supplies = mmc0_supplies,
  691. };
  692. static struct fixed_voltage_config mmc0_fixed_voltage_config = {
  693. .supply_name = "MASSMEMORY_EN",
  694. .microvolts = 2800000,
  695. .gpio = EXYNOS4_GPE1(3),
  696. .enable_high = true,
  697. .init_data = &mmc0_fixed_voltage_init_data,
  698. };
  699. static struct platform_device mmc0_fixed_voltage = {
  700. .name = "reg-fixed-voltage",
  701. .id = FIXED_REG_ID_MMC0,
  702. .dev = {
  703. .platform_data = &mmc0_fixed_voltage_config,
  704. },
  705. };
  706. /* SD */
  707. static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
  708. .max_width = 4,
  709. .host_caps = MMC_CAP_4_BIT_DATA |
  710. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  711. .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
  712. .ext_cd_gpio_invert = 1,
  713. .cd_type = S3C_SDHCI_CD_GPIO,
  714. };
  715. /* WiFi */
  716. static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
  717. .max_width = 4,
  718. .host_caps = MMC_CAP_4_BIT_DATA |
  719. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  720. .cd_type = S3C_SDHCI_CD_EXTERNAL,
  721. };
  722. static void __init universal_sdhci_init(void)
  723. {
  724. s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
  725. s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
  726. s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
  727. }
  728. /* I2C1 */
  729. static struct i2c_board_info i2c1_devs[] __initdata = {
  730. /* Gyro, To be updated */
  731. };
  732. #ifdef CONFIG_DRM_EXYNOS
  733. static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
  734. .panel = {
  735. .timing = {
  736. .left_margin = 16,
  737. .right_margin = 16,
  738. .upper_margin = 2,
  739. .lower_margin = 28,
  740. .hsync_len = 2,
  741. .vsync_len = 1,
  742. .xres = 480,
  743. .yres = 800,
  744. .refresh = 55,
  745. },
  746. },
  747. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
  748. VIDCON0_CLKSEL_LCD,
  749. .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
  750. | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  751. .default_win = 3,
  752. .bpp = 32,
  753. };
  754. #else
  755. /* Frame Buffer */
  756. static struct s3c_fb_pd_win universal_fb_win0 = {
  757. .max_bpp = 32,
  758. .default_bpp = 16,
  759. .xres = 480,
  760. .yres = 800,
  761. .virtual_x = 480,
  762. .virtual_y = 2 * 800,
  763. };
  764. static struct fb_videomode universal_lcd_timing = {
  765. .left_margin = 16,
  766. .right_margin = 16,
  767. .upper_margin = 2,
  768. .lower_margin = 28,
  769. .hsync_len = 2,
  770. .vsync_len = 1,
  771. .xres = 480,
  772. .yres = 800,
  773. .refresh = 55,
  774. };
  775. static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
  776. .win[0] = &universal_fb_win0,
  777. .vtiming = &universal_lcd_timing,
  778. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
  779. VIDCON0_CLKSEL_LCD,
  780. .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
  781. | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  782. .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
  783. };
  784. #endif
  785. static struct regulator_consumer_supply cam_vt_dio_supply =
  786. REGULATOR_SUPPLY("vdd_core", "0-003c");
  787. static struct regulator_init_data cam_vt_dio_reg_init_data = {
  788. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  789. .num_consumer_supplies = 1,
  790. .consumer_supplies = &cam_vt_dio_supply,
  791. };
  792. static struct fixed_voltage_config cam_vt_dio_fixed_voltage_cfg = {
  793. .supply_name = "CAM_VT_D_IO",
  794. .microvolts = 2800000,
  795. .gpio = EXYNOS4_GPE2(1), /* CAM_PWR_EN2 */
  796. .enable_high = 1,
  797. .init_data = &cam_vt_dio_reg_init_data,
  798. };
  799. static struct platform_device cam_vt_dio_fixed_reg_dev = {
  800. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_DIO,
  801. .dev = { .platform_data = &cam_vt_dio_fixed_voltage_cfg },
  802. };
  803. static struct regulator_consumer_supply cam_i_core_supply =
  804. REGULATOR_SUPPLY("core", "0-001f");
  805. static struct regulator_init_data cam_i_core_reg_init_data = {
  806. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  807. .num_consumer_supplies = 1,
  808. .consumer_supplies = &cam_i_core_supply,
  809. };
  810. static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
  811. .supply_name = "CAM_I_CORE_1.2V",
  812. .microvolts = 1200000,
  813. .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
  814. .enable_high = 1,
  815. .init_data = &cam_i_core_reg_init_data,
  816. };
  817. static struct platform_device cam_i_core_fixed_reg_dev = {
  818. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
  819. .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
  820. };
  821. static struct regulator_consumer_supply cam_s_if_supply =
  822. REGULATOR_SUPPLY("d_sensor", "0-001f");
  823. static struct regulator_init_data cam_s_if_reg_init_data = {
  824. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  825. .num_consumer_supplies = 1,
  826. .consumer_supplies = &cam_s_if_supply,
  827. };
  828. static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
  829. .supply_name = "CAM_S_IF_1.8V",
  830. .microvolts = 1800000,
  831. .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
  832. .enable_high = 1,
  833. .init_data = &cam_s_if_reg_init_data,
  834. };
  835. static struct platform_device cam_s_if_fixed_reg_dev = {
  836. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
  837. .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
  838. };
  839. static struct s5p_platform_mipi_csis mipi_csis_platdata = {
  840. .clk_rate = 166000000UL,
  841. .lanes = 2,
  842. .alignment = 32,
  843. .hs_settle = 12,
  844. .phy_enable = s5p_csis_phy_enable,
  845. };
  846. #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
  847. #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
  848. #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
  849. #define GPIO_CAM_VGA_NRST EXYNOS4_GPE4(7)
  850. #define GPIO_CAM_VGA_NSTBY EXYNOS4_GPE4(6)
  851. static int s5k6aa_set_power(int on)
  852. {
  853. gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
  854. return 0;
  855. }
  856. static struct s5k6aa_platform_data s5k6aa_platdata = {
  857. .mclk_frequency = 21600000UL,
  858. .gpio_reset = { GPIO_CAM_VGA_NRST, 0 },
  859. .gpio_stby = { GPIO_CAM_VGA_NSTBY, 0 },
  860. .bus_type = V4L2_MBUS_PARALLEL,
  861. .horiz_flip = 1,
  862. .set_power = s5k6aa_set_power,
  863. };
  864. static struct i2c_board_info s5k6aa_board_info = {
  865. I2C_BOARD_INFO("S5K6AA", 0x3C),
  866. .platform_data = &s5k6aa_platdata,
  867. };
  868. static int m5mols_set_power(struct device *dev, int on)
  869. {
  870. gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
  871. gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
  872. return 0;
  873. }
  874. static struct m5mols_platform_data m5mols_platdata = {
  875. .gpio_reset = GPIO_CAM_MEGA_nRST,
  876. .reset_polarity = 0,
  877. .set_power = m5mols_set_power,
  878. };
  879. static struct i2c_board_info m5mols_board_info = {
  880. I2C_BOARD_INFO("M5MOLS", 0x1F),
  881. .platform_data = &m5mols_platdata,
  882. };
  883. static struct s5p_fimc_isp_info universal_camera_sensors[] = {
  884. {
  885. .mux_id = 0,
  886. .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
  887. V4L2_MBUS_VSYNC_ACTIVE_LOW,
  888. .bus_type = FIMC_ITU_601,
  889. .board_info = &s5k6aa_board_info,
  890. .i2c_bus_num = 0,
  891. .clk_frequency = 24000000UL,
  892. }, {
  893. .mux_id = 0,
  894. .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
  895. V4L2_MBUS_VSYNC_ACTIVE_LOW,
  896. .bus_type = FIMC_MIPI_CSI2,
  897. .board_info = &m5mols_board_info,
  898. .i2c_bus_num = 0,
  899. .clk_frequency = 24000000UL,
  900. .csi_data_align = 32,
  901. },
  902. };
  903. static struct s5p_platform_fimc fimc_md_platdata = {
  904. .isp_info = universal_camera_sensors,
  905. .num_clients = ARRAY_SIZE(universal_camera_sensors),
  906. };
  907. static struct gpio universal_camera_gpios[] = {
  908. { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
  909. { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
  910. { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
  911. { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
  912. { GPIO_CAM_VGA_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" },
  913. { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" },
  914. };
  915. /* USB OTG */
  916. static struct s3c_hsotg_plat universal_hsotg_pdata;
  917. static void __init universal_camera_init(void)
  918. {
  919. s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
  920. &s5p_device_mipi_csis0);
  921. s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
  922. &s5p_device_fimc_md);
  923. if (gpio_request_array(universal_camera_gpios,
  924. ARRAY_SIZE(universal_camera_gpios))) {
  925. pr_err("%s: GPIO request failed\n", __func__);
  926. return;
  927. }
  928. if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
  929. m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
  930. else
  931. pr_err("Failed to configure 8M_ISP_INT GPIO\n");
  932. /* Free GPIOs controlled directly by the sensor drivers. */
  933. gpio_free(GPIO_CAM_MEGA_nRST);
  934. gpio_free(GPIO_CAM_8M_ISP_INT);
  935. gpio_free(GPIO_CAM_VGA_NRST);
  936. gpio_free(GPIO_CAM_VGA_NSTBY);
  937. if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
  938. pr_err("Camera port A setup failed\n");
  939. }
  940. static struct platform_device *universal_devices[] __initdata = {
  941. /* Samsung Platform Devices */
  942. &s5p_device_mipi_csis0,
  943. &s5p_device_fimc0,
  944. &s5p_device_fimc1,
  945. &s5p_device_fimc2,
  946. &s5p_device_fimc3,
  947. &s5p_device_g2d,
  948. &mmc0_fixed_voltage,
  949. &s3c_device_hsmmc0,
  950. &s3c_device_hsmmc2,
  951. &s3c_device_hsmmc3,
  952. &s3c_device_i2c0,
  953. &s3c_device_i2c3,
  954. &s3c_device_i2c5,
  955. &s5p_device_i2c_hdmiphy,
  956. &hdmi_fixed_voltage,
  957. &s5p_device_hdmi,
  958. &s5p_device_sdo,
  959. &s5p_device_mixer,
  960. /* Universal Devices */
  961. &i2c_gpio12,
  962. &universal_gpio_keys,
  963. &s5p_device_onenand,
  964. &s5p_device_fimd0,
  965. &s5p_device_jpeg,
  966. #ifdef CONFIG_DRM_EXYNOS
  967. &exynos_device_drm,
  968. #endif
  969. &s3c_device_usb_hsotg,
  970. &s5p_device_mfc,
  971. &s5p_device_mfc_l,
  972. &s5p_device_mfc_r,
  973. &cam_vt_dio_fixed_reg_dev,
  974. &cam_i_core_fixed_reg_dev,
  975. &cam_s_if_fixed_reg_dev,
  976. &s5p_device_fimc_md,
  977. };
  978. static void __init universal_map_io(void)
  979. {
  980. clk_xusbxti.rate = 24000000;
  981. exynos_init_io(NULL, 0);
  982. s3c24xx_init_clocks(24000000);
  983. s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
  984. s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
  985. }
  986. static void s5p_tv_setup(void)
  987. {
  988. /* direct HPD to HDMI chip */
  989. gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
  990. s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
  991. s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
  992. }
  993. static void __init universal_reserve(void)
  994. {
  995. s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
  996. }
  997. static void __init universal_machine_init(void)
  998. {
  999. universal_sdhci_init();
  1000. s5p_tv_setup();
  1001. s3c_i2c0_set_platdata(&universal_i2c0_platdata);
  1002. i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
  1003. universal_tsp_init();
  1004. s3c_i2c3_set_platdata(NULL);
  1005. i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
  1006. s3c_i2c5_set_platdata(NULL);
  1007. s5p_i2c_hdmiphy_set_platdata(NULL);
  1008. i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
  1009. #ifdef CONFIG_DRM_EXYNOS
  1010. s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
  1011. exynos4_fimd0_gpio_setup_24bpp();
  1012. #else
  1013. s5p_fimd0_set_platdata(&universal_lcd_pdata);
  1014. #endif
  1015. universal_touchkey_init();
  1016. i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
  1017. ARRAY_SIZE(i2c_gpio12_devs));
  1018. s3c_hsotg_set_platdata(&universal_hsotg_pdata);
  1019. universal_camera_init();
  1020. /* Last */
  1021. platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
  1022. }
  1023. MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
  1024. /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
  1025. .atag_offset = 0x100,
  1026. .init_irq = exynos4_init_irq,
  1027. .map_io = universal_map_io,
  1028. .handle_irq = gic_handle_irq,
  1029. .init_machine = universal_machine_init,
  1030. .init_late = exynos_init_late,
  1031. .timer = &s5p_timer,
  1032. .reserve = &universal_reserve,
  1033. .restart = exynos4_restart,
  1034. MACHINE_END