mach-origen.c 19 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-origen.c
  2. *
  3. * Copyright (c) 2011 Insignal Co., Ltd.
  4. * http://www.insignal.co.kr/
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/serial_core.h>
  11. #include <linux/gpio.h>
  12. #include <linux/mmc/host.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/io.h>
  15. #include <linux/input.h>
  16. #include <linux/pwm_backlight.h>
  17. #include <linux/gpio_keys.h>
  18. #include <linux/i2c.h>
  19. #include <linux/regulator/machine.h>
  20. #include <linux/mfd/max8997.h>
  21. #include <linux/lcd.h>
  22. #include <linux/rfkill-gpio.h>
  23. #include <asm/mach/arch.h>
  24. #include <asm/hardware/gic.h>
  25. #include <asm/mach-types.h>
  26. #include <video/platform_lcd.h>
  27. #include <plat/regs-serial.h>
  28. #include <plat/regs-fb-v4.h>
  29. #include <plat/cpu.h>
  30. #include <plat/devs.h>
  31. #include <plat/sdhci.h>
  32. #include <plat/iic.h>
  33. #include <plat/ehci.h>
  34. #include <plat/clock.h>
  35. #include <plat/gpio-cfg.h>
  36. #include <plat/backlight.h>
  37. #include <plat/pd.h>
  38. #include <plat/fb.h>
  39. #include <plat/mfc.h>
  40. #include <mach/ohci.h>
  41. #include <mach/map.h>
  42. #include <drm/exynos_drm.h>
  43. #include "common.h"
  44. /* Following are default values for UCON, ULCON and UFCON UART registers */
  45. #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  46. S3C2410_UCON_RXILEVEL | \
  47. S3C2410_UCON_TXIRQMODE | \
  48. S3C2410_UCON_RXIRQMODE | \
  49. S3C2410_UCON_RXFIFO_TOI | \
  50. S3C2443_UCON_RXERR_IRQEN)
  51. #define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
  52. #define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  53. S5PV210_UFCON_TXTRIG4 | \
  54. S5PV210_UFCON_RXTRIG4)
  55. static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
  56. [0] = {
  57. .hwport = 0,
  58. .flags = 0,
  59. .ucon = ORIGEN_UCON_DEFAULT,
  60. .ulcon = ORIGEN_ULCON_DEFAULT,
  61. .ufcon = ORIGEN_UFCON_DEFAULT,
  62. },
  63. [1] = {
  64. .hwport = 1,
  65. .flags = 0,
  66. .ucon = ORIGEN_UCON_DEFAULT,
  67. .ulcon = ORIGEN_ULCON_DEFAULT,
  68. .ufcon = ORIGEN_UFCON_DEFAULT,
  69. },
  70. [2] = {
  71. .hwport = 2,
  72. .flags = 0,
  73. .ucon = ORIGEN_UCON_DEFAULT,
  74. .ulcon = ORIGEN_ULCON_DEFAULT,
  75. .ufcon = ORIGEN_UFCON_DEFAULT,
  76. },
  77. [3] = {
  78. .hwport = 3,
  79. .flags = 0,
  80. .ucon = ORIGEN_UCON_DEFAULT,
  81. .ulcon = ORIGEN_ULCON_DEFAULT,
  82. .ufcon = ORIGEN_UFCON_DEFAULT,
  83. },
  84. };
  85. static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
  86. REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
  87. REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
  88. REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
  89. };
  90. static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
  91. REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */
  92. };
  93. static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
  94. REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
  95. };
  96. static struct regulator_consumer_supply __initdata ldo8_consumer[] = {
  97. REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
  98. REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
  99. };
  100. static struct regulator_consumer_supply __initdata ldo9_consumer[] = {
  101. REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
  102. };
  103. static struct regulator_consumer_supply __initdata ldo11_consumer[] = {
  104. REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
  105. };
  106. static struct regulator_consumer_supply __initdata ldo14_consumer[] = {
  107. REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
  108. };
  109. static struct regulator_consumer_supply __initdata ldo17_consumer[] = {
  110. REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
  111. };
  112. static struct regulator_consumer_supply __initdata buck1_consumer[] = {
  113. REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */
  114. };
  115. static struct regulator_consumer_supply __initdata buck2_consumer[] = {
  116. REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */
  117. };
  118. static struct regulator_consumer_supply __initdata buck3_consumer[] = {
  119. REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
  120. };
  121. static struct regulator_consumer_supply __initdata buck7_consumer[] = {
  122. REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
  123. };
  124. static struct regulator_init_data __initdata max8997_ldo1_data = {
  125. .constraints = {
  126. .name = "VDD_ABB_3.3V",
  127. .min_uV = 3300000,
  128. .max_uV = 3300000,
  129. .apply_uV = 1,
  130. .state_mem = {
  131. .disabled = 1,
  132. },
  133. },
  134. };
  135. static struct regulator_init_data __initdata max8997_ldo2_data = {
  136. .constraints = {
  137. .name = "VDD_ALIVE_1.1V",
  138. .min_uV = 1100000,
  139. .max_uV = 1100000,
  140. .apply_uV = 1,
  141. .always_on = 1,
  142. .state_mem = {
  143. .enabled = 1,
  144. },
  145. },
  146. };
  147. static struct regulator_init_data __initdata max8997_ldo3_data = {
  148. .constraints = {
  149. .name = "VMIPI_1.1V",
  150. .min_uV = 1100000,
  151. .max_uV = 1100000,
  152. .apply_uV = 1,
  153. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  154. .state_mem = {
  155. .disabled = 1,
  156. },
  157. },
  158. .num_consumer_supplies = ARRAY_SIZE(ldo3_consumer),
  159. .consumer_supplies = ldo3_consumer,
  160. };
  161. static struct regulator_init_data __initdata max8997_ldo4_data = {
  162. .constraints = {
  163. .name = "VDD_RTC_1.8V",
  164. .min_uV = 1800000,
  165. .max_uV = 1800000,
  166. .apply_uV = 1,
  167. .always_on = 1,
  168. .state_mem = {
  169. .disabled = 1,
  170. },
  171. },
  172. };
  173. static struct regulator_init_data __initdata max8997_ldo6_data = {
  174. .constraints = {
  175. .name = "VMIPI_1.8V",
  176. .min_uV = 1800000,
  177. .max_uV = 1800000,
  178. .apply_uV = 1,
  179. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  180. .state_mem = {
  181. .disabled = 1,
  182. },
  183. },
  184. .num_consumer_supplies = ARRAY_SIZE(ldo6_consumer),
  185. .consumer_supplies = ldo6_consumer,
  186. };
  187. static struct regulator_init_data __initdata max8997_ldo7_data = {
  188. .constraints = {
  189. .name = "VDD_AUD_1.8V",
  190. .min_uV = 1800000,
  191. .max_uV = 1800000,
  192. .apply_uV = 1,
  193. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  194. .state_mem = {
  195. .disabled = 1,
  196. },
  197. },
  198. .num_consumer_supplies = ARRAY_SIZE(ldo7_consumer),
  199. .consumer_supplies = ldo7_consumer,
  200. };
  201. static struct regulator_init_data __initdata max8997_ldo8_data = {
  202. .constraints = {
  203. .name = "VADC_3.3V",
  204. .min_uV = 3300000,
  205. .max_uV = 3300000,
  206. .apply_uV = 1,
  207. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  208. .state_mem = {
  209. .disabled = 1,
  210. },
  211. },
  212. .num_consumer_supplies = ARRAY_SIZE(ldo8_consumer),
  213. .consumer_supplies = ldo8_consumer,
  214. };
  215. static struct regulator_init_data __initdata max8997_ldo9_data = {
  216. .constraints = {
  217. .name = "DVDD_SWB_2.8V",
  218. .min_uV = 2800000,
  219. .max_uV = 2800000,
  220. .apply_uV = 1,
  221. .always_on = 1,
  222. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  223. .state_mem = {
  224. .disabled = 1,
  225. },
  226. },
  227. .num_consumer_supplies = ARRAY_SIZE(ldo9_consumer),
  228. .consumer_supplies = ldo9_consumer,
  229. };
  230. static struct regulator_init_data __initdata max8997_ldo10_data = {
  231. .constraints = {
  232. .name = "VDD_PLL_1.1V",
  233. .min_uV = 1100000,
  234. .max_uV = 1100000,
  235. .apply_uV = 1,
  236. .always_on = 1,
  237. .state_mem = {
  238. .disabled = 1,
  239. },
  240. },
  241. };
  242. static struct regulator_init_data __initdata max8997_ldo11_data = {
  243. .constraints = {
  244. .name = "VDD_AUD_3V",
  245. .min_uV = 3000000,
  246. .max_uV = 3000000,
  247. .apply_uV = 1,
  248. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  249. .state_mem = {
  250. .disabled = 1,
  251. },
  252. },
  253. .num_consumer_supplies = ARRAY_SIZE(ldo11_consumer),
  254. .consumer_supplies = ldo11_consumer,
  255. };
  256. static struct regulator_init_data __initdata max8997_ldo14_data = {
  257. .constraints = {
  258. .name = "AVDD18_SWB_1.8V",
  259. .min_uV = 1800000,
  260. .max_uV = 1800000,
  261. .apply_uV = 1,
  262. .always_on = 1,
  263. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  264. .state_mem = {
  265. .disabled = 1,
  266. },
  267. },
  268. .num_consumer_supplies = ARRAY_SIZE(ldo14_consumer),
  269. .consumer_supplies = ldo14_consumer,
  270. };
  271. static struct regulator_init_data __initdata max8997_ldo17_data = {
  272. .constraints = {
  273. .name = "VDD_SWB_3.3V",
  274. .min_uV = 3300000,
  275. .max_uV = 3300000,
  276. .apply_uV = 1,
  277. .always_on = 1,
  278. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  279. .state_mem = {
  280. .disabled = 1,
  281. },
  282. },
  283. .num_consumer_supplies = ARRAY_SIZE(ldo17_consumer),
  284. .consumer_supplies = ldo17_consumer,
  285. };
  286. static struct regulator_init_data __initdata max8997_ldo21_data = {
  287. .constraints = {
  288. .name = "VDD_MIF_1.2V",
  289. .min_uV = 1200000,
  290. .max_uV = 1200000,
  291. .apply_uV = 1,
  292. .always_on = 1,
  293. .state_mem = {
  294. .disabled = 1,
  295. },
  296. },
  297. };
  298. static struct regulator_init_data __initdata max8997_buck1_data = {
  299. .constraints = {
  300. .name = "VDD_ARM_1.2V",
  301. .min_uV = 950000,
  302. .max_uV = 1350000,
  303. .always_on = 1,
  304. .boot_on = 1,
  305. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  306. .state_mem = {
  307. .disabled = 1,
  308. },
  309. },
  310. .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
  311. .consumer_supplies = buck1_consumer,
  312. };
  313. static struct regulator_init_data __initdata max8997_buck2_data = {
  314. .constraints = {
  315. .name = "VDD_INT_1.1V",
  316. .min_uV = 900000,
  317. .max_uV = 1100000,
  318. .always_on = 1,
  319. .boot_on = 1,
  320. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  321. .state_mem = {
  322. .disabled = 1,
  323. },
  324. },
  325. .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
  326. .consumer_supplies = buck2_consumer,
  327. };
  328. static struct regulator_init_data __initdata max8997_buck3_data = {
  329. .constraints = {
  330. .name = "VDD_G3D_1.1V",
  331. .min_uV = 900000,
  332. .max_uV = 1100000,
  333. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  334. REGULATOR_CHANGE_STATUS,
  335. .state_mem = {
  336. .disabled = 1,
  337. },
  338. },
  339. .num_consumer_supplies = ARRAY_SIZE(buck3_consumer),
  340. .consumer_supplies = buck3_consumer,
  341. };
  342. static struct regulator_init_data __initdata max8997_buck5_data = {
  343. .constraints = {
  344. .name = "VDDQ_M1M2_1.2V",
  345. .min_uV = 1200000,
  346. .max_uV = 1200000,
  347. .apply_uV = 1,
  348. .always_on = 1,
  349. .state_mem = {
  350. .disabled = 1,
  351. },
  352. },
  353. };
  354. static struct regulator_init_data __initdata max8997_buck7_data = {
  355. .constraints = {
  356. .name = "VDD_LCD_3.3V",
  357. .min_uV = 3300000,
  358. .max_uV = 3300000,
  359. .boot_on = 1,
  360. .apply_uV = 1,
  361. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  362. .state_mem = {
  363. .disabled = 1
  364. },
  365. },
  366. .num_consumer_supplies = ARRAY_SIZE(buck7_consumer),
  367. .consumer_supplies = buck7_consumer,
  368. };
  369. static struct max8997_regulator_data __initdata origen_max8997_regulators[] = {
  370. { MAX8997_LDO1, &max8997_ldo1_data },
  371. { MAX8997_LDO2, &max8997_ldo2_data },
  372. { MAX8997_LDO3, &max8997_ldo3_data },
  373. { MAX8997_LDO4, &max8997_ldo4_data },
  374. { MAX8997_LDO6, &max8997_ldo6_data },
  375. { MAX8997_LDO7, &max8997_ldo7_data },
  376. { MAX8997_LDO8, &max8997_ldo8_data },
  377. { MAX8997_LDO9, &max8997_ldo9_data },
  378. { MAX8997_LDO10, &max8997_ldo10_data },
  379. { MAX8997_LDO11, &max8997_ldo11_data },
  380. { MAX8997_LDO14, &max8997_ldo14_data },
  381. { MAX8997_LDO17, &max8997_ldo17_data },
  382. { MAX8997_LDO21, &max8997_ldo21_data },
  383. { MAX8997_BUCK1, &max8997_buck1_data },
  384. { MAX8997_BUCK2, &max8997_buck2_data },
  385. { MAX8997_BUCK3, &max8997_buck3_data },
  386. { MAX8997_BUCK5, &max8997_buck5_data },
  387. { MAX8997_BUCK7, &max8997_buck7_data },
  388. };
  389. static struct max8997_platform_data __initdata origen_max8997_pdata = {
  390. .num_regulators = ARRAY_SIZE(origen_max8997_regulators),
  391. .regulators = origen_max8997_regulators,
  392. .wakeup = true,
  393. .buck1_gpiodvs = false,
  394. .buck2_gpiodvs = false,
  395. .buck5_gpiodvs = false,
  396. .irq_base = IRQ_GPIO_END + 1,
  397. .ignore_gpiodvs_side_effect = true,
  398. .buck125_default_idx = 0x0,
  399. .buck125_gpios[0] = EXYNOS4_GPX0(0),
  400. .buck125_gpios[1] = EXYNOS4_GPX0(1),
  401. .buck125_gpios[2] = EXYNOS4_GPX0(2),
  402. .buck1_voltage[0] = 1350000,
  403. .buck1_voltage[1] = 1300000,
  404. .buck1_voltage[2] = 1250000,
  405. .buck1_voltage[3] = 1200000,
  406. .buck1_voltage[4] = 1150000,
  407. .buck1_voltage[5] = 1100000,
  408. .buck1_voltage[6] = 1000000,
  409. .buck1_voltage[7] = 950000,
  410. .buck2_voltage[0] = 1100000,
  411. .buck2_voltage[1] = 1100000,
  412. .buck2_voltage[2] = 1100000,
  413. .buck2_voltage[3] = 1100000,
  414. .buck2_voltage[4] = 1000000,
  415. .buck2_voltage[5] = 1000000,
  416. .buck2_voltage[6] = 1000000,
  417. .buck2_voltage[7] = 1000000,
  418. .buck5_voltage[0] = 1200000,
  419. .buck5_voltage[1] = 1200000,
  420. .buck5_voltage[2] = 1200000,
  421. .buck5_voltage[3] = 1200000,
  422. .buck5_voltage[4] = 1200000,
  423. .buck5_voltage[5] = 1200000,
  424. .buck5_voltage[6] = 1200000,
  425. .buck5_voltage[7] = 1200000,
  426. };
  427. /* I2C0 */
  428. static struct i2c_board_info i2c0_devs[] __initdata = {
  429. {
  430. I2C_BOARD_INFO("max8997", (0xCC >> 1)),
  431. .platform_data = &origen_max8997_pdata,
  432. .irq = IRQ_EINT(4),
  433. },
  434. };
  435. static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
  436. .cd_type = S3C_SDHCI_CD_INTERNAL,
  437. };
  438. static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
  439. .cd_type = S3C_SDHCI_CD_INTERNAL,
  440. };
  441. /* USB EHCI */
  442. static struct s5p_ehci_platdata origen_ehci_pdata;
  443. static void __init origen_ehci_init(void)
  444. {
  445. struct s5p_ehci_platdata *pdata = &origen_ehci_pdata;
  446. s5p_ehci_set_platdata(pdata);
  447. }
  448. /* USB OHCI */
  449. static struct exynos4_ohci_platdata origen_ohci_pdata;
  450. static void __init origen_ohci_init(void)
  451. {
  452. struct exynos4_ohci_platdata *pdata = &origen_ohci_pdata;
  453. exynos4_ohci_set_platdata(pdata);
  454. }
  455. static struct gpio_keys_button origen_gpio_keys_table[] = {
  456. {
  457. .code = KEY_MENU,
  458. .gpio = EXYNOS4_GPX1(5),
  459. .desc = "gpio-keys: KEY_MENU",
  460. .type = EV_KEY,
  461. .active_low = 1,
  462. .wakeup = 1,
  463. .debounce_interval = 1,
  464. }, {
  465. .code = KEY_HOME,
  466. .gpio = EXYNOS4_GPX1(6),
  467. .desc = "gpio-keys: KEY_HOME",
  468. .type = EV_KEY,
  469. .active_low = 1,
  470. .wakeup = 1,
  471. .debounce_interval = 1,
  472. }, {
  473. .code = KEY_BACK,
  474. .gpio = EXYNOS4_GPX1(7),
  475. .desc = "gpio-keys: KEY_BACK",
  476. .type = EV_KEY,
  477. .active_low = 1,
  478. .wakeup = 1,
  479. .debounce_interval = 1,
  480. }, {
  481. .code = KEY_UP,
  482. .gpio = EXYNOS4_GPX2(0),
  483. .desc = "gpio-keys: KEY_UP",
  484. .type = EV_KEY,
  485. .active_low = 1,
  486. .wakeup = 1,
  487. .debounce_interval = 1,
  488. }, {
  489. .code = KEY_DOWN,
  490. .gpio = EXYNOS4_GPX2(1),
  491. .desc = "gpio-keys: KEY_DOWN",
  492. .type = EV_KEY,
  493. .active_low = 1,
  494. .wakeup = 1,
  495. .debounce_interval = 1,
  496. },
  497. };
  498. static struct gpio_keys_platform_data origen_gpio_keys_data = {
  499. .buttons = origen_gpio_keys_table,
  500. .nbuttons = ARRAY_SIZE(origen_gpio_keys_table),
  501. };
  502. static struct platform_device origen_device_gpiokeys = {
  503. .name = "gpio-keys",
  504. .dev = {
  505. .platform_data = &origen_gpio_keys_data,
  506. },
  507. };
  508. static void lcd_hv070wsa_set_power(struct plat_lcd_data *pd, unsigned int power)
  509. {
  510. int ret;
  511. if (power)
  512. ret = gpio_request_one(EXYNOS4_GPE3(4),
  513. GPIOF_OUT_INIT_HIGH, "GPE3_4");
  514. else
  515. ret = gpio_request_one(EXYNOS4_GPE3(4),
  516. GPIOF_OUT_INIT_LOW, "GPE3_4");
  517. gpio_free(EXYNOS4_GPE3(4));
  518. if (ret)
  519. pr_err("failed to request gpio for LCD power: %d\n", ret);
  520. }
  521. static struct plat_lcd_data origen_lcd_hv070wsa_data = {
  522. .set_power = lcd_hv070wsa_set_power,
  523. };
  524. static struct platform_device origen_lcd_hv070wsa = {
  525. .name = "platform-lcd",
  526. .dev.parent = &s5p_device_fimd0.dev,
  527. .dev.platform_data = &origen_lcd_hv070wsa_data,
  528. };
  529. #ifdef CONFIG_DRM_EXYNOS
  530. static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
  531. .panel = {
  532. .timing = {
  533. .left_margin = 64,
  534. .right_margin = 16,
  535. .upper_margin = 64,
  536. .lower_margin = 16,
  537. .hsync_len = 48,
  538. .vsync_len = 3,
  539. .xres = 1024,
  540. .yres = 600,
  541. },
  542. },
  543. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  544. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
  545. VIDCON1_INV_VCLK,
  546. .default_win = 0,
  547. .bpp = 32,
  548. };
  549. #else
  550. static struct s3c_fb_pd_win origen_fb_win0 = {
  551. .xres = 1024,
  552. .yres = 600,
  553. .max_bpp = 32,
  554. .default_bpp = 24,
  555. .virtual_x = 1024,
  556. .virtual_y = 2 * 600,
  557. };
  558. static struct fb_videomode origen_lcd_timing = {
  559. .left_margin = 64,
  560. .right_margin = 16,
  561. .upper_margin = 64,
  562. .lower_margin = 16,
  563. .hsync_len = 48,
  564. .vsync_len = 3,
  565. .xres = 1024,
  566. .yres = 600,
  567. };
  568. static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
  569. .win[0] = &origen_fb_win0,
  570. .vtiming = &origen_lcd_timing,
  571. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  572. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
  573. VIDCON1_INV_VCLK,
  574. .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
  575. };
  576. #endif
  577. /* Bluetooth rfkill gpio platform data */
  578. static struct rfkill_gpio_platform_data origen_bt_pdata = {
  579. .reset_gpio = EXYNOS4_GPX2(2),
  580. .shutdown_gpio = -1,
  581. .type = RFKILL_TYPE_BLUETOOTH,
  582. .name = "origen-bt",
  583. };
  584. /* Bluetooth Platform device */
  585. static struct platform_device origen_device_bluetooth = {
  586. .name = "rfkill_gpio",
  587. .id = -1,
  588. .dev = {
  589. .platform_data = &origen_bt_pdata,
  590. },
  591. };
  592. static struct platform_device *origen_devices[] __initdata = {
  593. &s3c_device_hsmmc2,
  594. &s3c_device_hsmmc0,
  595. &s3c_device_i2c0,
  596. &s3c_device_rtc,
  597. &s3c_device_wdt,
  598. &s5p_device_ehci,
  599. &s5p_device_fimc0,
  600. &s5p_device_fimc1,
  601. &s5p_device_fimc2,
  602. &s5p_device_fimc3,
  603. &s5p_device_fimc_md,
  604. &s5p_device_fimd0,
  605. &s5p_device_g2d,
  606. &s5p_device_hdmi,
  607. &s5p_device_i2c_hdmiphy,
  608. &s5p_device_jpeg,
  609. &s5p_device_mfc,
  610. &s5p_device_mfc_l,
  611. &s5p_device_mfc_r,
  612. &s5p_device_mixer,
  613. #ifdef CONFIG_DRM_EXYNOS
  614. &exynos_device_drm,
  615. #endif
  616. &exynos4_device_ohci,
  617. &origen_device_gpiokeys,
  618. &origen_lcd_hv070wsa,
  619. &origen_device_bluetooth,
  620. };
  621. /* LCD Backlight data */
  622. static struct samsung_bl_gpio_info origen_bl_gpio_info = {
  623. .no = EXYNOS4_GPD0(0),
  624. .func = S3C_GPIO_SFN(2),
  625. };
  626. static struct platform_pwm_backlight_data origen_bl_data = {
  627. .pwm_id = 0,
  628. .pwm_period_ns = 1000,
  629. };
  630. static void __init origen_bt_setup(void)
  631. {
  632. gpio_request(EXYNOS4_GPA0(0), "GPIO BT_UART");
  633. /* 4 UART Pins configuration */
  634. s3c_gpio_cfgrange_nopull(EXYNOS4_GPA0(0), 4, S3C_GPIO_SFN(2));
  635. /* Setup BT Reset, this gpio will be requesed by rfkill-gpio */
  636. s3c_gpio_cfgpin(EXYNOS4_GPX2(2), S3C_GPIO_OUTPUT);
  637. s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE);
  638. }
  639. static void s5p_tv_setup(void)
  640. {
  641. /* Direct HPD to HDMI chip */
  642. gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
  643. s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
  644. s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
  645. }
  646. static void __init origen_map_io(void)
  647. {
  648. exynos_init_io(NULL, 0);
  649. s3c24xx_init_clocks(24000000);
  650. s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
  651. }
  652. static void __init origen_power_init(void)
  653. {
  654. gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
  655. s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
  656. s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE);
  657. }
  658. static void __init origen_reserve(void)
  659. {
  660. s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
  661. }
  662. static void __init origen_machine_init(void)
  663. {
  664. origen_power_init();
  665. s3c_i2c0_set_platdata(NULL);
  666. i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
  667. /*
  668. * Since sdhci instance 2 can contain a bootable media,
  669. * sdhci instance 0 is registered after instance 2.
  670. */
  671. s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
  672. s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
  673. origen_ehci_init();
  674. origen_ohci_init();
  675. clk_xusbxti.rate = 24000000;
  676. s5p_tv_setup();
  677. s5p_i2c_hdmiphy_set_platdata(NULL);
  678. #ifdef CONFIG_DRM_EXYNOS
  679. s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
  680. exynos4_fimd0_gpio_setup_24bpp();
  681. #else
  682. s5p_fimd0_set_platdata(&origen_lcd_pdata);
  683. #endif
  684. platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
  685. samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
  686. origen_bt_setup();
  687. }
  688. MACHINE_START(ORIGEN, "ORIGEN")
  689. /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
  690. .atag_offset = 0x100,
  691. .init_irq = exynos4_init_irq,
  692. .map_io = origen_map_io,
  693. .handle_irq = gic_handle_irq,
  694. .init_machine = origen_machine_init,
  695. .init_late = exynos_init_late,
  696. .timer = &exynos4_timer,
  697. .reserve = &origen_reserve,
  698. .restart = exynos4_restart,
  699. MACHINE_END