spear3xx.dtsi 3.1 KB

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  1. /*
  2. * DTS file for all SPEAr3xx SoCs
  3. *
  4. * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
  5. *
  6. * The code contained herein is licensed under the GNU General Public
  7. * License. You may obtain a copy of the GNU General Public License
  8. * Version 2 or later at the following locations:
  9. *
  10. * http://www.opensource.org/licenses/gpl-license.html
  11. * http://www.gnu.org/copyleft/gpl.html
  12. */
  13. /include/ "skeleton.dtsi"
  14. / {
  15. interrupt-parent = <&vic>;
  16. cpus {
  17. cpu@0 {
  18. compatible = "arm,arm926ejs";
  19. };
  20. };
  21. memory {
  22. device_type = "memory";
  23. reg = <0 0x40000000>;
  24. };
  25. ahb {
  26. #address-cells = <1>;
  27. #size-cells = <1>;
  28. compatible = "simple-bus";
  29. ranges = <0xd0000000 0xd0000000 0x30000000>;
  30. vic: interrupt-controller@f1100000 {
  31. compatible = "arm,pl190-vic";
  32. interrupt-controller;
  33. reg = <0xf1100000 0x1000>;
  34. #interrupt-cells = <1>;
  35. };
  36. dma@fc400000 {
  37. compatible = "arm,pl080", "arm,primecell";
  38. reg = <0xfc400000 0x1000>;
  39. interrupt-parent = <&vic>;
  40. interrupts = <8>;
  41. status = "disabled";
  42. };
  43. gmac: eth@e0800000 {
  44. compatible = "st,spear600-gmac";
  45. reg = <0xe0800000 0x8000>;
  46. interrupts = <23 22>;
  47. interrupt-names = "macirq", "eth_wake_irq";
  48. status = "disabled";
  49. };
  50. smi: flash@fc000000 {
  51. compatible = "st,spear600-smi";
  52. #address-cells = <1>;
  53. #size-cells = <1>;
  54. reg = <0xfc000000 0x1000>;
  55. interrupts = <9>;
  56. status = "disabled";
  57. };
  58. spi0: spi@d0100000 {
  59. compatible = "arm,pl022", "arm,primecell";
  60. reg = <0xd0100000 0x1000>;
  61. interrupts = <20>;
  62. status = "disabled";
  63. };
  64. ehci@e1800000 {
  65. compatible = "st,spear600-ehci", "usb-ehci";
  66. reg = <0xe1800000 0x1000>;
  67. interrupts = <26>;
  68. status = "disabled";
  69. };
  70. ohci@e1900000 {
  71. compatible = "st,spear600-ohci", "usb-ohci";
  72. reg = <0xe1900000 0x1000>;
  73. interrupts = <25>;
  74. status = "disabled";
  75. };
  76. ohci@e2100000 {
  77. compatible = "st,spear600-ohci", "usb-ohci";
  78. reg = <0xe2100000 0x1000>;
  79. interrupts = <27>;
  80. status = "disabled";
  81. };
  82. apb {
  83. #address-cells = <1>;
  84. #size-cells = <1>;
  85. compatible = "simple-bus";
  86. ranges = <0xd0000000 0xd0000000 0x30000000>;
  87. gpio0: gpio@fc980000 {
  88. compatible = "arm,pl061", "arm,primecell";
  89. reg = <0xfc980000 0x1000>;
  90. interrupts = <11>;
  91. gpio-controller;
  92. #gpio-cells = <2>;
  93. interrupt-controller;
  94. #interrupt-cells = <2>;
  95. status = "disabled";
  96. };
  97. i2c0: i2c@d0180000 {
  98. #address-cells = <1>;
  99. #size-cells = <0>;
  100. compatible = "snps,designware-i2c";
  101. reg = <0xd0180000 0x1000>;
  102. interrupts = <21>;
  103. status = "disabled";
  104. };
  105. rtc@fc900000 {
  106. compatible = "st,spear-rtc";
  107. reg = <0xfc900000 0x1000>;
  108. interrupts = <10>;
  109. status = "disabled";
  110. };
  111. serial@d0000000 {
  112. compatible = "arm,pl011", "arm,primecell";
  113. reg = <0xd0000000 0x1000>;
  114. interrupts = <19>;
  115. status = "disabled";
  116. };
  117. wdt@fc880000 {
  118. compatible = "arm,sp805", "arm,primecell";
  119. reg = <0xfc880000 0x1000>;
  120. interrupts = <12>;
  121. status = "disabled";
  122. };
  123. timer@f0000000 {
  124. compatible = "st,spear-timer";
  125. reg = <0xf0000000 0x400>;
  126. interrupts = <2>;
  127. };
  128. };
  129. };
  130. };