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- NVIDIA Tegra30 AHUB (Audio Hub)
- Required properties:
- - compatible : "nvidia,tegra30-ahub"
- - reg : Should contain the register physical address and length for each of
- the AHUB's APBIF registers and the AHUB's own registers.
- - interrupts : Should contain AHUB interrupt
- - nvidia,dma-request-selector : The Tegra DMA controller's phandle and
- request selector for the first APBIF channel.
- - ranges : The bus address mapping for the configlink register bus.
- Can be empty since the mapping is 1:1.
- - #address-cells : For the configlink bus. Should be <1>;
- - #size-cells : For the configlink bus. Should be <1>.
- AHUB client modules need to specify the IDs of their CIFs (Client InterFaces).
- For RX CIFs, the numbers indicate the register number within AHUB routing
- register space (APBIF 0..3 RX, I2S 0..5 RX, DAM 0..2 RX 0..1, SPDIF RX 0..1).
- For TX CIFs, the numbers indicate the bit position within the AHUB routing
- registers (APBIF 0..3 TX, I2S 0..5 TX, DAM 0..2 TX, SPDIF TX 0..1).
- Example:
- ahub@70080000 {
- compatible = "nvidia,tegra30-ahub";
- reg = <0x70080000 0x200 0x70080200 0x100>;
- interrupts = < 0 103 0x04 >;
- nvidia,dma-request-selector = <&apbdma 1>;
- ranges;
- #address-cells = <1>;
- #size-cells = <1>;
- };
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