cx88-video.c 55 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * video4linux video interface
  5. *
  6. * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  7. *
  8. * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
  9. * - Multituner support
  10. * - video_ioctl2 conversion
  11. * - PAL/M fixes
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26. */
  27. #include <linux/init.h>
  28. #include <linux/list.h>
  29. #include <linux/module.h>
  30. #include <linux/kmod.h>
  31. #include <linux/kernel.h>
  32. #include <linux/slab.h>
  33. #include <linux/smp_lock.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/dma-mapping.h>
  36. #include <linux/delay.h>
  37. #include <linux/kthread.h>
  38. #include <asm/div64.h>
  39. #include "cx88.h"
  40. #include <media/v4l2-common.h>
  41. #include <media/v4l2-ioctl.h>
  42. MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
  43. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  44. MODULE_LICENSE("GPL");
  45. /* ------------------------------------------------------------------ */
  46. static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  47. static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  48. static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  49. module_param_array(video_nr, int, NULL, 0444);
  50. module_param_array(vbi_nr, int, NULL, 0444);
  51. module_param_array(radio_nr, int, NULL, 0444);
  52. MODULE_PARM_DESC(video_nr,"video device numbers");
  53. MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
  54. MODULE_PARM_DESC(radio_nr,"radio device numbers");
  55. static unsigned int video_debug;
  56. module_param(video_debug,int,0644);
  57. MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
  58. static unsigned int irq_debug;
  59. module_param(irq_debug,int,0644);
  60. MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
  61. static unsigned int vid_limit = 16;
  62. module_param(vid_limit,int,0644);
  63. MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
  64. #define dprintk(level,fmt, arg...) if (video_debug >= level) \
  65. printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
  66. /* ------------------------------------------------------------------- */
  67. /* static data */
  68. static struct cx8800_fmt formats[] = {
  69. {
  70. .name = "8 bpp, gray",
  71. .fourcc = V4L2_PIX_FMT_GREY,
  72. .cxformat = ColorFormatY8,
  73. .depth = 8,
  74. .flags = FORMAT_FLAGS_PACKED,
  75. },{
  76. .name = "15 bpp RGB, le",
  77. .fourcc = V4L2_PIX_FMT_RGB555,
  78. .cxformat = ColorFormatRGB15,
  79. .depth = 16,
  80. .flags = FORMAT_FLAGS_PACKED,
  81. },{
  82. .name = "15 bpp RGB, be",
  83. .fourcc = V4L2_PIX_FMT_RGB555X,
  84. .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
  85. .depth = 16,
  86. .flags = FORMAT_FLAGS_PACKED,
  87. },{
  88. .name = "16 bpp RGB, le",
  89. .fourcc = V4L2_PIX_FMT_RGB565,
  90. .cxformat = ColorFormatRGB16,
  91. .depth = 16,
  92. .flags = FORMAT_FLAGS_PACKED,
  93. },{
  94. .name = "16 bpp RGB, be",
  95. .fourcc = V4L2_PIX_FMT_RGB565X,
  96. .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
  97. .depth = 16,
  98. .flags = FORMAT_FLAGS_PACKED,
  99. },{
  100. .name = "24 bpp RGB, le",
  101. .fourcc = V4L2_PIX_FMT_BGR24,
  102. .cxformat = ColorFormatRGB24,
  103. .depth = 24,
  104. .flags = FORMAT_FLAGS_PACKED,
  105. },{
  106. .name = "32 bpp RGB, le",
  107. .fourcc = V4L2_PIX_FMT_BGR32,
  108. .cxformat = ColorFormatRGB32,
  109. .depth = 32,
  110. .flags = FORMAT_FLAGS_PACKED,
  111. },{
  112. .name = "32 bpp RGB, be",
  113. .fourcc = V4L2_PIX_FMT_RGB32,
  114. .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
  115. .depth = 32,
  116. .flags = FORMAT_FLAGS_PACKED,
  117. },{
  118. .name = "4:2:2, packed, YUYV",
  119. .fourcc = V4L2_PIX_FMT_YUYV,
  120. .cxformat = ColorFormatYUY2,
  121. .depth = 16,
  122. .flags = FORMAT_FLAGS_PACKED,
  123. },{
  124. .name = "4:2:2, packed, UYVY",
  125. .fourcc = V4L2_PIX_FMT_UYVY,
  126. .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
  127. .depth = 16,
  128. .flags = FORMAT_FLAGS_PACKED,
  129. },
  130. };
  131. static struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
  132. {
  133. unsigned int i;
  134. for (i = 0; i < ARRAY_SIZE(formats); i++)
  135. if (formats[i].fourcc == fourcc)
  136. return formats+i;
  137. return NULL;
  138. }
  139. /* ------------------------------------------------------------------- */
  140. static const struct v4l2_queryctrl no_ctl = {
  141. .name = "42",
  142. .flags = V4L2_CTRL_FLAG_DISABLED,
  143. };
  144. static struct cx88_ctrl cx8800_ctls[] = {
  145. /* --- video --- */
  146. {
  147. .v = {
  148. .id = V4L2_CID_BRIGHTNESS,
  149. .name = "Brightness",
  150. .minimum = 0x00,
  151. .maximum = 0xff,
  152. .step = 1,
  153. .default_value = 0x7f,
  154. .type = V4L2_CTRL_TYPE_INTEGER,
  155. },
  156. .off = 128,
  157. .reg = MO_CONTR_BRIGHT,
  158. .mask = 0x00ff,
  159. .shift = 0,
  160. },{
  161. .v = {
  162. .id = V4L2_CID_CONTRAST,
  163. .name = "Contrast",
  164. .minimum = 0,
  165. .maximum = 0xff,
  166. .step = 1,
  167. .default_value = 0x3f,
  168. .type = V4L2_CTRL_TYPE_INTEGER,
  169. },
  170. .off = 0,
  171. .reg = MO_CONTR_BRIGHT,
  172. .mask = 0xff00,
  173. .shift = 8,
  174. },{
  175. .v = {
  176. .id = V4L2_CID_HUE,
  177. .name = "Hue",
  178. .minimum = 0,
  179. .maximum = 0xff,
  180. .step = 1,
  181. .default_value = 0x7f,
  182. .type = V4L2_CTRL_TYPE_INTEGER,
  183. },
  184. .off = 128,
  185. .reg = MO_HUE,
  186. .mask = 0x00ff,
  187. .shift = 0,
  188. },{
  189. /* strictly, this only describes only U saturation.
  190. * V saturation is handled specially through code.
  191. */
  192. .v = {
  193. .id = V4L2_CID_SATURATION,
  194. .name = "Saturation",
  195. .minimum = 0,
  196. .maximum = 0xff,
  197. .step = 1,
  198. .default_value = 0x7f,
  199. .type = V4L2_CTRL_TYPE_INTEGER,
  200. },
  201. .off = 0,
  202. .reg = MO_UV_SATURATION,
  203. .mask = 0x00ff,
  204. .shift = 0,
  205. },{
  206. .v = {
  207. .id = V4L2_CID_CHROMA_AGC,
  208. .name = "Chroma AGC",
  209. .minimum = 0,
  210. .maximum = 1,
  211. .default_value = 0x1,
  212. .type = V4L2_CTRL_TYPE_BOOLEAN,
  213. },
  214. .reg = MO_INPUT_FORMAT,
  215. .mask = 1 << 10,
  216. .shift = 10,
  217. }, {
  218. .v = {
  219. .id = V4L2_CID_COLOR_KILLER,
  220. .name = "Color killer",
  221. .minimum = 0,
  222. .maximum = 1,
  223. .default_value = 0x1,
  224. .type = V4L2_CTRL_TYPE_BOOLEAN,
  225. },
  226. .reg = MO_INPUT_FORMAT,
  227. .mask = 1 << 9,
  228. .shift = 9,
  229. }, {
  230. /* --- audio --- */
  231. .v = {
  232. .id = V4L2_CID_AUDIO_MUTE,
  233. .name = "Mute",
  234. .minimum = 0,
  235. .maximum = 1,
  236. .default_value = 1,
  237. .type = V4L2_CTRL_TYPE_BOOLEAN,
  238. },
  239. .reg = AUD_VOL_CTL,
  240. .sreg = SHADOW_AUD_VOL_CTL,
  241. .mask = (1 << 6),
  242. .shift = 6,
  243. },{
  244. .v = {
  245. .id = V4L2_CID_AUDIO_VOLUME,
  246. .name = "Volume",
  247. .minimum = 0,
  248. .maximum = 0x3f,
  249. .step = 1,
  250. .default_value = 0x3f,
  251. .type = V4L2_CTRL_TYPE_INTEGER,
  252. },
  253. .reg = AUD_VOL_CTL,
  254. .sreg = SHADOW_AUD_VOL_CTL,
  255. .mask = 0x3f,
  256. .shift = 0,
  257. },{
  258. .v = {
  259. .id = V4L2_CID_AUDIO_BALANCE,
  260. .name = "Balance",
  261. .minimum = 0,
  262. .maximum = 0x7f,
  263. .step = 1,
  264. .default_value = 0x40,
  265. .type = V4L2_CTRL_TYPE_INTEGER,
  266. },
  267. .reg = AUD_BAL_CTL,
  268. .sreg = SHADOW_AUD_BAL_CTL,
  269. .mask = 0x7f,
  270. .shift = 0,
  271. }
  272. };
  273. static const int CX8800_CTLS = ARRAY_SIZE(cx8800_ctls);
  274. /* Must be sorted from low to high control ID! */
  275. const u32 cx88_user_ctrls[] = {
  276. V4L2_CID_USER_CLASS,
  277. V4L2_CID_BRIGHTNESS,
  278. V4L2_CID_CONTRAST,
  279. V4L2_CID_SATURATION,
  280. V4L2_CID_HUE,
  281. V4L2_CID_AUDIO_VOLUME,
  282. V4L2_CID_AUDIO_BALANCE,
  283. V4L2_CID_AUDIO_MUTE,
  284. V4L2_CID_CHROMA_AGC,
  285. V4L2_CID_COLOR_KILLER,
  286. 0
  287. };
  288. EXPORT_SYMBOL(cx88_user_ctrls);
  289. static const u32 *ctrl_classes[] = {
  290. cx88_user_ctrls,
  291. NULL
  292. };
  293. int cx8800_ctrl_query(struct cx88_core *core, struct v4l2_queryctrl *qctrl)
  294. {
  295. int i;
  296. if (qctrl->id < V4L2_CID_BASE ||
  297. qctrl->id >= V4L2_CID_LASTP1)
  298. return -EINVAL;
  299. for (i = 0; i < CX8800_CTLS; i++)
  300. if (cx8800_ctls[i].v.id == qctrl->id)
  301. break;
  302. if (i == CX8800_CTLS) {
  303. *qctrl = no_ctl;
  304. return 0;
  305. }
  306. *qctrl = cx8800_ctls[i].v;
  307. /* Report chroma AGC as inactive when SECAM is selected */
  308. if (cx8800_ctls[i].v.id == V4L2_CID_CHROMA_AGC &&
  309. core->tvnorm & V4L2_STD_SECAM)
  310. qctrl->flags |= V4L2_CTRL_FLAG_INACTIVE;
  311. return 0;
  312. }
  313. EXPORT_SYMBOL(cx8800_ctrl_query);
  314. /* ------------------------------------------------------------------- */
  315. /* resource management */
  316. static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
  317. {
  318. struct cx88_core *core = dev->core;
  319. if (fh->resources & bit)
  320. /* have it already allocated */
  321. return 1;
  322. /* is it free? */
  323. mutex_lock(&core->lock);
  324. if (dev->resources & bit) {
  325. /* no, someone else uses it */
  326. mutex_unlock(&core->lock);
  327. return 0;
  328. }
  329. /* it's free, grab it */
  330. fh->resources |= bit;
  331. dev->resources |= bit;
  332. dprintk(1,"res: get %d\n",bit);
  333. mutex_unlock(&core->lock);
  334. return 1;
  335. }
  336. static
  337. int res_check(struct cx8800_fh *fh, unsigned int bit)
  338. {
  339. return (fh->resources & bit);
  340. }
  341. static
  342. int res_locked(struct cx8800_dev *dev, unsigned int bit)
  343. {
  344. return (dev->resources & bit);
  345. }
  346. static
  347. void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
  348. {
  349. struct cx88_core *core = dev->core;
  350. BUG_ON((fh->resources & bits) != bits);
  351. mutex_lock(&core->lock);
  352. fh->resources &= ~bits;
  353. dev->resources &= ~bits;
  354. dprintk(1,"res: put %d\n",bits);
  355. mutex_unlock(&core->lock);
  356. }
  357. /* ------------------------------------------------------------------ */
  358. int cx88_video_mux(struct cx88_core *core, unsigned int input)
  359. {
  360. /* struct cx88_core *core = dev->core; */
  361. dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
  362. input, INPUT(input).vmux,
  363. INPUT(input).gpio0,INPUT(input).gpio1,
  364. INPUT(input).gpio2,INPUT(input).gpio3);
  365. core->input = input;
  366. cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
  367. cx_write(MO_GP3_IO, INPUT(input).gpio3);
  368. cx_write(MO_GP0_IO, INPUT(input).gpio0);
  369. cx_write(MO_GP1_IO, INPUT(input).gpio1);
  370. cx_write(MO_GP2_IO, INPUT(input).gpio2);
  371. switch (INPUT(input).type) {
  372. case CX88_VMUX_SVIDEO:
  373. cx_set(MO_AFECFG_IO, 0x00000001);
  374. cx_set(MO_INPUT_FORMAT, 0x00010010);
  375. cx_set(MO_FILTER_EVEN, 0x00002020);
  376. cx_set(MO_FILTER_ODD, 0x00002020);
  377. break;
  378. default:
  379. cx_clear(MO_AFECFG_IO, 0x00000001);
  380. cx_clear(MO_INPUT_FORMAT, 0x00010010);
  381. cx_clear(MO_FILTER_EVEN, 0x00002020);
  382. cx_clear(MO_FILTER_ODD, 0x00002020);
  383. break;
  384. }
  385. /* if there are audioroutes defined, we have an external
  386. ADC to deal with audio */
  387. if (INPUT(input).audioroute) {
  388. /* The wm8775 module has the "2" route hardwired into
  389. the initialization. Some boards may use different
  390. routes for different inputs. HVR-1300 surely does */
  391. if (core->board.audio_chip &&
  392. core->board.audio_chip == V4L2_IDENT_WM8775) {
  393. call_all(core, audio, s_routing,
  394. INPUT(input).audioroute, 0, 0);
  395. }
  396. /* cx2388's C-ADC is connected to the tuner only.
  397. When used with S-Video, that ADC is busy dealing with
  398. chroma, so an external must be used for baseband audio */
  399. if (INPUT(input).type != CX88_VMUX_TELEVISION &&
  400. INPUT(input).type != CX88_VMUX_CABLE) {
  401. /* "I2S ADC mode" */
  402. core->tvaudio = WW_I2SADC;
  403. cx88_set_tvaudio(core);
  404. } else {
  405. /* Normal mode */
  406. cx_write(AUD_I2SCNTL, 0x0);
  407. cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
  408. }
  409. }
  410. return 0;
  411. }
  412. EXPORT_SYMBOL(cx88_video_mux);
  413. /* ------------------------------------------------------------------ */
  414. static int start_video_dma(struct cx8800_dev *dev,
  415. struct cx88_dmaqueue *q,
  416. struct cx88_buffer *buf)
  417. {
  418. struct cx88_core *core = dev->core;
  419. /* setup fifo + format */
  420. cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
  421. buf->bpl, buf->risc.dma);
  422. cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
  423. cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
  424. /* reset counter */
  425. cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
  426. q->count = 1;
  427. /* enable irqs */
  428. cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
  429. /* Enables corresponding bits at PCI_INT_STAT:
  430. bits 0 to 4: video, audio, transport stream, VIP, Host
  431. bit 7: timer
  432. bits 8 and 9: DMA complete for: SRC, DST
  433. bits 10 and 11: BERR signal asserted for RISC: RD, WR
  434. bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
  435. */
  436. cx_set(MO_VID_INTMSK, 0x0f0011);
  437. /* enable capture */
  438. cx_set(VID_CAPTURE_CONTROL,0x06);
  439. /* start dma */
  440. cx_set(MO_DEV_CNTRL2, (1<<5));
  441. cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
  442. return 0;
  443. }
  444. #ifdef CONFIG_PM
  445. static int stop_video_dma(struct cx8800_dev *dev)
  446. {
  447. struct cx88_core *core = dev->core;
  448. /* stop dma */
  449. cx_clear(MO_VID_DMACNTRL, 0x11);
  450. /* disable capture */
  451. cx_clear(VID_CAPTURE_CONTROL,0x06);
  452. /* disable irqs */
  453. cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
  454. cx_clear(MO_VID_INTMSK, 0x0f0011);
  455. return 0;
  456. }
  457. #endif
  458. static int restart_video_queue(struct cx8800_dev *dev,
  459. struct cx88_dmaqueue *q)
  460. {
  461. struct cx88_core *core = dev->core;
  462. struct cx88_buffer *buf, *prev;
  463. if (!list_empty(&q->active)) {
  464. buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
  465. dprintk(2,"restart_queue [%p/%d]: restart dma\n",
  466. buf, buf->vb.i);
  467. start_video_dma(dev, q, buf);
  468. list_for_each_entry(buf, &q->active, vb.queue)
  469. buf->count = q->count++;
  470. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  471. return 0;
  472. }
  473. prev = NULL;
  474. for (;;) {
  475. if (list_empty(&q->queued))
  476. return 0;
  477. buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
  478. if (NULL == prev) {
  479. list_move_tail(&buf->vb.queue, &q->active);
  480. start_video_dma(dev, q, buf);
  481. buf->vb.state = VIDEOBUF_ACTIVE;
  482. buf->count = q->count++;
  483. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  484. dprintk(2,"[%p/%d] restart_queue - first active\n",
  485. buf,buf->vb.i);
  486. } else if (prev->vb.width == buf->vb.width &&
  487. prev->vb.height == buf->vb.height &&
  488. prev->fmt == buf->fmt) {
  489. list_move_tail(&buf->vb.queue, &q->active);
  490. buf->vb.state = VIDEOBUF_ACTIVE;
  491. buf->count = q->count++;
  492. prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
  493. dprintk(2,"[%p/%d] restart_queue - move to active\n",
  494. buf,buf->vb.i);
  495. } else {
  496. return 0;
  497. }
  498. prev = buf;
  499. }
  500. }
  501. /* ------------------------------------------------------------------ */
  502. static int
  503. buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
  504. {
  505. struct cx8800_fh *fh = q->priv_data;
  506. *size = fh->fmt->depth*fh->width*fh->height >> 3;
  507. if (0 == *count)
  508. *count = 32;
  509. if (*size * *count > vid_limit * 1024 * 1024)
  510. *count = (vid_limit * 1024 * 1024) / *size;
  511. return 0;
  512. }
  513. static int
  514. buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
  515. enum v4l2_field field)
  516. {
  517. struct cx8800_fh *fh = q->priv_data;
  518. struct cx8800_dev *dev = fh->dev;
  519. struct cx88_core *core = dev->core;
  520. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  521. struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
  522. int rc, init_buffer = 0;
  523. BUG_ON(NULL == fh->fmt);
  524. if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) ||
  525. fh->height < 32 || fh->height > norm_maxh(core->tvnorm))
  526. return -EINVAL;
  527. buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
  528. if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
  529. return -EINVAL;
  530. if (buf->fmt != fh->fmt ||
  531. buf->vb.width != fh->width ||
  532. buf->vb.height != fh->height ||
  533. buf->vb.field != field) {
  534. buf->fmt = fh->fmt;
  535. buf->vb.width = fh->width;
  536. buf->vb.height = fh->height;
  537. buf->vb.field = field;
  538. init_buffer = 1;
  539. }
  540. if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
  541. init_buffer = 1;
  542. if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
  543. goto fail;
  544. }
  545. if (init_buffer) {
  546. buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
  547. switch (buf->vb.field) {
  548. case V4L2_FIELD_TOP:
  549. cx88_risc_buffer(dev->pci, &buf->risc,
  550. dma->sglist, 0, UNSET,
  551. buf->bpl, 0, buf->vb.height);
  552. break;
  553. case V4L2_FIELD_BOTTOM:
  554. cx88_risc_buffer(dev->pci, &buf->risc,
  555. dma->sglist, UNSET, 0,
  556. buf->bpl, 0, buf->vb.height);
  557. break;
  558. case V4L2_FIELD_INTERLACED:
  559. cx88_risc_buffer(dev->pci, &buf->risc,
  560. dma->sglist, 0, buf->bpl,
  561. buf->bpl, buf->bpl,
  562. buf->vb.height >> 1);
  563. break;
  564. case V4L2_FIELD_SEQ_TB:
  565. cx88_risc_buffer(dev->pci, &buf->risc,
  566. dma->sglist,
  567. 0, buf->bpl * (buf->vb.height >> 1),
  568. buf->bpl, 0,
  569. buf->vb.height >> 1);
  570. break;
  571. case V4L2_FIELD_SEQ_BT:
  572. cx88_risc_buffer(dev->pci, &buf->risc,
  573. dma->sglist,
  574. buf->bpl * (buf->vb.height >> 1), 0,
  575. buf->bpl, 0,
  576. buf->vb.height >> 1);
  577. break;
  578. default:
  579. BUG();
  580. }
  581. }
  582. dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
  583. buf, buf->vb.i,
  584. fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
  585. (unsigned long)buf->risc.dma);
  586. buf->vb.state = VIDEOBUF_PREPARED;
  587. return 0;
  588. fail:
  589. cx88_free_buffer(q,buf);
  590. return rc;
  591. }
  592. static void
  593. buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
  594. {
  595. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  596. struct cx88_buffer *prev;
  597. struct cx8800_fh *fh = vq->priv_data;
  598. struct cx8800_dev *dev = fh->dev;
  599. struct cx88_core *core = dev->core;
  600. struct cx88_dmaqueue *q = &dev->vidq;
  601. /* add jump to stopper */
  602. buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
  603. buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
  604. if (!list_empty(&q->queued)) {
  605. list_add_tail(&buf->vb.queue,&q->queued);
  606. buf->vb.state = VIDEOBUF_QUEUED;
  607. dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
  608. buf, buf->vb.i);
  609. } else if (list_empty(&q->active)) {
  610. list_add_tail(&buf->vb.queue,&q->active);
  611. start_video_dma(dev, q, buf);
  612. buf->vb.state = VIDEOBUF_ACTIVE;
  613. buf->count = q->count++;
  614. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  615. dprintk(2,"[%p/%d] buffer_queue - first active\n",
  616. buf, buf->vb.i);
  617. } else {
  618. prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
  619. if (prev->vb.width == buf->vb.width &&
  620. prev->vb.height == buf->vb.height &&
  621. prev->fmt == buf->fmt) {
  622. list_add_tail(&buf->vb.queue,&q->active);
  623. buf->vb.state = VIDEOBUF_ACTIVE;
  624. buf->count = q->count++;
  625. prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
  626. dprintk(2,"[%p/%d] buffer_queue - append to active\n",
  627. buf, buf->vb.i);
  628. } else {
  629. list_add_tail(&buf->vb.queue,&q->queued);
  630. buf->vb.state = VIDEOBUF_QUEUED;
  631. dprintk(2,"[%p/%d] buffer_queue - first queued\n",
  632. buf, buf->vb.i);
  633. }
  634. }
  635. }
  636. static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
  637. {
  638. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  639. cx88_free_buffer(q,buf);
  640. }
  641. static struct videobuf_queue_ops cx8800_video_qops = {
  642. .buf_setup = buffer_setup,
  643. .buf_prepare = buffer_prepare,
  644. .buf_queue = buffer_queue,
  645. .buf_release = buffer_release,
  646. };
  647. /* ------------------------------------------------------------------ */
  648. /* ------------------------------------------------------------------ */
  649. static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
  650. {
  651. switch (fh->type) {
  652. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  653. return &fh->vidq;
  654. case V4L2_BUF_TYPE_VBI_CAPTURE:
  655. return &fh->vbiq;
  656. default:
  657. BUG();
  658. return NULL;
  659. }
  660. }
  661. static int get_ressource(struct cx8800_fh *fh)
  662. {
  663. switch (fh->type) {
  664. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  665. return RESOURCE_VIDEO;
  666. case V4L2_BUF_TYPE_VBI_CAPTURE:
  667. return RESOURCE_VBI;
  668. default:
  669. BUG();
  670. return 0;
  671. }
  672. }
  673. static int video_open(struct file *file)
  674. {
  675. struct video_device *vdev = video_devdata(file);
  676. struct cx8800_dev *dev = video_drvdata(file);
  677. struct cx88_core *core;
  678. struct cx8800_fh *fh;
  679. enum v4l2_buf_type type = 0;
  680. int radio = 0;
  681. switch (vdev->vfl_type) {
  682. case VFL_TYPE_GRABBER:
  683. type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  684. break;
  685. case VFL_TYPE_VBI:
  686. type = V4L2_BUF_TYPE_VBI_CAPTURE;
  687. break;
  688. case VFL_TYPE_RADIO:
  689. radio = 1;
  690. break;
  691. }
  692. lock_kernel();
  693. core = dev->core;
  694. dprintk(1, "open dev=%s radio=%d type=%s\n",
  695. video_device_node_name(vdev), radio, v4l2_type_names[type]);
  696. /* allocate + initialize per filehandle data */
  697. fh = kzalloc(sizeof(*fh),GFP_KERNEL);
  698. if (NULL == fh) {
  699. unlock_kernel();
  700. return -ENOMEM;
  701. }
  702. file->private_data = fh;
  703. fh->dev = dev;
  704. fh->radio = radio;
  705. fh->type = type;
  706. fh->width = 320;
  707. fh->height = 240;
  708. fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
  709. videobuf_queue_sg_init(&fh->vidq, &cx8800_video_qops,
  710. &dev->pci->dev, &dev->slock,
  711. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  712. V4L2_FIELD_INTERLACED,
  713. sizeof(struct cx88_buffer),
  714. fh);
  715. videobuf_queue_sg_init(&fh->vbiq, &cx8800_vbi_qops,
  716. &dev->pci->dev, &dev->slock,
  717. V4L2_BUF_TYPE_VBI_CAPTURE,
  718. V4L2_FIELD_SEQ_TB,
  719. sizeof(struct cx88_buffer),
  720. fh);
  721. if (fh->radio) {
  722. dprintk(1,"video_open: setting radio device\n");
  723. cx_write(MO_GP3_IO, core->board.radio.gpio3);
  724. cx_write(MO_GP0_IO, core->board.radio.gpio0);
  725. cx_write(MO_GP1_IO, core->board.radio.gpio1);
  726. cx_write(MO_GP2_IO, core->board.radio.gpio2);
  727. if (core->board.radio.audioroute) {
  728. if(core->board.audio_chip &&
  729. core->board.audio_chip == V4L2_IDENT_WM8775) {
  730. call_all(core, audio, s_routing,
  731. core->board.radio.audioroute, 0, 0);
  732. }
  733. /* "I2S ADC mode" */
  734. core->tvaudio = WW_I2SADC;
  735. cx88_set_tvaudio(core);
  736. } else {
  737. /* FM Mode */
  738. core->tvaudio = WW_FM;
  739. cx88_set_tvaudio(core);
  740. cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
  741. }
  742. call_all(core, tuner, s_radio);
  743. }
  744. unlock_kernel();
  745. atomic_inc(&core->users);
  746. return 0;
  747. }
  748. static ssize_t
  749. video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
  750. {
  751. struct cx8800_fh *fh = file->private_data;
  752. switch (fh->type) {
  753. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  754. if (res_locked(fh->dev,RESOURCE_VIDEO))
  755. return -EBUSY;
  756. return videobuf_read_one(&fh->vidq, data, count, ppos,
  757. file->f_flags & O_NONBLOCK);
  758. case V4L2_BUF_TYPE_VBI_CAPTURE:
  759. if (!res_get(fh->dev,fh,RESOURCE_VBI))
  760. return -EBUSY;
  761. return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
  762. file->f_flags & O_NONBLOCK);
  763. default:
  764. BUG();
  765. return 0;
  766. }
  767. }
  768. static unsigned int
  769. video_poll(struct file *file, struct poll_table_struct *wait)
  770. {
  771. struct cx8800_fh *fh = file->private_data;
  772. struct cx88_buffer *buf;
  773. unsigned int rc = POLLERR;
  774. if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
  775. if (!res_get(fh->dev,fh,RESOURCE_VBI))
  776. return POLLERR;
  777. return videobuf_poll_stream(file, &fh->vbiq, wait);
  778. }
  779. mutex_lock(&fh->vidq.vb_lock);
  780. if (res_check(fh,RESOURCE_VIDEO)) {
  781. /* streaming capture */
  782. if (list_empty(&fh->vidq.stream))
  783. goto done;
  784. buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
  785. } else {
  786. /* read() capture */
  787. buf = (struct cx88_buffer*)fh->vidq.read_buf;
  788. if (NULL == buf)
  789. goto done;
  790. }
  791. poll_wait(file, &buf->vb.done, wait);
  792. if (buf->vb.state == VIDEOBUF_DONE ||
  793. buf->vb.state == VIDEOBUF_ERROR)
  794. rc = POLLIN|POLLRDNORM;
  795. else
  796. rc = 0;
  797. done:
  798. mutex_unlock(&fh->vidq.vb_lock);
  799. return rc;
  800. }
  801. static int video_release(struct file *file)
  802. {
  803. struct cx8800_fh *fh = file->private_data;
  804. struct cx8800_dev *dev = fh->dev;
  805. /* turn off overlay */
  806. if (res_check(fh, RESOURCE_OVERLAY)) {
  807. /* FIXME */
  808. res_free(dev,fh,RESOURCE_OVERLAY);
  809. }
  810. /* stop video capture */
  811. if (res_check(fh, RESOURCE_VIDEO)) {
  812. videobuf_queue_cancel(&fh->vidq);
  813. res_free(dev,fh,RESOURCE_VIDEO);
  814. }
  815. if (fh->vidq.read_buf) {
  816. buffer_release(&fh->vidq,fh->vidq.read_buf);
  817. kfree(fh->vidq.read_buf);
  818. }
  819. /* stop vbi capture */
  820. if (res_check(fh, RESOURCE_VBI)) {
  821. videobuf_stop(&fh->vbiq);
  822. res_free(dev,fh,RESOURCE_VBI);
  823. }
  824. videobuf_mmap_free(&fh->vidq);
  825. videobuf_mmap_free(&fh->vbiq);
  826. file->private_data = NULL;
  827. kfree(fh);
  828. mutex_lock(&dev->core->lock);
  829. if(atomic_dec_and_test(&dev->core->users))
  830. call_all(dev->core, core, s_power, 0);
  831. mutex_unlock(&dev->core->lock);
  832. return 0;
  833. }
  834. static int
  835. video_mmap(struct file *file, struct vm_area_struct * vma)
  836. {
  837. struct cx8800_fh *fh = file->private_data;
  838. return videobuf_mmap_mapper(get_queue(fh), vma);
  839. }
  840. /* ------------------------------------------------------------------ */
  841. /* VIDEO CTRL IOCTLS */
  842. int cx88_get_control (struct cx88_core *core, struct v4l2_control *ctl)
  843. {
  844. struct cx88_ctrl *c = NULL;
  845. u32 value;
  846. int i;
  847. for (i = 0; i < CX8800_CTLS; i++)
  848. if (cx8800_ctls[i].v.id == ctl->id)
  849. c = &cx8800_ctls[i];
  850. if (unlikely(NULL == c))
  851. return -EINVAL;
  852. value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg);
  853. switch (ctl->id) {
  854. case V4L2_CID_AUDIO_BALANCE:
  855. ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40)
  856. : (0x7f - (value & 0x7f));
  857. break;
  858. case V4L2_CID_AUDIO_VOLUME:
  859. ctl->value = 0x3f - (value & 0x3f);
  860. break;
  861. default:
  862. ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift;
  863. break;
  864. }
  865. dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
  866. ctl->id, c->v.name, ctl->value, c->reg,
  867. value,c->mask, c->sreg ? " [shadowed]" : "");
  868. return 0;
  869. }
  870. EXPORT_SYMBOL(cx88_get_control);
  871. int cx88_set_control(struct cx88_core *core, struct v4l2_control *ctl)
  872. {
  873. struct cx88_ctrl *c = NULL;
  874. u32 value,mask;
  875. int i;
  876. for (i = 0; i < CX8800_CTLS; i++) {
  877. if (cx8800_ctls[i].v.id == ctl->id) {
  878. c = &cx8800_ctls[i];
  879. }
  880. }
  881. if (unlikely(NULL == c))
  882. return -EINVAL;
  883. if (ctl->value < c->v.minimum)
  884. ctl->value = c->v.minimum;
  885. if (ctl->value > c->v.maximum)
  886. ctl->value = c->v.maximum;
  887. mask=c->mask;
  888. switch (ctl->id) {
  889. case V4L2_CID_AUDIO_BALANCE:
  890. value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40);
  891. break;
  892. case V4L2_CID_AUDIO_VOLUME:
  893. value = 0x3f - (ctl->value & 0x3f);
  894. break;
  895. case V4L2_CID_SATURATION:
  896. /* special v_sat handling */
  897. value = ((ctl->value - c->off) << c->shift) & c->mask;
  898. if (core->tvnorm & V4L2_STD_SECAM) {
  899. /* For SECAM, both U and V sat should be equal */
  900. value=value<<8|value;
  901. } else {
  902. /* Keeps U Saturation proportional to V Sat */
  903. value=(value*0x5a)/0x7f<<8|value;
  904. }
  905. mask=0xffff;
  906. break;
  907. case V4L2_CID_CHROMA_AGC:
  908. /* Do not allow chroma AGC to be enabled for SECAM */
  909. value = ((ctl->value - c->off) << c->shift) & c->mask;
  910. if (core->tvnorm & V4L2_STD_SECAM && value)
  911. return -EINVAL;
  912. break;
  913. default:
  914. value = ((ctl->value - c->off) << c->shift) & c->mask;
  915. break;
  916. }
  917. dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
  918. ctl->id, c->v.name, ctl->value, c->reg, value,
  919. mask, c->sreg ? " [shadowed]" : "");
  920. if (c->sreg) {
  921. cx_sandor(c->sreg, c->reg, mask, value);
  922. } else {
  923. cx_andor(c->reg, mask, value);
  924. }
  925. return 0;
  926. }
  927. EXPORT_SYMBOL(cx88_set_control);
  928. static void init_controls(struct cx88_core *core)
  929. {
  930. struct v4l2_control ctrl;
  931. int i;
  932. for (i = 0; i < CX8800_CTLS; i++) {
  933. ctrl.id=cx8800_ctls[i].v.id;
  934. ctrl.value=cx8800_ctls[i].v.default_value;
  935. cx88_set_control(core, &ctrl);
  936. }
  937. }
  938. /* ------------------------------------------------------------------ */
  939. /* VIDEO IOCTLS */
  940. static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
  941. struct v4l2_format *f)
  942. {
  943. struct cx8800_fh *fh = priv;
  944. f->fmt.pix.width = fh->width;
  945. f->fmt.pix.height = fh->height;
  946. f->fmt.pix.field = fh->vidq.field;
  947. f->fmt.pix.pixelformat = fh->fmt->fourcc;
  948. f->fmt.pix.bytesperline =
  949. (f->fmt.pix.width * fh->fmt->depth) >> 3;
  950. f->fmt.pix.sizeimage =
  951. f->fmt.pix.height * f->fmt.pix.bytesperline;
  952. return 0;
  953. }
  954. static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
  955. struct v4l2_format *f)
  956. {
  957. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  958. struct cx8800_fmt *fmt;
  959. enum v4l2_field field;
  960. unsigned int maxw, maxh;
  961. fmt = format_by_fourcc(f->fmt.pix.pixelformat);
  962. if (NULL == fmt)
  963. return -EINVAL;
  964. field = f->fmt.pix.field;
  965. maxw = norm_maxw(core->tvnorm);
  966. maxh = norm_maxh(core->tvnorm);
  967. if (V4L2_FIELD_ANY == field) {
  968. field = (f->fmt.pix.height > maxh/2)
  969. ? V4L2_FIELD_INTERLACED
  970. : V4L2_FIELD_BOTTOM;
  971. }
  972. switch (field) {
  973. case V4L2_FIELD_TOP:
  974. case V4L2_FIELD_BOTTOM:
  975. maxh = maxh / 2;
  976. break;
  977. case V4L2_FIELD_INTERLACED:
  978. break;
  979. default:
  980. return -EINVAL;
  981. }
  982. f->fmt.pix.field = field;
  983. v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
  984. &f->fmt.pix.height, 32, maxh, 0, 0);
  985. f->fmt.pix.bytesperline =
  986. (f->fmt.pix.width * fmt->depth) >> 3;
  987. f->fmt.pix.sizeimage =
  988. f->fmt.pix.height * f->fmt.pix.bytesperline;
  989. return 0;
  990. }
  991. static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
  992. struct v4l2_format *f)
  993. {
  994. struct cx8800_fh *fh = priv;
  995. int err = vidioc_try_fmt_vid_cap (file,priv,f);
  996. if (0 != err)
  997. return err;
  998. fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
  999. fh->width = f->fmt.pix.width;
  1000. fh->height = f->fmt.pix.height;
  1001. fh->vidq.field = f->fmt.pix.field;
  1002. return 0;
  1003. }
  1004. static int vidioc_querycap (struct file *file, void *priv,
  1005. struct v4l2_capability *cap)
  1006. {
  1007. struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
  1008. struct cx88_core *core = dev->core;
  1009. strcpy(cap->driver, "cx8800");
  1010. strlcpy(cap->card, core->board.name, sizeof(cap->card));
  1011. sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
  1012. cap->version = CX88_VERSION_CODE;
  1013. cap->capabilities =
  1014. V4L2_CAP_VIDEO_CAPTURE |
  1015. V4L2_CAP_READWRITE |
  1016. V4L2_CAP_STREAMING |
  1017. V4L2_CAP_VBI_CAPTURE;
  1018. if (UNSET != core->board.tuner_type)
  1019. cap->capabilities |= V4L2_CAP_TUNER;
  1020. return 0;
  1021. }
  1022. static int vidioc_enum_fmt_vid_cap (struct file *file, void *priv,
  1023. struct v4l2_fmtdesc *f)
  1024. {
  1025. if (unlikely(f->index >= ARRAY_SIZE(formats)))
  1026. return -EINVAL;
  1027. strlcpy(f->description,formats[f->index].name,sizeof(f->description));
  1028. f->pixelformat = formats[f->index].fourcc;
  1029. return 0;
  1030. }
  1031. #ifdef CONFIG_VIDEO_V4L1_COMPAT
  1032. static int vidiocgmbuf (struct file *file, void *priv, struct video_mbuf *mbuf)
  1033. {
  1034. struct cx8800_fh *fh = priv;
  1035. return videobuf_cgmbuf (get_queue(fh), mbuf, 8);
  1036. }
  1037. #endif
  1038. static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p)
  1039. {
  1040. struct cx8800_fh *fh = priv;
  1041. return (videobuf_reqbufs(get_queue(fh), p));
  1042. }
  1043. static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1044. {
  1045. struct cx8800_fh *fh = priv;
  1046. return (videobuf_querybuf(get_queue(fh), p));
  1047. }
  1048. static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1049. {
  1050. struct cx8800_fh *fh = priv;
  1051. return (videobuf_qbuf(get_queue(fh), p));
  1052. }
  1053. static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1054. {
  1055. struct cx8800_fh *fh = priv;
  1056. return (videobuf_dqbuf(get_queue(fh), p,
  1057. file->f_flags & O_NONBLOCK));
  1058. }
  1059. static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
  1060. {
  1061. struct cx8800_fh *fh = priv;
  1062. struct cx8800_dev *dev = fh->dev;
  1063. /* We should remember that this driver also supports teletext, */
  1064. /* so we have to test if the v4l2_buf_type is VBI capture data. */
  1065. if (unlikely((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
  1066. (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE)))
  1067. return -EINVAL;
  1068. if (unlikely(i != fh->type))
  1069. return -EINVAL;
  1070. if (unlikely(!res_get(dev,fh,get_ressource(fh))))
  1071. return -EBUSY;
  1072. return videobuf_streamon(get_queue(fh));
  1073. }
  1074. static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
  1075. {
  1076. struct cx8800_fh *fh = priv;
  1077. struct cx8800_dev *dev = fh->dev;
  1078. int err, res;
  1079. if ((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
  1080. (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE))
  1081. return -EINVAL;
  1082. if (i != fh->type)
  1083. return -EINVAL;
  1084. res = get_ressource(fh);
  1085. err = videobuf_streamoff(get_queue(fh));
  1086. if (err < 0)
  1087. return err;
  1088. res_free(dev,fh,res);
  1089. return 0;
  1090. }
  1091. static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *tvnorms)
  1092. {
  1093. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1094. mutex_lock(&core->lock);
  1095. cx88_set_tvnorm(core,*tvnorms);
  1096. mutex_unlock(&core->lock);
  1097. return 0;
  1098. }
  1099. /* only one input in this sample driver */
  1100. int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i)
  1101. {
  1102. static const char *iname[] = {
  1103. [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
  1104. [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
  1105. [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
  1106. [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
  1107. [ CX88_VMUX_SVIDEO ] = "S-Video",
  1108. [ CX88_VMUX_TELEVISION ] = "Television",
  1109. [ CX88_VMUX_CABLE ] = "Cable TV",
  1110. [ CX88_VMUX_DVB ] = "DVB",
  1111. [ CX88_VMUX_DEBUG ] = "for debug only",
  1112. };
  1113. unsigned int n = i->index;
  1114. if (n >= 4)
  1115. return -EINVAL;
  1116. if (0 == INPUT(n).type)
  1117. return -EINVAL;
  1118. i->type = V4L2_INPUT_TYPE_CAMERA;
  1119. strcpy(i->name,iname[INPUT(n).type]);
  1120. if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
  1121. (CX88_VMUX_CABLE == INPUT(n).type))
  1122. i->type = V4L2_INPUT_TYPE_TUNER;
  1123. i->std = CX88_NORMS;
  1124. return 0;
  1125. }
  1126. EXPORT_SYMBOL(cx88_enum_input);
  1127. static int vidioc_enum_input (struct file *file, void *priv,
  1128. struct v4l2_input *i)
  1129. {
  1130. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1131. return cx88_enum_input (core,i);
  1132. }
  1133. static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
  1134. {
  1135. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1136. *i = core->input;
  1137. return 0;
  1138. }
  1139. static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
  1140. {
  1141. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1142. if (i >= 4)
  1143. return -EINVAL;
  1144. mutex_lock(&core->lock);
  1145. cx88_newstation(core);
  1146. cx88_video_mux(core,i);
  1147. mutex_unlock(&core->lock);
  1148. return 0;
  1149. }
  1150. static int vidioc_queryctrl (struct file *file, void *priv,
  1151. struct v4l2_queryctrl *qctrl)
  1152. {
  1153. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1154. qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id);
  1155. if (unlikely(qctrl->id == 0))
  1156. return -EINVAL;
  1157. return cx8800_ctrl_query(core, qctrl);
  1158. }
  1159. static int vidioc_g_ctrl (struct file *file, void *priv,
  1160. struct v4l2_control *ctl)
  1161. {
  1162. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1163. return
  1164. cx88_get_control(core,ctl);
  1165. }
  1166. static int vidioc_s_ctrl (struct file *file, void *priv,
  1167. struct v4l2_control *ctl)
  1168. {
  1169. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1170. return
  1171. cx88_set_control(core,ctl);
  1172. }
  1173. static int vidioc_g_tuner (struct file *file, void *priv,
  1174. struct v4l2_tuner *t)
  1175. {
  1176. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1177. u32 reg;
  1178. if (unlikely(UNSET == core->board.tuner_type))
  1179. return -EINVAL;
  1180. if (0 != t->index)
  1181. return -EINVAL;
  1182. strcpy(t->name, "Television");
  1183. t->type = V4L2_TUNER_ANALOG_TV;
  1184. t->capability = V4L2_TUNER_CAP_NORM;
  1185. t->rangehigh = 0xffffffffUL;
  1186. cx88_get_stereo(core ,t);
  1187. reg = cx_read(MO_DEVICE_STATUS);
  1188. t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
  1189. return 0;
  1190. }
  1191. static int vidioc_s_tuner (struct file *file, void *priv,
  1192. struct v4l2_tuner *t)
  1193. {
  1194. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1195. if (UNSET == core->board.tuner_type)
  1196. return -EINVAL;
  1197. if (0 != t->index)
  1198. return -EINVAL;
  1199. cx88_set_stereo(core, t->audmode, 1);
  1200. return 0;
  1201. }
  1202. static int vidioc_g_frequency (struct file *file, void *priv,
  1203. struct v4l2_frequency *f)
  1204. {
  1205. struct cx8800_fh *fh = priv;
  1206. struct cx88_core *core = fh->dev->core;
  1207. if (unlikely(UNSET == core->board.tuner_type))
  1208. return -EINVAL;
  1209. /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
  1210. f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
  1211. f->frequency = core->freq;
  1212. call_all(core, tuner, g_frequency, f);
  1213. return 0;
  1214. }
  1215. int cx88_set_freq (struct cx88_core *core,
  1216. struct v4l2_frequency *f)
  1217. {
  1218. if (unlikely(UNSET == core->board.tuner_type))
  1219. return -EINVAL;
  1220. if (unlikely(f->tuner != 0))
  1221. return -EINVAL;
  1222. mutex_lock(&core->lock);
  1223. core->freq = f->frequency;
  1224. cx88_newstation(core);
  1225. call_all(core, tuner, s_frequency, f);
  1226. /* When changing channels it is required to reset TVAUDIO */
  1227. msleep (10);
  1228. cx88_set_tvaudio(core);
  1229. mutex_unlock(&core->lock);
  1230. return 0;
  1231. }
  1232. EXPORT_SYMBOL(cx88_set_freq);
  1233. static int vidioc_s_frequency (struct file *file, void *priv,
  1234. struct v4l2_frequency *f)
  1235. {
  1236. struct cx8800_fh *fh = priv;
  1237. struct cx88_core *core = fh->dev->core;
  1238. if (unlikely(0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV))
  1239. return -EINVAL;
  1240. if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO))
  1241. return -EINVAL;
  1242. return
  1243. cx88_set_freq (core,f);
  1244. }
  1245. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1246. static int vidioc_g_register (struct file *file, void *fh,
  1247. struct v4l2_dbg_register *reg)
  1248. {
  1249. struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
  1250. if (!v4l2_chip_match_host(&reg->match))
  1251. return -EINVAL;
  1252. /* cx2388x has a 24-bit register space */
  1253. reg->val = cx_read(reg->reg & 0xffffff);
  1254. reg->size = 4;
  1255. return 0;
  1256. }
  1257. static int vidioc_s_register (struct file *file, void *fh,
  1258. struct v4l2_dbg_register *reg)
  1259. {
  1260. struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
  1261. if (!v4l2_chip_match_host(&reg->match))
  1262. return -EINVAL;
  1263. cx_write(reg->reg & 0xffffff, reg->val);
  1264. return 0;
  1265. }
  1266. #endif
  1267. /* ----------------------------------------------------------- */
  1268. /* RADIO ESPECIFIC IOCTLS */
  1269. /* ----------------------------------------------------------- */
  1270. static int radio_querycap (struct file *file, void *priv,
  1271. struct v4l2_capability *cap)
  1272. {
  1273. struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
  1274. struct cx88_core *core = dev->core;
  1275. strcpy(cap->driver, "cx8800");
  1276. strlcpy(cap->card, core->board.name, sizeof(cap->card));
  1277. sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
  1278. cap->version = CX88_VERSION_CODE;
  1279. cap->capabilities = V4L2_CAP_TUNER;
  1280. return 0;
  1281. }
  1282. static int radio_g_tuner (struct file *file, void *priv,
  1283. struct v4l2_tuner *t)
  1284. {
  1285. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1286. if (unlikely(t->index > 0))
  1287. return -EINVAL;
  1288. strcpy(t->name, "Radio");
  1289. t->type = V4L2_TUNER_RADIO;
  1290. call_all(core, tuner, g_tuner, t);
  1291. return 0;
  1292. }
  1293. static int radio_enum_input (struct file *file, void *priv,
  1294. struct v4l2_input *i)
  1295. {
  1296. if (i->index != 0)
  1297. return -EINVAL;
  1298. strcpy(i->name,"Radio");
  1299. i->type = V4L2_INPUT_TYPE_TUNER;
  1300. return 0;
  1301. }
  1302. static int radio_g_audio (struct file *file, void *priv, struct v4l2_audio *a)
  1303. {
  1304. if (unlikely(a->index))
  1305. return -EINVAL;
  1306. strcpy(a->name,"Radio");
  1307. return 0;
  1308. }
  1309. /* FIXME: Should add a standard for radio */
  1310. static int radio_s_tuner (struct file *file, void *priv,
  1311. struct v4l2_tuner *t)
  1312. {
  1313. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1314. if (0 != t->index)
  1315. return -EINVAL;
  1316. call_all(core, tuner, s_tuner, t);
  1317. return 0;
  1318. }
  1319. static int radio_s_audio (struct file *file, void *fh,
  1320. struct v4l2_audio *a)
  1321. {
  1322. return 0;
  1323. }
  1324. static int radio_s_input (struct file *file, void *fh, unsigned int i)
  1325. {
  1326. return 0;
  1327. }
  1328. static int radio_queryctrl (struct file *file, void *priv,
  1329. struct v4l2_queryctrl *c)
  1330. {
  1331. int i;
  1332. if (c->id < V4L2_CID_BASE ||
  1333. c->id >= V4L2_CID_LASTP1)
  1334. return -EINVAL;
  1335. if (c->id == V4L2_CID_AUDIO_MUTE) {
  1336. for (i = 0; i < CX8800_CTLS; i++) {
  1337. if (cx8800_ctls[i].v.id == c->id)
  1338. break;
  1339. }
  1340. if (i == CX8800_CTLS)
  1341. return -EINVAL;
  1342. *c = cx8800_ctls[i].v;
  1343. } else
  1344. *c = no_ctl;
  1345. return 0;
  1346. }
  1347. /* ----------------------------------------------------------- */
  1348. static void cx8800_vid_timeout(unsigned long data)
  1349. {
  1350. struct cx8800_dev *dev = (struct cx8800_dev*)data;
  1351. struct cx88_core *core = dev->core;
  1352. struct cx88_dmaqueue *q = &dev->vidq;
  1353. struct cx88_buffer *buf;
  1354. unsigned long flags;
  1355. cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
  1356. cx_clear(MO_VID_DMACNTRL, 0x11);
  1357. cx_clear(VID_CAPTURE_CONTROL, 0x06);
  1358. spin_lock_irqsave(&dev->slock,flags);
  1359. while (!list_empty(&q->active)) {
  1360. buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
  1361. list_del(&buf->vb.queue);
  1362. buf->vb.state = VIDEOBUF_ERROR;
  1363. wake_up(&buf->vb.done);
  1364. printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
  1365. buf, buf->vb.i, (unsigned long)buf->risc.dma);
  1366. }
  1367. restart_video_queue(dev,q);
  1368. spin_unlock_irqrestore(&dev->slock,flags);
  1369. }
  1370. static char *cx88_vid_irqs[32] = {
  1371. "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
  1372. "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
  1373. "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
  1374. "y_sync", "u_sync", "v_sync", "vbi_sync",
  1375. "opc_err", "par_err", "rip_err", "pci_abort",
  1376. };
  1377. static void cx8800_vid_irq(struct cx8800_dev *dev)
  1378. {
  1379. struct cx88_core *core = dev->core;
  1380. u32 status, mask, count;
  1381. status = cx_read(MO_VID_INTSTAT);
  1382. mask = cx_read(MO_VID_INTMSK);
  1383. if (0 == (status & mask))
  1384. return;
  1385. cx_write(MO_VID_INTSTAT, status);
  1386. if (irq_debug || (status & mask & ~0xff))
  1387. cx88_print_irqbits(core->name, "irq vid",
  1388. cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
  1389. status, mask);
  1390. /* risc op code error */
  1391. if (status & (1 << 16)) {
  1392. printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
  1393. cx_clear(MO_VID_DMACNTRL, 0x11);
  1394. cx_clear(VID_CAPTURE_CONTROL, 0x06);
  1395. cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
  1396. }
  1397. /* risc1 y */
  1398. if (status & 0x01) {
  1399. spin_lock(&dev->slock);
  1400. count = cx_read(MO_VIDY_GPCNT);
  1401. cx88_wakeup(core, &dev->vidq, count);
  1402. spin_unlock(&dev->slock);
  1403. }
  1404. /* risc1 vbi */
  1405. if (status & 0x08) {
  1406. spin_lock(&dev->slock);
  1407. count = cx_read(MO_VBI_GPCNT);
  1408. cx88_wakeup(core, &dev->vbiq, count);
  1409. spin_unlock(&dev->slock);
  1410. }
  1411. /* risc2 y */
  1412. if (status & 0x10) {
  1413. dprintk(2,"stopper video\n");
  1414. spin_lock(&dev->slock);
  1415. restart_video_queue(dev,&dev->vidq);
  1416. spin_unlock(&dev->slock);
  1417. }
  1418. /* risc2 vbi */
  1419. if (status & 0x80) {
  1420. dprintk(2,"stopper vbi\n");
  1421. spin_lock(&dev->slock);
  1422. cx8800_restart_vbi_queue(dev,&dev->vbiq);
  1423. spin_unlock(&dev->slock);
  1424. }
  1425. }
  1426. static irqreturn_t cx8800_irq(int irq, void *dev_id)
  1427. {
  1428. struct cx8800_dev *dev = dev_id;
  1429. struct cx88_core *core = dev->core;
  1430. u32 status;
  1431. int loop, handled = 0;
  1432. for (loop = 0; loop < 10; loop++) {
  1433. status = cx_read(MO_PCI_INTSTAT) &
  1434. (core->pci_irqmask | PCI_INT_VIDINT);
  1435. if (0 == status)
  1436. goto out;
  1437. cx_write(MO_PCI_INTSTAT, status);
  1438. handled = 1;
  1439. if (status & core->pci_irqmask)
  1440. cx88_core_irq(core,status);
  1441. if (status & PCI_INT_VIDINT)
  1442. cx8800_vid_irq(dev);
  1443. };
  1444. if (10 == loop) {
  1445. printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
  1446. core->name);
  1447. cx_write(MO_PCI_INTMSK,0);
  1448. }
  1449. out:
  1450. return IRQ_RETVAL(handled);
  1451. }
  1452. /* ----------------------------------------------------------- */
  1453. /* exported stuff */
  1454. static const struct v4l2_file_operations video_fops =
  1455. {
  1456. .owner = THIS_MODULE,
  1457. .open = video_open,
  1458. .release = video_release,
  1459. .read = video_read,
  1460. .poll = video_poll,
  1461. .mmap = video_mmap,
  1462. .ioctl = video_ioctl2,
  1463. };
  1464. static const struct v4l2_ioctl_ops video_ioctl_ops = {
  1465. .vidioc_querycap = vidioc_querycap,
  1466. .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
  1467. .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
  1468. .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
  1469. .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
  1470. .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt,
  1471. .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt,
  1472. .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt,
  1473. .vidioc_reqbufs = vidioc_reqbufs,
  1474. .vidioc_querybuf = vidioc_querybuf,
  1475. .vidioc_qbuf = vidioc_qbuf,
  1476. .vidioc_dqbuf = vidioc_dqbuf,
  1477. .vidioc_s_std = vidioc_s_std,
  1478. .vidioc_enum_input = vidioc_enum_input,
  1479. .vidioc_g_input = vidioc_g_input,
  1480. .vidioc_s_input = vidioc_s_input,
  1481. .vidioc_queryctrl = vidioc_queryctrl,
  1482. .vidioc_g_ctrl = vidioc_g_ctrl,
  1483. .vidioc_s_ctrl = vidioc_s_ctrl,
  1484. .vidioc_streamon = vidioc_streamon,
  1485. .vidioc_streamoff = vidioc_streamoff,
  1486. #ifdef CONFIG_VIDEO_V4L1_COMPAT
  1487. .vidiocgmbuf = vidiocgmbuf,
  1488. #endif
  1489. .vidioc_g_tuner = vidioc_g_tuner,
  1490. .vidioc_s_tuner = vidioc_s_tuner,
  1491. .vidioc_g_frequency = vidioc_g_frequency,
  1492. .vidioc_s_frequency = vidioc_s_frequency,
  1493. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1494. .vidioc_g_register = vidioc_g_register,
  1495. .vidioc_s_register = vidioc_s_register,
  1496. #endif
  1497. };
  1498. static struct video_device cx8800_vbi_template;
  1499. static struct video_device cx8800_video_template = {
  1500. .name = "cx8800-video",
  1501. .fops = &video_fops,
  1502. .ioctl_ops = &video_ioctl_ops,
  1503. .tvnorms = CX88_NORMS,
  1504. .current_norm = V4L2_STD_NTSC_M,
  1505. };
  1506. static const struct v4l2_file_operations radio_fops =
  1507. {
  1508. .owner = THIS_MODULE,
  1509. .open = video_open,
  1510. .release = video_release,
  1511. .ioctl = video_ioctl2,
  1512. };
  1513. static const struct v4l2_ioctl_ops radio_ioctl_ops = {
  1514. .vidioc_querycap = radio_querycap,
  1515. .vidioc_g_tuner = radio_g_tuner,
  1516. .vidioc_enum_input = radio_enum_input,
  1517. .vidioc_g_audio = radio_g_audio,
  1518. .vidioc_s_tuner = radio_s_tuner,
  1519. .vidioc_s_audio = radio_s_audio,
  1520. .vidioc_s_input = radio_s_input,
  1521. .vidioc_queryctrl = radio_queryctrl,
  1522. .vidioc_g_ctrl = vidioc_g_ctrl,
  1523. .vidioc_s_ctrl = vidioc_s_ctrl,
  1524. .vidioc_g_frequency = vidioc_g_frequency,
  1525. .vidioc_s_frequency = vidioc_s_frequency,
  1526. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1527. .vidioc_g_register = vidioc_g_register,
  1528. .vidioc_s_register = vidioc_s_register,
  1529. #endif
  1530. };
  1531. static struct video_device cx8800_radio_template = {
  1532. .name = "cx8800-radio",
  1533. .fops = &radio_fops,
  1534. .ioctl_ops = &radio_ioctl_ops,
  1535. };
  1536. /* ----------------------------------------------------------- */
  1537. static void cx8800_unregister_video(struct cx8800_dev *dev)
  1538. {
  1539. if (dev->radio_dev) {
  1540. if (video_is_registered(dev->radio_dev))
  1541. video_unregister_device(dev->radio_dev);
  1542. else
  1543. video_device_release(dev->radio_dev);
  1544. dev->radio_dev = NULL;
  1545. }
  1546. if (dev->vbi_dev) {
  1547. if (video_is_registered(dev->vbi_dev))
  1548. video_unregister_device(dev->vbi_dev);
  1549. else
  1550. video_device_release(dev->vbi_dev);
  1551. dev->vbi_dev = NULL;
  1552. }
  1553. if (dev->video_dev) {
  1554. if (video_is_registered(dev->video_dev))
  1555. video_unregister_device(dev->video_dev);
  1556. else
  1557. video_device_release(dev->video_dev);
  1558. dev->video_dev = NULL;
  1559. }
  1560. }
  1561. static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
  1562. const struct pci_device_id *pci_id)
  1563. {
  1564. struct cx8800_dev *dev;
  1565. struct cx88_core *core;
  1566. int err;
  1567. dev = kzalloc(sizeof(*dev),GFP_KERNEL);
  1568. if (NULL == dev)
  1569. return -ENOMEM;
  1570. /* pci init */
  1571. dev->pci = pci_dev;
  1572. if (pci_enable_device(pci_dev)) {
  1573. err = -EIO;
  1574. goto fail_free;
  1575. }
  1576. core = cx88_core_get(dev->pci);
  1577. if (NULL == core) {
  1578. err = -EINVAL;
  1579. goto fail_free;
  1580. }
  1581. dev->core = core;
  1582. /* print pci info */
  1583. pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
  1584. pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
  1585. printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
  1586. "latency: %d, mmio: 0x%llx\n", core->name,
  1587. pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
  1588. dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
  1589. pci_set_master(pci_dev);
  1590. if (!pci_dma_supported(pci_dev,DMA_BIT_MASK(32))) {
  1591. printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
  1592. err = -EIO;
  1593. goto fail_core;
  1594. }
  1595. /* Initialize VBI template */
  1596. memcpy( &cx8800_vbi_template, &cx8800_video_template,
  1597. sizeof(cx8800_vbi_template) );
  1598. strcpy(cx8800_vbi_template.name,"cx8800-vbi");
  1599. /* initialize driver struct */
  1600. spin_lock_init(&dev->slock);
  1601. core->tvnorm = cx8800_video_template.current_norm;
  1602. /* init video dma queues */
  1603. INIT_LIST_HEAD(&dev->vidq.active);
  1604. INIT_LIST_HEAD(&dev->vidq.queued);
  1605. dev->vidq.timeout.function = cx8800_vid_timeout;
  1606. dev->vidq.timeout.data = (unsigned long)dev;
  1607. init_timer(&dev->vidq.timeout);
  1608. cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
  1609. MO_VID_DMACNTRL,0x11,0x00);
  1610. /* init vbi dma queues */
  1611. INIT_LIST_HEAD(&dev->vbiq.active);
  1612. INIT_LIST_HEAD(&dev->vbiq.queued);
  1613. dev->vbiq.timeout.function = cx8800_vbi_timeout;
  1614. dev->vbiq.timeout.data = (unsigned long)dev;
  1615. init_timer(&dev->vbiq.timeout);
  1616. cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
  1617. MO_VID_DMACNTRL,0x88,0x00);
  1618. /* get irq */
  1619. err = request_irq(pci_dev->irq, cx8800_irq,
  1620. IRQF_SHARED | IRQF_DISABLED, core->name, dev);
  1621. if (err < 0) {
  1622. printk(KERN_ERR "%s/0: can't get IRQ %d\n",
  1623. core->name,pci_dev->irq);
  1624. goto fail_core;
  1625. }
  1626. cx_set(MO_PCI_INTMSK, core->pci_irqmask);
  1627. /* load and configure helper modules */
  1628. if (core->board.audio_chip == V4L2_IDENT_WM8775)
  1629. v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
  1630. "wm8775", "wm8775", 0x36 >> 1, NULL);
  1631. if (core->board.audio_chip == V4L2_IDENT_TVAUDIO) {
  1632. /* This probes for a tda9874 as is used on some
  1633. Pixelview Ultra boards. */
  1634. v4l2_i2c_new_subdev(&core->v4l2_dev,
  1635. &core->i2c_adap,
  1636. "tvaudio", "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
  1637. }
  1638. switch (core->boardnr) {
  1639. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  1640. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
  1641. static struct i2c_board_info rtc_info = {
  1642. I2C_BOARD_INFO("isl1208", 0x6f)
  1643. };
  1644. request_module("rtc-isl1208");
  1645. core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
  1646. }
  1647. /* break intentionally omitted */
  1648. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  1649. request_module("ir-kbd-i2c");
  1650. }
  1651. /* register v4l devices */
  1652. dev->video_dev = cx88_vdev_init(core,dev->pci,
  1653. &cx8800_video_template,"video");
  1654. video_set_drvdata(dev->video_dev, dev);
  1655. err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
  1656. video_nr[core->nr]);
  1657. if (err < 0) {
  1658. printk(KERN_ERR "%s/0: can't register video device\n",
  1659. core->name);
  1660. goto fail_unreg;
  1661. }
  1662. printk(KERN_INFO "%s/0: registered device %s [v4l2]\n",
  1663. core->name, video_device_node_name(dev->video_dev));
  1664. dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
  1665. video_set_drvdata(dev->vbi_dev, dev);
  1666. err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
  1667. vbi_nr[core->nr]);
  1668. if (err < 0) {
  1669. printk(KERN_ERR "%s/0: can't register vbi device\n",
  1670. core->name);
  1671. goto fail_unreg;
  1672. }
  1673. printk(KERN_INFO "%s/0: registered device %s\n",
  1674. core->name, video_device_node_name(dev->vbi_dev));
  1675. if (core->board.radio.type == CX88_RADIO) {
  1676. dev->radio_dev = cx88_vdev_init(core,dev->pci,
  1677. &cx8800_radio_template,"radio");
  1678. video_set_drvdata(dev->radio_dev, dev);
  1679. err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
  1680. radio_nr[core->nr]);
  1681. if (err < 0) {
  1682. printk(KERN_ERR "%s/0: can't register radio device\n",
  1683. core->name);
  1684. goto fail_unreg;
  1685. }
  1686. printk(KERN_INFO "%s/0: registered device %s\n",
  1687. core->name, video_device_node_name(dev->radio_dev));
  1688. }
  1689. /* everything worked */
  1690. pci_set_drvdata(pci_dev,dev);
  1691. /* initial device configuration */
  1692. mutex_lock(&core->lock);
  1693. cx88_set_tvnorm(core,core->tvnorm);
  1694. init_controls(core);
  1695. cx88_video_mux(core,0);
  1696. mutex_unlock(&core->lock);
  1697. /* start tvaudio thread */
  1698. if (core->board.tuner_type != TUNER_ABSENT) {
  1699. core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
  1700. if (IS_ERR(core->kthread)) {
  1701. err = PTR_ERR(core->kthread);
  1702. printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
  1703. core->name, err);
  1704. }
  1705. }
  1706. return 0;
  1707. fail_unreg:
  1708. cx8800_unregister_video(dev);
  1709. free_irq(pci_dev->irq, dev);
  1710. fail_core:
  1711. cx88_core_put(core,dev->pci);
  1712. fail_free:
  1713. kfree(dev);
  1714. return err;
  1715. }
  1716. static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
  1717. {
  1718. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1719. struct cx88_core *core = dev->core;
  1720. /* stop thread */
  1721. if (core->kthread) {
  1722. kthread_stop(core->kthread);
  1723. core->kthread = NULL;
  1724. }
  1725. if (core->ir)
  1726. cx88_ir_stop(core);
  1727. cx88_shutdown(core); /* FIXME */
  1728. pci_disable_device(pci_dev);
  1729. /* unregister stuff */
  1730. free_irq(pci_dev->irq, dev);
  1731. cx8800_unregister_video(dev);
  1732. pci_set_drvdata(pci_dev, NULL);
  1733. /* free memory */
  1734. btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
  1735. cx88_core_put(core,dev->pci);
  1736. kfree(dev);
  1737. }
  1738. #ifdef CONFIG_PM
  1739. static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
  1740. {
  1741. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1742. struct cx88_core *core = dev->core;
  1743. /* stop video+vbi capture */
  1744. spin_lock(&dev->slock);
  1745. if (!list_empty(&dev->vidq.active)) {
  1746. printk("%s/0: suspend video\n", core->name);
  1747. stop_video_dma(dev);
  1748. del_timer(&dev->vidq.timeout);
  1749. }
  1750. if (!list_empty(&dev->vbiq.active)) {
  1751. printk("%s/0: suspend vbi\n", core->name);
  1752. cx8800_stop_vbi_dma(dev);
  1753. del_timer(&dev->vbiq.timeout);
  1754. }
  1755. spin_unlock(&dev->slock);
  1756. if (core->ir)
  1757. cx88_ir_stop(core);
  1758. /* FIXME -- shutdown device */
  1759. cx88_shutdown(core);
  1760. pci_save_state(pci_dev);
  1761. if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
  1762. pci_disable_device(pci_dev);
  1763. dev->state.disabled = 1;
  1764. }
  1765. return 0;
  1766. }
  1767. static int cx8800_resume(struct pci_dev *pci_dev)
  1768. {
  1769. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1770. struct cx88_core *core = dev->core;
  1771. int err;
  1772. if (dev->state.disabled) {
  1773. err=pci_enable_device(pci_dev);
  1774. if (err) {
  1775. printk(KERN_ERR "%s/0: can't enable device\n",
  1776. core->name);
  1777. return err;
  1778. }
  1779. dev->state.disabled = 0;
  1780. }
  1781. err= pci_set_power_state(pci_dev, PCI_D0);
  1782. if (err) {
  1783. printk(KERN_ERR "%s/0: can't set power state\n", core->name);
  1784. pci_disable_device(pci_dev);
  1785. dev->state.disabled = 1;
  1786. return err;
  1787. }
  1788. pci_restore_state(pci_dev);
  1789. /* FIXME: re-initialize hardware */
  1790. cx88_reset(core);
  1791. if (core->ir)
  1792. cx88_ir_start(core);
  1793. cx_set(MO_PCI_INTMSK, core->pci_irqmask);
  1794. /* restart video+vbi capture */
  1795. spin_lock(&dev->slock);
  1796. if (!list_empty(&dev->vidq.active)) {
  1797. printk("%s/0: resume video\n", core->name);
  1798. restart_video_queue(dev,&dev->vidq);
  1799. }
  1800. if (!list_empty(&dev->vbiq.active)) {
  1801. printk("%s/0: resume vbi\n", core->name);
  1802. cx8800_restart_vbi_queue(dev,&dev->vbiq);
  1803. }
  1804. spin_unlock(&dev->slock);
  1805. return 0;
  1806. }
  1807. #endif
  1808. /* ----------------------------------------------------------- */
  1809. static struct pci_device_id cx8800_pci_tbl[] = {
  1810. {
  1811. .vendor = 0x14f1,
  1812. .device = 0x8800,
  1813. .subvendor = PCI_ANY_ID,
  1814. .subdevice = PCI_ANY_ID,
  1815. },{
  1816. /* --- end of list --- */
  1817. }
  1818. };
  1819. MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
  1820. static struct pci_driver cx8800_pci_driver = {
  1821. .name = "cx8800",
  1822. .id_table = cx8800_pci_tbl,
  1823. .probe = cx8800_initdev,
  1824. .remove = __devexit_p(cx8800_finidev),
  1825. #ifdef CONFIG_PM
  1826. .suspend = cx8800_suspend,
  1827. .resume = cx8800_resume,
  1828. #endif
  1829. };
  1830. static int __init cx8800_init(void)
  1831. {
  1832. printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %d.%d.%d loaded\n",
  1833. (CX88_VERSION_CODE >> 16) & 0xff,
  1834. (CX88_VERSION_CODE >> 8) & 0xff,
  1835. CX88_VERSION_CODE & 0xff);
  1836. #ifdef SNAPSHOT
  1837. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  1838. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  1839. #endif
  1840. return pci_register_driver(&cx8800_pci_driver);
  1841. }
  1842. static void __exit cx8800_fini(void)
  1843. {
  1844. pci_unregister_driver(&cx8800_pci_driver);
  1845. }
  1846. module_init(cx8800_init);
  1847. module_exit(cx8800_fini);
  1848. /* ----------------------------------------------------------- */
  1849. /*
  1850. * Local variables:
  1851. * c-basic-offset: 8
  1852. * End:
  1853. * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
  1854. */