core.h 9.9 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #ifndef _CORE_H_
  18. #define _CORE_H_
  19. #include <linux/completion.h>
  20. #include <linux/if_ether.h>
  21. #include <linux/types.h>
  22. #include <linux/pci.h>
  23. #include "htt.h"
  24. #include "htc.h"
  25. #include "hw.h"
  26. #include "targaddrs.h"
  27. #include "wmi.h"
  28. #include "../ath.h"
  29. #include "../regd.h"
  30. #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
  31. #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
  32. #define WO(_f) ((_f##_OFFSET) >> 2)
  33. #define ATH10K_SCAN_ID 0
  34. #define WMI_READY_TIMEOUT (5 * HZ)
  35. #define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ)
  36. #define ATH10K_NUM_CHANS 38
  37. /* Antenna noise floor */
  38. #define ATH10K_DEFAULT_NOISE_FLOOR -95
  39. #define ATH10K_MAX_NUM_MGMT_PENDING 16
  40. struct ath10k;
  41. struct ath10k_skb_cb {
  42. dma_addr_t paddr;
  43. bool is_mapped;
  44. bool is_aborted;
  45. u8 vdev_id;
  46. struct {
  47. u8 tid;
  48. bool is_offchan;
  49. u8 frag_len;
  50. u8 pad_len;
  51. } __packed htt;
  52. } __packed;
  53. static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
  54. {
  55. BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
  56. IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
  57. return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
  58. }
  59. static inline int ath10k_skb_map(struct device *dev, struct sk_buff *skb)
  60. {
  61. if (ATH10K_SKB_CB(skb)->is_mapped)
  62. return -EINVAL;
  63. ATH10K_SKB_CB(skb)->paddr = dma_map_single(dev, skb->data, skb->len,
  64. DMA_TO_DEVICE);
  65. if (unlikely(dma_mapping_error(dev, ATH10K_SKB_CB(skb)->paddr)))
  66. return -EIO;
  67. ATH10K_SKB_CB(skb)->is_mapped = true;
  68. return 0;
  69. }
  70. static inline int ath10k_skb_unmap(struct device *dev, struct sk_buff *skb)
  71. {
  72. if (!ATH10K_SKB_CB(skb)->is_mapped)
  73. return -EINVAL;
  74. dma_unmap_single(dev, ATH10K_SKB_CB(skb)->paddr, skb->len,
  75. DMA_TO_DEVICE);
  76. ATH10K_SKB_CB(skb)->is_mapped = false;
  77. return 0;
  78. }
  79. static inline u32 host_interest_item_address(u32 item_offset)
  80. {
  81. return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
  82. }
  83. struct ath10k_bmi {
  84. bool done_sent;
  85. };
  86. #define ATH10K_MAX_MEM_REQS 16
  87. struct ath10k_mem_chunk {
  88. void *vaddr;
  89. dma_addr_t paddr;
  90. u32 len;
  91. u32 req_id;
  92. };
  93. struct ath10k_wmi {
  94. enum ath10k_htc_ep_id eid;
  95. struct completion service_ready;
  96. struct completion unified_ready;
  97. wait_queue_head_t tx_credits_wq;
  98. struct wmi_cmd_map *cmd;
  99. struct wmi_vdev_param_map *vdev_param;
  100. struct wmi_pdev_param_map *pdev_param;
  101. u32 num_mem_chunks;
  102. struct ath10k_mem_chunk mem_chunks[ATH10K_MAX_MEM_REQS];
  103. };
  104. struct ath10k_peer_stat {
  105. u8 peer_macaddr[ETH_ALEN];
  106. u32 peer_rssi;
  107. u32 peer_tx_rate;
  108. };
  109. struct ath10k_target_stats {
  110. /* PDEV stats */
  111. s32 ch_noise_floor;
  112. u32 tx_frame_count;
  113. u32 rx_frame_count;
  114. u32 rx_clear_count;
  115. u32 cycle_count;
  116. u32 phy_err_count;
  117. u32 chan_tx_power;
  118. /* PDEV TX stats */
  119. s32 comp_queued;
  120. s32 comp_delivered;
  121. s32 msdu_enqued;
  122. s32 mpdu_enqued;
  123. s32 wmm_drop;
  124. s32 local_enqued;
  125. s32 local_freed;
  126. s32 hw_queued;
  127. s32 hw_reaped;
  128. s32 underrun;
  129. s32 tx_abort;
  130. s32 mpdus_requed;
  131. u32 tx_ko;
  132. u32 data_rc;
  133. u32 self_triggers;
  134. u32 sw_retry_failure;
  135. u32 illgl_rate_phy_err;
  136. u32 pdev_cont_xretry;
  137. u32 pdev_tx_timeout;
  138. u32 pdev_resets;
  139. u32 phy_underrun;
  140. u32 txop_ovf;
  141. /* PDEV RX stats */
  142. s32 mid_ppdu_route_change;
  143. s32 status_rcvd;
  144. s32 r0_frags;
  145. s32 r1_frags;
  146. s32 r2_frags;
  147. s32 r3_frags;
  148. s32 htt_msdus;
  149. s32 htt_mpdus;
  150. s32 loc_msdus;
  151. s32 loc_mpdus;
  152. s32 oversize_amsdu;
  153. s32 phy_errs;
  154. s32 phy_err_drop;
  155. s32 mpdu_errs;
  156. /* VDEV STATS */
  157. /* PEER STATS */
  158. u8 peers;
  159. struct ath10k_peer_stat peer_stat[TARGET_NUM_PEERS];
  160. /* TODO: Beacon filter stats */
  161. };
  162. #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
  163. struct ath10k_peer {
  164. struct list_head list;
  165. int vdev_id;
  166. u8 addr[ETH_ALEN];
  167. DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
  168. struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
  169. };
  170. #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
  171. struct ath10k_vif {
  172. struct list_head list;
  173. u32 vdev_id;
  174. enum wmi_vdev_type vdev_type;
  175. enum wmi_vdev_subtype vdev_subtype;
  176. u32 beacon_interval;
  177. u32 dtim_period;
  178. struct sk_buff *beacon;
  179. struct ath10k *ar;
  180. struct ieee80211_vif *vif;
  181. struct work_struct wep_key_work;
  182. struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
  183. u8 def_wep_key_idx;
  184. u8 def_wep_key_newidx;
  185. u16 tx_seq_no;
  186. union {
  187. struct {
  188. u8 bssid[ETH_ALEN];
  189. u32 uapsd;
  190. } sta;
  191. struct {
  192. /* 127 stations; wmi limit */
  193. u8 tim_bitmap[16];
  194. u8 tim_len;
  195. u32 ssid_len;
  196. u8 ssid[IEEE80211_MAX_SSID_LEN];
  197. bool hidden_ssid;
  198. /* P2P_IE with NoA attribute for P2P_GO case */
  199. u32 noa_len;
  200. u8 *noa_data;
  201. } ap;
  202. struct {
  203. u8 bssid[ETH_ALEN];
  204. } ibss;
  205. } u;
  206. };
  207. struct ath10k_vif_iter {
  208. u32 vdev_id;
  209. struct ath10k_vif *arvif;
  210. };
  211. struct ath10k_debug {
  212. struct dentry *debugfs_phy;
  213. struct ath10k_target_stats target_stats;
  214. u32 wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
  215. struct completion event_stats_compl;
  216. unsigned long htt_stats_mask;
  217. struct delayed_work htt_stats_dwork;
  218. };
  219. enum ath10k_state {
  220. ATH10K_STATE_OFF = 0,
  221. ATH10K_STATE_ON,
  222. /* When doing firmware recovery the device is first powered down.
  223. * mac80211 is supposed to call in to start() hook later on. It is
  224. * however possible that driver unloading and firmware crash overlap.
  225. * mac80211 can wait on conf_mutex in stop() while the device is
  226. * stopped in ath10k_core_restart() work holding conf_mutex. The state
  227. * RESTARTED means that the device is up and mac80211 has started hw
  228. * reconfiguration. Once mac80211 is done with the reconfiguration we
  229. * set the state to STATE_ON in restart_complete(). */
  230. ATH10K_STATE_RESTARTING,
  231. ATH10K_STATE_RESTARTED,
  232. /* The device has crashed while restarting hw. This state is like ON
  233. * but commands are blocked in HTC and -ECOMM response is given. This
  234. * prevents completion timeouts and makes the driver more responsive to
  235. * userspace commands. This is also prevents recursive recovery. */
  236. ATH10K_STATE_WEDGED,
  237. };
  238. enum ath10k_fw_features {
  239. /* wmi_mgmt_rx_hdr contains extra RSSI information */
  240. ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
  241. /* firmware from 10X branch */
  242. ATH10K_FW_FEATURE_WMI_10X = 1,
  243. /* firmware support tx frame management over WMI, otherwise it's HTT */
  244. ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
  245. /* keep last */
  246. ATH10K_FW_FEATURE_COUNT,
  247. };
  248. struct ath10k {
  249. struct ath_common ath_common;
  250. struct ieee80211_hw *hw;
  251. struct device *dev;
  252. u8 mac_addr[ETH_ALEN];
  253. u32 chip_id;
  254. u32 target_version;
  255. u8 fw_version_major;
  256. u32 fw_version_minor;
  257. u16 fw_version_release;
  258. u16 fw_version_build;
  259. u32 phy_capability;
  260. u32 hw_min_tx_power;
  261. u32 hw_max_tx_power;
  262. u32 ht_cap_info;
  263. u32 vht_cap_info;
  264. u32 num_rf_chains;
  265. DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
  266. struct targetdef *targetdef;
  267. struct hostdef *hostdef;
  268. bool p2p;
  269. struct {
  270. void *priv;
  271. const struct ath10k_hif_ops *ops;
  272. } hif;
  273. wait_queue_head_t event_queue;
  274. bool is_target_paused;
  275. struct ath10k_bmi bmi;
  276. struct ath10k_wmi wmi;
  277. struct ath10k_htc htc;
  278. struct ath10k_htt htt;
  279. struct ath10k_hw_params {
  280. u32 id;
  281. const char *name;
  282. u32 patch_load_addr;
  283. struct ath10k_hw_params_fw {
  284. const char *dir;
  285. const char *fw;
  286. const char *otp;
  287. const char *board;
  288. } fw;
  289. } hw_params;
  290. const struct firmware *board;
  291. const void *board_data;
  292. size_t board_len;
  293. const struct firmware *otp;
  294. const void *otp_data;
  295. size_t otp_len;
  296. const struct firmware *firmware;
  297. const void *firmware_data;
  298. size_t firmware_len;
  299. int fw_api;
  300. struct {
  301. struct completion started;
  302. struct completion completed;
  303. struct completion on_channel;
  304. struct timer_list timeout;
  305. bool is_roc;
  306. bool in_progress;
  307. bool aborting;
  308. int vdev_id;
  309. int roc_freq;
  310. } scan;
  311. struct {
  312. struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
  313. } mac;
  314. /* should never be NULL; needed for regular htt rx */
  315. struct ieee80211_channel *rx_channel;
  316. /* valid during scan; needed for mgmt rx during scan */
  317. struct ieee80211_channel *scan_channel;
  318. int free_vdev_map;
  319. int monitor_vdev_id;
  320. bool monitor_enabled;
  321. bool monitor_present;
  322. unsigned int filter_flags;
  323. struct wmi_pdev_set_wmm_params_arg wmm_params;
  324. struct completion install_key_done;
  325. struct completion vdev_setup_done;
  326. struct workqueue_struct *workqueue;
  327. /* prevents concurrent FW reconfiguration */
  328. struct mutex conf_mutex;
  329. /* protects shared structure data */
  330. spinlock_t data_lock;
  331. struct list_head arvifs;
  332. struct list_head peers;
  333. wait_queue_head_t peer_mapping_wq;
  334. struct work_struct offchan_tx_work;
  335. struct sk_buff_head offchan_tx_queue;
  336. struct completion offchan_tx_completed;
  337. struct sk_buff *offchan_tx_skb;
  338. struct work_struct wmi_mgmt_tx_work;
  339. struct sk_buff_head wmi_mgmt_tx_queue;
  340. enum ath10k_state state;
  341. struct work_struct restart_work;
  342. /* cycle count is reported twice for each visited channel during scan.
  343. * access protected by data_lock */
  344. u32 survey_last_rx_clear_count;
  345. u32 survey_last_cycle_count;
  346. struct survey_info survey[ATH10K_NUM_CHANS];
  347. #ifdef CONFIG_ATH10K_DEBUGFS
  348. struct ath10k_debug debug;
  349. #endif
  350. };
  351. struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
  352. const struct ath10k_hif_ops *hif_ops);
  353. void ath10k_core_destroy(struct ath10k *ar);
  354. int ath10k_core_start(struct ath10k *ar);
  355. void ath10k_core_stop(struct ath10k *ar);
  356. int ath10k_core_register(struct ath10k *ar, u32 chip_id);
  357. void ath10k_core_unregister(struct ath10k *ar);
  358. #endif /* _CORE_H_ */