core.c 22 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/firmware.h>
  19. #include "core.h"
  20. #include "mac.h"
  21. #include "htc.h"
  22. #include "hif.h"
  23. #include "wmi.h"
  24. #include "bmi.h"
  25. #include "debug.h"
  26. #include "htt.h"
  27. unsigned int ath10k_debug_mask;
  28. static bool uart_print;
  29. static unsigned int ath10k_p2p;
  30. module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  31. module_param(uart_print, bool, 0644);
  32. module_param_named(p2p, ath10k_p2p, uint, 0644);
  33. MODULE_PARM_DESC(debug_mask, "Debugging mask");
  34. MODULE_PARM_DESC(uart_print, "Uart target debugging");
  35. MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
  36. static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  37. {
  38. .id = QCA988X_HW_2_0_VERSION,
  39. .name = "qca988x hw2.0",
  40. .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  41. .fw = {
  42. .dir = QCA988X_HW_2_0_FW_DIR,
  43. .fw = QCA988X_HW_2_0_FW_FILE,
  44. .otp = QCA988X_HW_2_0_OTP_FILE,
  45. .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  46. },
  47. },
  48. };
  49. static void ath10k_send_suspend_complete(struct ath10k *ar)
  50. {
  51. ath10k_dbg(ATH10K_DBG_BOOT, "boot suspend complete\n");
  52. ar->is_target_paused = true;
  53. wake_up(&ar->event_queue);
  54. }
  55. static int ath10k_init_connect_htc(struct ath10k *ar)
  56. {
  57. int status;
  58. status = ath10k_wmi_connect_htc_service(ar);
  59. if (status)
  60. goto conn_fail;
  61. /* Start HTC */
  62. status = ath10k_htc_start(&ar->htc);
  63. if (status)
  64. goto conn_fail;
  65. /* Wait for WMI event to be ready */
  66. status = ath10k_wmi_wait_for_service_ready(ar);
  67. if (status <= 0) {
  68. ath10k_warn("wmi service ready event not received");
  69. status = -ETIMEDOUT;
  70. goto timeout;
  71. }
  72. ath10k_dbg(ATH10K_DBG_BOOT, "boot wmi ready\n");
  73. return 0;
  74. timeout:
  75. ath10k_htc_stop(&ar->htc);
  76. conn_fail:
  77. return status;
  78. }
  79. static int ath10k_init_configure_target(struct ath10k *ar)
  80. {
  81. u32 param_host;
  82. int ret;
  83. /* tell target which HTC version it is used*/
  84. ret = ath10k_bmi_write32(ar, hi_app_host_interest,
  85. HTC_PROTOCOL_VERSION);
  86. if (ret) {
  87. ath10k_err("settings HTC version failed\n");
  88. return ret;
  89. }
  90. /* set the firmware mode to STA/IBSS/AP */
  91. ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
  92. if (ret) {
  93. ath10k_err("setting firmware mode (1/2) failed\n");
  94. return ret;
  95. }
  96. /* TODO following parameters need to be re-visited. */
  97. /* num_device */
  98. param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  99. /* Firmware mode */
  100. /* FIXME: Why FW_MODE_AP ??.*/
  101. param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
  102. /* mac_addr_method */
  103. param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  104. /* firmware_bridge */
  105. param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  106. /* fwsubmode */
  107. param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
  108. ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
  109. if (ret) {
  110. ath10k_err("setting firmware mode (2/2) failed\n");
  111. return ret;
  112. }
  113. /* We do all byte-swapping on the host */
  114. ret = ath10k_bmi_write32(ar, hi_be, 0);
  115. if (ret) {
  116. ath10k_err("setting host CPU BE mode failed\n");
  117. return ret;
  118. }
  119. /* FW descriptor/Data swap flags */
  120. ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
  121. if (ret) {
  122. ath10k_err("setting FW data/desc swap flags failed\n");
  123. return ret;
  124. }
  125. return 0;
  126. }
  127. static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
  128. const char *dir,
  129. const char *file)
  130. {
  131. char filename[100];
  132. const struct firmware *fw;
  133. int ret;
  134. if (file == NULL)
  135. return ERR_PTR(-ENOENT);
  136. if (dir == NULL)
  137. dir = ".";
  138. snprintf(filename, sizeof(filename), "%s/%s", dir, file);
  139. ret = request_firmware(&fw, filename, ar->dev);
  140. if (ret)
  141. return ERR_PTR(ret);
  142. return fw;
  143. }
  144. static int ath10k_push_board_ext_data(struct ath10k *ar)
  145. {
  146. u32 board_data_size = QCA988X_BOARD_DATA_SZ;
  147. u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ;
  148. u32 board_ext_data_addr;
  149. int ret;
  150. ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
  151. if (ret) {
  152. ath10k_err("could not read board ext data addr (%d)\n", ret);
  153. return ret;
  154. }
  155. ath10k_dbg(ATH10K_DBG_BOOT,
  156. "boot push board extended data addr 0x%x\n",
  157. board_ext_data_addr);
  158. if (board_ext_data_addr == 0)
  159. return 0;
  160. if (ar->board_len != (board_data_size + board_ext_data_size)) {
  161. ath10k_err("invalid board (ext) data sizes %zu != %d+%d\n",
  162. ar->board_len, board_data_size, board_ext_data_size);
  163. return -EINVAL;
  164. }
  165. ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
  166. ar->board_data + board_data_size,
  167. board_ext_data_size);
  168. if (ret) {
  169. ath10k_err("could not write board ext data (%d)\n", ret);
  170. return ret;
  171. }
  172. ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
  173. (board_ext_data_size << 16) | 1);
  174. if (ret) {
  175. ath10k_err("could not write board ext data bit (%d)\n", ret);
  176. return ret;
  177. }
  178. return 0;
  179. }
  180. static int ath10k_download_board_data(struct ath10k *ar)
  181. {
  182. u32 board_data_size = QCA988X_BOARD_DATA_SZ;
  183. u32 address;
  184. int ret;
  185. ret = ath10k_push_board_ext_data(ar);
  186. if (ret) {
  187. ath10k_err("could not push board ext data (%d)\n", ret);
  188. goto exit;
  189. }
  190. ret = ath10k_bmi_read32(ar, hi_board_data, &address);
  191. if (ret) {
  192. ath10k_err("could not read board data addr (%d)\n", ret);
  193. goto exit;
  194. }
  195. ret = ath10k_bmi_write_memory(ar, address, ar->board_data,
  196. min_t(u32, board_data_size,
  197. ar->board_len));
  198. if (ret) {
  199. ath10k_err("could not write board data (%d)\n", ret);
  200. goto exit;
  201. }
  202. ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
  203. if (ret) {
  204. ath10k_err("could not write board data bit (%d)\n", ret);
  205. goto exit;
  206. }
  207. exit:
  208. return ret;
  209. }
  210. static int ath10k_download_and_run_otp(struct ath10k *ar)
  211. {
  212. u32 address = ar->hw_params.patch_load_addr;
  213. u32 exec_param;
  214. int ret;
  215. /* OTP is optional */
  216. if (!ar->otp_data || !ar->otp_len)
  217. return 0;
  218. ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
  219. if (ret) {
  220. ath10k_err("could not write otp (%d)\n", ret);
  221. goto exit;
  222. }
  223. exec_param = 0;
  224. ret = ath10k_bmi_execute(ar, address, &exec_param);
  225. if (ret) {
  226. ath10k_err("could not execute otp (%d)\n", ret);
  227. goto exit;
  228. }
  229. exit:
  230. return ret;
  231. }
  232. static int ath10k_download_fw(struct ath10k *ar)
  233. {
  234. u32 address;
  235. int ret;
  236. address = ar->hw_params.patch_load_addr;
  237. ret = ath10k_bmi_fast_download(ar, address, ar->firmware_data,
  238. ar->firmware_len);
  239. if (ret) {
  240. ath10k_err("could not write fw (%d)\n", ret);
  241. goto exit;
  242. }
  243. exit:
  244. return ret;
  245. }
  246. static void ath10k_core_free_firmware_files(struct ath10k *ar)
  247. {
  248. if (ar->board && !IS_ERR(ar->board))
  249. release_firmware(ar->board);
  250. if (ar->otp && !IS_ERR(ar->otp))
  251. release_firmware(ar->otp);
  252. if (ar->firmware && !IS_ERR(ar->firmware))
  253. release_firmware(ar->firmware);
  254. ar->board = NULL;
  255. ar->board_data = NULL;
  256. ar->board_len = 0;
  257. ar->otp = NULL;
  258. ar->otp_data = NULL;
  259. ar->otp_len = 0;
  260. ar->firmware = NULL;
  261. ar->firmware_data = NULL;
  262. ar->firmware_len = 0;
  263. }
  264. static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
  265. {
  266. int ret = 0;
  267. if (ar->hw_params.fw.fw == NULL) {
  268. ath10k_err("firmware file not defined\n");
  269. return -EINVAL;
  270. }
  271. if (ar->hw_params.fw.board == NULL) {
  272. ath10k_err("board data file not defined");
  273. return -EINVAL;
  274. }
  275. ar->board = ath10k_fetch_fw_file(ar,
  276. ar->hw_params.fw.dir,
  277. ar->hw_params.fw.board);
  278. if (IS_ERR(ar->board)) {
  279. ret = PTR_ERR(ar->board);
  280. ath10k_err("could not fetch board data (%d)\n", ret);
  281. goto err;
  282. }
  283. ar->board_data = ar->board->data;
  284. ar->board_len = ar->board->size;
  285. ar->firmware = ath10k_fetch_fw_file(ar,
  286. ar->hw_params.fw.dir,
  287. ar->hw_params.fw.fw);
  288. if (IS_ERR(ar->firmware)) {
  289. ret = PTR_ERR(ar->firmware);
  290. ath10k_err("could not fetch firmware (%d)\n", ret);
  291. goto err;
  292. }
  293. ar->firmware_data = ar->firmware->data;
  294. ar->firmware_len = ar->firmware->size;
  295. /* OTP may be undefined. If so, don't fetch it at all */
  296. if (ar->hw_params.fw.otp == NULL)
  297. return 0;
  298. ar->otp = ath10k_fetch_fw_file(ar,
  299. ar->hw_params.fw.dir,
  300. ar->hw_params.fw.otp);
  301. if (IS_ERR(ar->otp)) {
  302. ret = PTR_ERR(ar->otp);
  303. ath10k_err("could not fetch otp (%d)\n", ret);
  304. goto err;
  305. }
  306. ar->otp_data = ar->otp->data;
  307. ar->otp_len = ar->otp->size;
  308. return 0;
  309. err:
  310. ath10k_core_free_firmware_files(ar);
  311. return ret;
  312. }
  313. static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
  314. {
  315. size_t magic_len, len, ie_len;
  316. int ie_id, i, index, bit, ret;
  317. struct ath10k_fw_ie *hdr;
  318. const u8 *data;
  319. __le32 *timestamp;
  320. /* first fetch the firmware file (firmware-*.bin) */
  321. ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
  322. if (IS_ERR(ar->firmware)) {
  323. ath10k_err("Could not fetch firmware file '%s': %ld\n",
  324. name, PTR_ERR(ar->firmware));
  325. return PTR_ERR(ar->firmware);
  326. }
  327. data = ar->firmware->data;
  328. len = ar->firmware->size;
  329. /* magic also includes the null byte, check that as well */
  330. magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
  331. if (len < magic_len) {
  332. ath10k_err("firmware image too small to contain magic: %zu\n",
  333. len);
  334. ret = -EINVAL;
  335. goto err;
  336. }
  337. if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
  338. ath10k_err("Invalid firmware magic\n");
  339. ret = -EINVAL;
  340. goto err;
  341. }
  342. /* jump over the padding */
  343. magic_len = ALIGN(magic_len, 4);
  344. len -= magic_len;
  345. data += magic_len;
  346. /* loop elements */
  347. while (len > sizeof(struct ath10k_fw_ie)) {
  348. hdr = (struct ath10k_fw_ie *)data;
  349. ie_id = le32_to_cpu(hdr->id);
  350. ie_len = le32_to_cpu(hdr->len);
  351. len -= sizeof(*hdr);
  352. data += sizeof(*hdr);
  353. if (len < ie_len) {
  354. ath10k_err("Invalid length for FW IE %d (%zu < %zu)\n",
  355. ie_id, len, ie_len);
  356. ret = -EINVAL;
  357. goto err;
  358. }
  359. switch (ie_id) {
  360. case ATH10K_FW_IE_FW_VERSION:
  361. if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
  362. break;
  363. memcpy(ar->hw->wiphy->fw_version, data, ie_len);
  364. ar->hw->wiphy->fw_version[ie_len] = '\0';
  365. ath10k_dbg(ATH10K_DBG_BOOT,
  366. "found fw version %s\n",
  367. ar->hw->wiphy->fw_version);
  368. break;
  369. case ATH10K_FW_IE_TIMESTAMP:
  370. if (ie_len != sizeof(u32))
  371. break;
  372. timestamp = (__le32 *)data;
  373. ath10k_dbg(ATH10K_DBG_BOOT, "found fw timestamp %d\n",
  374. le32_to_cpup(timestamp));
  375. break;
  376. case ATH10K_FW_IE_FEATURES:
  377. ath10k_dbg(ATH10K_DBG_BOOT,
  378. "found firmware features ie (%zd B)\n",
  379. ie_len);
  380. for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
  381. index = i / 8;
  382. bit = i % 8;
  383. if (index == ie_len)
  384. break;
  385. if (data[index] & (1 << bit))
  386. __set_bit(i, ar->fw_features);
  387. }
  388. ath10k_dbg_dump(ATH10K_DBG_BOOT, "features", "",
  389. ar->fw_features,
  390. sizeof(ar->fw_features));
  391. break;
  392. case ATH10K_FW_IE_FW_IMAGE:
  393. ath10k_dbg(ATH10K_DBG_BOOT,
  394. "found fw image ie (%zd B)\n",
  395. ie_len);
  396. ar->firmware_data = data;
  397. ar->firmware_len = ie_len;
  398. break;
  399. case ATH10K_FW_IE_OTP_IMAGE:
  400. ath10k_dbg(ATH10K_DBG_BOOT,
  401. "found otp image ie (%zd B)\n",
  402. ie_len);
  403. ar->otp_data = data;
  404. ar->otp_len = ie_len;
  405. break;
  406. default:
  407. ath10k_warn("Unknown FW IE: %u\n",
  408. le32_to_cpu(hdr->id));
  409. break;
  410. }
  411. /* jump over the padding */
  412. ie_len = ALIGN(ie_len, 4);
  413. len -= ie_len;
  414. data += ie_len;
  415. }
  416. if (!ar->firmware_data || !ar->firmware_len) {
  417. ath10k_warn("No ATH10K_FW_IE_FW_IMAGE found from %s, skipping\n",
  418. name);
  419. ret = -ENOMEDIUM;
  420. goto err;
  421. }
  422. /* now fetch the board file */
  423. if (ar->hw_params.fw.board == NULL) {
  424. ath10k_err("board data file not defined");
  425. ret = -EINVAL;
  426. goto err;
  427. }
  428. ar->board = ath10k_fetch_fw_file(ar,
  429. ar->hw_params.fw.dir,
  430. ar->hw_params.fw.board);
  431. if (IS_ERR(ar->board)) {
  432. ret = PTR_ERR(ar->board);
  433. ath10k_err("could not fetch board data (%d)\n", ret);
  434. goto err;
  435. }
  436. ar->board_data = ar->board->data;
  437. ar->board_len = ar->board->size;
  438. return 0;
  439. err:
  440. ath10k_core_free_firmware_files(ar);
  441. return ret;
  442. }
  443. static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
  444. {
  445. int ret;
  446. ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
  447. if (ret == 0) {
  448. ar->fw_api = 2;
  449. goto out;
  450. }
  451. ret = ath10k_core_fetch_firmware_api_1(ar);
  452. if (ret)
  453. return ret;
  454. ar->fw_api = 1;
  455. out:
  456. ath10k_dbg(ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
  457. return 0;
  458. }
  459. static int ath10k_init_download_firmware(struct ath10k *ar)
  460. {
  461. int ret;
  462. ret = ath10k_download_board_data(ar);
  463. if (ret)
  464. return ret;
  465. ret = ath10k_download_and_run_otp(ar);
  466. if (ret)
  467. return ret;
  468. ret = ath10k_download_fw(ar);
  469. if (ret)
  470. return ret;
  471. return ret;
  472. }
  473. static int ath10k_init_uart(struct ath10k *ar)
  474. {
  475. int ret;
  476. /*
  477. * Explicitly setting UART prints to zero as target turns it on
  478. * based on scratch registers.
  479. */
  480. ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
  481. if (ret) {
  482. ath10k_warn("could not disable UART prints (%d)\n", ret);
  483. return ret;
  484. }
  485. if (!uart_print) {
  486. ath10k_info("UART prints disabled\n");
  487. return 0;
  488. }
  489. ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
  490. if (ret) {
  491. ath10k_warn("could not enable UART prints (%d)\n", ret);
  492. return ret;
  493. }
  494. ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
  495. if (ret) {
  496. ath10k_warn("could not enable UART prints (%d)\n", ret);
  497. return ret;
  498. }
  499. /* Set the UART baud rate to 19200. */
  500. ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
  501. if (ret) {
  502. ath10k_warn("could not set the baud rate (%d)\n", ret);
  503. return ret;
  504. }
  505. ath10k_info("UART prints enabled\n");
  506. return 0;
  507. }
  508. static int ath10k_init_hw_params(struct ath10k *ar)
  509. {
  510. const struct ath10k_hw_params *uninitialized_var(hw_params);
  511. int i;
  512. for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
  513. hw_params = &ath10k_hw_params_list[i];
  514. if (hw_params->id == ar->target_version)
  515. break;
  516. }
  517. if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
  518. ath10k_err("Unsupported hardware version: 0x%x\n",
  519. ar->target_version);
  520. return -EINVAL;
  521. }
  522. ar->hw_params = *hw_params;
  523. ath10k_info("Hardware name %s version 0x%x\n",
  524. ar->hw_params.name, ar->target_version);
  525. return 0;
  526. }
  527. static void ath10k_core_restart(struct work_struct *work)
  528. {
  529. struct ath10k *ar = container_of(work, struct ath10k, restart_work);
  530. mutex_lock(&ar->conf_mutex);
  531. switch (ar->state) {
  532. case ATH10K_STATE_ON:
  533. ath10k_halt(ar);
  534. ar->state = ATH10K_STATE_RESTARTING;
  535. ieee80211_restart_hw(ar->hw);
  536. break;
  537. case ATH10K_STATE_OFF:
  538. /* this can happen if driver is being unloaded */
  539. ath10k_warn("cannot restart a device that hasn't been started\n");
  540. break;
  541. case ATH10K_STATE_RESTARTING:
  542. case ATH10K_STATE_RESTARTED:
  543. ar->state = ATH10K_STATE_WEDGED;
  544. /* fall through */
  545. case ATH10K_STATE_WEDGED:
  546. ath10k_warn("device is wedged, will not restart\n");
  547. break;
  548. }
  549. mutex_unlock(&ar->conf_mutex);
  550. }
  551. struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
  552. const struct ath10k_hif_ops *hif_ops)
  553. {
  554. struct ath10k *ar;
  555. ar = ath10k_mac_create();
  556. if (!ar)
  557. return NULL;
  558. ar->ath_common.priv = ar;
  559. ar->ath_common.hw = ar->hw;
  560. ar->p2p = !!ath10k_p2p;
  561. ar->dev = dev;
  562. ar->hif.priv = hif_priv;
  563. ar->hif.ops = hif_ops;
  564. init_completion(&ar->scan.started);
  565. init_completion(&ar->scan.completed);
  566. init_completion(&ar->scan.on_channel);
  567. init_completion(&ar->install_key_done);
  568. init_completion(&ar->vdev_setup_done);
  569. setup_timer(&ar->scan.timeout, ath10k_reset_scan, (unsigned long)ar);
  570. ar->workqueue = create_singlethread_workqueue("ath10k_wq");
  571. if (!ar->workqueue)
  572. goto err_wq;
  573. mutex_init(&ar->conf_mutex);
  574. spin_lock_init(&ar->data_lock);
  575. INIT_LIST_HEAD(&ar->peers);
  576. init_waitqueue_head(&ar->peer_mapping_wq);
  577. init_completion(&ar->offchan_tx_completed);
  578. INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
  579. skb_queue_head_init(&ar->offchan_tx_queue);
  580. INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
  581. skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
  582. init_waitqueue_head(&ar->event_queue);
  583. INIT_WORK(&ar->restart_work, ath10k_core_restart);
  584. return ar;
  585. err_wq:
  586. ath10k_mac_destroy(ar);
  587. return NULL;
  588. }
  589. EXPORT_SYMBOL(ath10k_core_create);
  590. void ath10k_core_destroy(struct ath10k *ar)
  591. {
  592. ath10k_debug_destroy(ar);
  593. flush_workqueue(ar->workqueue);
  594. destroy_workqueue(ar->workqueue);
  595. ath10k_mac_destroy(ar);
  596. }
  597. EXPORT_SYMBOL(ath10k_core_destroy);
  598. int ath10k_core_start(struct ath10k *ar)
  599. {
  600. int status;
  601. lockdep_assert_held(&ar->conf_mutex);
  602. ath10k_bmi_start(ar);
  603. if (ath10k_init_configure_target(ar)) {
  604. status = -EINVAL;
  605. goto err;
  606. }
  607. status = ath10k_init_download_firmware(ar);
  608. if (status)
  609. goto err;
  610. status = ath10k_init_uart(ar);
  611. if (status)
  612. goto err;
  613. ar->htc.htc_ops.target_send_suspend_complete =
  614. ath10k_send_suspend_complete;
  615. status = ath10k_htc_init(ar);
  616. if (status) {
  617. ath10k_err("could not init HTC (%d)\n", status);
  618. goto err;
  619. }
  620. status = ath10k_bmi_done(ar);
  621. if (status)
  622. goto err;
  623. status = ath10k_wmi_attach(ar);
  624. if (status) {
  625. ath10k_err("WMI attach failed: %d\n", status);
  626. goto err;
  627. }
  628. status = ath10k_htc_wait_target(&ar->htc);
  629. if (status)
  630. goto err_wmi_detach;
  631. status = ath10k_htt_attach(ar);
  632. if (status) {
  633. ath10k_err("could not attach htt (%d)\n", status);
  634. goto err_wmi_detach;
  635. }
  636. status = ath10k_init_connect_htc(ar);
  637. if (status)
  638. goto err_htt_detach;
  639. ath10k_info("firmware %s booted\n", ar->hw->wiphy->fw_version);
  640. status = ath10k_wmi_cmd_init(ar);
  641. if (status) {
  642. ath10k_err("could not send WMI init command (%d)\n", status);
  643. goto err_disconnect_htc;
  644. }
  645. status = ath10k_wmi_wait_for_unified_ready(ar);
  646. if (status <= 0) {
  647. ath10k_err("wmi unified ready event not received\n");
  648. status = -ETIMEDOUT;
  649. goto err_disconnect_htc;
  650. }
  651. status = ath10k_htt_attach_target(&ar->htt);
  652. if (status)
  653. goto err_disconnect_htc;
  654. status = ath10k_debug_start(ar);
  655. if (status)
  656. goto err_disconnect_htc;
  657. ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1;
  658. INIT_LIST_HEAD(&ar->arvifs);
  659. return 0;
  660. err_disconnect_htc:
  661. ath10k_htc_stop(&ar->htc);
  662. err_htt_detach:
  663. ath10k_htt_detach(&ar->htt);
  664. err_wmi_detach:
  665. ath10k_wmi_detach(ar);
  666. err:
  667. return status;
  668. }
  669. EXPORT_SYMBOL(ath10k_core_start);
  670. void ath10k_core_stop(struct ath10k *ar)
  671. {
  672. lockdep_assert_held(&ar->conf_mutex);
  673. ath10k_debug_stop(ar);
  674. ath10k_htc_stop(&ar->htc);
  675. ath10k_htt_detach(&ar->htt);
  676. ath10k_wmi_detach(ar);
  677. }
  678. EXPORT_SYMBOL(ath10k_core_stop);
  679. /* mac80211 manages fw/hw initialization through start/stop hooks. However in
  680. * order to know what hw capabilities should be advertised to mac80211 it is
  681. * necessary to load the firmware (and tear it down immediately since start
  682. * hook will try to init it again) before registering */
  683. static int ath10k_core_probe_fw(struct ath10k *ar)
  684. {
  685. struct bmi_target_info target_info;
  686. int ret = 0;
  687. ret = ath10k_hif_power_up(ar);
  688. if (ret) {
  689. ath10k_err("could not start pci hif (%d)\n", ret);
  690. return ret;
  691. }
  692. memset(&target_info, 0, sizeof(target_info));
  693. ret = ath10k_bmi_get_target_info(ar, &target_info);
  694. if (ret) {
  695. ath10k_err("could not get target info (%d)\n", ret);
  696. ath10k_hif_power_down(ar);
  697. return ret;
  698. }
  699. ar->target_version = target_info.version;
  700. ar->hw->wiphy->hw_version = target_info.version;
  701. ret = ath10k_init_hw_params(ar);
  702. if (ret) {
  703. ath10k_err("could not get hw params (%d)\n", ret);
  704. ath10k_hif_power_down(ar);
  705. return ret;
  706. }
  707. ret = ath10k_core_fetch_firmware_files(ar);
  708. if (ret) {
  709. ath10k_err("could not fetch firmware files (%d)\n", ret);
  710. ath10k_hif_power_down(ar);
  711. return ret;
  712. }
  713. mutex_lock(&ar->conf_mutex);
  714. ret = ath10k_core_start(ar);
  715. if (ret) {
  716. ath10k_err("could not init core (%d)\n", ret);
  717. ath10k_core_free_firmware_files(ar);
  718. ath10k_hif_power_down(ar);
  719. mutex_unlock(&ar->conf_mutex);
  720. return ret;
  721. }
  722. ath10k_core_stop(ar);
  723. mutex_unlock(&ar->conf_mutex);
  724. ath10k_hif_power_down(ar);
  725. return 0;
  726. }
  727. static int ath10k_core_check_chip_id(struct ath10k *ar)
  728. {
  729. u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV);
  730. ath10k_dbg(ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n",
  731. ar->chip_id, hw_revision);
  732. /* Check that we are not using hw1.0 (some of them have same pci id
  733. * as hw2.0) before doing anything else as ath10k crashes horribly
  734. * due to missing hw1.0 workarounds. */
  735. switch (hw_revision) {
  736. case QCA988X_HW_1_0_CHIP_ID_REV:
  737. ath10k_err("ERROR: qca988x hw1.0 is not supported\n");
  738. return -EOPNOTSUPP;
  739. case QCA988X_HW_2_0_CHIP_ID_REV:
  740. /* known hardware revision, continue normally */
  741. return 0;
  742. default:
  743. ath10k_warn("Warning: hardware revision unknown (0x%x), expect problems\n",
  744. ar->chip_id);
  745. return 0;
  746. }
  747. return 0;
  748. }
  749. int ath10k_core_register(struct ath10k *ar, u32 chip_id)
  750. {
  751. int status;
  752. ar->chip_id = chip_id;
  753. status = ath10k_core_check_chip_id(ar);
  754. if (status) {
  755. ath10k_err("Unsupported chip id 0x%08x\n", ar->chip_id);
  756. return status;
  757. }
  758. status = ath10k_core_probe_fw(ar);
  759. if (status) {
  760. ath10k_err("could not probe fw (%d)\n", status);
  761. return status;
  762. }
  763. status = ath10k_mac_register(ar);
  764. if (status) {
  765. ath10k_err("could not register to mac80211 (%d)\n", status);
  766. goto err_release_fw;
  767. }
  768. status = ath10k_debug_create(ar);
  769. if (status) {
  770. ath10k_err("unable to initialize debugfs\n");
  771. goto err_unregister_mac;
  772. }
  773. return 0;
  774. err_unregister_mac:
  775. ath10k_mac_unregister(ar);
  776. err_release_fw:
  777. ath10k_core_free_firmware_files(ar);
  778. return status;
  779. }
  780. EXPORT_SYMBOL(ath10k_core_register);
  781. void ath10k_core_unregister(struct ath10k *ar)
  782. {
  783. /* We must unregister from mac80211 before we stop HTC and HIF.
  784. * Otherwise we will fail to submit commands to FW and mac80211 will be
  785. * unhappy about callback failures. */
  786. ath10k_mac_unregister(ar);
  787. ath10k_core_free_firmware_files(ar);
  788. }
  789. EXPORT_SYMBOL(ath10k_core_unregister);
  790. MODULE_AUTHOR("Qualcomm Atheros");
  791. MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
  792. MODULE_LICENSE("Dual BSD/GPL");