islpci_dev.c 27 KB

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  1. /*
  2. * Copyright (C) 2002 Intersil Americas Inc.
  3. * Copyright (C) 2003 Herbert Valerio Riedel <hvr@gnu.org>
  4. * Copyright (C) 2003 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. *
  19. */
  20. #include <linux/module.h>
  21. #include <linux/netdevice.h>
  22. #include <linux/ethtool.h>
  23. #include <linux/pci.h>
  24. #include <linux/etherdevice.h>
  25. #include <linux/delay.h>
  26. #include <linux/if_arp.h>
  27. #include <asm/io.h>
  28. #include "prismcompat.h"
  29. #include "isl_38xx.h"
  30. #include "isl_ioctl.h"
  31. #include "islpci_dev.h"
  32. #include "islpci_mgt.h"
  33. #include "islpci_eth.h"
  34. #include "oid_mgt.h"
  35. #define ISL3877_IMAGE_FILE "isl3877"
  36. #define ISL3886_IMAGE_FILE "isl3886"
  37. #define ISL3890_IMAGE_FILE "isl3890"
  38. MODULE_FIRMWARE(ISL3877_IMAGE_FILE);
  39. MODULE_FIRMWARE(ISL3886_IMAGE_FILE);
  40. MODULE_FIRMWARE(ISL3890_IMAGE_FILE);
  41. static int prism54_bring_down(islpci_private *);
  42. static int islpci_alloc_memory(islpci_private *);
  43. /* Temporary dummy MAC address to use until firmware is loaded.
  44. * The idea there is that some tools (such as nameif) may query
  45. * the MAC address before the netdev is 'open'. By using a valid
  46. * OUI prefix, they can process the netdev properly.
  47. * Of course, this is not the final/real MAC address. It doesn't
  48. * matter, as you are suppose to be able to change it anytime via
  49. * ndev->set_mac_address. Jean II */
  50. static const unsigned char dummy_mac[6] = { 0x00, 0x30, 0xB4, 0x00, 0x00, 0x00 };
  51. static int
  52. isl_upload_firmware(islpci_private *priv)
  53. {
  54. u32 reg, rc;
  55. void __iomem *device_base = priv->device_base;
  56. /* clear the RAMBoot and the Reset bit */
  57. reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
  58. reg &= ~ISL38XX_CTRL_STAT_RESET;
  59. reg &= ~ISL38XX_CTRL_STAT_RAMBOOT;
  60. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  61. wmb();
  62. udelay(ISL38XX_WRITEIO_DELAY);
  63. /* set the Reset bit without reading the register ! */
  64. reg |= ISL38XX_CTRL_STAT_RESET;
  65. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  66. wmb();
  67. udelay(ISL38XX_WRITEIO_DELAY);
  68. /* clear the Reset bit */
  69. reg &= ~ISL38XX_CTRL_STAT_RESET;
  70. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  71. wmb();
  72. /* wait a while for the device to reboot */
  73. mdelay(50);
  74. {
  75. const struct firmware *fw_entry = NULL;
  76. long fw_len;
  77. const u32 *fw_ptr;
  78. rc = request_firmware(&fw_entry, priv->firmware, PRISM_FW_PDEV);
  79. if (rc) {
  80. printk(KERN_ERR
  81. "%s: request_firmware() failed for '%s'\n",
  82. "prism54", priv->firmware);
  83. return rc;
  84. }
  85. /* prepare the Direct Memory Base register */
  86. reg = ISL38XX_DEV_FIRMWARE_ADDRES;
  87. fw_ptr = (u32 *) fw_entry->data;
  88. fw_len = fw_entry->size;
  89. if (fw_len % 4) {
  90. printk(KERN_ERR
  91. "%s: firmware '%s' size is not multiple of 32bit, aborting!\n",
  92. "prism54", priv->firmware);
  93. release_firmware(fw_entry);
  94. return -EILSEQ; /* Illegal byte sequence */;
  95. }
  96. while (fw_len > 0) {
  97. long _fw_len =
  98. (fw_len >
  99. ISL38XX_MEMORY_WINDOW_SIZE) ?
  100. ISL38XX_MEMORY_WINDOW_SIZE : fw_len;
  101. u32 __iomem *dev_fw_ptr = device_base + ISL38XX_DIRECT_MEM_WIN;
  102. /* set the card's base address for writing the data */
  103. isl38xx_w32_flush(device_base, reg,
  104. ISL38XX_DIR_MEM_BASE_REG);
  105. wmb(); /* be paranoid */
  106. /* increment the write address for next iteration */
  107. reg += _fw_len;
  108. fw_len -= _fw_len;
  109. /* write the data to the Direct Memory Window 32bit-wise */
  110. /* memcpy_toio() doesn't guarantee 32bit writes :-| */
  111. while (_fw_len > 0) {
  112. /* use non-swapping writel() */
  113. __raw_writel(*fw_ptr, dev_fw_ptr);
  114. fw_ptr++, dev_fw_ptr++;
  115. _fw_len -= 4;
  116. }
  117. /* flush PCI posting */
  118. (void) readl(device_base + ISL38XX_PCI_POSTING_FLUSH);
  119. wmb(); /* be paranoid again */
  120. BUG_ON(_fw_len != 0);
  121. }
  122. BUG_ON(fw_len != 0);
  123. /* Firmware version is at offset 40 (also for "newmac") */
  124. printk(KERN_DEBUG "%s: firmware version: %.8s\n",
  125. priv->ndev->name, fw_entry->data + 40);
  126. release_firmware(fw_entry);
  127. }
  128. /* now reset the device
  129. * clear the Reset & ClkRun bit, set the RAMBoot bit */
  130. reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
  131. reg &= ~ISL38XX_CTRL_STAT_CLKRUN;
  132. reg &= ~ISL38XX_CTRL_STAT_RESET;
  133. reg |= ISL38XX_CTRL_STAT_RAMBOOT;
  134. isl38xx_w32_flush(device_base, reg, ISL38XX_CTRL_STAT_REG);
  135. wmb();
  136. udelay(ISL38XX_WRITEIO_DELAY);
  137. /* set the reset bit latches the host override and RAMBoot bits
  138. * into the device for operation when the reset bit is reset */
  139. reg |= ISL38XX_CTRL_STAT_RESET;
  140. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  141. /* don't do flush PCI posting here! */
  142. wmb();
  143. udelay(ISL38XX_WRITEIO_DELAY);
  144. /* clear the reset bit should start the whole circus */
  145. reg &= ~ISL38XX_CTRL_STAT_RESET;
  146. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  147. /* don't do flush PCI posting here! */
  148. wmb();
  149. udelay(ISL38XX_WRITEIO_DELAY);
  150. return 0;
  151. }
  152. /******************************************************************************
  153. Device Interrupt Handler
  154. ******************************************************************************/
  155. irqreturn_t
  156. islpci_interrupt(int irq, void *config)
  157. {
  158. u32 reg;
  159. islpci_private *priv = config;
  160. struct net_device *ndev = priv->ndev;
  161. void __iomem *device = priv->device_base;
  162. int powerstate = ISL38XX_PSM_POWERSAVE_STATE;
  163. /* lock the interrupt handler */
  164. spin_lock(&priv->slock);
  165. /* received an interrupt request on a shared IRQ line
  166. * first check whether the device is in sleep mode */
  167. reg = readl(device + ISL38XX_CTRL_STAT_REG);
  168. if (reg & ISL38XX_CTRL_STAT_SLEEPMODE)
  169. /* device is in sleep mode, IRQ was generated by someone else */
  170. {
  171. #if VERBOSE > SHOW_ERROR_MESSAGES
  172. DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
  173. #endif
  174. spin_unlock(&priv->slock);
  175. return IRQ_NONE;
  176. }
  177. /* check whether there is any source of interrupt on the device */
  178. reg = readl(device + ISL38XX_INT_IDENT_REG);
  179. /* also check the contents of the Interrupt Enable Register, because this
  180. * will filter out interrupt sources from other devices on the same irq ! */
  181. reg &= readl(device + ISL38XX_INT_EN_REG);
  182. reg &= ISL38XX_INT_SOURCES;
  183. if (reg != 0) {
  184. if (islpci_get_state(priv) != PRV_STATE_SLEEP)
  185. powerstate = ISL38XX_PSM_ACTIVE_STATE;
  186. /* reset the request bits in the Identification register */
  187. isl38xx_w32_flush(device, reg, ISL38XX_INT_ACK_REG);
  188. #if VERBOSE > SHOW_ERROR_MESSAGES
  189. DEBUG(SHOW_FUNCTION_CALLS,
  190. "IRQ: Identification register 0x%p 0x%x \n", device, reg);
  191. #endif
  192. /* check for each bit in the register separately */
  193. if (reg & ISL38XX_INT_IDENT_UPDATE) {
  194. #if VERBOSE > SHOW_ERROR_MESSAGES
  195. /* Queue has been updated */
  196. DEBUG(SHOW_TRACING, "IRQ: Update flag \n");
  197. DEBUG(SHOW_QUEUE_INDEXES,
  198. "CB drv Qs: [%i][%i][%i][%i][%i][%i]\n",
  199. le32_to_cpu(priv->control_block->
  200. driver_curr_frag[0]),
  201. le32_to_cpu(priv->control_block->
  202. driver_curr_frag[1]),
  203. le32_to_cpu(priv->control_block->
  204. driver_curr_frag[2]),
  205. le32_to_cpu(priv->control_block->
  206. driver_curr_frag[3]),
  207. le32_to_cpu(priv->control_block->
  208. driver_curr_frag[4]),
  209. le32_to_cpu(priv->control_block->
  210. driver_curr_frag[5])
  211. );
  212. DEBUG(SHOW_QUEUE_INDEXES,
  213. "CB dev Qs: [%i][%i][%i][%i][%i][%i]\n",
  214. le32_to_cpu(priv->control_block->
  215. device_curr_frag[0]),
  216. le32_to_cpu(priv->control_block->
  217. device_curr_frag[1]),
  218. le32_to_cpu(priv->control_block->
  219. device_curr_frag[2]),
  220. le32_to_cpu(priv->control_block->
  221. device_curr_frag[3]),
  222. le32_to_cpu(priv->control_block->
  223. device_curr_frag[4]),
  224. le32_to_cpu(priv->control_block->
  225. device_curr_frag[5])
  226. );
  227. #endif
  228. /* cleanup the data low transmit queue */
  229. islpci_eth_cleanup_transmit(priv, priv->control_block);
  230. /* device is in active state, update the
  231. * powerstate flag if necessary */
  232. powerstate = ISL38XX_PSM_ACTIVE_STATE;
  233. /* check all three queues in priority order
  234. * call the PIMFOR receive function until the
  235. * queue is empty */
  236. if (isl38xx_in_queue(priv->control_block,
  237. ISL38XX_CB_RX_MGMTQ) != 0) {
  238. #if VERBOSE > SHOW_ERROR_MESSAGES
  239. DEBUG(SHOW_TRACING,
  240. "Received frame in Management Queue\n");
  241. #endif
  242. islpci_mgt_receive(ndev);
  243. islpci_mgt_cleanup_transmit(ndev);
  244. /* Refill slots in receive queue */
  245. islpci_mgmt_rx_fill(ndev);
  246. /* no need to trigger the device, next
  247. islpci_mgt_transaction does it */
  248. }
  249. while (isl38xx_in_queue(priv->control_block,
  250. ISL38XX_CB_RX_DATA_LQ) != 0) {
  251. #if VERBOSE > SHOW_ERROR_MESSAGES
  252. DEBUG(SHOW_TRACING,
  253. "Received frame in Data Low Queue \n");
  254. #endif
  255. islpci_eth_receive(priv);
  256. }
  257. /* check whether the data transmit queues were full */
  258. if (priv->data_low_tx_full) {
  259. /* check whether the transmit is not full anymore */
  260. if (ISL38XX_CB_TX_QSIZE -
  261. isl38xx_in_queue(priv->control_block,
  262. ISL38XX_CB_TX_DATA_LQ) >=
  263. ISL38XX_MIN_QTHRESHOLD) {
  264. /* nope, the driver is ready for more network frames */
  265. netif_wake_queue(priv->ndev);
  266. /* reset the full flag */
  267. priv->data_low_tx_full = 0;
  268. }
  269. }
  270. }
  271. if (reg & ISL38XX_INT_IDENT_INIT) {
  272. /* Device has been initialized */
  273. #if VERBOSE > SHOW_ERROR_MESSAGES
  274. DEBUG(SHOW_TRACING,
  275. "IRQ: Init flag, device initialized \n");
  276. #endif
  277. wake_up(&priv->reset_done);
  278. }
  279. if (reg & ISL38XX_INT_IDENT_SLEEP) {
  280. /* Device intends to move to powersave state */
  281. #if VERBOSE > SHOW_ERROR_MESSAGES
  282. DEBUG(SHOW_TRACING, "IRQ: Sleep flag \n");
  283. #endif
  284. isl38xx_handle_sleep_request(priv->control_block,
  285. &powerstate,
  286. priv->device_base);
  287. }
  288. if (reg & ISL38XX_INT_IDENT_WAKEUP) {
  289. /* Device has been woken up to active state */
  290. #if VERBOSE > SHOW_ERROR_MESSAGES
  291. DEBUG(SHOW_TRACING, "IRQ: Wakeup flag \n");
  292. #endif
  293. isl38xx_handle_wakeup(priv->control_block,
  294. &powerstate, priv->device_base);
  295. }
  296. } else {
  297. #if VERBOSE > SHOW_ERROR_MESSAGES
  298. DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
  299. #endif
  300. spin_unlock(&priv->slock);
  301. return IRQ_NONE;
  302. }
  303. /* sleep -> ready */
  304. if (islpci_get_state(priv) == PRV_STATE_SLEEP
  305. && powerstate == ISL38XX_PSM_ACTIVE_STATE)
  306. islpci_set_state(priv, PRV_STATE_READY);
  307. /* !sleep -> sleep */
  308. if (islpci_get_state(priv) != PRV_STATE_SLEEP
  309. && powerstate == ISL38XX_PSM_POWERSAVE_STATE)
  310. islpci_set_state(priv, PRV_STATE_SLEEP);
  311. /* unlock the interrupt handler */
  312. spin_unlock(&priv->slock);
  313. return IRQ_HANDLED;
  314. }
  315. /******************************************************************************
  316. Network Interface Control & Statistical functions
  317. ******************************************************************************/
  318. static int
  319. islpci_open(struct net_device *ndev)
  320. {
  321. u32 rc;
  322. islpci_private *priv = netdev_priv(ndev);
  323. /* reset data structures, upload firmware and reset device */
  324. rc = islpci_reset(priv,1);
  325. if (rc) {
  326. prism54_bring_down(priv);
  327. return rc; /* Returns informative message */
  328. }
  329. netif_start_queue(ndev);
  330. /* Turn off carrier if in STA or Ad-hoc mode. It will be turned on
  331. * once the firmware receives a trap of being associated
  332. * (GEN_OID_LINKSTATE). In other modes (AP or WDS or monitor) we
  333. * should just leave the carrier on as its expected the firmware
  334. * won't send us a trigger. */
  335. if (priv->iw_mode == IW_MODE_INFRA || priv->iw_mode == IW_MODE_ADHOC)
  336. netif_carrier_off(ndev);
  337. else
  338. netif_carrier_on(ndev);
  339. return 0;
  340. }
  341. static int
  342. islpci_close(struct net_device *ndev)
  343. {
  344. islpci_private *priv = netdev_priv(ndev);
  345. printk(KERN_DEBUG "%s: islpci_close ()\n", ndev->name);
  346. netif_stop_queue(ndev);
  347. return prism54_bring_down(priv);
  348. }
  349. static int
  350. prism54_bring_down(islpci_private *priv)
  351. {
  352. void __iomem *device_base = priv->device_base;
  353. u32 reg;
  354. /* we are going to shutdown the device */
  355. islpci_set_state(priv, PRV_STATE_PREBOOT);
  356. /* disable all device interrupts in case they weren't */
  357. isl38xx_disable_interrupts(priv->device_base);
  358. /* For safety reasons, we may want to ensure that no DMA transfer is
  359. * currently in progress by emptying the TX and RX queues. */
  360. /* wait until interrupts have finished executing on other CPUs */
  361. synchronize_irq(priv->pdev->irq);
  362. reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
  363. reg &= ~(ISL38XX_CTRL_STAT_RESET | ISL38XX_CTRL_STAT_RAMBOOT);
  364. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  365. wmb();
  366. udelay(ISL38XX_WRITEIO_DELAY);
  367. reg |= ISL38XX_CTRL_STAT_RESET;
  368. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  369. wmb();
  370. udelay(ISL38XX_WRITEIO_DELAY);
  371. /* clear the Reset bit */
  372. reg &= ~ISL38XX_CTRL_STAT_RESET;
  373. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  374. wmb();
  375. /* wait a while for the device to reset */
  376. schedule_timeout_uninterruptible(msecs_to_jiffies(50));
  377. return 0;
  378. }
  379. static int
  380. islpci_upload_fw(islpci_private *priv)
  381. {
  382. islpci_state_t old_state;
  383. u32 rc;
  384. old_state = islpci_set_state(priv, PRV_STATE_BOOT);
  385. printk(KERN_DEBUG "%s: uploading firmware...\n", priv->ndev->name);
  386. rc = isl_upload_firmware(priv);
  387. if (rc) {
  388. /* error uploading the firmware */
  389. printk(KERN_ERR "%s: could not upload firmware ('%s')\n",
  390. priv->ndev->name, priv->firmware);
  391. islpci_set_state(priv, old_state);
  392. return rc;
  393. }
  394. printk(KERN_DEBUG "%s: firmware upload complete\n",
  395. priv->ndev->name);
  396. islpci_set_state(priv, PRV_STATE_POSTBOOT);
  397. return 0;
  398. }
  399. static int
  400. islpci_reset_if(islpci_private *priv)
  401. {
  402. long remaining;
  403. int result = -ETIME;
  404. int count;
  405. DEFINE_WAIT(wait);
  406. prepare_to_wait(&priv->reset_done, &wait, TASK_UNINTERRUPTIBLE);
  407. /* now the last step is to reset the interface */
  408. isl38xx_interface_reset(priv->device_base, priv->device_host_address);
  409. islpci_set_state(priv, PRV_STATE_PREINIT);
  410. for(count = 0; count < 2 && result; count++) {
  411. /* The software reset acknowledge needs about 220 msec here.
  412. * Be conservative and wait for up to one second. */
  413. remaining = schedule_timeout_uninterruptible(HZ);
  414. if(remaining > 0) {
  415. result = 0;
  416. break;
  417. }
  418. /* If we're here it's because our IRQ hasn't yet gone through.
  419. * Retry a bit more...
  420. */
  421. printk(KERN_ERR "%s: no 'reset complete' IRQ seen - retrying\n",
  422. priv->ndev->name);
  423. }
  424. finish_wait(&priv->reset_done, &wait);
  425. if (result) {
  426. printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name);
  427. return result;
  428. }
  429. islpci_set_state(priv, PRV_STATE_INIT);
  430. /* Now that the device is 100% up, let's allow
  431. * for the other interrupts --
  432. * NOTE: this is not *yet* true since we've only allowed the
  433. * INIT interrupt on the IRQ line. We can perhaps poll
  434. * the IRQ line until we know for sure the reset went through */
  435. isl38xx_enable_common_interrupts(priv->device_base);
  436. down_write(&priv->mib_sem);
  437. result = mgt_commit(priv);
  438. if (result) {
  439. printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name);
  440. up_write(&priv->mib_sem);
  441. return result;
  442. }
  443. up_write(&priv->mib_sem);
  444. islpci_set_state(priv, PRV_STATE_READY);
  445. printk(KERN_DEBUG "%s: interface reset complete\n", priv->ndev->name);
  446. return 0;
  447. }
  448. int
  449. islpci_reset(islpci_private *priv, int reload_firmware)
  450. {
  451. isl38xx_control_block *cb = /* volatile not needed */
  452. (isl38xx_control_block *) priv->control_block;
  453. unsigned counter;
  454. int rc;
  455. if (reload_firmware)
  456. islpci_set_state(priv, PRV_STATE_PREBOOT);
  457. else
  458. islpci_set_state(priv, PRV_STATE_POSTBOOT);
  459. printk(KERN_DEBUG "%s: resetting device...\n", priv->ndev->name);
  460. /* disable all device interrupts in case they weren't */
  461. isl38xx_disable_interrupts(priv->device_base);
  462. /* flush all management queues */
  463. priv->index_mgmt_tx = 0;
  464. priv->index_mgmt_rx = 0;
  465. /* clear the indexes in the frame pointer */
  466. for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
  467. cb->driver_curr_frag[counter] = cpu_to_le32(0);
  468. cb->device_curr_frag[counter] = cpu_to_le32(0);
  469. }
  470. /* reset the mgmt receive queue */
  471. for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
  472. isl38xx_fragment *frag = &cb->rx_data_mgmt[counter];
  473. frag->size = cpu_to_le16(MGMT_FRAME_SIZE);
  474. frag->flags = 0;
  475. frag->address = cpu_to_le32(priv->mgmt_rx[counter].pci_addr);
  476. }
  477. for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
  478. cb->rx_data_low[counter].address =
  479. cpu_to_le32((u32) priv->pci_map_rx_address[counter]);
  480. }
  481. /* since the receive queues are filled with empty fragments, now we can
  482. * set the corresponding indexes in the Control Block */
  483. priv->control_block->driver_curr_frag[ISL38XX_CB_RX_DATA_LQ] =
  484. cpu_to_le32(ISL38XX_CB_RX_QSIZE);
  485. priv->control_block->driver_curr_frag[ISL38XX_CB_RX_MGMTQ] =
  486. cpu_to_le32(ISL38XX_CB_MGMT_QSIZE);
  487. /* reset the remaining real index registers and full flags */
  488. priv->free_data_rx = 0;
  489. priv->free_data_tx = 0;
  490. priv->data_low_tx_full = 0;
  491. if (reload_firmware) { /* Should we load the firmware ? */
  492. /* now that the data structures are cleaned up, upload
  493. * firmware and reset interface */
  494. rc = islpci_upload_fw(priv);
  495. if (rc) {
  496. printk(KERN_ERR "%s: islpci_reset: failure\n",
  497. priv->ndev->name);
  498. return rc;
  499. }
  500. }
  501. /* finally reset interface */
  502. rc = islpci_reset_if(priv);
  503. if (rc)
  504. printk(KERN_ERR "prism54: Your card/socket may be faulty, or IRQ line too busy :(\n");
  505. return rc;
  506. }
  507. /******************************************************************************
  508. Network device configuration functions
  509. ******************************************************************************/
  510. static int
  511. islpci_alloc_memory(islpci_private *priv)
  512. {
  513. int counter;
  514. #if VERBOSE > SHOW_ERROR_MESSAGES
  515. printk(KERN_DEBUG "islpci_alloc_memory\n");
  516. #endif
  517. /* remap the PCI device base address to accessable */
  518. if (!(priv->device_base =
  519. ioremap(pci_resource_start(priv->pdev, 0),
  520. ISL38XX_PCI_MEM_SIZE))) {
  521. /* error in remapping the PCI device memory address range */
  522. printk(KERN_ERR "PCI memory remapping failed \n");
  523. return -1;
  524. }
  525. /* memory layout for consistent DMA region:
  526. *
  527. * Area 1: Control Block for the device interface
  528. * Area 2: Power Save Mode Buffer for temporary frame storage. Be aware that
  529. * the number of supported stations in the AP determines the minimal
  530. * size of the buffer !
  531. */
  532. /* perform the allocation */
  533. priv->driver_mem_address = pci_alloc_consistent(priv->pdev,
  534. HOST_MEM_BLOCK,
  535. &priv->
  536. device_host_address);
  537. if (!priv->driver_mem_address) {
  538. /* error allocating the block of PCI memory */
  539. printk(KERN_ERR "%s: could not allocate DMA memory, aborting!",
  540. "prism54");
  541. return -1;
  542. }
  543. /* assign the Control Block to the first address of the allocated area */
  544. priv->control_block =
  545. (isl38xx_control_block *) priv->driver_mem_address;
  546. /* set the Power Save Buffer pointer directly behind the CB */
  547. priv->device_psm_buffer =
  548. priv->device_host_address + CONTROL_BLOCK_SIZE;
  549. /* make sure all buffer pointers are initialized */
  550. for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
  551. priv->control_block->driver_curr_frag[counter] = cpu_to_le32(0);
  552. priv->control_block->device_curr_frag[counter] = cpu_to_le32(0);
  553. }
  554. priv->index_mgmt_rx = 0;
  555. memset(priv->mgmt_rx, 0, sizeof(priv->mgmt_rx));
  556. memset(priv->mgmt_tx, 0, sizeof(priv->mgmt_tx));
  557. /* allocate rx queue for management frames */
  558. if (islpci_mgmt_rx_fill(priv->ndev) < 0)
  559. goto out_free;
  560. /* now get the data rx skb's */
  561. memset(priv->data_low_rx, 0, sizeof (priv->data_low_rx));
  562. memset(priv->pci_map_rx_address, 0, sizeof (priv->pci_map_rx_address));
  563. for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
  564. struct sk_buff *skb;
  565. /* allocate an sk_buff for received data frames storage
  566. * each frame on receive size consists of 1 fragment
  567. * include any required allignment operations */
  568. if (!(skb = dev_alloc_skb(MAX_FRAGMENT_SIZE_RX + 2))) {
  569. /* error allocating an sk_buff structure elements */
  570. printk(KERN_ERR "Error allocating skb.\n");
  571. skb = NULL;
  572. goto out_free;
  573. }
  574. skb_reserve(skb, (4 - (long) skb->data) & 0x03);
  575. /* add the new allocated sk_buff to the buffer array */
  576. priv->data_low_rx[counter] = skb;
  577. /* map the allocated skb data area to pci */
  578. priv->pci_map_rx_address[counter] =
  579. pci_map_single(priv->pdev, (void *) skb->data,
  580. MAX_FRAGMENT_SIZE_RX + 2,
  581. PCI_DMA_FROMDEVICE);
  582. if (!priv->pci_map_rx_address[counter]) {
  583. /* error mapping the buffer to device
  584. accessable memory address */
  585. printk(KERN_ERR "failed to map skb DMA'able\n");
  586. goto out_free;
  587. }
  588. }
  589. prism54_acl_init(&priv->acl);
  590. prism54_wpa_bss_ie_init(priv);
  591. if (mgt_init(priv))
  592. goto out_free;
  593. return 0;
  594. out_free:
  595. islpci_free_memory(priv);
  596. return -1;
  597. }
  598. int
  599. islpci_free_memory(islpci_private *priv)
  600. {
  601. int counter;
  602. if (priv->device_base)
  603. iounmap(priv->device_base);
  604. priv->device_base = NULL;
  605. /* free consistent DMA area... */
  606. if (priv->driver_mem_address)
  607. pci_free_consistent(priv->pdev, HOST_MEM_BLOCK,
  608. priv->driver_mem_address,
  609. priv->device_host_address);
  610. /* clear some dangling pointers */
  611. priv->driver_mem_address = NULL;
  612. priv->device_host_address = 0;
  613. priv->device_psm_buffer = 0;
  614. priv->control_block = NULL;
  615. /* clean up mgmt rx buffers */
  616. for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
  617. struct islpci_membuf *buf = &priv->mgmt_rx[counter];
  618. if (buf->pci_addr)
  619. pci_unmap_single(priv->pdev, buf->pci_addr,
  620. buf->size, PCI_DMA_FROMDEVICE);
  621. buf->pci_addr = 0;
  622. kfree(buf->mem);
  623. buf->size = 0;
  624. buf->mem = NULL;
  625. }
  626. /* clean up data rx buffers */
  627. for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
  628. if (priv->pci_map_rx_address[counter])
  629. pci_unmap_single(priv->pdev,
  630. priv->pci_map_rx_address[counter],
  631. MAX_FRAGMENT_SIZE_RX + 2,
  632. PCI_DMA_FROMDEVICE);
  633. priv->pci_map_rx_address[counter] = 0;
  634. if (priv->data_low_rx[counter])
  635. dev_kfree_skb(priv->data_low_rx[counter]);
  636. priv->data_low_rx[counter] = NULL;
  637. }
  638. /* Free the acces control list and the WPA list */
  639. prism54_acl_clean(&priv->acl);
  640. prism54_wpa_bss_ie_clean(priv);
  641. mgt_clean(priv);
  642. return 0;
  643. }
  644. #if 0
  645. static void
  646. islpci_set_multicast_list(struct net_device *dev)
  647. {
  648. /* put device into promisc mode and let network layer handle it */
  649. }
  650. #endif
  651. static void islpci_ethtool_get_drvinfo(struct net_device *dev,
  652. struct ethtool_drvinfo *info)
  653. {
  654. strcpy(info->driver, DRV_NAME);
  655. strcpy(info->version, DRV_VERSION);
  656. }
  657. static const struct ethtool_ops islpci_ethtool_ops = {
  658. .get_drvinfo = islpci_ethtool_get_drvinfo,
  659. };
  660. static const struct net_device_ops islpci_netdev_ops = {
  661. .ndo_open = islpci_open,
  662. .ndo_stop = islpci_close,
  663. .ndo_do_ioctl = prism54_ioctl,
  664. .ndo_start_xmit = islpci_eth_transmit,
  665. .ndo_tx_timeout = islpci_eth_tx_timeout,
  666. .ndo_set_mac_address = prism54_set_mac_address,
  667. .ndo_change_mtu = eth_change_mtu,
  668. .ndo_validate_addr = eth_validate_addr,
  669. };
  670. struct net_device *
  671. islpci_setup(struct pci_dev *pdev)
  672. {
  673. islpci_private *priv;
  674. struct net_device *ndev = alloc_etherdev(sizeof (islpci_private));
  675. if (!ndev)
  676. return ndev;
  677. pci_set_drvdata(pdev, ndev);
  678. #if defined(SET_NETDEV_DEV)
  679. SET_NETDEV_DEV(ndev, &pdev->dev);
  680. #endif
  681. /* setup the structure members */
  682. ndev->base_addr = pci_resource_start(pdev, 0);
  683. ndev->irq = pdev->irq;
  684. /* initialize the function pointers */
  685. ndev->netdev_ops = &islpci_netdev_ops;
  686. ndev->wireless_handlers = &prism54_handler_def;
  687. ndev->ethtool_ops = &islpci_ethtool_ops;
  688. /* ndev->set_multicast_list = &islpci_set_multicast_list; */
  689. ndev->addr_len = ETH_ALEN;
  690. /* Get a non-zero dummy MAC address for nameif. Jean II */
  691. memcpy(ndev->dev_addr, dummy_mac, 6);
  692. ndev->watchdog_timeo = ISLPCI_TX_TIMEOUT;
  693. /* allocate a private device structure to the network device */
  694. priv = netdev_priv(ndev);
  695. priv->ndev = ndev;
  696. priv->pdev = pdev;
  697. priv->monitor_type = ARPHRD_IEEE80211;
  698. priv->ndev->type = (priv->iw_mode == IW_MODE_MONITOR) ?
  699. priv->monitor_type : ARPHRD_ETHER;
  700. /* Add pointers to enable iwspy support. */
  701. priv->wireless_data.spy_data = &priv->spy_data;
  702. ndev->wireless_data = &priv->wireless_data;
  703. /* save the start and end address of the PCI memory area */
  704. ndev->mem_start = (unsigned long) priv->device_base;
  705. ndev->mem_end = ndev->mem_start + ISL38XX_PCI_MEM_SIZE;
  706. #if VERBOSE > SHOW_ERROR_MESSAGES
  707. DEBUG(SHOW_TRACING, "PCI Memory remapped to 0x%p\n", priv->device_base);
  708. #endif
  709. init_waitqueue_head(&priv->reset_done);
  710. /* init the queue read locks, process wait counter */
  711. mutex_init(&priv->mgmt_lock);
  712. priv->mgmt_received = NULL;
  713. init_waitqueue_head(&priv->mgmt_wqueue);
  714. mutex_init(&priv->stats_lock);
  715. spin_lock_init(&priv->slock);
  716. /* init state machine with off#1 state */
  717. priv->state = PRV_STATE_OFF;
  718. priv->state_off = 1;
  719. /* initialize workqueue's */
  720. INIT_WORK(&priv->stats_work, prism54_update_stats);
  721. priv->stats_timestamp = 0;
  722. INIT_WORK(&priv->reset_task, islpci_do_reset_and_wake);
  723. priv->reset_task_pending = 0;
  724. /* allocate various memory areas */
  725. if (islpci_alloc_memory(priv))
  726. goto do_free_netdev;
  727. /* select the firmware file depending on the device id */
  728. switch (pdev->device) {
  729. case 0x3877:
  730. strcpy(priv->firmware, ISL3877_IMAGE_FILE);
  731. break;
  732. case 0x3886:
  733. strcpy(priv->firmware, ISL3886_IMAGE_FILE);
  734. break;
  735. default:
  736. strcpy(priv->firmware, ISL3890_IMAGE_FILE);
  737. break;
  738. }
  739. if (register_netdev(ndev)) {
  740. DEBUG(SHOW_ERROR_MESSAGES,
  741. "ERROR: register_netdev() failed \n");
  742. goto do_islpci_free_memory;
  743. }
  744. return ndev;
  745. do_islpci_free_memory:
  746. islpci_free_memory(priv);
  747. do_free_netdev:
  748. pci_set_drvdata(pdev, NULL);
  749. free_netdev(ndev);
  750. priv = NULL;
  751. return NULL;
  752. }
  753. islpci_state_t
  754. islpci_set_state(islpci_private *priv, islpci_state_t new_state)
  755. {
  756. islpci_state_t old_state;
  757. /* lock */
  758. old_state = priv->state;
  759. /* this means either a race condition or some serious error in
  760. * the driver code */
  761. switch (new_state) {
  762. case PRV_STATE_OFF:
  763. priv->state_off++;
  764. default:
  765. priv->state = new_state;
  766. break;
  767. case PRV_STATE_PREBOOT:
  768. /* there are actually many off-states, enumerated by
  769. * state_off */
  770. if (old_state == PRV_STATE_OFF)
  771. priv->state_off--;
  772. /* only if hw_unavailable is zero now it means we either
  773. * were in off#1 state, or came here from
  774. * somewhere else */
  775. if (!priv->state_off)
  776. priv->state = new_state;
  777. break;
  778. };
  779. #if 0
  780. printk(KERN_DEBUG "%s: state transition %d -> %d (off#%d)\n",
  781. priv->ndev->name, old_state, new_state, priv->state_off);
  782. #endif
  783. /* invariants */
  784. BUG_ON(priv->state_off < 0);
  785. BUG_ON(priv->state_off && (priv->state != PRV_STATE_OFF));
  786. BUG_ON(!priv->state_off && (priv->state == PRV_STATE_OFF));
  787. /* unlock */
  788. return old_state;
  789. }