pio.c 20 KB

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  1. /*
  2. Broadcom B43 wireless driver
  3. PIO data transfer
  4. Copyright (c) 2005-2008 Michael Buesch <mb@bu3sch.de>
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; see the file COPYING. If not, write to
  15. the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  16. Boston, MA 02110-1301, USA.
  17. */
  18. #include "b43.h"
  19. #include "pio.h"
  20. #include "dma.h"
  21. #include "main.h"
  22. #include "xmit.h"
  23. #include <linux/delay.h>
  24. static u16 generate_cookie(struct b43_pio_txqueue *q,
  25. struct b43_pio_txpacket *pack)
  26. {
  27. u16 cookie;
  28. /* Use the upper 4 bits of the cookie as
  29. * PIO controller ID and store the packet index number
  30. * in the lower 12 bits.
  31. * Note that the cookie must never be 0, as this
  32. * is a special value used in RX path.
  33. * It can also not be 0xFFFF because that is special
  34. * for multicast frames.
  35. */
  36. cookie = (((u16)q->index + 1) << 12);
  37. cookie |= pack->index;
  38. return cookie;
  39. }
  40. static
  41. struct b43_pio_txqueue *parse_cookie(struct b43_wldev *dev,
  42. u16 cookie,
  43. struct b43_pio_txpacket **pack)
  44. {
  45. struct b43_pio *pio = &dev->pio;
  46. struct b43_pio_txqueue *q = NULL;
  47. unsigned int pack_index;
  48. switch (cookie & 0xF000) {
  49. case 0x1000:
  50. q = pio->tx_queue_AC_BK;
  51. break;
  52. case 0x2000:
  53. q = pio->tx_queue_AC_BE;
  54. break;
  55. case 0x3000:
  56. q = pio->tx_queue_AC_VI;
  57. break;
  58. case 0x4000:
  59. q = pio->tx_queue_AC_VO;
  60. break;
  61. case 0x5000:
  62. q = pio->tx_queue_mcast;
  63. break;
  64. }
  65. if (B43_WARN_ON(!q))
  66. return NULL;
  67. pack_index = (cookie & 0x0FFF);
  68. if (B43_WARN_ON(pack_index >= ARRAY_SIZE(q->packets)))
  69. return NULL;
  70. *pack = &q->packets[pack_index];
  71. return q;
  72. }
  73. static u16 index_to_pioqueue_base(struct b43_wldev *dev,
  74. unsigned int index)
  75. {
  76. static const u16 bases[] = {
  77. B43_MMIO_PIO_BASE0,
  78. B43_MMIO_PIO_BASE1,
  79. B43_MMIO_PIO_BASE2,
  80. B43_MMIO_PIO_BASE3,
  81. B43_MMIO_PIO_BASE4,
  82. B43_MMIO_PIO_BASE5,
  83. B43_MMIO_PIO_BASE6,
  84. B43_MMIO_PIO_BASE7,
  85. };
  86. static const u16 bases_rev11[] = {
  87. B43_MMIO_PIO11_BASE0,
  88. B43_MMIO_PIO11_BASE1,
  89. B43_MMIO_PIO11_BASE2,
  90. B43_MMIO_PIO11_BASE3,
  91. B43_MMIO_PIO11_BASE4,
  92. B43_MMIO_PIO11_BASE5,
  93. };
  94. if (dev->dev->id.revision >= 11) {
  95. B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11));
  96. return bases_rev11[index];
  97. }
  98. B43_WARN_ON(index >= ARRAY_SIZE(bases));
  99. return bases[index];
  100. }
  101. static u16 pio_txqueue_offset(struct b43_wldev *dev)
  102. {
  103. if (dev->dev->id.revision >= 11)
  104. return 0x18;
  105. return 0;
  106. }
  107. static u16 pio_rxqueue_offset(struct b43_wldev *dev)
  108. {
  109. if (dev->dev->id.revision >= 11)
  110. return 0x38;
  111. return 8;
  112. }
  113. static struct b43_pio_txqueue *b43_setup_pioqueue_tx(struct b43_wldev *dev,
  114. unsigned int index)
  115. {
  116. struct b43_pio_txqueue *q;
  117. struct b43_pio_txpacket *p;
  118. unsigned int i;
  119. q = kzalloc(sizeof(*q), GFP_KERNEL);
  120. if (!q)
  121. return NULL;
  122. q->dev = dev;
  123. q->rev = dev->dev->id.revision;
  124. q->mmio_base = index_to_pioqueue_base(dev, index) +
  125. pio_txqueue_offset(dev);
  126. q->index = index;
  127. q->free_packet_slots = B43_PIO_MAX_NR_TXPACKETS;
  128. if (q->rev >= 8) {
  129. q->buffer_size = 1920; //FIXME this constant is wrong.
  130. } else {
  131. q->buffer_size = b43_piotx_read16(q, B43_PIO_TXQBUFSIZE);
  132. q->buffer_size -= 80;
  133. }
  134. INIT_LIST_HEAD(&q->packets_list);
  135. for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
  136. p = &(q->packets[i]);
  137. INIT_LIST_HEAD(&p->list);
  138. p->index = i;
  139. p->queue = q;
  140. list_add(&p->list, &q->packets_list);
  141. }
  142. return q;
  143. }
  144. static struct b43_pio_rxqueue *b43_setup_pioqueue_rx(struct b43_wldev *dev,
  145. unsigned int index)
  146. {
  147. struct b43_pio_rxqueue *q;
  148. q = kzalloc(sizeof(*q), GFP_KERNEL);
  149. if (!q)
  150. return NULL;
  151. q->dev = dev;
  152. q->rev = dev->dev->id.revision;
  153. q->mmio_base = index_to_pioqueue_base(dev, index) +
  154. pio_rxqueue_offset(dev);
  155. /* Enable Direct FIFO RX (PIO) on the engine. */
  156. b43_dma_direct_fifo_rx(dev, index, 1);
  157. return q;
  158. }
  159. static void b43_pio_cancel_tx_packets(struct b43_pio_txqueue *q)
  160. {
  161. struct b43_pio_txpacket *pack;
  162. unsigned int i;
  163. for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
  164. pack = &(q->packets[i]);
  165. if (pack->skb) {
  166. dev_kfree_skb_any(pack->skb);
  167. pack->skb = NULL;
  168. }
  169. }
  170. }
  171. static void b43_destroy_pioqueue_tx(struct b43_pio_txqueue *q,
  172. const char *name)
  173. {
  174. if (!q)
  175. return;
  176. b43_pio_cancel_tx_packets(q);
  177. kfree(q);
  178. }
  179. static void b43_destroy_pioqueue_rx(struct b43_pio_rxqueue *q,
  180. const char *name)
  181. {
  182. if (!q)
  183. return;
  184. kfree(q);
  185. }
  186. #define destroy_queue_tx(pio, queue) do { \
  187. b43_destroy_pioqueue_tx((pio)->queue, __stringify(queue)); \
  188. (pio)->queue = NULL; \
  189. } while (0)
  190. #define destroy_queue_rx(pio, queue) do { \
  191. b43_destroy_pioqueue_rx((pio)->queue, __stringify(queue)); \
  192. (pio)->queue = NULL; \
  193. } while (0)
  194. void b43_pio_free(struct b43_wldev *dev)
  195. {
  196. struct b43_pio *pio;
  197. if (!b43_using_pio_transfers(dev))
  198. return;
  199. pio = &dev->pio;
  200. destroy_queue_rx(pio, rx_queue);
  201. destroy_queue_tx(pio, tx_queue_mcast);
  202. destroy_queue_tx(pio, tx_queue_AC_VO);
  203. destroy_queue_tx(pio, tx_queue_AC_VI);
  204. destroy_queue_tx(pio, tx_queue_AC_BE);
  205. destroy_queue_tx(pio, tx_queue_AC_BK);
  206. }
  207. int b43_pio_init(struct b43_wldev *dev)
  208. {
  209. struct b43_pio *pio = &dev->pio;
  210. int err = -ENOMEM;
  211. b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
  212. & ~B43_MACCTL_BE);
  213. b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_RXPADOFF, 0);
  214. pio->tx_queue_AC_BK = b43_setup_pioqueue_tx(dev, 0);
  215. if (!pio->tx_queue_AC_BK)
  216. goto out;
  217. pio->tx_queue_AC_BE = b43_setup_pioqueue_tx(dev, 1);
  218. if (!pio->tx_queue_AC_BE)
  219. goto err_destroy_bk;
  220. pio->tx_queue_AC_VI = b43_setup_pioqueue_tx(dev, 2);
  221. if (!pio->tx_queue_AC_VI)
  222. goto err_destroy_be;
  223. pio->tx_queue_AC_VO = b43_setup_pioqueue_tx(dev, 3);
  224. if (!pio->tx_queue_AC_VO)
  225. goto err_destroy_vi;
  226. pio->tx_queue_mcast = b43_setup_pioqueue_tx(dev, 4);
  227. if (!pio->tx_queue_mcast)
  228. goto err_destroy_vo;
  229. pio->rx_queue = b43_setup_pioqueue_rx(dev, 0);
  230. if (!pio->rx_queue)
  231. goto err_destroy_mcast;
  232. b43dbg(dev->wl, "PIO initialized\n");
  233. err = 0;
  234. out:
  235. return err;
  236. err_destroy_mcast:
  237. destroy_queue_tx(pio, tx_queue_mcast);
  238. err_destroy_vo:
  239. destroy_queue_tx(pio, tx_queue_AC_VO);
  240. err_destroy_vi:
  241. destroy_queue_tx(pio, tx_queue_AC_VI);
  242. err_destroy_be:
  243. destroy_queue_tx(pio, tx_queue_AC_BE);
  244. err_destroy_bk:
  245. destroy_queue_tx(pio, tx_queue_AC_BK);
  246. return err;
  247. }
  248. /* Static mapping of mac80211's queues (priorities) to b43 PIO queues. */
  249. static struct b43_pio_txqueue *select_queue_by_priority(struct b43_wldev *dev,
  250. u8 queue_prio)
  251. {
  252. struct b43_pio_txqueue *q;
  253. if (dev->qos_enabled) {
  254. /* 0 = highest priority */
  255. switch (queue_prio) {
  256. default:
  257. B43_WARN_ON(1);
  258. /* fallthrough */
  259. case 0:
  260. q = dev->pio.tx_queue_AC_VO;
  261. break;
  262. case 1:
  263. q = dev->pio.tx_queue_AC_VI;
  264. break;
  265. case 2:
  266. q = dev->pio.tx_queue_AC_BE;
  267. break;
  268. case 3:
  269. q = dev->pio.tx_queue_AC_BK;
  270. break;
  271. }
  272. } else
  273. q = dev->pio.tx_queue_AC_BE;
  274. return q;
  275. }
  276. static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q,
  277. u16 ctl,
  278. const void *_data,
  279. unsigned int data_len)
  280. {
  281. struct b43_wldev *dev = q->dev;
  282. struct b43_wl *wl = dev->wl;
  283. const u8 *data = _data;
  284. ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI;
  285. b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
  286. ssb_block_write(dev->dev, data, (data_len & ~1),
  287. q->mmio_base + B43_PIO_TXDATA,
  288. sizeof(u16));
  289. if (data_len & 1) {
  290. u8 *tail = wl->pio_tailspace;
  291. BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 2);
  292. /* Write the last byte. */
  293. ctl &= ~B43_PIO_TXCTL_WRITEHI;
  294. b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
  295. tail[0] = data[data_len - 1];
  296. tail[1] = 0;
  297. ssb_block_write(dev->dev, tail, 2,
  298. q->mmio_base + B43_PIO_TXDATA,
  299. sizeof(u16));
  300. }
  301. return ctl;
  302. }
  303. static void pio_tx_frame_2byte_queue(struct b43_pio_txpacket *pack,
  304. const u8 *hdr, unsigned int hdrlen)
  305. {
  306. struct b43_pio_txqueue *q = pack->queue;
  307. const char *frame = pack->skb->data;
  308. unsigned int frame_len = pack->skb->len;
  309. u16 ctl;
  310. ctl = b43_piotx_read16(q, B43_PIO_TXCTL);
  311. ctl |= B43_PIO_TXCTL_FREADY;
  312. ctl &= ~B43_PIO_TXCTL_EOF;
  313. /* Transfer the header data. */
  314. ctl = tx_write_2byte_queue(q, ctl, hdr, hdrlen);
  315. /* Transfer the frame data. */
  316. ctl = tx_write_2byte_queue(q, ctl, frame, frame_len);
  317. ctl |= B43_PIO_TXCTL_EOF;
  318. b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
  319. }
  320. static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q,
  321. u32 ctl,
  322. const void *_data,
  323. unsigned int data_len)
  324. {
  325. struct b43_wldev *dev = q->dev;
  326. struct b43_wl *wl = dev->wl;
  327. const u8 *data = _data;
  328. ctl |= B43_PIO8_TXCTL_0_7 | B43_PIO8_TXCTL_8_15 |
  329. B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_24_31;
  330. b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
  331. ssb_block_write(dev->dev, data, (data_len & ~3),
  332. q->mmio_base + B43_PIO8_TXDATA,
  333. sizeof(u32));
  334. if (data_len & 3) {
  335. u8 *tail = wl->pio_tailspace;
  336. BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 4);
  337. memset(tail, 0, 4);
  338. /* Write the last few bytes. */
  339. ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 |
  340. B43_PIO8_TXCTL_24_31);
  341. switch (data_len & 3) {
  342. case 3:
  343. ctl |= B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_8_15;
  344. tail[0] = data[data_len - 3];
  345. tail[1] = data[data_len - 2];
  346. tail[2] = data[data_len - 1];
  347. break;
  348. case 2:
  349. ctl |= B43_PIO8_TXCTL_8_15;
  350. tail[0] = data[data_len - 2];
  351. tail[1] = data[data_len - 1];
  352. break;
  353. case 1:
  354. tail[0] = data[data_len - 1];
  355. break;
  356. }
  357. b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
  358. ssb_block_write(dev->dev, tail, 4,
  359. q->mmio_base + B43_PIO8_TXDATA,
  360. sizeof(u32));
  361. }
  362. return ctl;
  363. }
  364. static void pio_tx_frame_4byte_queue(struct b43_pio_txpacket *pack,
  365. const u8 *hdr, unsigned int hdrlen)
  366. {
  367. struct b43_pio_txqueue *q = pack->queue;
  368. const char *frame = pack->skb->data;
  369. unsigned int frame_len = pack->skb->len;
  370. u32 ctl;
  371. ctl = b43_piotx_read32(q, B43_PIO8_TXCTL);
  372. ctl |= B43_PIO8_TXCTL_FREADY;
  373. ctl &= ~B43_PIO8_TXCTL_EOF;
  374. /* Transfer the header data. */
  375. ctl = tx_write_4byte_queue(q, ctl, hdr, hdrlen);
  376. /* Transfer the frame data. */
  377. ctl = tx_write_4byte_queue(q, ctl, frame, frame_len);
  378. ctl |= B43_PIO8_TXCTL_EOF;
  379. b43_piotx_write32(q, B43_PIO_TXCTL, ctl);
  380. }
  381. static int pio_tx_frame(struct b43_pio_txqueue *q,
  382. struct sk_buff *skb)
  383. {
  384. struct b43_wldev *dev = q->dev;
  385. struct b43_wl *wl = dev->wl;
  386. struct b43_pio_txpacket *pack;
  387. u16 cookie;
  388. int err;
  389. unsigned int hdrlen;
  390. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  391. struct b43_txhdr *txhdr = (struct b43_txhdr *)wl->pio_scratchspace;
  392. B43_WARN_ON(list_empty(&q->packets_list));
  393. pack = list_entry(q->packets_list.next,
  394. struct b43_pio_txpacket, list);
  395. cookie = generate_cookie(q, pack);
  396. hdrlen = b43_txhdr_size(dev);
  397. BUILD_BUG_ON(sizeof(wl->pio_scratchspace) < sizeof(struct b43_txhdr));
  398. B43_WARN_ON(sizeof(wl->pio_scratchspace) < hdrlen);
  399. err = b43_generate_txhdr(dev, (u8 *)txhdr, skb,
  400. info, cookie);
  401. if (err)
  402. return err;
  403. if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
  404. /* Tell the firmware about the cookie of the last
  405. * mcast frame, so it can clear the more-data bit in it. */
  406. b43_shm_write16(dev, B43_SHM_SHARED,
  407. B43_SHM_SH_MCASTCOOKIE, cookie);
  408. }
  409. pack->skb = skb;
  410. if (q->rev >= 8)
  411. pio_tx_frame_4byte_queue(pack, (const u8 *)txhdr, hdrlen);
  412. else
  413. pio_tx_frame_2byte_queue(pack, (const u8 *)txhdr, hdrlen);
  414. /* Remove it from the list of available packet slots.
  415. * It will be put back when we receive the status report. */
  416. list_del(&pack->list);
  417. /* Update the queue statistics. */
  418. q->buffer_used += roundup(skb->len + hdrlen, 4);
  419. q->free_packet_slots -= 1;
  420. return 0;
  421. }
  422. int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb)
  423. {
  424. struct b43_pio_txqueue *q;
  425. struct ieee80211_hdr *hdr;
  426. unsigned int hdrlen, total_len;
  427. int err = 0;
  428. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  429. hdr = (struct ieee80211_hdr *)skb->data;
  430. if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
  431. /* The multicast queue will be sent after the DTIM. */
  432. q = dev->pio.tx_queue_mcast;
  433. /* Set the frame More-Data bit. Ucode will clear it
  434. * for us on the last frame. */
  435. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
  436. } else {
  437. /* Decide by priority where to put this frame. */
  438. q = select_queue_by_priority(dev, skb_get_queue_mapping(skb));
  439. }
  440. hdrlen = b43_txhdr_size(dev);
  441. total_len = roundup(skb->len + hdrlen, 4);
  442. if (unlikely(total_len > q->buffer_size)) {
  443. err = -ENOBUFS;
  444. b43dbg(dev->wl, "PIO: TX packet longer than queue.\n");
  445. goto out;
  446. }
  447. if (unlikely(q->free_packet_slots == 0)) {
  448. err = -ENOBUFS;
  449. b43warn(dev->wl, "PIO: TX packet overflow.\n");
  450. goto out;
  451. }
  452. B43_WARN_ON(q->buffer_used > q->buffer_size);
  453. if (total_len > (q->buffer_size - q->buffer_used)) {
  454. /* Not enough memory on the queue. */
  455. err = -EBUSY;
  456. ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
  457. q->stopped = 1;
  458. goto out;
  459. }
  460. /* Assign the queue number to the ring (if not already done before)
  461. * so TX status handling can use it. The mac80211-queue to b43-queue
  462. * mapping is static, so we don't need to store it per frame. */
  463. q->queue_prio = skb_get_queue_mapping(skb);
  464. err = pio_tx_frame(q, skb);
  465. if (unlikely(err == -ENOKEY)) {
  466. /* Drop this packet, as we don't have the encryption key
  467. * anymore and must not transmit it unencrypted. */
  468. dev_kfree_skb_any(skb);
  469. err = 0;
  470. goto out;
  471. }
  472. if (unlikely(err)) {
  473. b43err(dev->wl, "PIO transmission failure\n");
  474. goto out;
  475. }
  476. q->nr_tx_packets++;
  477. B43_WARN_ON(q->buffer_used > q->buffer_size);
  478. if (((q->buffer_size - q->buffer_used) < roundup(2 + 2 + 6, 4)) ||
  479. (q->free_packet_slots == 0)) {
  480. /* The queue is full. */
  481. ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
  482. q->stopped = 1;
  483. }
  484. out:
  485. return err;
  486. }
  487. void b43_pio_handle_txstatus(struct b43_wldev *dev,
  488. const struct b43_txstatus *status)
  489. {
  490. struct b43_pio_txqueue *q;
  491. struct b43_pio_txpacket *pack = NULL;
  492. unsigned int total_len;
  493. struct ieee80211_tx_info *info;
  494. q = parse_cookie(dev, status->cookie, &pack);
  495. if (unlikely(!q))
  496. return;
  497. B43_WARN_ON(!pack);
  498. info = IEEE80211_SKB_CB(pack->skb);
  499. b43_fill_txstatus_report(dev, info, status);
  500. total_len = pack->skb->len + b43_txhdr_size(dev);
  501. total_len = roundup(total_len, 4);
  502. q->buffer_used -= total_len;
  503. q->free_packet_slots += 1;
  504. ieee80211_tx_status(dev->wl->hw, pack->skb);
  505. pack->skb = NULL;
  506. list_add(&pack->list, &q->packets_list);
  507. if (q->stopped) {
  508. ieee80211_wake_queue(dev->wl->hw, q->queue_prio);
  509. q->stopped = 0;
  510. }
  511. }
  512. void b43_pio_get_tx_stats(struct b43_wldev *dev,
  513. struct ieee80211_tx_queue_stats *stats)
  514. {
  515. const int nr_queues = dev->wl->hw->queues;
  516. struct b43_pio_txqueue *q;
  517. int i;
  518. for (i = 0; i < nr_queues; i++) {
  519. q = select_queue_by_priority(dev, i);
  520. stats[i].len = B43_PIO_MAX_NR_TXPACKETS - q->free_packet_slots;
  521. stats[i].limit = B43_PIO_MAX_NR_TXPACKETS;
  522. stats[i].count = q->nr_tx_packets;
  523. }
  524. }
  525. /* Returns whether we should fetch another frame. */
  526. static bool pio_rx_frame(struct b43_pio_rxqueue *q)
  527. {
  528. struct b43_wldev *dev = q->dev;
  529. struct b43_wl *wl = dev->wl;
  530. u16 len;
  531. u32 macstat;
  532. unsigned int i, padding;
  533. struct sk_buff *skb;
  534. const char *err_msg = NULL;
  535. struct b43_rxhdr_fw4 *rxhdr =
  536. (struct b43_rxhdr_fw4 *)wl->pio_scratchspace;
  537. BUILD_BUG_ON(sizeof(wl->pio_scratchspace) < sizeof(*rxhdr));
  538. memset(rxhdr, 0, sizeof(*rxhdr));
  539. /* Check if we have data and wait for it to get ready. */
  540. if (q->rev >= 8) {
  541. u32 ctl;
  542. ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
  543. if (!(ctl & B43_PIO8_RXCTL_FRAMERDY))
  544. return 0;
  545. b43_piorx_write32(q, B43_PIO8_RXCTL,
  546. B43_PIO8_RXCTL_FRAMERDY);
  547. for (i = 0; i < 10; i++) {
  548. ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
  549. if (ctl & B43_PIO8_RXCTL_DATARDY)
  550. goto data_ready;
  551. udelay(10);
  552. }
  553. } else {
  554. u16 ctl;
  555. ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
  556. if (!(ctl & B43_PIO_RXCTL_FRAMERDY))
  557. return 0;
  558. b43_piorx_write16(q, B43_PIO_RXCTL,
  559. B43_PIO_RXCTL_FRAMERDY);
  560. for (i = 0; i < 10; i++) {
  561. ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
  562. if (ctl & B43_PIO_RXCTL_DATARDY)
  563. goto data_ready;
  564. udelay(10);
  565. }
  566. }
  567. b43dbg(q->dev->wl, "PIO RX timed out\n");
  568. return 1;
  569. data_ready:
  570. /* Get the preamble (RX header) */
  571. if (q->rev >= 8) {
  572. ssb_block_read(dev->dev, rxhdr, sizeof(*rxhdr),
  573. q->mmio_base + B43_PIO8_RXDATA,
  574. sizeof(u32));
  575. } else {
  576. ssb_block_read(dev->dev, rxhdr, sizeof(*rxhdr),
  577. q->mmio_base + B43_PIO_RXDATA,
  578. sizeof(u16));
  579. }
  580. /* Sanity checks. */
  581. len = le16_to_cpu(rxhdr->frame_len);
  582. if (unlikely(len > 0x700)) {
  583. err_msg = "len > 0x700";
  584. goto rx_error;
  585. }
  586. if (unlikely(len == 0)) {
  587. err_msg = "len == 0";
  588. goto rx_error;
  589. }
  590. macstat = le32_to_cpu(rxhdr->mac_status);
  591. if (macstat & B43_RX_MAC_FCSERR) {
  592. if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) {
  593. /* Drop frames with failed FCS. */
  594. err_msg = "Frame FCS error";
  595. goto rx_error;
  596. }
  597. }
  598. /* We always pad 2 bytes, as that's what upstream code expects
  599. * due to the RX-header being 30 bytes. In case the frame is
  600. * unaligned, we pad another 2 bytes. */
  601. padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0;
  602. skb = dev_alloc_skb(len + padding + 2);
  603. if (unlikely(!skb)) {
  604. err_msg = "Out of memory";
  605. goto rx_error;
  606. }
  607. skb_reserve(skb, 2);
  608. skb_put(skb, len + padding);
  609. if (q->rev >= 8) {
  610. ssb_block_read(dev->dev, skb->data + padding, (len & ~3),
  611. q->mmio_base + B43_PIO8_RXDATA,
  612. sizeof(u32));
  613. if (len & 3) {
  614. u8 *tail = wl->pio_tailspace;
  615. BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 4);
  616. /* Read the last few bytes. */
  617. ssb_block_read(dev->dev, tail, 4,
  618. q->mmio_base + B43_PIO8_RXDATA,
  619. sizeof(u32));
  620. switch (len & 3) {
  621. case 3:
  622. skb->data[len + padding - 3] = tail[0];
  623. skb->data[len + padding - 2] = tail[1];
  624. skb->data[len + padding - 1] = tail[2];
  625. break;
  626. case 2:
  627. skb->data[len + padding - 2] = tail[0];
  628. skb->data[len + padding - 1] = tail[1];
  629. break;
  630. case 1:
  631. skb->data[len + padding - 1] = tail[0];
  632. break;
  633. }
  634. }
  635. } else {
  636. ssb_block_read(dev->dev, skb->data + padding, (len & ~1),
  637. q->mmio_base + B43_PIO_RXDATA,
  638. sizeof(u16));
  639. if (len & 1) {
  640. u8 *tail = wl->pio_tailspace;
  641. BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 2);
  642. /* Read the last byte. */
  643. ssb_block_read(dev->dev, tail, 2,
  644. q->mmio_base + B43_PIO_RXDATA,
  645. sizeof(u16));
  646. skb->data[len + padding - 1] = tail[0];
  647. }
  648. }
  649. b43_rx(q->dev, skb, rxhdr);
  650. return 1;
  651. rx_error:
  652. if (err_msg)
  653. b43dbg(q->dev->wl, "PIO RX error: %s\n", err_msg);
  654. if (q->rev >= 8)
  655. b43_piorx_write32(q, B43_PIO8_RXCTL, B43_PIO8_RXCTL_DATARDY);
  656. else
  657. b43_piorx_write16(q, B43_PIO_RXCTL, B43_PIO_RXCTL_DATARDY);
  658. return 1;
  659. }
  660. void b43_pio_rx(struct b43_pio_rxqueue *q)
  661. {
  662. unsigned int count = 0;
  663. bool stop;
  664. while (1) {
  665. stop = (pio_rx_frame(q) == 0);
  666. if (stop)
  667. break;
  668. cond_resched();
  669. if (WARN_ON_ONCE(++count > 10000))
  670. break;
  671. }
  672. }
  673. static void b43_pio_tx_suspend_queue(struct b43_pio_txqueue *q)
  674. {
  675. if (q->rev >= 8) {
  676. b43_piotx_write32(q, B43_PIO8_TXCTL,
  677. b43_piotx_read32(q, B43_PIO8_TXCTL)
  678. | B43_PIO8_TXCTL_SUSPREQ);
  679. } else {
  680. b43_piotx_write16(q, B43_PIO_TXCTL,
  681. b43_piotx_read16(q, B43_PIO_TXCTL)
  682. | B43_PIO_TXCTL_SUSPREQ);
  683. }
  684. }
  685. static void b43_pio_tx_resume_queue(struct b43_pio_txqueue *q)
  686. {
  687. if (q->rev >= 8) {
  688. b43_piotx_write32(q, B43_PIO8_TXCTL,
  689. b43_piotx_read32(q, B43_PIO8_TXCTL)
  690. & ~B43_PIO8_TXCTL_SUSPREQ);
  691. } else {
  692. b43_piotx_write16(q, B43_PIO_TXCTL,
  693. b43_piotx_read16(q, B43_PIO_TXCTL)
  694. & ~B43_PIO_TXCTL_SUSPREQ);
  695. }
  696. }
  697. void b43_pio_tx_suspend(struct b43_wldev *dev)
  698. {
  699. b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
  700. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BK);
  701. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BE);
  702. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VI);
  703. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VO);
  704. b43_pio_tx_suspend_queue(dev->pio.tx_queue_mcast);
  705. }
  706. void b43_pio_tx_resume(struct b43_wldev *dev)
  707. {
  708. b43_pio_tx_resume_queue(dev->pio.tx_queue_mcast);
  709. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VO);
  710. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VI);
  711. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BE);
  712. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BK);
  713. b43_power_saving_ctl_bits(dev, 0);
  714. }