uda1380.c 25 KB

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  1. /*
  2. * uda1380.c - Philips UDA1380 ALSA SoC audio driver
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
  9. * Improved support for DAPM and audio routing/mixing capabilities,
  10. * added TLV support.
  11. *
  12. * Modified by Richard Purdie <richard@openedhand.com> to fit into SoC
  13. * codec model.
  14. *
  15. * Copyright (c) 2005 Giorgio Padrin <giorgio@mandarinlogiq.org>
  16. * Copyright 2005 Openedhand Ltd.
  17. */
  18. #include <linux/module.h>
  19. #include <linux/init.h>
  20. #include <linux/types.h>
  21. #include <linux/string.h>
  22. #include <linux/slab.h>
  23. #include <linux/errno.h>
  24. #include <linux/ioctl.h>
  25. #include <linux/delay.h>
  26. #include <linux/i2c.h>
  27. #include <sound/core.h>
  28. #include <sound/control.h>
  29. #include <sound/initval.h>
  30. #include <sound/info.h>
  31. #include <sound/soc.h>
  32. #include <sound/soc-dapm.h>
  33. #include <sound/tlv.h>
  34. #include "uda1380.h"
  35. /*
  36. * uda1380 register cache
  37. */
  38. static const u16 uda1380_reg[UDA1380_CACHEREGNUM] = {
  39. 0x0502, 0x0000, 0x0000, 0x3f3f,
  40. 0x0202, 0x0000, 0x0000, 0x0000,
  41. 0x0000, 0x0000, 0x0000, 0x0000,
  42. 0x0000, 0x0000, 0x0000, 0x0000,
  43. 0x0000, 0xff00, 0x0000, 0x4800,
  44. 0x0000, 0x0000, 0x0000, 0x0000,
  45. 0x0000, 0x0000, 0x0000, 0x0000,
  46. 0x0000, 0x0000, 0x0000, 0x0000,
  47. 0x0000, 0x8000, 0x0002, 0x0000,
  48. };
  49. /*
  50. * read uda1380 register cache
  51. */
  52. static inline unsigned int uda1380_read_reg_cache(struct snd_soc_codec *codec,
  53. unsigned int reg)
  54. {
  55. u16 *cache = codec->reg_cache;
  56. if (reg == UDA1380_RESET)
  57. return 0;
  58. if (reg >= UDA1380_CACHEREGNUM)
  59. return -1;
  60. return cache[reg];
  61. }
  62. /*
  63. * write uda1380 register cache
  64. */
  65. static inline void uda1380_write_reg_cache(struct snd_soc_codec *codec,
  66. u16 reg, unsigned int value)
  67. {
  68. u16 *cache = codec->reg_cache;
  69. if (reg >= UDA1380_CACHEREGNUM)
  70. return;
  71. cache[reg] = value;
  72. }
  73. /*
  74. * write to the UDA1380 register space
  75. */
  76. static int uda1380_write(struct snd_soc_codec *codec, unsigned int reg,
  77. unsigned int value)
  78. {
  79. u8 data[3];
  80. /* data is
  81. * data[0] is register offset
  82. * data[1] is MS byte
  83. * data[2] is LS byte
  84. */
  85. data[0] = reg;
  86. data[1] = (value & 0xff00) >> 8;
  87. data[2] = value & 0x00ff;
  88. uda1380_write_reg_cache(codec, reg, value);
  89. /* the interpolator & decimator regs must only be written when the
  90. * codec DAI is active.
  91. */
  92. if (!codec->active && (reg >= UDA1380_MVOL))
  93. return 0;
  94. pr_debug("uda1380: hw write %x val %x\n", reg, value);
  95. if (codec->hw_write(codec->control_data, data, 3) == 3) {
  96. unsigned int val;
  97. i2c_master_send(codec->control_data, data, 1);
  98. i2c_master_recv(codec->control_data, data, 2);
  99. val = (data[0]<<8) | data[1];
  100. if (val != value) {
  101. pr_debug("uda1380: READ BACK VAL %x\n",
  102. (data[0]<<8) | data[1]);
  103. return -EIO;
  104. }
  105. return 0;
  106. } else
  107. return -EIO;
  108. }
  109. #define uda1380_reset(c) uda1380_write(c, UDA1380_RESET, 0)
  110. /* declarations of ALSA reg_elem_REAL controls */
  111. static const char *uda1380_deemp[] = {
  112. "None",
  113. "32kHz",
  114. "44.1kHz",
  115. "48kHz",
  116. "96kHz",
  117. };
  118. static const char *uda1380_input_sel[] = {
  119. "Line",
  120. "Mic + Line R",
  121. "Line L",
  122. "Mic",
  123. };
  124. static const char *uda1380_output_sel[] = {
  125. "DAC",
  126. "Analog Mixer",
  127. };
  128. static const char *uda1380_spf_mode[] = {
  129. "Flat",
  130. "Minimum1",
  131. "Minimum2",
  132. "Maximum"
  133. };
  134. static const char *uda1380_capture_sel[] = {
  135. "ADC",
  136. "Digital Mixer"
  137. };
  138. static const char *uda1380_sel_ns[] = {
  139. "3rd-order",
  140. "5th-order"
  141. };
  142. static const char *uda1380_mix_control[] = {
  143. "off",
  144. "PCM only",
  145. "before sound processing",
  146. "after sound processing"
  147. };
  148. static const char *uda1380_sdet_setting[] = {
  149. "3200",
  150. "4800",
  151. "9600",
  152. "19200"
  153. };
  154. static const char *uda1380_os_setting[] = {
  155. "single-speed",
  156. "double-speed (no mixing)",
  157. "quad-speed (no mixing)"
  158. };
  159. static const struct soc_enum uda1380_deemp_enum[] = {
  160. SOC_ENUM_SINGLE(UDA1380_DEEMP, 8, 5, uda1380_deemp),
  161. SOC_ENUM_SINGLE(UDA1380_DEEMP, 0, 5, uda1380_deemp),
  162. };
  163. static const struct soc_enum uda1380_input_sel_enum =
  164. SOC_ENUM_SINGLE(UDA1380_ADC, 2, 4, uda1380_input_sel); /* SEL_MIC, SEL_LNA */
  165. static const struct soc_enum uda1380_output_sel_enum =
  166. SOC_ENUM_SINGLE(UDA1380_PM, 7, 2, uda1380_output_sel); /* R02_EN_AVC */
  167. static const struct soc_enum uda1380_spf_enum =
  168. SOC_ENUM_SINGLE(UDA1380_MODE, 14, 4, uda1380_spf_mode); /* M */
  169. static const struct soc_enum uda1380_capture_sel_enum =
  170. SOC_ENUM_SINGLE(UDA1380_IFACE, 6, 2, uda1380_capture_sel); /* SEL_SOURCE */
  171. static const struct soc_enum uda1380_sel_ns_enum =
  172. SOC_ENUM_SINGLE(UDA1380_MIXER, 14, 2, uda1380_sel_ns); /* SEL_NS */
  173. static const struct soc_enum uda1380_mix_enum =
  174. SOC_ENUM_SINGLE(UDA1380_MIXER, 12, 4, uda1380_mix_control); /* MIX, MIX_POS */
  175. static const struct soc_enum uda1380_sdet_enum =
  176. SOC_ENUM_SINGLE(UDA1380_MIXER, 4, 4, uda1380_sdet_setting); /* SD_VALUE */
  177. static const struct soc_enum uda1380_os_enum =
  178. SOC_ENUM_SINGLE(UDA1380_MIXER, 0, 3, uda1380_os_setting); /* OS */
  179. /*
  180. * from -48 dB in 1.5 dB steps (mute instead of -49.5 dB)
  181. */
  182. static DECLARE_TLV_DB_SCALE(amix_tlv, -4950, 150, 1);
  183. /*
  184. * from -78 dB in 1 dB steps (3 dB steps, really. LSB are ignored),
  185. * from -66 dB in 0.5 dB steps (2 dB steps, really) and
  186. * from -52 dB in 0.25 dB steps
  187. */
  188. static const unsigned int mvol_tlv[] = {
  189. TLV_DB_RANGE_HEAD(3),
  190. 0, 15, TLV_DB_SCALE_ITEM(-8200, 100, 1),
  191. 16, 43, TLV_DB_SCALE_ITEM(-6600, 50, 0),
  192. 44, 252, TLV_DB_SCALE_ITEM(-5200, 25, 0),
  193. };
  194. /*
  195. * from -72 dB in 1.5 dB steps (6 dB steps really),
  196. * from -66 dB in 0.75 dB steps (3 dB steps really),
  197. * from -60 dB in 0.5 dB steps (2 dB steps really) and
  198. * from -46 dB in 0.25 dB steps
  199. */
  200. static const unsigned int vc_tlv[] = {
  201. TLV_DB_RANGE_HEAD(4),
  202. 0, 7, TLV_DB_SCALE_ITEM(-7800, 150, 1),
  203. 8, 15, TLV_DB_SCALE_ITEM(-6600, 75, 0),
  204. 16, 43, TLV_DB_SCALE_ITEM(-6000, 50, 0),
  205. 44, 228, TLV_DB_SCALE_ITEM(-4600, 25, 0),
  206. };
  207. /* from 0 to 6 dB in 2 dB steps if SPF mode != flat */
  208. static DECLARE_TLV_DB_SCALE(tr_tlv, 0, 200, 0);
  209. /* from 0 to 24 dB in 2 dB steps, if SPF mode == maximum, otherwise cuts
  210. * off at 18 dB max) */
  211. static DECLARE_TLV_DB_SCALE(bb_tlv, 0, 200, 0);
  212. /* from -63 to 24 dB in 0.5 dB steps (-128...48) */
  213. static DECLARE_TLV_DB_SCALE(dec_tlv, -6400, 50, 1);
  214. /* from 0 to 24 dB in 3 dB steps */
  215. static DECLARE_TLV_DB_SCALE(pga_tlv, 0, 300, 0);
  216. /* from 0 to 30 dB in 2 dB steps */
  217. static DECLARE_TLV_DB_SCALE(vga_tlv, 0, 200, 0);
  218. static const struct snd_kcontrol_new uda1380_snd_controls[] = {
  219. SOC_DOUBLE_TLV("Analog Mixer Volume", UDA1380_AMIX, 0, 8, 44, 1, amix_tlv), /* AVCR, AVCL */
  220. SOC_DOUBLE_TLV("Master Playback Volume", UDA1380_MVOL, 0, 8, 252, 1, mvol_tlv), /* MVCL, MVCR */
  221. SOC_SINGLE_TLV("ADC Playback Volume", UDA1380_MIXVOL, 8, 228, 1, vc_tlv), /* VC2 */
  222. SOC_SINGLE_TLV("PCM Playback Volume", UDA1380_MIXVOL, 0, 228, 1, vc_tlv), /* VC1 */
  223. SOC_ENUM("Sound Processing Filter", uda1380_spf_enum), /* M */
  224. SOC_DOUBLE_TLV("Tone Control - Treble", UDA1380_MODE, 4, 12, 3, 0, tr_tlv), /* TRL, TRR */
  225. SOC_DOUBLE_TLV("Tone Control - Bass", UDA1380_MODE, 0, 8, 15, 0, bb_tlv), /* BBL, BBR */
  226. /**/ SOC_SINGLE("Master Playback Switch", UDA1380_DEEMP, 14, 1, 1), /* MTM */
  227. SOC_SINGLE("ADC Playback Switch", UDA1380_DEEMP, 11, 1, 1), /* MT2 from decimation filter */
  228. SOC_ENUM("ADC Playback De-emphasis", uda1380_deemp_enum[0]), /* DE2 */
  229. SOC_SINGLE("PCM Playback Switch", UDA1380_DEEMP, 3, 1, 1), /* MT1, from digital data input */
  230. SOC_ENUM("PCM Playback De-emphasis", uda1380_deemp_enum[1]), /* DE1 */
  231. SOC_SINGLE("DAC Polarity inverting Switch", UDA1380_MIXER, 15, 1, 0), /* DA_POL_INV */
  232. SOC_ENUM("Noise Shaper", uda1380_sel_ns_enum), /* SEL_NS */
  233. SOC_ENUM("Digital Mixer Signal Control", uda1380_mix_enum), /* MIX_POS, MIX */
  234. SOC_SINGLE("Silence Switch", UDA1380_MIXER, 7, 1, 0), /* SILENCE, force DAC output to silence */
  235. SOC_SINGLE("Silence Detector Switch", UDA1380_MIXER, 6, 1, 0), /* SDET_ON */
  236. SOC_ENUM("Silence Detector Setting", uda1380_sdet_enum), /* SD_VALUE */
  237. SOC_ENUM("Oversampling Input", uda1380_os_enum), /* OS */
  238. SOC_DOUBLE_S8_TLV("ADC Capture Volume", UDA1380_DEC, -128, 48, dec_tlv), /* ML_DEC, MR_DEC */
  239. /**/ SOC_SINGLE("ADC Capture Switch", UDA1380_PGA, 15, 1, 1), /* MT_ADC */
  240. SOC_DOUBLE_TLV("Line Capture Volume", UDA1380_PGA, 0, 8, 8, 0, pga_tlv), /* PGA_GAINCTRLL, PGA_GAINCTRLR */
  241. SOC_SINGLE("ADC Polarity inverting Switch", UDA1380_ADC, 12, 1, 0), /* ADCPOL_INV */
  242. SOC_SINGLE_TLV("Mic Capture Volume", UDA1380_ADC, 8, 15, 0, vga_tlv), /* VGA_CTRL */
  243. SOC_SINGLE("DC Filter Bypass Switch", UDA1380_ADC, 1, 1, 0), /* SKIP_DCFIL (before decimator) */
  244. SOC_SINGLE("DC Filter Enable Switch", UDA1380_ADC, 0, 1, 0), /* EN_DCFIL (at output of decimator) */
  245. SOC_SINGLE("AGC Timing", UDA1380_AGC, 8, 7, 0), /* TODO: enum, see table 62 */
  246. SOC_SINGLE("AGC Target level", UDA1380_AGC, 2, 3, 1), /* AGC_LEVEL */
  247. /* -5.5, -8, -11.5, -14 dBFS */
  248. SOC_SINGLE("AGC Switch", UDA1380_AGC, 0, 1, 0),
  249. };
  250. /* Input mux */
  251. static const struct snd_kcontrol_new uda1380_input_mux_control =
  252. SOC_DAPM_ENUM("Route", uda1380_input_sel_enum);
  253. /* Output mux */
  254. static const struct snd_kcontrol_new uda1380_output_mux_control =
  255. SOC_DAPM_ENUM("Route", uda1380_output_sel_enum);
  256. /* Capture mux */
  257. static const struct snd_kcontrol_new uda1380_capture_mux_control =
  258. SOC_DAPM_ENUM("Route", uda1380_capture_sel_enum);
  259. static const struct snd_soc_dapm_widget uda1380_dapm_widgets[] = {
  260. SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0,
  261. &uda1380_input_mux_control),
  262. SND_SOC_DAPM_MUX("Output Mux", SND_SOC_NOPM, 0, 0,
  263. &uda1380_output_mux_control),
  264. SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0,
  265. &uda1380_capture_mux_control),
  266. SND_SOC_DAPM_PGA("Left PGA", UDA1380_PM, 3, 0, NULL, 0),
  267. SND_SOC_DAPM_PGA("Right PGA", UDA1380_PM, 1, 0, NULL, 0),
  268. SND_SOC_DAPM_PGA("Mic LNA", UDA1380_PM, 4, 0, NULL, 0),
  269. SND_SOC_DAPM_ADC("Left ADC", "Left Capture", UDA1380_PM, 2, 0),
  270. SND_SOC_DAPM_ADC("Right ADC", "Right Capture", UDA1380_PM, 0, 0),
  271. SND_SOC_DAPM_INPUT("VINM"),
  272. SND_SOC_DAPM_INPUT("VINL"),
  273. SND_SOC_DAPM_INPUT("VINR"),
  274. SND_SOC_DAPM_MIXER("Analog Mixer", UDA1380_PM, 6, 0, NULL, 0),
  275. SND_SOC_DAPM_OUTPUT("VOUTLHP"),
  276. SND_SOC_DAPM_OUTPUT("VOUTRHP"),
  277. SND_SOC_DAPM_OUTPUT("VOUTL"),
  278. SND_SOC_DAPM_OUTPUT("VOUTR"),
  279. SND_SOC_DAPM_DAC("DAC", "Playback", UDA1380_PM, 10, 0),
  280. SND_SOC_DAPM_PGA("HeadPhone Driver", UDA1380_PM, 13, 0, NULL, 0),
  281. };
  282. static const struct snd_soc_dapm_route audio_map[] = {
  283. /* output mux */
  284. {"HeadPhone Driver", NULL, "Output Mux"},
  285. {"VOUTR", NULL, "Output Mux"},
  286. {"VOUTL", NULL, "Output Mux"},
  287. {"Analog Mixer", NULL, "VINR"},
  288. {"Analog Mixer", NULL, "VINL"},
  289. {"Analog Mixer", NULL, "DAC"},
  290. {"Output Mux", "DAC", "DAC"},
  291. {"Output Mux", "Analog Mixer", "Analog Mixer"},
  292. /* {"DAC", "Digital Mixer", "I2S" } */
  293. /* headphone driver */
  294. {"VOUTLHP", NULL, "HeadPhone Driver"},
  295. {"VOUTRHP", NULL, "HeadPhone Driver"},
  296. /* input mux */
  297. {"Left ADC", NULL, "Input Mux"},
  298. {"Input Mux", "Mic", "Mic LNA"},
  299. {"Input Mux", "Mic + Line R", "Mic LNA"},
  300. {"Input Mux", "Line L", "Left PGA"},
  301. {"Input Mux", "Line", "Left PGA"},
  302. /* right input */
  303. {"Right ADC", "Mic + Line R", "Right PGA"},
  304. {"Right ADC", "Line", "Right PGA"},
  305. /* inputs */
  306. {"Mic LNA", NULL, "VINM"},
  307. {"Left PGA", NULL, "VINL"},
  308. {"Right PGA", NULL, "VINR"},
  309. };
  310. static int uda1380_add_widgets(struct snd_soc_codec *codec)
  311. {
  312. snd_soc_dapm_new_controls(codec, uda1380_dapm_widgets,
  313. ARRAY_SIZE(uda1380_dapm_widgets));
  314. snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
  315. snd_soc_dapm_new_widgets(codec);
  316. return 0;
  317. }
  318. static int uda1380_set_dai_fmt_both(struct snd_soc_dai *codec_dai,
  319. unsigned int fmt)
  320. {
  321. struct snd_soc_codec *codec = codec_dai->codec;
  322. int iface;
  323. /* set up DAI based upon fmt */
  324. iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
  325. iface &= ~(R01_SFORI_MASK | R01_SIM | R01_SFORO_MASK);
  326. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  327. case SND_SOC_DAIFMT_I2S:
  328. iface |= R01_SFORI_I2S | R01_SFORO_I2S;
  329. break;
  330. case SND_SOC_DAIFMT_LSB:
  331. iface |= R01_SFORI_LSB16 | R01_SFORO_LSB16;
  332. break;
  333. case SND_SOC_DAIFMT_MSB:
  334. iface |= R01_SFORI_MSB | R01_SFORO_MSB;
  335. }
  336. if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
  337. iface |= R01_SIM;
  338. uda1380_write(codec, UDA1380_IFACE, iface);
  339. return 0;
  340. }
  341. static int uda1380_set_dai_fmt_playback(struct snd_soc_dai *codec_dai,
  342. unsigned int fmt)
  343. {
  344. struct snd_soc_codec *codec = codec_dai->codec;
  345. int iface;
  346. /* set up DAI based upon fmt */
  347. iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
  348. iface &= ~R01_SFORI_MASK;
  349. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  350. case SND_SOC_DAIFMT_I2S:
  351. iface |= R01_SFORI_I2S;
  352. break;
  353. case SND_SOC_DAIFMT_LSB:
  354. iface |= R01_SFORI_LSB16;
  355. break;
  356. case SND_SOC_DAIFMT_MSB:
  357. iface |= R01_SFORI_MSB;
  358. }
  359. uda1380_write(codec, UDA1380_IFACE, iface);
  360. return 0;
  361. }
  362. static int uda1380_set_dai_fmt_capture(struct snd_soc_dai *codec_dai,
  363. unsigned int fmt)
  364. {
  365. struct snd_soc_codec *codec = codec_dai->codec;
  366. int iface;
  367. /* set up DAI based upon fmt */
  368. iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
  369. iface &= ~(R01_SIM | R01_SFORO_MASK);
  370. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  371. case SND_SOC_DAIFMT_I2S:
  372. iface |= R01_SFORO_I2S;
  373. break;
  374. case SND_SOC_DAIFMT_LSB:
  375. iface |= R01_SFORO_LSB16;
  376. break;
  377. case SND_SOC_DAIFMT_MSB:
  378. iface |= R01_SFORO_MSB;
  379. }
  380. if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
  381. iface |= R01_SIM;
  382. uda1380_write(codec, UDA1380_IFACE, iface);
  383. return 0;
  384. }
  385. /*
  386. * Flush reg cache
  387. * We can only write the interpolator and decimator registers
  388. * when the DAI is being clocked by the CPU DAI. It's up to the
  389. * machine and cpu DAI driver to do this before we are called.
  390. */
  391. static int uda1380_pcm_prepare(struct snd_pcm_substream *substream,
  392. struct snd_soc_dai *dai)
  393. {
  394. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  395. struct snd_soc_device *socdev = rtd->socdev;
  396. struct snd_soc_codec *codec = socdev->card->codec;
  397. int reg, reg_start, reg_end, clk;
  398. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  399. reg_start = UDA1380_MVOL;
  400. reg_end = UDA1380_MIXER;
  401. } else {
  402. reg_start = UDA1380_DEC;
  403. reg_end = UDA1380_AGC;
  404. }
  405. /* FIXME disable DAC_CLK */
  406. clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
  407. uda1380_write(codec, UDA1380_CLK, clk & ~R00_DAC_CLK);
  408. for (reg = reg_start; reg <= reg_end; reg++) {
  409. pr_debug("uda1380: flush reg %x val %x:", reg,
  410. uda1380_read_reg_cache(codec, reg));
  411. uda1380_write(codec, reg, uda1380_read_reg_cache(codec, reg));
  412. }
  413. /* FIXME restore DAC_CLK */
  414. uda1380_write(codec, UDA1380_CLK, clk);
  415. return 0;
  416. }
  417. static int uda1380_pcm_hw_params(struct snd_pcm_substream *substream,
  418. struct snd_pcm_hw_params *params,
  419. struct snd_soc_dai *dai)
  420. {
  421. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  422. struct snd_soc_device *socdev = rtd->socdev;
  423. struct snd_soc_codec *codec = socdev->card->codec;
  424. u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
  425. /* set WSPLL power and divider if running from this clock */
  426. if (clk & R00_DAC_CLK) {
  427. int rate = params_rate(params);
  428. u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
  429. clk &= ~0x3; /* clear SEL_LOOP_DIV */
  430. switch (rate) {
  431. case 6250 ... 12500:
  432. clk |= 0x0;
  433. break;
  434. case 12501 ... 25000:
  435. clk |= 0x1;
  436. break;
  437. case 25001 ... 50000:
  438. clk |= 0x2;
  439. break;
  440. case 50001 ... 100000:
  441. clk |= 0x3;
  442. break;
  443. }
  444. uda1380_write(codec, UDA1380_PM, R02_PON_PLL | pm);
  445. }
  446. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  447. clk |= R00_EN_DAC | R00_EN_INT;
  448. else
  449. clk |= R00_EN_ADC | R00_EN_DEC;
  450. uda1380_write(codec, UDA1380_CLK, clk);
  451. return 0;
  452. }
  453. static void uda1380_pcm_shutdown(struct snd_pcm_substream *substream,
  454. struct snd_soc_dai *dai)
  455. {
  456. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  457. struct snd_soc_device *socdev = rtd->socdev;
  458. struct snd_soc_codec *codec = socdev->card->codec;
  459. u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
  460. /* shut down WSPLL power if running from this clock */
  461. if (clk & R00_DAC_CLK) {
  462. u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
  463. uda1380_write(codec, UDA1380_PM, ~R02_PON_PLL & pm);
  464. }
  465. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  466. clk &= ~(R00_EN_DAC | R00_EN_INT);
  467. else
  468. clk &= ~(R00_EN_ADC | R00_EN_DEC);
  469. uda1380_write(codec, UDA1380_CLK, clk);
  470. }
  471. static int uda1380_mute(struct snd_soc_dai *codec_dai, int mute)
  472. {
  473. struct snd_soc_codec *codec = codec_dai->codec;
  474. u16 mute_reg = uda1380_read_reg_cache(codec, UDA1380_DEEMP) & ~R13_MTM;
  475. /* FIXME: mute(codec,0) is called when the magician clock is already
  476. * set to WSPLL, but for some unknown reason writing to interpolator
  477. * registers works only when clocked by SYSCLK */
  478. u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
  479. uda1380_write(codec, UDA1380_CLK, ~R00_DAC_CLK & clk);
  480. if (mute)
  481. uda1380_write(codec, UDA1380_DEEMP, mute_reg | R13_MTM);
  482. else
  483. uda1380_write(codec, UDA1380_DEEMP, mute_reg);
  484. uda1380_write(codec, UDA1380_CLK, clk);
  485. return 0;
  486. }
  487. static int uda1380_set_bias_level(struct snd_soc_codec *codec,
  488. enum snd_soc_bias_level level)
  489. {
  490. int pm = uda1380_read_reg_cache(codec, UDA1380_PM);
  491. switch (level) {
  492. case SND_SOC_BIAS_ON:
  493. case SND_SOC_BIAS_PREPARE:
  494. uda1380_write(codec, UDA1380_PM, R02_PON_BIAS | pm);
  495. break;
  496. case SND_SOC_BIAS_STANDBY:
  497. uda1380_write(codec, UDA1380_PM, R02_PON_BIAS);
  498. break;
  499. case SND_SOC_BIAS_OFF:
  500. uda1380_write(codec, UDA1380_PM, 0x0);
  501. break;
  502. }
  503. codec->bias_level = level;
  504. return 0;
  505. }
  506. #define UDA1380_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
  507. SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
  508. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
  509. struct snd_soc_dai uda1380_dai[] = {
  510. {
  511. .name = "UDA1380",
  512. .playback = {
  513. .stream_name = "Playback",
  514. .channels_min = 1,
  515. .channels_max = 2,
  516. .rates = UDA1380_RATES,
  517. .formats = SNDRV_PCM_FMTBIT_S16_LE,},
  518. .capture = {
  519. .stream_name = "Capture",
  520. .channels_min = 1,
  521. .channels_max = 2,
  522. .rates = UDA1380_RATES,
  523. .formats = SNDRV_PCM_FMTBIT_S16_LE,},
  524. .ops = {
  525. .hw_params = uda1380_pcm_hw_params,
  526. .shutdown = uda1380_pcm_shutdown,
  527. .prepare = uda1380_pcm_prepare,
  528. .digital_mute = uda1380_mute,
  529. .set_fmt = uda1380_set_dai_fmt_both,
  530. },
  531. },
  532. { /* playback only - dual interface */
  533. .name = "UDA1380",
  534. .playback = {
  535. .stream_name = "Playback",
  536. .channels_min = 1,
  537. .channels_max = 2,
  538. .rates = UDA1380_RATES,
  539. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  540. },
  541. .ops = {
  542. .hw_params = uda1380_pcm_hw_params,
  543. .shutdown = uda1380_pcm_shutdown,
  544. .prepare = uda1380_pcm_prepare,
  545. .digital_mute = uda1380_mute,
  546. .set_fmt = uda1380_set_dai_fmt_playback,
  547. },
  548. },
  549. { /* capture only - dual interface*/
  550. .name = "UDA1380",
  551. .capture = {
  552. .stream_name = "Capture",
  553. .channels_min = 1,
  554. .channels_max = 2,
  555. .rates = UDA1380_RATES,
  556. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  557. },
  558. .ops = {
  559. .hw_params = uda1380_pcm_hw_params,
  560. .shutdown = uda1380_pcm_shutdown,
  561. .prepare = uda1380_pcm_prepare,
  562. .set_fmt = uda1380_set_dai_fmt_capture,
  563. },
  564. },
  565. };
  566. EXPORT_SYMBOL_GPL(uda1380_dai);
  567. static int uda1380_suspend(struct platform_device *pdev, pm_message_t state)
  568. {
  569. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  570. struct snd_soc_codec *codec = socdev->card->codec;
  571. uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
  572. return 0;
  573. }
  574. static int uda1380_resume(struct platform_device *pdev)
  575. {
  576. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  577. struct snd_soc_codec *codec = socdev->card->codec;
  578. int i;
  579. u8 data[2];
  580. u16 *cache = codec->reg_cache;
  581. /* Sync reg_cache with the hardware */
  582. for (i = 0; i < ARRAY_SIZE(uda1380_reg); i++) {
  583. data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
  584. data[1] = cache[i] & 0x00ff;
  585. codec->hw_write(codec->control_data, data, 2);
  586. }
  587. uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  588. uda1380_set_bias_level(codec, codec->suspend_bias_level);
  589. return 0;
  590. }
  591. /*
  592. * initialise the UDA1380 driver
  593. * register mixer and dsp interfaces with the kernel
  594. */
  595. static int uda1380_init(struct snd_soc_device *socdev, int dac_clk)
  596. {
  597. struct snd_soc_codec *codec = socdev->card->codec;
  598. int ret = 0;
  599. codec->name = "UDA1380";
  600. codec->owner = THIS_MODULE;
  601. codec->read = uda1380_read_reg_cache;
  602. codec->write = uda1380_write;
  603. codec->set_bias_level = uda1380_set_bias_level;
  604. codec->dai = uda1380_dai;
  605. codec->num_dai = ARRAY_SIZE(uda1380_dai);
  606. codec->reg_cache = kmemdup(uda1380_reg, sizeof(uda1380_reg),
  607. GFP_KERNEL);
  608. if (codec->reg_cache == NULL)
  609. return -ENOMEM;
  610. codec->reg_cache_size = ARRAY_SIZE(uda1380_reg);
  611. codec->reg_cache_step = 1;
  612. uda1380_reset(codec);
  613. /* register pcms */
  614. ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
  615. if (ret < 0) {
  616. pr_err("uda1380: failed to create pcms\n");
  617. goto pcm_err;
  618. }
  619. /* power on device */
  620. uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  621. /* set clock input */
  622. switch (dac_clk) {
  623. case UDA1380_DAC_CLK_SYSCLK:
  624. uda1380_write(codec, UDA1380_CLK, 0);
  625. break;
  626. case UDA1380_DAC_CLK_WSPLL:
  627. uda1380_write(codec, UDA1380_CLK, R00_DAC_CLK);
  628. break;
  629. }
  630. /* uda1380 init */
  631. snd_soc_add_controls(codec, uda1380_snd_controls,
  632. ARRAY_SIZE(uda1380_snd_controls));
  633. uda1380_add_widgets(codec);
  634. ret = snd_soc_init_card(socdev);
  635. if (ret < 0) {
  636. pr_err("uda1380: failed to register card\n");
  637. goto card_err;
  638. }
  639. return ret;
  640. card_err:
  641. snd_soc_free_pcms(socdev);
  642. snd_soc_dapm_free(socdev);
  643. pcm_err:
  644. kfree(codec->reg_cache);
  645. return ret;
  646. }
  647. static struct snd_soc_device *uda1380_socdev;
  648. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  649. static int uda1380_i2c_probe(struct i2c_client *i2c,
  650. const struct i2c_device_id *id)
  651. {
  652. struct snd_soc_device *socdev = uda1380_socdev;
  653. struct uda1380_setup_data *setup = socdev->codec_data;
  654. struct snd_soc_codec *codec = socdev->card->codec;
  655. int ret;
  656. i2c_set_clientdata(i2c, codec);
  657. codec->control_data = i2c;
  658. ret = uda1380_init(socdev, setup->dac_clk);
  659. if (ret < 0)
  660. pr_err("uda1380: failed to initialise UDA1380\n");
  661. return ret;
  662. }
  663. static int uda1380_i2c_remove(struct i2c_client *client)
  664. {
  665. struct snd_soc_codec *codec = i2c_get_clientdata(client);
  666. kfree(codec->reg_cache);
  667. return 0;
  668. }
  669. static const struct i2c_device_id uda1380_i2c_id[] = {
  670. { "uda1380", 0 },
  671. { }
  672. };
  673. MODULE_DEVICE_TABLE(i2c, uda1380_i2c_id);
  674. static struct i2c_driver uda1380_i2c_driver = {
  675. .driver = {
  676. .name = "UDA1380 I2C Codec",
  677. .owner = THIS_MODULE,
  678. },
  679. .probe = uda1380_i2c_probe,
  680. .remove = uda1380_i2c_remove,
  681. .id_table = uda1380_i2c_id,
  682. };
  683. static int uda1380_add_i2c_device(struct platform_device *pdev,
  684. const struct uda1380_setup_data *setup)
  685. {
  686. struct i2c_board_info info;
  687. struct i2c_adapter *adapter;
  688. struct i2c_client *client;
  689. int ret;
  690. ret = i2c_add_driver(&uda1380_i2c_driver);
  691. if (ret != 0) {
  692. dev_err(&pdev->dev, "can't add i2c driver\n");
  693. return ret;
  694. }
  695. memset(&info, 0, sizeof(struct i2c_board_info));
  696. info.addr = setup->i2c_address;
  697. strlcpy(info.type, "uda1380", I2C_NAME_SIZE);
  698. adapter = i2c_get_adapter(setup->i2c_bus);
  699. if (!adapter) {
  700. dev_err(&pdev->dev, "can't get i2c adapter %d\n",
  701. setup->i2c_bus);
  702. goto err_driver;
  703. }
  704. client = i2c_new_device(adapter, &info);
  705. i2c_put_adapter(adapter);
  706. if (!client) {
  707. dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
  708. (unsigned int)info.addr);
  709. goto err_driver;
  710. }
  711. return 0;
  712. err_driver:
  713. i2c_del_driver(&uda1380_i2c_driver);
  714. return -ENODEV;
  715. }
  716. #endif
  717. static int uda1380_probe(struct platform_device *pdev)
  718. {
  719. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  720. struct uda1380_setup_data *setup;
  721. struct snd_soc_codec *codec;
  722. int ret;
  723. setup = socdev->codec_data;
  724. codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
  725. if (codec == NULL)
  726. return -ENOMEM;
  727. socdev->card->codec = codec;
  728. mutex_init(&codec->mutex);
  729. INIT_LIST_HEAD(&codec->dapm_widgets);
  730. INIT_LIST_HEAD(&codec->dapm_paths);
  731. uda1380_socdev = socdev;
  732. ret = -ENODEV;
  733. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  734. if (setup->i2c_address) {
  735. codec->hw_write = (hw_write_t)i2c_master_send;
  736. ret = uda1380_add_i2c_device(pdev, setup);
  737. }
  738. #endif
  739. if (ret != 0)
  740. kfree(codec);
  741. return ret;
  742. }
  743. /* power down chip */
  744. static int uda1380_remove(struct platform_device *pdev)
  745. {
  746. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  747. struct snd_soc_codec *codec = socdev->card->codec;
  748. if (codec->control_data)
  749. uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
  750. snd_soc_free_pcms(socdev);
  751. snd_soc_dapm_free(socdev);
  752. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  753. i2c_unregister_device(codec->control_data);
  754. i2c_del_driver(&uda1380_i2c_driver);
  755. #endif
  756. kfree(codec);
  757. return 0;
  758. }
  759. struct snd_soc_codec_device soc_codec_dev_uda1380 = {
  760. .probe = uda1380_probe,
  761. .remove = uda1380_remove,
  762. .suspend = uda1380_suspend,
  763. .resume = uda1380_resume,
  764. };
  765. EXPORT_SYMBOL_GPL(soc_codec_dev_uda1380);
  766. static int __init uda1380_modinit(void)
  767. {
  768. return snd_soc_register_dais(uda1380_dai, ARRAY_SIZE(uda1380_dai));
  769. }
  770. module_init(uda1380_modinit);
  771. static void __exit uda1380_exit(void)
  772. {
  773. snd_soc_unregister_dais(uda1380_dai, ARRAY_SIZE(uda1380_dai));
  774. }
  775. module_exit(uda1380_exit);
  776. MODULE_AUTHOR("Giorgio Padrin");
  777. MODULE_DESCRIPTION("Audio support for codec Philips UDA1380");
  778. MODULE_LICENSE("GPL");