setup.c 33 KB

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  1. /*
  2. * Copyright (C) 2009 Renesas Solutions Corp.
  3. *
  4. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/device.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mmc/host.h>
  14. #include <linux/mmc/sh_mmcif.h>
  15. #include <linux/mmc/sh_mobile_sdhi.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/gpio.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/io.h>
  20. #include <linux/delay.h>
  21. #include <linux/usb/r8a66597.h>
  22. #include <linux/usb/renesas_usbhs.h>
  23. #include <linux/i2c.h>
  24. #include <linux/i2c/tsc2007.h>
  25. #include <linux/spi/spi.h>
  26. #include <linux/spi/sh_msiof.h>
  27. #include <linux/spi/mmc_spi.h>
  28. #include <linux/input.h>
  29. #include <linux/input/sh_keysc.h>
  30. #include <linux/sh_eth.h>
  31. #include <video/sh_mobile_lcdc.h>
  32. #include <sound/sh_fsi.h>
  33. #include <media/sh_mobile_ceu.h>
  34. #include <media/tw9910.h>
  35. #include <media/mt9t112.h>
  36. #include <asm/heartbeat.h>
  37. #include <asm/clock.h>
  38. #include <asm/suspend.h>
  39. #include <cpu/sh7724.h>
  40. /*
  41. * Address Interface BusWidth
  42. *-----------------------------------------
  43. * 0x0000_0000 uboot 16bit
  44. * 0x0004_0000 Linux romImage 16bit
  45. * 0x0014_0000 MTD for Linux 16bit
  46. * 0x0400_0000 Internal I/O 16/32bit
  47. * 0x0800_0000 DRAM 32bit
  48. * 0x1800_0000 MFI 16bit
  49. */
  50. /* SWITCH
  51. *------------------------------
  52. * DS2[1] = FlashROM write protect ON : write protect
  53. * OFF : No write protect
  54. * DS2[2] = RMII / TS, SCIF ON : RMII
  55. * OFF : TS, SCIF3
  56. * DS2[3] = Camera / Video ON : Camera
  57. * OFF : NTSC/PAL (IN)
  58. * DS2[5] = NTSC_OUT Clock ON : On board OSC
  59. * OFF : SH7724 DV_CLK
  60. * DS2[6-7] = MMC / SD ON-OFF : SD
  61. * OFF-ON : MMC
  62. */
  63. /* Heartbeat */
  64. static unsigned char led_pos[] = { 0, 1, 2, 3 };
  65. static struct heartbeat_data heartbeat_data = {
  66. .nr_bits = 4,
  67. .bit_pos = led_pos,
  68. };
  69. static struct resource heartbeat_resource = {
  70. .start = 0xA405012C, /* PTG */
  71. .end = 0xA405012E - 1,
  72. .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  73. };
  74. static struct platform_device heartbeat_device = {
  75. .name = "heartbeat",
  76. .id = -1,
  77. .dev = {
  78. .platform_data = &heartbeat_data,
  79. },
  80. .num_resources = 1,
  81. .resource = &heartbeat_resource,
  82. };
  83. /* MTD */
  84. static struct mtd_partition nor_flash_partitions[] = {
  85. {
  86. .name = "boot loader",
  87. .offset = 0,
  88. .size = (5 * 1024 * 1024),
  89. .mask_flags = MTD_WRITEABLE, /* force read-only */
  90. }, {
  91. .name = "free-area",
  92. .offset = MTDPART_OFS_APPEND,
  93. .size = MTDPART_SIZ_FULL,
  94. },
  95. };
  96. static struct physmap_flash_data nor_flash_data = {
  97. .width = 2,
  98. .parts = nor_flash_partitions,
  99. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  100. };
  101. static struct resource nor_flash_resources[] = {
  102. [0] = {
  103. .name = "NOR Flash",
  104. .start = 0x00000000,
  105. .end = 0x03ffffff,
  106. .flags = IORESOURCE_MEM,
  107. }
  108. };
  109. static struct platform_device nor_flash_device = {
  110. .name = "physmap-flash",
  111. .resource = nor_flash_resources,
  112. .num_resources = ARRAY_SIZE(nor_flash_resources),
  113. .dev = {
  114. .platform_data = &nor_flash_data,
  115. },
  116. };
  117. /* SH Eth */
  118. #define SH_ETH_ADDR (0xA4600000)
  119. static struct resource sh_eth_resources[] = {
  120. [0] = {
  121. .start = SH_ETH_ADDR,
  122. .end = SH_ETH_ADDR + 0x1FC,
  123. .flags = IORESOURCE_MEM,
  124. },
  125. [1] = {
  126. .start = 91,
  127. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  128. },
  129. };
  130. static struct sh_eth_plat_data sh_eth_plat = {
  131. .phy = 0x1f, /* SMSC LAN8700 */
  132. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  133. .register_type = SH_ETH_REG_FAST_SH4,
  134. .phy_interface = PHY_INTERFACE_MODE_MII,
  135. .ether_link_active_low = 1
  136. };
  137. static struct platform_device sh_eth_device = {
  138. .name = "sh-eth",
  139. .id = 0,
  140. .dev = {
  141. .platform_data = &sh_eth_plat,
  142. },
  143. .num_resources = ARRAY_SIZE(sh_eth_resources),
  144. .resource = sh_eth_resources,
  145. .archdata = {
  146. .hwblk_id = HWBLK_ETHER,
  147. },
  148. };
  149. /* USB0 host */
  150. static void usb0_port_power(int port, int power)
  151. {
  152. gpio_set_value(GPIO_PTB4, power);
  153. }
  154. static struct r8a66597_platdata usb0_host_data = {
  155. .on_chip = 1,
  156. .port_power = usb0_port_power,
  157. };
  158. static struct resource usb0_host_resources[] = {
  159. [0] = {
  160. .start = 0xa4d80000,
  161. .end = 0xa4d80124 - 1,
  162. .flags = IORESOURCE_MEM,
  163. },
  164. [1] = {
  165. .start = 65,
  166. .end = 65,
  167. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  168. },
  169. };
  170. static struct platform_device usb0_host_device = {
  171. .name = "r8a66597_hcd",
  172. .id = 0,
  173. .dev = {
  174. .dma_mask = NULL, /* not use dma */
  175. .coherent_dma_mask = 0xffffffff,
  176. .platform_data = &usb0_host_data,
  177. },
  178. .num_resources = ARRAY_SIZE(usb0_host_resources),
  179. .resource = usb0_host_resources,
  180. };
  181. /* USB1 host/function */
  182. static void usb1_port_power(int port, int power)
  183. {
  184. gpio_set_value(GPIO_PTB5, power);
  185. }
  186. static struct r8a66597_platdata usb1_common_data = {
  187. .on_chip = 1,
  188. .port_power = usb1_port_power,
  189. };
  190. static struct resource usb1_common_resources[] = {
  191. [0] = {
  192. .start = 0xa4d90000,
  193. .end = 0xa4d90124 - 1,
  194. .flags = IORESOURCE_MEM,
  195. },
  196. [1] = {
  197. .start = 66,
  198. .end = 66,
  199. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  200. },
  201. };
  202. static struct platform_device usb1_common_device = {
  203. /* .name will be added in arch_setup */
  204. .id = 1,
  205. .dev = {
  206. .dma_mask = NULL, /* not use dma */
  207. .coherent_dma_mask = 0xffffffff,
  208. .platform_data = &usb1_common_data,
  209. },
  210. .num_resources = ARRAY_SIZE(usb1_common_resources),
  211. .resource = usb1_common_resources,
  212. };
  213. /*
  214. * USBHS
  215. */
  216. static int usbhs_get_id(struct platform_device *pdev)
  217. {
  218. return gpio_get_value(GPIO_PTB3);
  219. }
  220. static struct renesas_usbhs_platform_info usbhs_info = {
  221. .platform_callback = {
  222. .get_id = usbhs_get_id,
  223. },
  224. .driver_param = {
  225. .buswait_bwait = 4,
  226. .detection_delay = 5,
  227. .d0_tx_id = SHDMA_SLAVE_USB1D0_TX,
  228. .d0_rx_id = SHDMA_SLAVE_USB1D0_RX,
  229. .d1_tx_id = SHDMA_SLAVE_USB1D1_TX,
  230. .d1_rx_id = SHDMA_SLAVE_USB1D1_RX,
  231. },
  232. };
  233. static struct resource usbhs_resources[] = {
  234. [0] = {
  235. .start = 0xa4d90000,
  236. .end = 0xa4d90124 - 1,
  237. .flags = IORESOURCE_MEM,
  238. },
  239. [1] = {
  240. .start = 66,
  241. .end = 66,
  242. .flags = IORESOURCE_IRQ,
  243. },
  244. };
  245. static struct platform_device usbhs_device = {
  246. .name = "renesas_usbhs",
  247. .id = 1,
  248. .dev = {
  249. .dma_mask = NULL, /* not use dma */
  250. .coherent_dma_mask = 0xffffffff,
  251. .platform_data = &usbhs_info,
  252. },
  253. .num_resources = ARRAY_SIZE(usbhs_resources),
  254. .resource = usbhs_resources,
  255. .archdata = {
  256. .hwblk_id = HWBLK_USB1,
  257. },
  258. };
  259. /* LCDC */
  260. static const struct fb_videomode ecovec_lcd_modes[] = {
  261. {
  262. .name = "Panel",
  263. .xres = 800,
  264. .yres = 480,
  265. .left_margin = 220,
  266. .right_margin = 110,
  267. .hsync_len = 70,
  268. .upper_margin = 20,
  269. .lower_margin = 5,
  270. .vsync_len = 5,
  271. .sync = 0, /* hsync and vsync are active low */
  272. },
  273. };
  274. static const struct fb_videomode ecovec_dvi_modes[] = {
  275. {
  276. .name = "DVI",
  277. .xres = 1280,
  278. .yres = 720,
  279. .left_margin = 220,
  280. .right_margin = 110,
  281. .hsync_len = 40,
  282. .upper_margin = 20,
  283. .lower_margin = 5,
  284. .vsync_len = 5,
  285. .sync = 0, /* hsync and vsync are active low */
  286. },
  287. };
  288. static int ecovec24_set_brightness(void *board_data, int brightness)
  289. {
  290. gpio_set_value(GPIO_PTR1, brightness);
  291. return 0;
  292. }
  293. static int ecovec24_get_brightness(void *board_data)
  294. {
  295. return gpio_get_value(GPIO_PTR1);
  296. }
  297. static struct sh_mobile_lcdc_info lcdc_info = {
  298. .ch[0] = {
  299. .interface_type = RGB18,
  300. .chan = LCDC_CHAN_MAINLCD,
  301. .bpp = 16,
  302. .lcd_size_cfg = { /* 7.0 inch */
  303. .width = 152,
  304. .height = 91,
  305. },
  306. .board_cfg = {
  307. .set_brightness = ecovec24_set_brightness,
  308. .get_brightness = ecovec24_get_brightness,
  309. },
  310. .bl_info = {
  311. .name = "sh_mobile_lcdc_bl",
  312. .max_brightness = 1,
  313. },
  314. }
  315. };
  316. static struct resource lcdc_resources[] = {
  317. [0] = {
  318. .name = "LCDC",
  319. .start = 0xfe940000,
  320. .end = 0xfe942fff,
  321. .flags = IORESOURCE_MEM,
  322. },
  323. [1] = {
  324. .start = 106,
  325. .flags = IORESOURCE_IRQ,
  326. },
  327. };
  328. static struct platform_device lcdc_device = {
  329. .name = "sh_mobile_lcdc_fb",
  330. .num_resources = ARRAY_SIZE(lcdc_resources),
  331. .resource = lcdc_resources,
  332. .dev = {
  333. .platform_data = &lcdc_info,
  334. },
  335. .archdata = {
  336. .hwblk_id = HWBLK_LCDC,
  337. },
  338. };
  339. /* CEU0 */
  340. static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
  341. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  342. };
  343. static struct resource ceu0_resources[] = {
  344. [0] = {
  345. .name = "CEU0",
  346. .start = 0xfe910000,
  347. .end = 0xfe91009f,
  348. .flags = IORESOURCE_MEM,
  349. },
  350. [1] = {
  351. .start = 52,
  352. .flags = IORESOURCE_IRQ,
  353. },
  354. [2] = {
  355. /* place holder for contiguous memory */
  356. },
  357. };
  358. static struct platform_device ceu0_device = {
  359. .name = "sh_mobile_ceu",
  360. .id = 0, /* "ceu0" clock */
  361. .num_resources = ARRAY_SIZE(ceu0_resources),
  362. .resource = ceu0_resources,
  363. .dev = {
  364. .platform_data = &sh_mobile_ceu0_info,
  365. },
  366. .archdata = {
  367. .hwblk_id = HWBLK_CEU0,
  368. },
  369. };
  370. /* CEU1 */
  371. static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
  372. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  373. };
  374. static struct resource ceu1_resources[] = {
  375. [0] = {
  376. .name = "CEU1",
  377. .start = 0xfe914000,
  378. .end = 0xfe91409f,
  379. .flags = IORESOURCE_MEM,
  380. },
  381. [1] = {
  382. .start = 63,
  383. .flags = IORESOURCE_IRQ,
  384. },
  385. [2] = {
  386. /* place holder for contiguous memory */
  387. },
  388. };
  389. static struct platform_device ceu1_device = {
  390. .name = "sh_mobile_ceu",
  391. .id = 1, /* "ceu1" clock */
  392. .num_resources = ARRAY_SIZE(ceu1_resources),
  393. .resource = ceu1_resources,
  394. .dev = {
  395. .platform_data = &sh_mobile_ceu1_info,
  396. },
  397. .archdata = {
  398. .hwblk_id = HWBLK_CEU1,
  399. },
  400. };
  401. /* I2C device */
  402. static struct i2c_board_info i2c0_devices[] = {
  403. {
  404. I2C_BOARD_INFO("da7210", 0x1a),
  405. },
  406. };
  407. static struct i2c_board_info i2c1_devices[] = {
  408. {
  409. I2C_BOARD_INFO("r2025sd", 0x32),
  410. },
  411. {
  412. I2C_BOARD_INFO("lis3lv02d", 0x1c),
  413. .irq = 33,
  414. }
  415. };
  416. /* KEYSC */
  417. static struct sh_keysc_info keysc_info = {
  418. .mode = SH_KEYSC_MODE_1,
  419. .scan_timing = 3,
  420. .delay = 50,
  421. .kycr2_delay = 100,
  422. .keycodes = { KEY_1, 0, 0, 0, 0,
  423. KEY_2, 0, 0, 0, 0,
  424. KEY_3, 0, 0, 0, 0,
  425. KEY_4, 0, 0, 0, 0,
  426. KEY_5, 0, 0, 0, 0,
  427. KEY_6, 0, 0, 0, 0, },
  428. };
  429. static struct resource keysc_resources[] = {
  430. [0] = {
  431. .name = "KEYSC",
  432. .start = 0x044b0000,
  433. .end = 0x044b000f,
  434. .flags = IORESOURCE_MEM,
  435. },
  436. [1] = {
  437. .start = 79,
  438. .flags = IORESOURCE_IRQ,
  439. },
  440. };
  441. static struct platform_device keysc_device = {
  442. .name = "sh_keysc",
  443. .id = 0, /* keysc0 clock */
  444. .num_resources = ARRAY_SIZE(keysc_resources),
  445. .resource = keysc_resources,
  446. .dev = {
  447. .platform_data = &keysc_info,
  448. },
  449. .archdata = {
  450. .hwblk_id = HWBLK_KEYSC,
  451. },
  452. };
  453. /* TouchScreen */
  454. #define IRQ0 32
  455. static int ts_get_pendown_state(void)
  456. {
  457. int val = 0;
  458. gpio_free(GPIO_FN_INTC_IRQ0);
  459. gpio_request(GPIO_PTZ0, NULL);
  460. gpio_direction_input(GPIO_PTZ0);
  461. val = gpio_get_value(GPIO_PTZ0);
  462. gpio_free(GPIO_PTZ0);
  463. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  464. return val ? 0 : 1;
  465. }
  466. static int ts_init(void)
  467. {
  468. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  469. return 0;
  470. }
  471. static struct tsc2007_platform_data tsc2007_info = {
  472. .model = 2007,
  473. .x_plate_ohms = 180,
  474. .get_pendown_state = ts_get_pendown_state,
  475. .init_platform_hw = ts_init,
  476. };
  477. static struct i2c_board_info ts_i2c_clients = {
  478. I2C_BOARD_INFO("tsc2007", 0x48),
  479. .type = "tsc2007",
  480. .platform_data = &tsc2007_info,
  481. .irq = IRQ0,
  482. };
  483. #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
  484. /* SDHI0 */
  485. static void sdhi0_set_pwr(struct platform_device *pdev, int state)
  486. {
  487. gpio_set_value(GPIO_PTB6, state);
  488. }
  489. static struct sh_mobile_sdhi_info sdhi0_info = {
  490. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  491. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  492. .set_pwr = sdhi0_set_pwr,
  493. .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
  494. };
  495. static struct resource sdhi0_resources[] = {
  496. [0] = {
  497. .name = "SDHI0",
  498. .start = 0x04ce0000,
  499. .end = 0x04ce00ff,
  500. .flags = IORESOURCE_MEM,
  501. },
  502. [1] = {
  503. .start = 100,
  504. .flags = IORESOURCE_IRQ,
  505. },
  506. };
  507. static struct platform_device sdhi0_device = {
  508. .name = "sh_mobile_sdhi",
  509. .num_resources = ARRAY_SIZE(sdhi0_resources),
  510. .resource = sdhi0_resources,
  511. .id = 0,
  512. .dev = {
  513. .platform_data = &sdhi0_info,
  514. },
  515. .archdata = {
  516. .hwblk_id = HWBLK_SDHI0,
  517. },
  518. };
  519. #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
  520. /* SDHI1 */
  521. static void sdhi1_set_pwr(struct platform_device *pdev, int state)
  522. {
  523. gpio_set_value(GPIO_PTB7, state);
  524. }
  525. static struct sh_mobile_sdhi_info sdhi1_info = {
  526. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  527. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  528. .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
  529. .set_pwr = sdhi1_set_pwr,
  530. };
  531. static struct resource sdhi1_resources[] = {
  532. [0] = {
  533. .name = "SDHI1",
  534. .start = 0x04cf0000,
  535. .end = 0x04cf00ff,
  536. .flags = IORESOURCE_MEM,
  537. },
  538. [1] = {
  539. .start = 23,
  540. .flags = IORESOURCE_IRQ,
  541. },
  542. };
  543. static struct platform_device sdhi1_device = {
  544. .name = "sh_mobile_sdhi",
  545. .num_resources = ARRAY_SIZE(sdhi1_resources),
  546. .resource = sdhi1_resources,
  547. .id = 1,
  548. .dev = {
  549. .platform_data = &sdhi1_info,
  550. },
  551. .archdata = {
  552. .hwblk_id = HWBLK_SDHI1,
  553. },
  554. };
  555. #endif /* CONFIG_MMC_SH_MMCIF */
  556. #else
  557. /* MMC SPI */
  558. static int mmc_spi_get_ro(struct device *dev)
  559. {
  560. return gpio_get_value(GPIO_PTY6);
  561. }
  562. static int mmc_spi_get_cd(struct device *dev)
  563. {
  564. return !gpio_get_value(GPIO_PTY7);
  565. }
  566. static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
  567. {
  568. gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
  569. }
  570. static struct mmc_spi_platform_data mmc_spi_info = {
  571. .get_ro = mmc_spi_get_ro,
  572. .get_cd = mmc_spi_get_cd,
  573. .caps = MMC_CAP_NEEDS_POLL,
  574. .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
  575. .setpower = mmc_spi_setpower,
  576. };
  577. static struct spi_board_info spi_bus[] = {
  578. {
  579. .modalias = "mmc_spi",
  580. .platform_data = &mmc_spi_info,
  581. .max_speed_hz = 5000000,
  582. .mode = SPI_MODE_0,
  583. .controller_data = (void *) GPIO_PTM4,
  584. },
  585. };
  586. /* MSIOF0 */
  587. static struct sh_msiof_spi_info msiof0_data = {
  588. .num_chipselect = 1,
  589. };
  590. static struct resource msiof0_resources[] = {
  591. [0] = {
  592. .name = "MSIOF0",
  593. .start = 0xa4c40000,
  594. .end = 0xa4c40063,
  595. .flags = IORESOURCE_MEM,
  596. },
  597. [1] = {
  598. .start = 84,
  599. .flags = IORESOURCE_IRQ,
  600. },
  601. };
  602. static struct platform_device msiof0_device = {
  603. .name = "spi_sh_msiof",
  604. .id = 0, /* MSIOF0 */
  605. .dev = {
  606. .platform_data = &msiof0_data,
  607. },
  608. .num_resources = ARRAY_SIZE(msiof0_resources),
  609. .resource = msiof0_resources,
  610. .archdata = {
  611. .hwblk_id = HWBLK_MSIOF0,
  612. },
  613. };
  614. #endif
  615. /* I2C Video/Camera */
  616. static struct i2c_board_info i2c_camera[] = {
  617. {
  618. I2C_BOARD_INFO("tw9910", 0x45),
  619. },
  620. {
  621. /* 1st camera */
  622. I2C_BOARD_INFO("mt9t112", 0x3c),
  623. },
  624. {
  625. /* 2nd camera */
  626. I2C_BOARD_INFO("mt9t112", 0x3c),
  627. },
  628. };
  629. /* tw9910 */
  630. static int tw9910_power(struct device *dev, int mode)
  631. {
  632. int val = mode ? 0 : 1;
  633. gpio_set_value(GPIO_PTU2, val);
  634. if (mode)
  635. mdelay(100);
  636. return 0;
  637. }
  638. static struct tw9910_video_info tw9910_info = {
  639. .buswidth = SOCAM_DATAWIDTH_8,
  640. .mpout = TW9910_MPO_FIELD,
  641. };
  642. static struct soc_camera_link tw9910_link = {
  643. .i2c_adapter_id = 0,
  644. .bus_id = 1,
  645. .power = tw9910_power,
  646. .board_info = &i2c_camera[0],
  647. .priv = &tw9910_info,
  648. };
  649. /* mt9t112 */
  650. static int mt9t112_power1(struct device *dev, int mode)
  651. {
  652. gpio_set_value(GPIO_PTA3, mode);
  653. if (mode)
  654. mdelay(100);
  655. return 0;
  656. }
  657. static struct mt9t112_camera_info mt9t112_info1 = {
  658. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  659. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  660. };
  661. static struct soc_camera_link mt9t112_link1 = {
  662. .i2c_adapter_id = 0,
  663. .power = mt9t112_power1,
  664. .bus_id = 0,
  665. .board_info = &i2c_camera[1],
  666. .priv = &mt9t112_info1,
  667. };
  668. static int mt9t112_power2(struct device *dev, int mode)
  669. {
  670. gpio_set_value(GPIO_PTA4, mode);
  671. if (mode)
  672. mdelay(100);
  673. return 0;
  674. }
  675. static struct mt9t112_camera_info mt9t112_info2 = {
  676. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  677. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  678. };
  679. static struct soc_camera_link mt9t112_link2 = {
  680. .i2c_adapter_id = 1,
  681. .power = mt9t112_power2,
  682. .bus_id = 1,
  683. .board_info = &i2c_camera[2],
  684. .priv = &mt9t112_info2,
  685. };
  686. static struct platform_device camera_devices[] = {
  687. {
  688. .name = "soc-camera-pdrv",
  689. .id = 0,
  690. .dev = {
  691. .platform_data = &tw9910_link,
  692. },
  693. },
  694. {
  695. .name = "soc-camera-pdrv",
  696. .id = 1,
  697. .dev = {
  698. .platform_data = &mt9t112_link1,
  699. },
  700. },
  701. {
  702. .name = "soc-camera-pdrv",
  703. .id = 2,
  704. .dev = {
  705. .platform_data = &mt9t112_link2,
  706. },
  707. },
  708. };
  709. /* FSI */
  710. static struct sh_fsi_platform_info fsi_info = {
  711. .portb_flags = SH_FSI_BRS_INV,
  712. };
  713. static struct resource fsi_resources[] = {
  714. [0] = {
  715. .name = "FSI",
  716. .start = 0xFE3C0000,
  717. .end = 0xFE3C021d,
  718. .flags = IORESOURCE_MEM,
  719. },
  720. [1] = {
  721. .start = 108,
  722. .flags = IORESOURCE_IRQ,
  723. },
  724. };
  725. static struct platform_device fsi_device = {
  726. .name = "sh_fsi",
  727. .id = 0,
  728. .num_resources = ARRAY_SIZE(fsi_resources),
  729. .resource = fsi_resources,
  730. .dev = {
  731. .platform_data = &fsi_info,
  732. },
  733. .archdata = {
  734. .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
  735. },
  736. };
  737. /* IrDA */
  738. static struct resource irda_resources[] = {
  739. [0] = {
  740. .name = "IrDA",
  741. .start = 0xA45D0000,
  742. .end = 0xA45D0049,
  743. .flags = IORESOURCE_MEM,
  744. },
  745. [1] = {
  746. .start = 20,
  747. .flags = IORESOURCE_IRQ,
  748. },
  749. };
  750. static struct platform_device irda_device = {
  751. .name = "sh_sir",
  752. .num_resources = ARRAY_SIZE(irda_resources),
  753. .resource = irda_resources,
  754. };
  755. #include <media/ak881x.h>
  756. #include <media/sh_vou.h>
  757. static struct ak881x_pdata ak881x_pdata = {
  758. .flags = AK881X_IF_MODE_SLAVE,
  759. };
  760. static struct i2c_board_info ak8813 = {
  761. I2C_BOARD_INFO("ak8813", 0x20),
  762. .platform_data = &ak881x_pdata,
  763. };
  764. static struct sh_vou_pdata sh_vou_pdata = {
  765. .bus_fmt = SH_VOU_BUS_8BIT,
  766. .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
  767. .board_info = &ak8813,
  768. .i2c_adap = 0,
  769. };
  770. static struct resource sh_vou_resources[] = {
  771. [0] = {
  772. .start = 0xfe960000,
  773. .end = 0xfe962043,
  774. .flags = IORESOURCE_MEM,
  775. },
  776. [1] = {
  777. .start = 55,
  778. .flags = IORESOURCE_IRQ,
  779. },
  780. };
  781. static struct platform_device vou_device = {
  782. .name = "sh-vou",
  783. .id = -1,
  784. .num_resources = ARRAY_SIZE(sh_vou_resources),
  785. .resource = sh_vou_resources,
  786. .dev = {
  787. .platform_data = &sh_vou_pdata,
  788. },
  789. .archdata = {
  790. .hwblk_id = HWBLK_VOU,
  791. },
  792. };
  793. #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
  794. /* SH_MMCIF */
  795. static void mmcif_set_pwr(struct platform_device *pdev, int state)
  796. {
  797. gpio_set_value(GPIO_PTB7, state);
  798. }
  799. static void mmcif_down_pwr(struct platform_device *pdev)
  800. {
  801. gpio_set_value(GPIO_PTB7, 0);
  802. }
  803. static struct resource sh_mmcif_resources[] = {
  804. [0] = {
  805. .name = "SH_MMCIF",
  806. .start = 0xA4CA0000,
  807. .end = 0xA4CA00FF,
  808. .flags = IORESOURCE_MEM,
  809. },
  810. [1] = {
  811. /* MMC2I */
  812. .start = 29,
  813. .flags = IORESOURCE_IRQ,
  814. },
  815. [2] = {
  816. /* MMC3I */
  817. .start = 30,
  818. .flags = IORESOURCE_IRQ,
  819. },
  820. };
  821. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  822. .set_pwr = mmcif_set_pwr,
  823. .down_pwr = mmcif_down_pwr,
  824. .sup_pclk = 0, /* SH7724: Max Pclk/2 */
  825. .caps = MMC_CAP_4_BIT_DATA |
  826. MMC_CAP_8_BIT_DATA |
  827. MMC_CAP_NEEDS_POLL,
  828. .ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
  829. };
  830. static struct platform_device sh_mmcif_device = {
  831. .name = "sh_mmcif",
  832. .id = 0,
  833. .dev = {
  834. .platform_data = &sh_mmcif_plat,
  835. },
  836. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  837. .resource = sh_mmcif_resources,
  838. .archdata = {
  839. .hwblk_id = HWBLK_MMC,
  840. },
  841. };
  842. #endif
  843. static struct platform_device *ecovec_devices[] __initdata = {
  844. &heartbeat_device,
  845. &nor_flash_device,
  846. &sh_eth_device,
  847. &usb0_host_device,
  848. &usb1_common_device,
  849. &usbhs_device,
  850. &lcdc_device,
  851. &ceu0_device,
  852. &ceu1_device,
  853. &keysc_device,
  854. #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
  855. &sdhi0_device,
  856. #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
  857. &sdhi1_device,
  858. #endif
  859. #else
  860. &msiof0_device,
  861. #endif
  862. &camera_devices[0],
  863. &camera_devices[1],
  864. &camera_devices[2],
  865. &fsi_device,
  866. &irda_device,
  867. &vou_device,
  868. #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
  869. &sh_mmcif_device,
  870. #endif
  871. };
  872. #ifdef CONFIG_I2C
  873. #define EEPROM_ADDR 0x50
  874. static u8 mac_read(struct i2c_adapter *a, u8 command)
  875. {
  876. struct i2c_msg msg[2];
  877. u8 buf;
  878. int ret;
  879. msg[0].addr = EEPROM_ADDR;
  880. msg[0].flags = 0;
  881. msg[0].len = 1;
  882. msg[0].buf = &command;
  883. msg[1].addr = EEPROM_ADDR;
  884. msg[1].flags = I2C_M_RD;
  885. msg[1].len = 1;
  886. msg[1].buf = &buf;
  887. ret = i2c_transfer(a, msg, 2);
  888. if (ret < 0) {
  889. printk(KERN_ERR "error %d\n", ret);
  890. buf = 0xff;
  891. }
  892. return buf;
  893. }
  894. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  895. {
  896. struct i2c_adapter *a = i2c_get_adapter(1);
  897. int i;
  898. if (!a) {
  899. pr_err("can not get I2C 1\n");
  900. return;
  901. }
  902. /* read MAC address from EEPROM */
  903. for (i = 0; i < sizeof(pd->mac_addr); i++) {
  904. pd->mac_addr[i] = mac_read(a, 0x10 + i);
  905. msleep(10);
  906. }
  907. i2c_put_adapter(a);
  908. }
  909. #else
  910. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  911. {
  912. pr_err("unable to read sh_eth MAC address\n");
  913. }
  914. #endif
  915. #define PORT_HIZA 0xA4050158
  916. #define IODRIVEA 0xA405018A
  917. extern char ecovec24_sdram_enter_start;
  918. extern char ecovec24_sdram_enter_end;
  919. extern char ecovec24_sdram_leave_start;
  920. extern char ecovec24_sdram_leave_end;
  921. static int __init arch_setup(void)
  922. {
  923. struct clk *clk;
  924. /* register board specific self-refresh code */
  925. sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
  926. SUSP_SH_RSTANDBY,
  927. &ecovec24_sdram_enter_start,
  928. &ecovec24_sdram_enter_end,
  929. &ecovec24_sdram_leave_start,
  930. &ecovec24_sdram_leave_end);
  931. /* enable STATUS0, STATUS2 and PDSTATUS */
  932. gpio_request(GPIO_FN_STATUS0, NULL);
  933. gpio_request(GPIO_FN_STATUS2, NULL);
  934. gpio_request(GPIO_FN_PDSTATUS, NULL);
  935. /* enable SCIFA0 */
  936. gpio_request(GPIO_FN_SCIF0_TXD, NULL);
  937. gpio_request(GPIO_FN_SCIF0_RXD, NULL);
  938. /* enable debug LED */
  939. gpio_request(GPIO_PTG0, NULL);
  940. gpio_request(GPIO_PTG1, NULL);
  941. gpio_request(GPIO_PTG2, NULL);
  942. gpio_request(GPIO_PTG3, NULL);
  943. gpio_direction_output(GPIO_PTG0, 0);
  944. gpio_direction_output(GPIO_PTG1, 0);
  945. gpio_direction_output(GPIO_PTG2, 0);
  946. gpio_direction_output(GPIO_PTG3, 0);
  947. __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
  948. /* enable SH-Eth */
  949. gpio_request(GPIO_PTA1, NULL);
  950. gpio_direction_output(GPIO_PTA1, 1);
  951. mdelay(20);
  952. gpio_request(GPIO_FN_RMII_RXD0, NULL);
  953. gpio_request(GPIO_FN_RMII_RXD1, NULL);
  954. gpio_request(GPIO_FN_RMII_TXD0, NULL);
  955. gpio_request(GPIO_FN_RMII_TXD1, NULL);
  956. gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
  957. gpio_request(GPIO_FN_RMII_TX_EN, NULL);
  958. gpio_request(GPIO_FN_RMII_RX_ER, NULL);
  959. gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
  960. gpio_request(GPIO_FN_MDIO, NULL);
  961. gpio_request(GPIO_FN_MDC, NULL);
  962. gpio_request(GPIO_FN_LNKSTA, NULL);
  963. /* enable USB */
  964. __raw_writew(0x0000, 0xA4D80000);
  965. __raw_writew(0x0000, 0xA4D90000);
  966. gpio_request(GPIO_PTB3, NULL);
  967. gpio_request(GPIO_PTB4, NULL);
  968. gpio_request(GPIO_PTB5, NULL);
  969. gpio_direction_input(GPIO_PTB3);
  970. gpio_direction_output(GPIO_PTB4, 0);
  971. gpio_direction_output(GPIO_PTB5, 0);
  972. __raw_writew(0x0600, 0xa40501d4);
  973. __raw_writew(0x0600, 0xa4050192);
  974. if (gpio_get_value(GPIO_PTB3)) {
  975. printk(KERN_INFO "USB1 function is selected\n");
  976. usb1_common_device.name = "r8a66597_udc";
  977. } else {
  978. printk(KERN_INFO "USB1 host is selected\n");
  979. usb1_common_device.name = "r8a66597_hcd";
  980. }
  981. /* enable LCDC */
  982. gpio_request(GPIO_FN_LCDD23, NULL);
  983. gpio_request(GPIO_FN_LCDD22, NULL);
  984. gpio_request(GPIO_FN_LCDD21, NULL);
  985. gpio_request(GPIO_FN_LCDD20, NULL);
  986. gpio_request(GPIO_FN_LCDD19, NULL);
  987. gpio_request(GPIO_FN_LCDD18, NULL);
  988. gpio_request(GPIO_FN_LCDD17, NULL);
  989. gpio_request(GPIO_FN_LCDD16, NULL);
  990. gpio_request(GPIO_FN_LCDD15, NULL);
  991. gpio_request(GPIO_FN_LCDD14, NULL);
  992. gpio_request(GPIO_FN_LCDD13, NULL);
  993. gpio_request(GPIO_FN_LCDD12, NULL);
  994. gpio_request(GPIO_FN_LCDD11, NULL);
  995. gpio_request(GPIO_FN_LCDD10, NULL);
  996. gpio_request(GPIO_FN_LCDD9, NULL);
  997. gpio_request(GPIO_FN_LCDD8, NULL);
  998. gpio_request(GPIO_FN_LCDD7, NULL);
  999. gpio_request(GPIO_FN_LCDD6, NULL);
  1000. gpio_request(GPIO_FN_LCDD5, NULL);
  1001. gpio_request(GPIO_FN_LCDD4, NULL);
  1002. gpio_request(GPIO_FN_LCDD3, NULL);
  1003. gpio_request(GPIO_FN_LCDD2, NULL);
  1004. gpio_request(GPIO_FN_LCDD1, NULL);
  1005. gpio_request(GPIO_FN_LCDD0, NULL);
  1006. gpio_request(GPIO_FN_LCDDISP, NULL);
  1007. gpio_request(GPIO_FN_LCDHSYN, NULL);
  1008. gpio_request(GPIO_FN_LCDDCK, NULL);
  1009. gpio_request(GPIO_FN_LCDVSYN, NULL);
  1010. gpio_request(GPIO_FN_LCDDON, NULL);
  1011. gpio_request(GPIO_FN_LCDLCLK, NULL);
  1012. __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
  1013. gpio_request(GPIO_PTE6, NULL);
  1014. gpio_request(GPIO_PTU1, NULL);
  1015. gpio_request(GPIO_PTR1, NULL);
  1016. gpio_request(GPIO_PTA2, NULL);
  1017. gpio_direction_input(GPIO_PTE6);
  1018. gpio_direction_output(GPIO_PTU1, 0);
  1019. gpio_direction_output(GPIO_PTR1, 0);
  1020. gpio_direction_output(GPIO_PTA2, 0);
  1021. /* I/O buffer drive ability is high */
  1022. __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
  1023. if (gpio_get_value(GPIO_PTE6)) {
  1024. /* DVI */
  1025. lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
  1026. lcdc_info.ch[0].clock_divider = 1;
  1027. lcdc_info.ch[0].lcd_cfg = ecovec_dvi_modes;
  1028. lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_dvi_modes);
  1029. gpio_set_value(GPIO_PTA2, 1);
  1030. gpio_set_value(GPIO_PTU1, 1);
  1031. } else {
  1032. /* Panel */
  1033. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  1034. lcdc_info.ch[0].clock_divider = 2;
  1035. lcdc_info.ch[0].lcd_cfg = ecovec_lcd_modes;
  1036. lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_lcd_modes);
  1037. gpio_set_value(GPIO_PTR1, 1);
  1038. /* FIXME
  1039. *
  1040. * LCDDON control is needed for Panel,
  1041. * but current sh_mobile_lcdc driver doesn't control it.
  1042. * It is temporary correspondence
  1043. */
  1044. gpio_request(GPIO_PTF4, NULL);
  1045. gpio_direction_output(GPIO_PTF4, 1);
  1046. /* enable TouchScreen */
  1047. i2c_register_board_info(0, &ts_i2c_clients, 1);
  1048. irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
  1049. }
  1050. /* enable CEU0 */
  1051. gpio_request(GPIO_FN_VIO0_D15, NULL);
  1052. gpio_request(GPIO_FN_VIO0_D14, NULL);
  1053. gpio_request(GPIO_FN_VIO0_D13, NULL);
  1054. gpio_request(GPIO_FN_VIO0_D12, NULL);
  1055. gpio_request(GPIO_FN_VIO0_D11, NULL);
  1056. gpio_request(GPIO_FN_VIO0_D10, NULL);
  1057. gpio_request(GPIO_FN_VIO0_D9, NULL);
  1058. gpio_request(GPIO_FN_VIO0_D8, NULL);
  1059. gpio_request(GPIO_FN_VIO0_D7, NULL);
  1060. gpio_request(GPIO_FN_VIO0_D6, NULL);
  1061. gpio_request(GPIO_FN_VIO0_D5, NULL);
  1062. gpio_request(GPIO_FN_VIO0_D4, NULL);
  1063. gpio_request(GPIO_FN_VIO0_D3, NULL);
  1064. gpio_request(GPIO_FN_VIO0_D2, NULL);
  1065. gpio_request(GPIO_FN_VIO0_D1, NULL);
  1066. gpio_request(GPIO_FN_VIO0_D0, NULL);
  1067. gpio_request(GPIO_FN_VIO0_VD, NULL);
  1068. gpio_request(GPIO_FN_VIO0_CLK, NULL);
  1069. gpio_request(GPIO_FN_VIO0_FLD, NULL);
  1070. gpio_request(GPIO_FN_VIO0_HD, NULL);
  1071. platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
  1072. /* enable CEU1 */
  1073. gpio_request(GPIO_FN_VIO1_D7, NULL);
  1074. gpio_request(GPIO_FN_VIO1_D6, NULL);
  1075. gpio_request(GPIO_FN_VIO1_D5, NULL);
  1076. gpio_request(GPIO_FN_VIO1_D4, NULL);
  1077. gpio_request(GPIO_FN_VIO1_D3, NULL);
  1078. gpio_request(GPIO_FN_VIO1_D2, NULL);
  1079. gpio_request(GPIO_FN_VIO1_D1, NULL);
  1080. gpio_request(GPIO_FN_VIO1_D0, NULL);
  1081. gpio_request(GPIO_FN_VIO1_FLD, NULL);
  1082. gpio_request(GPIO_FN_VIO1_HD, NULL);
  1083. gpio_request(GPIO_FN_VIO1_VD, NULL);
  1084. gpio_request(GPIO_FN_VIO1_CLK, NULL);
  1085. platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
  1086. /* enable KEYSC */
  1087. gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
  1088. gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
  1089. gpio_request(GPIO_FN_KEYOUT3, NULL);
  1090. gpio_request(GPIO_FN_KEYOUT2, NULL);
  1091. gpio_request(GPIO_FN_KEYOUT1, NULL);
  1092. gpio_request(GPIO_FN_KEYOUT0, NULL);
  1093. gpio_request(GPIO_FN_KEYIN0, NULL);
  1094. /* enable user debug switch */
  1095. gpio_request(GPIO_PTR0, NULL);
  1096. gpio_request(GPIO_PTR4, NULL);
  1097. gpio_request(GPIO_PTR5, NULL);
  1098. gpio_request(GPIO_PTR6, NULL);
  1099. gpio_direction_input(GPIO_PTR0);
  1100. gpio_direction_input(GPIO_PTR4);
  1101. gpio_direction_input(GPIO_PTR5);
  1102. gpio_direction_input(GPIO_PTR6);
  1103. #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
  1104. /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
  1105. gpio_request(GPIO_FN_SDHI0CD, NULL);
  1106. gpio_request(GPIO_FN_SDHI0WP, NULL);
  1107. gpio_request(GPIO_FN_SDHI0CMD, NULL);
  1108. gpio_request(GPIO_FN_SDHI0CLK, NULL);
  1109. gpio_request(GPIO_FN_SDHI0D3, NULL);
  1110. gpio_request(GPIO_FN_SDHI0D2, NULL);
  1111. gpio_request(GPIO_FN_SDHI0D1, NULL);
  1112. gpio_request(GPIO_FN_SDHI0D0, NULL);
  1113. gpio_request(GPIO_PTB6, NULL);
  1114. gpio_direction_output(GPIO_PTB6, 0);
  1115. #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
  1116. /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
  1117. gpio_request(GPIO_FN_SDHI1CD, NULL);
  1118. gpio_request(GPIO_FN_SDHI1WP, NULL);
  1119. gpio_request(GPIO_FN_SDHI1CMD, NULL);
  1120. gpio_request(GPIO_FN_SDHI1CLK, NULL);
  1121. gpio_request(GPIO_FN_SDHI1D3, NULL);
  1122. gpio_request(GPIO_FN_SDHI1D2, NULL);
  1123. gpio_request(GPIO_FN_SDHI1D1, NULL);
  1124. gpio_request(GPIO_FN_SDHI1D0, NULL);
  1125. gpio_request(GPIO_PTB7, NULL);
  1126. gpio_direction_output(GPIO_PTB7, 0);
  1127. /* I/O buffer drive ability is high for SDHI1 */
  1128. __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
  1129. #endif /* CONFIG_MMC_SH_MMCIF */
  1130. #else
  1131. /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
  1132. gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
  1133. gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
  1134. gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
  1135. gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
  1136. gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
  1137. gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
  1138. gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
  1139. gpio_request(GPIO_PTY6, NULL); /* write protect */
  1140. gpio_direction_input(GPIO_PTY6);
  1141. gpio_request(GPIO_PTY7, NULL); /* card detect */
  1142. gpio_direction_input(GPIO_PTY7);
  1143. spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
  1144. #endif
  1145. /* enable Video */
  1146. gpio_request(GPIO_PTU2, NULL);
  1147. gpio_direction_output(GPIO_PTU2, 1);
  1148. /* enable Camera */
  1149. gpio_request(GPIO_PTA3, NULL);
  1150. gpio_request(GPIO_PTA4, NULL);
  1151. gpio_direction_output(GPIO_PTA3, 0);
  1152. gpio_direction_output(GPIO_PTA4, 0);
  1153. /* enable FSI */
  1154. gpio_request(GPIO_FN_FSIMCKB, NULL);
  1155. gpio_request(GPIO_FN_FSIIBSD, NULL);
  1156. gpio_request(GPIO_FN_FSIOBSD, NULL);
  1157. gpio_request(GPIO_FN_FSIIBBCK, NULL);
  1158. gpio_request(GPIO_FN_FSIIBLRCK, NULL);
  1159. gpio_request(GPIO_FN_FSIOBBCK, NULL);
  1160. gpio_request(GPIO_FN_FSIOBLRCK, NULL);
  1161. gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
  1162. /* set SPU2 clock to 83.4 MHz */
  1163. clk = clk_get(NULL, "spu_clk");
  1164. if (!IS_ERR(clk)) {
  1165. clk_set_rate(clk, clk_round_rate(clk, 83333333));
  1166. clk_put(clk);
  1167. }
  1168. /* change parent of FSI B */
  1169. clk = clk_get(NULL, "fsib_clk");
  1170. if (!IS_ERR(clk)) {
  1171. /* 48kHz dummy clock was used to make sure 1/1 divide */
  1172. clk_set_rate(&sh7724_fsimckb_clk, 48000);
  1173. clk_set_parent(clk, &sh7724_fsimckb_clk);
  1174. clk_set_rate(clk, 48000);
  1175. clk_put(clk);
  1176. }
  1177. gpio_request(GPIO_PTU0, NULL);
  1178. gpio_direction_output(GPIO_PTU0, 0);
  1179. mdelay(20);
  1180. /* enable motion sensor */
  1181. gpio_request(GPIO_FN_INTC_IRQ1, NULL);
  1182. gpio_direction_input(GPIO_FN_INTC_IRQ1);
  1183. /* set VPU clock to 166 MHz */
  1184. clk = clk_get(NULL, "vpu_clk");
  1185. if (!IS_ERR(clk)) {
  1186. clk_set_rate(clk, clk_round_rate(clk, 166000000));
  1187. clk_put(clk);
  1188. }
  1189. /* enable IrDA */
  1190. gpio_request(GPIO_FN_IRDA_OUT, NULL);
  1191. gpio_request(GPIO_FN_IRDA_IN, NULL);
  1192. gpio_request(GPIO_PTU5, NULL);
  1193. gpio_direction_output(GPIO_PTU5, 0);
  1194. #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
  1195. /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
  1196. gpio_request(GPIO_FN_MMC_D7, NULL);
  1197. gpio_request(GPIO_FN_MMC_D6, NULL);
  1198. gpio_request(GPIO_FN_MMC_D5, NULL);
  1199. gpio_request(GPIO_FN_MMC_D4, NULL);
  1200. gpio_request(GPIO_FN_MMC_D3, NULL);
  1201. gpio_request(GPIO_FN_MMC_D2, NULL);
  1202. gpio_request(GPIO_FN_MMC_D1, NULL);
  1203. gpio_request(GPIO_FN_MMC_D0, NULL);
  1204. gpio_request(GPIO_FN_MMC_CLK, NULL);
  1205. gpio_request(GPIO_FN_MMC_CMD, NULL);
  1206. gpio_request(GPIO_PTB7, NULL);
  1207. gpio_direction_output(GPIO_PTB7, 0);
  1208. /* I/O buffer drive ability is high for MMCIF */
  1209. __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
  1210. #endif
  1211. /* enable I2C device */
  1212. i2c_register_board_info(0, i2c0_devices,
  1213. ARRAY_SIZE(i2c0_devices));
  1214. i2c_register_board_info(1, i2c1_devices,
  1215. ARRAY_SIZE(i2c1_devices));
  1216. #if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE)
  1217. /* VOU */
  1218. gpio_request(GPIO_FN_DV_D15, NULL);
  1219. gpio_request(GPIO_FN_DV_D14, NULL);
  1220. gpio_request(GPIO_FN_DV_D13, NULL);
  1221. gpio_request(GPIO_FN_DV_D12, NULL);
  1222. gpio_request(GPIO_FN_DV_D11, NULL);
  1223. gpio_request(GPIO_FN_DV_D10, NULL);
  1224. gpio_request(GPIO_FN_DV_D9, NULL);
  1225. gpio_request(GPIO_FN_DV_D8, NULL);
  1226. gpio_request(GPIO_FN_DV_CLKI, NULL);
  1227. gpio_request(GPIO_FN_DV_CLK, NULL);
  1228. gpio_request(GPIO_FN_DV_VSYNC, NULL);
  1229. gpio_request(GPIO_FN_DV_HSYNC, NULL);
  1230. /* AK8813 power / reset sequence */
  1231. gpio_request(GPIO_PTG4, NULL);
  1232. gpio_request(GPIO_PTU3, NULL);
  1233. /* Reset */
  1234. gpio_direction_output(GPIO_PTG4, 0);
  1235. /* Power down */
  1236. gpio_direction_output(GPIO_PTU3, 1);
  1237. udelay(10);
  1238. /* Power up, reset */
  1239. gpio_set_value(GPIO_PTU3, 0);
  1240. udelay(10);
  1241. /* Remove reset */
  1242. gpio_set_value(GPIO_PTG4, 1);
  1243. #endif
  1244. return platform_add_devices(ecovec_devices,
  1245. ARRAY_SIZE(ecovec_devices));
  1246. }
  1247. arch_initcall(arch_setup);
  1248. static int __init devices_setup(void)
  1249. {
  1250. sh_eth_init(&sh_eth_plat);
  1251. return 0;
  1252. }
  1253. device_initcall(devices_setup);
  1254. static struct sh_machine_vector mv_ecovec __initmv = {
  1255. .mv_name = "R0P7724 (EcoVec)",
  1256. };