irq.c 6.7 KB

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  1. /*
  2. * Copyright IBM Corp. 2004,2011
  3. * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
  4. * Holger Smolinski <Holger.Smolinski@de.ibm.com>,
  5. * Thomas Spatzier <tspat@de.ibm.com>,
  6. *
  7. * This file contains interrupt related functions.
  8. */
  9. #include <linux/kernel_stat.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/seq_file.h>
  12. #include <linux/proc_fs.h>
  13. #include <linux/profile.h>
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/ftrace.h>
  17. #include <linux/errno.h>
  18. #include <linux/slab.h>
  19. #include <linux/cpu.h>
  20. #include <asm/irq_regs.h>
  21. #include <asm/cputime.h>
  22. #include <asm/lowcore.h>
  23. #include <asm/irq.h>
  24. #include "entry.h"
  25. struct irq_class {
  26. char *name;
  27. char *desc;
  28. };
  29. static const struct irq_class intrclass_names[] = {
  30. {.name = "EXT" },
  31. {.name = "I/O" },
  32. {.name = "CLK", .desc = "[EXT] Clock Comparator" },
  33. {.name = "EXC", .desc = "[EXT] External Call" },
  34. {.name = "EMS", .desc = "[EXT] Emergency Signal" },
  35. {.name = "TMR", .desc = "[EXT] CPU Timer" },
  36. {.name = "TAL", .desc = "[EXT] Timing Alert" },
  37. {.name = "PFL", .desc = "[EXT] Pseudo Page Fault" },
  38. {.name = "DSD", .desc = "[EXT] DASD Diag" },
  39. {.name = "VRT", .desc = "[EXT] Virtio" },
  40. {.name = "SCP", .desc = "[EXT] Service Call" },
  41. {.name = "IUC", .desc = "[EXT] IUCV" },
  42. {.name = "CPM", .desc = "[EXT] CPU Measurement" },
  43. {.name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt" },
  44. {.name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt" },
  45. {.name = "DAS", .desc = "[I/O] DASD" },
  46. {.name = "C15", .desc = "[I/O] 3215" },
  47. {.name = "C70", .desc = "[I/O] 3270" },
  48. {.name = "TAP", .desc = "[I/O] Tape" },
  49. {.name = "VMR", .desc = "[I/O] Unit Record Devices" },
  50. {.name = "LCS", .desc = "[I/O] LCS" },
  51. {.name = "CLW", .desc = "[I/O] CLAW" },
  52. {.name = "CTC", .desc = "[I/O] CTC" },
  53. {.name = "APB", .desc = "[I/O] AP Bus" },
  54. {.name = "CSC", .desc = "[I/O] CHSC Subchannel" },
  55. {.name = "NMI", .desc = "[NMI] Machine Check" },
  56. };
  57. /*
  58. * show_interrupts is needed by /proc/interrupts.
  59. */
  60. int show_interrupts(struct seq_file *p, void *v)
  61. {
  62. int i = *(loff_t *) v, j;
  63. get_online_cpus();
  64. if (i == 0) {
  65. seq_puts(p, " ");
  66. for_each_online_cpu(j)
  67. seq_printf(p, "CPU%d ",j);
  68. seq_putc(p, '\n');
  69. }
  70. if (i < NR_IRQS) {
  71. seq_printf(p, "%s: ", intrclass_names[i].name);
  72. #ifndef CONFIG_SMP
  73. seq_printf(p, "%10u ", kstat_irqs(i));
  74. #else
  75. for_each_online_cpu(j)
  76. seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
  77. #endif
  78. if (intrclass_names[i].desc)
  79. seq_printf(p, " %s", intrclass_names[i].desc);
  80. seq_putc(p, '\n');
  81. }
  82. put_online_cpus();
  83. return 0;
  84. }
  85. /*
  86. * Switch to the asynchronous interrupt stack for softirq execution.
  87. */
  88. asmlinkage void do_softirq(void)
  89. {
  90. unsigned long flags, old, new;
  91. if (in_interrupt())
  92. return;
  93. local_irq_save(flags);
  94. if (local_softirq_pending()) {
  95. /* Get current stack pointer. */
  96. asm volatile("la %0,0(15)" : "=a" (old));
  97. /* Check against async. stack address range. */
  98. new = S390_lowcore.async_stack;
  99. if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) {
  100. /* Need to switch to the async. stack. */
  101. new -= STACK_FRAME_OVERHEAD;
  102. ((struct stack_frame *) new)->back_chain = old;
  103. asm volatile(" la 15,0(%0)\n"
  104. " basr 14,%2\n"
  105. " la 15,0(%1)\n"
  106. : : "a" (new), "a" (old),
  107. "a" (__do_softirq)
  108. : "0", "1", "2", "3", "4", "5", "14",
  109. "cc", "memory" );
  110. } else
  111. /* We are already on the async stack. */
  112. __do_softirq();
  113. }
  114. local_irq_restore(flags);
  115. }
  116. #ifdef CONFIG_PROC_FS
  117. void init_irq_proc(void)
  118. {
  119. struct proc_dir_entry *root_irq_dir;
  120. root_irq_dir = proc_mkdir("irq", NULL);
  121. create_prof_cpu_mask(root_irq_dir);
  122. }
  123. #endif
  124. /*
  125. * ext_int_hash[index] is the list head for all external interrupts that hash
  126. * to this index.
  127. */
  128. static struct list_head ext_int_hash[256];
  129. struct ext_int_info {
  130. ext_int_handler_t handler;
  131. u16 code;
  132. struct list_head entry;
  133. struct rcu_head rcu;
  134. };
  135. /* ext_int_hash_lock protects the handler lists for external interrupts */
  136. DEFINE_SPINLOCK(ext_int_hash_lock);
  137. static void __init init_external_interrupts(void)
  138. {
  139. int idx;
  140. for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++)
  141. INIT_LIST_HEAD(&ext_int_hash[idx]);
  142. }
  143. static inline int ext_hash(u16 code)
  144. {
  145. return (code + (code >> 9)) & 0xff;
  146. }
  147. static void ext_int_hash_update(struct rcu_head *head)
  148. {
  149. struct ext_int_info *p = container_of(head, struct ext_int_info, rcu);
  150. kfree(p);
  151. }
  152. int register_external_interrupt(u16 code, ext_int_handler_t handler)
  153. {
  154. struct ext_int_info *p;
  155. unsigned long flags;
  156. int index;
  157. p = kmalloc(sizeof(*p), GFP_ATOMIC);
  158. if (!p)
  159. return -ENOMEM;
  160. p->code = code;
  161. p->handler = handler;
  162. index = ext_hash(code);
  163. spin_lock_irqsave(&ext_int_hash_lock, flags);
  164. list_add_rcu(&p->entry, &ext_int_hash[index]);
  165. spin_unlock_irqrestore(&ext_int_hash_lock, flags);
  166. return 0;
  167. }
  168. EXPORT_SYMBOL(register_external_interrupt);
  169. int unregister_external_interrupt(u16 code, ext_int_handler_t handler)
  170. {
  171. struct ext_int_info *p;
  172. unsigned long flags;
  173. int index = ext_hash(code);
  174. spin_lock_irqsave(&ext_int_hash_lock, flags);
  175. list_for_each_entry_rcu(p, &ext_int_hash[index], entry)
  176. if (p->code == code && p->handler == handler) {
  177. list_del_rcu(&p->entry);
  178. call_rcu(&p->rcu, ext_int_hash_update);
  179. }
  180. spin_unlock_irqrestore(&ext_int_hash_lock, flags);
  181. return 0;
  182. }
  183. EXPORT_SYMBOL(unregister_external_interrupt);
  184. void __irq_entry do_extint(struct pt_regs *regs, unsigned int ext_int_code,
  185. unsigned int param32, unsigned long param64)
  186. {
  187. struct pt_regs *old_regs;
  188. unsigned short code;
  189. struct ext_int_info *p;
  190. int index;
  191. code = (unsigned short) ext_int_code;
  192. old_regs = set_irq_regs(regs);
  193. s390_idle_check(regs, S390_lowcore.int_clock,
  194. S390_lowcore.async_enter_timer);
  195. irq_enter();
  196. if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator)
  197. /* Serve timer interrupts first. */
  198. clock_comparator_work();
  199. kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++;
  200. if (code != 0x1004)
  201. __get_cpu_var(s390_idle).nohz_delay = 1;
  202. index = ext_hash(code);
  203. rcu_read_lock();
  204. list_for_each_entry_rcu(p, &ext_int_hash[index], entry)
  205. if (likely(p->code == code))
  206. p->handler(ext_int_code, param32, param64);
  207. rcu_read_unlock();
  208. irq_exit();
  209. set_irq_regs(old_regs);
  210. }
  211. void __init init_IRQ(void)
  212. {
  213. init_external_interrupts();
  214. }
  215. static DEFINE_SPINLOCK(sc_irq_lock);
  216. static int sc_irq_refcount;
  217. void service_subclass_irq_register(void)
  218. {
  219. spin_lock(&sc_irq_lock);
  220. if (!sc_irq_refcount)
  221. ctl_set_bit(0, 9);
  222. sc_irq_refcount++;
  223. spin_unlock(&sc_irq_lock);
  224. }
  225. EXPORT_SYMBOL(service_subclass_irq_register);
  226. void service_subclass_irq_unregister(void)
  227. {
  228. spin_lock(&sc_irq_lock);
  229. sc_irq_refcount--;
  230. if (!sc_irq_refcount)
  231. ctl_clear_bit(0, 9);
  232. spin_unlock(&sc_irq_lock);
  233. }
  234. EXPORT_SYMBOL(service_subclass_irq_unregister);