pci.h 4.7 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or
  3. * modify it under the terms of the GNU General Public License
  4. * as published by the Free Software Foundation; either version
  5. * 2 of the License, or (at your option) any later version.
  6. *
  7. * Based on powerpc version
  8. */
  9. #ifndef __ASM_MICROBLAZE_PCI_H
  10. #define __ASM_MICROBLAZE_PCI_H
  11. #ifdef __KERNEL__
  12. #include <linux/types.h>
  13. #include <linux/slab.h>
  14. #include <linux/string.h>
  15. #include <linux/dma-mapping.h>
  16. #include <linux/pci.h>
  17. #include <asm/scatterlist.h>
  18. #include <asm/io.h>
  19. #include <asm/prom.h>
  20. #include <asm/pci-bridge.h>
  21. #define PCIBIOS_MIN_IO 0x1000
  22. #define PCIBIOS_MIN_MEM 0x10000000
  23. struct pci_dev;
  24. /* Values for the `which' argument to sys_pciconfig_iobase syscall. */
  25. #define IOBASE_BRIDGE_NUMBER 0
  26. #define IOBASE_MEMORY 1
  27. #define IOBASE_IO 2
  28. #define IOBASE_ISA_IO 3
  29. #define IOBASE_ISA_MEM 4
  30. #define pcibios_scan_all_fns(a, b) 0
  31. /*
  32. * Set this to 1 if you want the kernel to re-assign all PCI
  33. * bus numbers (don't do that on ppc64 yet !)
  34. */
  35. #define pcibios_assign_all_busses() 0
  36. static inline void pcibios_set_master(struct pci_dev *dev)
  37. {
  38. /* No special bus mastering setup handling */
  39. }
  40. static inline void pcibios_penalize_isa_irq(int irq, int active)
  41. {
  42. /* We don't do dynamic PCI IRQ allocation */
  43. }
  44. #ifdef CONFIG_PCI
  45. extern void set_pci_dma_ops(struct dma_map_ops *dma_ops);
  46. extern struct dma_map_ops *get_pci_dma_ops(void);
  47. #else /* CONFIG_PCI */
  48. #define set_pci_dma_ops(d)
  49. #define get_pci_dma_ops() NULL
  50. #endif
  51. #ifdef CONFIG_PCI
  52. static inline void pci_dma_burst_advice(struct pci_dev *pdev,
  53. enum pci_dma_burst_strategy *strat,
  54. unsigned long *strategy_parameter)
  55. {
  56. *strat = PCI_DMA_BURST_INFINITY;
  57. *strategy_parameter = ~0UL;
  58. }
  59. #endif
  60. extern int pci_domain_nr(struct pci_bus *bus);
  61. /* Decide whether to display the domain number in /proc */
  62. extern int pci_proc_domain(struct pci_bus *bus);
  63. struct vm_area_struct;
  64. /* Map a range of PCI memory or I/O space for a device into user space */
  65. int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
  66. enum pci_mmap_state mmap_state, int write_combine);
  67. /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
  68. #define HAVE_PCI_MMAP 1
  69. extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
  70. size_t count);
  71. extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
  72. size_t count);
  73. extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
  74. struct vm_area_struct *vma,
  75. enum pci_mmap_state mmap_state);
  76. #define HAVE_PCI_LEGACY 1
  77. /* The PCI address space does equal the physical memory
  78. * address space (no IOMMU). The IDE and SCSI device layers use
  79. * this boolean for bounce buffer decisions.
  80. */
  81. #define PCI_DMA_BUS_IS_PHYS (1)
  82. extern void pcibios_resource_to_bus(struct pci_dev *dev,
  83. struct pci_bus_region *region,
  84. struct resource *res);
  85. extern void pcibios_bus_to_resource(struct pci_dev *dev,
  86. struct resource *res,
  87. struct pci_bus_region *region);
  88. static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
  89. struct resource *res)
  90. {
  91. struct resource *root = NULL;
  92. if (res->flags & IORESOURCE_IO)
  93. root = &ioport_resource;
  94. if (res->flags & IORESOURCE_MEM)
  95. root = &iomem_resource;
  96. return root;
  97. }
  98. extern void pcibios_claim_one_bus(struct pci_bus *b);
  99. extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
  100. extern void pcibios_resource_survey(void);
  101. extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
  102. extern int remove_phb_dynamic(struct pci_controller *phb);
  103. extern struct pci_dev *of_create_pci_dev(struct device_node *node,
  104. struct pci_bus *bus, int devfn);
  105. extern void of_scan_pci_bridge(struct device_node *node,
  106. struct pci_dev *dev);
  107. extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
  108. extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
  109. extern int pci_read_irq_line(struct pci_dev *dev);
  110. extern int pci_bus_find_capability(struct pci_bus *bus,
  111. unsigned int devfn, int cap);
  112. struct file;
  113. extern pgprot_t pci_phys_mem_access_prot(struct file *file,
  114. unsigned long pfn,
  115. unsigned long size,
  116. pgprot_t prot);
  117. #define HAVE_ARCH_PCI_RESOURCE_TO_USER
  118. extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
  119. const struct resource *rsrc,
  120. resource_size_t *start, resource_size_t *end);
  121. extern void pcibios_setup_bus_devices(struct pci_bus *bus);
  122. extern void pcibios_setup_bus_self(struct pci_bus *bus);
  123. /* This part of code was originally in xilinx-pci.h */
  124. #ifdef CONFIG_PCI_XILINX
  125. extern void __init xilinx_pci_init(void);
  126. #else
  127. static inline void __init xilinx_pci_init(void) { return; }
  128. #endif
  129. #include <asm-generic/pci-dma-compat.h>
  130. #endif /* __KERNEL__ */
  131. #endif /* __ASM_MICROBLAZE_PCI_H */