devs.c 35 KB

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  1. /* linux/arch/arm/plat-samsung/devs.c
  2. *
  3. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * Base SAMSUNG platform device definitions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/list.h>
  16. #include <linux/timer.h>
  17. #include <linux/init.h>
  18. #include <linux/serial_core.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/io.h>
  21. #include <linux/slab.h>
  22. #include <linux/string.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/fb.h>
  25. #include <linux/gfp.h>
  26. #include <linux/mtd/mtd.h>
  27. #include <linux/mtd/onenand.h>
  28. #include <linux/mtd/partitions.h>
  29. #include <linux/mmc/host.h>
  30. #include <linux/ioport.h>
  31. #include <asm/irq.h>
  32. #include <asm/pmu.h>
  33. #include <asm/mach/arch.h>
  34. #include <asm/mach/map.h>
  35. #include <asm/mach/irq.h>
  36. #include <mach/hardware.h>
  37. #include <mach/dma.h>
  38. #include <mach/irqs.h>
  39. #include <mach/map.h>
  40. #include <plat/cpu.h>
  41. #include <plat/devs.h>
  42. #include <plat/adc.h>
  43. #include <plat/ata.h>
  44. #include <plat/ehci.h>
  45. #include <plat/fb.h>
  46. #include <plat/fb-s3c2410.h>
  47. #include <plat/hwmon.h>
  48. #include <plat/iic.h>
  49. #include <plat/keypad.h>
  50. #include <plat/mci.h>
  51. #include <plat/nand.h>
  52. #include <plat/sdhci.h>
  53. #include <plat/ts.h>
  54. #include <plat/udc.h>
  55. #include <plat/usb-control.h>
  56. #include <plat/usb-phy.h>
  57. #include <plat/regs-iic.h>
  58. #include <plat/regs-serial.h>
  59. #include <plat/regs-spi.h>
  60. static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
  61. /* AC97 */
  62. #ifdef CONFIG_CPU_S3C2440
  63. static struct resource s3c_ac97_resource[] = {
  64. [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
  65. [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
  66. [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
  67. [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
  68. [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
  69. };
  70. struct platform_device s3c_device_ac97 = {
  71. .name = "samsung-ac97",
  72. .id = -1,
  73. .num_resources = ARRAY_SIZE(s3c_ac97_resource),
  74. .resource = s3c_ac97_resource,
  75. .dev = {
  76. .dma_mask = &samsung_device_dma_mask,
  77. .coherent_dma_mask = DMA_BIT_MASK(32),
  78. }
  79. };
  80. #endif /* CONFIG_CPU_S3C2440 */
  81. /* ADC */
  82. #ifdef CONFIG_PLAT_S3C24XX
  83. static struct resource s3c_adc_resource[] = {
  84. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  85. [1] = DEFINE_RES_IRQ(IRQ_TC),
  86. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  87. };
  88. struct platform_device s3c_device_adc = {
  89. .name = "s3c24xx-adc",
  90. .id = -1,
  91. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  92. .resource = s3c_adc_resource,
  93. };
  94. #endif /* CONFIG_PLAT_S3C24XX */
  95. #if defined(CONFIG_SAMSUNG_DEV_ADC)
  96. static struct resource s3c_adc_resource[] = {
  97. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  98. [1] = DEFINE_RES_IRQ(IRQ_TC),
  99. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  100. };
  101. struct platform_device s3c_device_adc = {
  102. .name = "samsung-adc",
  103. .id = -1,
  104. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  105. .resource = s3c_adc_resource,
  106. };
  107. #endif /* CONFIG_SAMSUNG_DEV_ADC */
  108. /* Camif Controller */
  109. #ifdef CONFIG_CPU_S3C2440
  110. static struct resource s3c_camif_resource[] = {
  111. [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
  112. [1] = DEFINE_RES_IRQ(IRQ_CAM),
  113. };
  114. struct platform_device s3c_device_camif = {
  115. .name = "s3c2440-camif",
  116. .id = -1,
  117. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  118. .resource = s3c_camif_resource,
  119. .dev = {
  120. .dma_mask = &samsung_device_dma_mask,
  121. .coherent_dma_mask = DMA_BIT_MASK(32),
  122. }
  123. };
  124. #endif /* CONFIG_CPU_S3C2440 */
  125. /* ASOC DMA */
  126. struct platform_device samsung_asoc_dma = {
  127. .name = "samsung-audio",
  128. .id = -1,
  129. .dev = {
  130. .dma_mask = &samsung_device_dma_mask,
  131. .coherent_dma_mask = DMA_BIT_MASK(32),
  132. }
  133. };
  134. struct platform_device samsung_asoc_idma = {
  135. .name = "samsung-idma",
  136. .id = -1,
  137. .dev = {
  138. .dma_mask = &samsung_device_dma_mask,
  139. .coherent_dma_mask = DMA_BIT_MASK(32),
  140. }
  141. };
  142. /* FB */
  143. #ifdef CONFIG_S3C_DEV_FB
  144. static struct resource s3c_fb_resource[] = {
  145. [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
  146. [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
  147. [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
  148. [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
  149. };
  150. struct platform_device s3c_device_fb = {
  151. .name = "s3c-fb",
  152. .id = -1,
  153. .num_resources = ARRAY_SIZE(s3c_fb_resource),
  154. .resource = s3c_fb_resource,
  155. .dev = {
  156. .dma_mask = &samsung_device_dma_mask,
  157. .coherent_dma_mask = DMA_BIT_MASK(32),
  158. },
  159. };
  160. void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
  161. {
  162. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  163. &s3c_device_fb);
  164. }
  165. #endif /* CONFIG_S3C_DEV_FB */
  166. /* FIMC */
  167. #ifdef CONFIG_S5P_DEV_FIMC0
  168. static struct resource s5p_fimc0_resource[] = {
  169. [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
  170. [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
  171. };
  172. struct platform_device s5p_device_fimc0 = {
  173. .name = "s5p-fimc",
  174. .id = 0,
  175. .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
  176. .resource = s5p_fimc0_resource,
  177. .dev = {
  178. .dma_mask = &samsung_device_dma_mask,
  179. .coherent_dma_mask = DMA_BIT_MASK(32),
  180. },
  181. };
  182. struct platform_device s5p_device_fimc_md = {
  183. .name = "s5p-fimc-md",
  184. .id = -1,
  185. };
  186. #endif /* CONFIG_S5P_DEV_FIMC0 */
  187. #ifdef CONFIG_S5P_DEV_FIMC1
  188. static struct resource s5p_fimc1_resource[] = {
  189. [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
  190. [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
  191. };
  192. struct platform_device s5p_device_fimc1 = {
  193. .name = "s5p-fimc",
  194. .id = 1,
  195. .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
  196. .resource = s5p_fimc1_resource,
  197. .dev = {
  198. .dma_mask = &samsung_device_dma_mask,
  199. .coherent_dma_mask = DMA_BIT_MASK(32),
  200. },
  201. };
  202. #endif /* CONFIG_S5P_DEV_FIMC1 */
  203. #ifdef CONFIG_S5P_DEV_FIMC2
  204. static struct resource s5p_fimc2_resource[] = {
  205. [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
  206. [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
  207. };
  208. struct platform_device s5p_device_fimc2 = {
  209. .name = "s5p-fimc",
  210. .id = 2,
  211. .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
  212. .resource = s5p_fimc2_resource,
  213. .dev = {
  214. .dma_mask = &samsung_device_dma_mask,
  215. .coherent_dma_mask = DMA_BIT_MASK(32),
  216. },
  217. };
  218. #endif /* CONFIG_S5P_DEV_FIMC2 */
  219. #ifdef CONFIG_S5P_DEV_FIMC3
  220. static struct resource s5p_fimc3_resource[] = {
  221. [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
  222. [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
  223. };
  224. struct platform_device s5p_device_fimc3 = {
  225. .name = "s5p-fimc",
  226. .id = 3,
  227. .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
  228. .resource = s5p_fimc3_resource,
  229. .dev = {
  230. .dma_mask = &samsung_device_dma_mask,
  231. .coherent_dma_mask = DMA_BIT_MASK(32),
  232. },
  233. };
  234. #endif /* CONFIG_S5P_DEV_FIMC3 */
  235. /* FIMD0 */
  236. #ifdef CONFIG_S5P_DEV_FIMD0
  237. static struct resource s5p_fimd0_resource[] = {
  238. [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
  239. [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
  240. [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
  241. [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
  242. };
  243. struct platform_device s5p_device_fimd0 = {
  244. .name = "s5p-fb",
  245. .id = 0,
  246. .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
  247. .resource = s5p_fimd0_resource,
  248. .dev = {
  249. .dma_mask = &samsung_device_dma_mask,
  250. .coherent_dma_mask = DMA_BIT_MASK(32),
  251. },
  252. };
  253. void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
  254. {
  255. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  256. &s5p_device_fimd0);
  257. }
  258. #endif /* CONFIG_S5P_DEV_FIMD0 */
  259. /* HWMON */
  260. #ifdef CONFIG_S3C_DEV_HWMON
  261. struct platform_device s3c_device_hwmon = {
  262. .name = "s3c-hwmon",
  263. .id = -1,
  264. .dev.parent = &s3c_device_adc.dev,
  265. };
  266. void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
  267. {
  268. s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
  269. &s3c_device_hwmon);
  270. }
  271. #endif /* CONFIG_S3C_DEV_HWMON */
  272. /* HSMMC */
  273. #ifdef CONFIG_S3C_DEV_HSMMC
  274. static struct resource s3c_hsmmc_resource[] = {
  275. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
  276. [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
  277. };
  278. struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
  279. .max_width = 4,
  280. .host_caps = (MMC_CAP_4_BIT_DATA |
  281. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  282. .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
  283. };
  284. struct platform_device s3c_device_hsmmc0 = {
  285. .name = "s3c-sdhci",
  286. .id = 0,
  287. .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
  288. .resource = s3c_hsmmc_resource,
  289. .dev = {
  290. .dma_mask = &samsung_device_dma_mask,
  291. .coherent_dma_mask = DMA_BIT_MASK(32),
  292. .platform_data = &s3c_hsmmc0_def_platdata,
  293. },
  294. };
  295. void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
  296. {
  297. s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
  298. }
  299. #endif /* CONFIG_S3C_DEV_HSMMC */
  300. #ifdef CONFIG_S3C_DEV_HSMMC1
  301. static struct resource s3c_hsmmc1_resource[] = {
  302. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
  303. [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
  304. };
  305. struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
  306. .max_width = 4,
  307. .host_caps = (MMC_CAP_4_BIT_DATA |
  308. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  309. .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
  310. };
  311. struct platform_device s3c_device_hsmmc1 = {
  312. .name = "s3c-sdhci",
  313. .id = 1,
  314. .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
  315. .resource = s3c_hsmmc1_resource,
  316. .dev = {
  317. .dma_mask = &samsung_device_dma_mask,
  318. .coherent_dma_mask = DMA_BIT_MASK(32),
  319. .platform_data = &s3c_hsmmc1_def_platdata,
  320. },
  321. };
  322. void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
  323. {
  324. s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
  325. }
  326. #endif /* CONFIG_S3C_DEV_HSMMC1 */
  327. /* HSMMC2 */
  328. #ifdef CONFIG_S3C_DEV_HSMMC2
  329. static struct resource s3c_hsmmc2_resource[] = {
  330. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
  331. [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
  332. };
  333. struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
  334. .max_width = 4,
  335. .host_caps = (MMC_CAP_4_BIT_DATA |
  336. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  337. .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
  338. };
  339. struct platform_device s3c_device_hsmmc2 = {
  340. .name = "s3c-sdhci",
  341. .id = 2,
  342. .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
  343. .resource = s3c_hsmmc2_resource,
  344. .dev = {
  345. .dma_mask = &samsung_device_dma_mask,
  346. .coherent_dma_mask = DMA_BIT_MASK(32),
  347. .platform_data = &s3c_hsmmc2_def_platdata,
  348. },
  349. };
  350. void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
  351. {
  352. s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
  353. }
  354. #endif /* CONFIG_S3C_DEV_HSMMC2 */
  355. #ifdef CONFIG_S3C_DEV_HSMMC3
  356. static struct resource s3c_hsmmc3_resource[] = {
  357. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
  358. [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
  359. };
  360. struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
  361. .max_width = 4,
  362. .host_caps = (MMC_CAP_4_BIT_DATA |
  363. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  364. .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
  365. };
  366. struct platform_device s3c_device_hsmmc3 = {
  367. .name = "s3c-sdhci",
  368. .id = 3,
  369. .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
  370. .resource = s3c_hsmmc3_resource,
  371. .dev = {
  372. .dma_mask = &samsung_device_dma_mask,
  373. .coherent_dma_mask = DMA_BIT_MASK(32),
  374. .platform_data = &s3c_hsmmc3_def_platdata,
  375. },
  376. };
  377. void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
  378. {
  379. s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
  380. }
  381. #endif /* CONFIG_S3C_DEV_HSMMC3 */
  382. /* I2C */
  383. static struct resource s3c_i2c0_resource[] = {
  384. [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
  385. [1] = DEFINE_RES_IRQ(IRQ_IIC),
  386. };
  387. struct platform_device s3c_device_i2c0 = {
  388. .name = "s3c2410-i2c",
  389. #ifdef CONFIG_S3C_DEV_I2C1
  390. .id = 0,
  391. #else
  392. .id = -1,
  393. #endif
  394. .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
  395. .resource = s3c_i2c0_resource,
  396. };
  397. struct s3c2410_platform_i2c default_i2c_data __initdata = {
  398. .flags = 0,
  399. .slave_addr = 0x10,
  400. .frequency = 100*1000,
  401. .sda_delay = 100,
  402. };
  403. void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
  404. {
  405. struct s3c2410_platform_i2c *npd;
  406. if (!pd)
  407. pd = &default_i2c_data;
  408. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  409. &s3c_device_i2c0);
  410. if (!npd->cfg_gpio)
  411. npd->cfg_gpio = s3c_i2c0_cfg_gpio;
  412. }
  413. #ifdef CONFIG_S3C_DEV_I2C1
  414. static struct resource s3c_i2c1_resource[] = {
  415. [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
  416. [1] = DEFINE_RES_IRQ(IRQ_IIC1),
  417. };
  418. struct platform_device s3c_device_i2c1 = {
  419. .name = "s3c2410-i2c",
  420. .id = 1,
  421. .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
  422. .resource = s3c_i2c1_resource,
  423. };
  424. void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
  425. {
  426. struct s3c2410_platform_i2c *npd;
  427. if (!pd) {
  428. pd = &default_i2c_data;
  429. pd->bus_num = 1;
  430. }
  431. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  432. &s3c_device_i2c1);
  433. if (!npd->cfg_gpio)
  434. npd->cfg_gpio = s3c_i2c1_cfg_gpio;
  435. }
  436. #endif /* CONFIG_S3C_DEV_I2C1 */
  437. #ifdef CONFIG_S3C_DEV_I2C2
  438. static struct resource s3c_i2c2_resource[] = {
  439. [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
  440. [1] = DEFINE_RES_IRQ(IRQ_IIC2),
  441. };
  442. struct platform_device s3c_device_i2c2 = {
  443. .name = "s3c2410-i2c",
  444. .id = 2,
  445. .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
  446. .resource = s3c_i2c2_resource,
  447. };
  448. void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
  449. {
  450. struct s3c2410_platform_i2c *npd;
  451. if (!pd) {
  452. pd = &default_i2c_data;
  453. pd->bus_num = 2;
  454. }
  455. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  456. &s3c_device_i2c2);
  457. if (!npd->cfg_gpio)
  458. npd->cfg_gpio = s3c_i2c2_cfg_gpio;
  459. }
  460. #endif /* CONFIG_S3C_DEV_I2C2 */
  461. #ifdef CONFIG_S3C_DEV_I2C3
  462. static struct resource s3c_i2c3_resource[] = {
  463. [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
  464. [1] = DEFINE_RES_IRQ(IRQ_IIC3),
  465. };
  466. struct platform_device s3c_device_i2c3 = {
  467. .name = "s3c2440-i2c",
  468. .id = 3,
  469. .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
  470. .resource = s3c_i2c3_resource,
  471. };
  472. void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
  473. {
  474. struct s3c2410_platform_i2c *npd;
  475. if (!pd) {
  476. pd = &default_i2c_data;
  477. pd->bus_num = 3;
  478. }
  479. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  480. &s3c_device_i2c3);
  481. if (!npd->cfg_gpio)
  482. npd->cfg_gpio = s3c_i2c3_cfg_gpio;
  483. }
  484. #endif /*CONFIG_S3C_DEV_I2C3 */
  485. #ifdef CONFIG_S3C_DEV_I2C4
  486. static struct resource s3c_i2c4_resource[] = {
  487. [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
  488. [1] = DEFINE_RES_IRQ(IRQ_IIC4),
  489. };
  490. struct platform_device s3c_device_i2c4 = {
  491. .name = "s3c2440-i2c",
  492. .id = 4,
  493. .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
  494. .resource = s3c_i2c4_resource,
  495. };
  496. void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
  497. {
  498. struct s3c2410_platform_i2c *npd;
  499. if (!pd) {
  500. pd = &default_i2c_data;
  501. pd->bus_num = 4;
  502. }
  503. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  504. &s3c_device_i2c4);
  505. if (!npd->cfg_gpio)
  506. npd->cfg_gpio = s3c_i2c4_cfg_gpio;
  507. }
  508. #endif /*CONFIG_S3C_DEV_I2C4 */
  509. #ifdef CONFIG_S3C_DEV_I2C5
  510. static struct resource s3c_i2c5_resource[] = {
  511. [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
  512. [1] = DEFINE_RES_IRQ(IRQ_IIC5),
  513. };
  514. struct platform_device s3c_device_i2c5 = {
  515. .name = "s3c2440-i2c",
  516. .id = 5,
  517. .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
  518. .resource = s3c_i2c5_resource,
  519. };
  520. void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
  521. {
  522. struct s3c2410_platform_i2c *npd;
  523. if (!pd) {
  524. pd = &default_i2c_data;
  525. pd->bus_num = 5;
  526. }
  527. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  528. &s3c_device_i2c5);
  529. if (!npd->cfg_gpio)
  530. npd->cfg_gpio = s3c_i2c5_cfg_gpio;
  531. }
  532. #endif /*CONFIG_S3C_DEV_I2C5 */
  533. #ifdef CONFIG_S3C_DEV_I2C6
  534. static struct resource s3c_i2c6_resource[] = {
  535. [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
  536. [1] = DEFINE_RES_IRQ(IRQ_IIC6),
  537. };
  538. struct platform_device s3c_device_i2c6 = {
  539. .name = "s3c2440-i2c",
  540. .id = 6,
  541. .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
  542. .resource = s3c_i2c6_resource,
  543. };
  544. void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
  545. {
  546. struct s3c2410_platform_i2c *npd;
  547. if (!pd) {
  548. pd = &default_i2c_data;
  549. pd->bus_num = 6;
  550. }
  551. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  552. &s3c_device_i2c6);
  553. if (!npd->cfg_gpio)
  554. npd->cfg_gpio = s3c_i2c6_cfg_gpio;
  555. }
  556. #endif /* CONFIG_S3C_DEV_I2C6 */
  557. #ifdef CONFIG_S3C_DEV_I2C7
  558. static struct resource s3c_i2c7_resource[] = {
  559. [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
  560. [1] = DEFINE_RES_IRQ(IRQ_IIC7),
  561. };
  562. struct platform_device s3c_device_i2c7 = {
  563. .name = "s3c2440-i2c",
  564. .id = 7,
  565. .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
  566. .resource = s3c_i2c7_resource,
  567. };
  568. void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
  569. {
  570. struct s3c2410_platform_i2c *npd;
  571. if (!pd) {
  572. pd = &default_i2c_data;
  573. pd->bus_num = 7;
  574. }
  575. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  576. &s3c_device_i2c7);
  577. if (!npd->cfg_gpio)
  578. npd->cfg_gpio = s3c_i2c7_cfg_gpio;
  579. }
  580. #endif /* CONFIG_S3C_DEV_I2C7 */
  581. /* I2C HDMIPHY */
  582. #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
  583. static struct resource s5p_i2c_resource[] = {
  584. [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
  585. [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
  586. };
  587. struct platform_device s5p_device_i2c_hdmiphy = {
  588. .name = "s3c2440-hdmiphy-i2c",
  589. .id = -1,
  590. .num_resources = ARRAY_SIZE(s5p_i2c_resource),
  591. .resource = s5p_i2c_resource,
  592. };
  593. void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
  594. {
  595. struct s3c2410_platform_i2c *npd;
  596. if (!pd) {
  597. pd = &default_i2c_data;
  598. if (soc_is_exynos4210())
  599. pd->bus_num = 8;
  600. else if (soc_is_s5pv210())
  601. pd->bus_num = 3;
  602. else
  603. pd->bus_num = 0;
  604. }
  605. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  606. &s5p_device_i2c_hdmiphy);
  607. }
  608. #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
  609. /* I2S */
  610. #ifdef CONFIG_PLAT_S3C24XX
  611. static struct resource s3c_iis_resource[] = {
  612. [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
  613. };
  614. struct platform_device s3c_device_iis = {
  615. .name = "s3c24xx-iis",
  616. .id = -1,
  617. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  618. .resource = s3c_iis_resource,
  619. .dev = {
  620. .dma_mask = &samsung_device_dma_mask,
  621. .coherent_dma_mask = DMA_BIT_MASK(32),
  622. }
  623. };
  624. #endif /* CONFIG_PLAT_S3C24XX */
  625. #ifdef CONFIG_CPU_S3C2440
  626. struct platform_device s3c2412_device_iis = {
  627. .name = "s3c2412-iis",
  628. .id = -1,
  629. .dev = {
  630. .dma_mask = &samsung_device_dma_mask,
  631. .coherent_dma_mask = DMA_BIT_MASK(32),
  632. }
  633. };
  634. #endif /* CONFIG_CPU_S3C2440 */
  635. /* IDE CFCON */
  636. #ifdef CONFIG_SAMSUNG_DEV_IDE
  637. static struct resource s3c_cfcon_resource[] = {
  638. [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
  639. [1] = DEFINE_RES_IRQ(IRQ_CFCON),
  640. };
  641. struct platform_device s3c_device_cfcon = {
  642. .id = 0,
  643. .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
  644. .resource = s3c_cfcon_resource,
  645. };
  646. void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
  647. {
  648. s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
  649. &s3c_device_cfcon);
  650. }
  651. #endif /* CONFIG_SAMSUNG_DEV_IDE */
  652. /* KEYPAD */
  653. #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
  654. static struct resource samsung_keypad_resources[] = {
  655. [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
  656. [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
  657. };
  658. struct platform_device samsung_device_keypad = {
  659. .name = "samsung-keypad",
  660. .id = -1,
  661. .num_resources = ARRAY_SIZE(samsung_keypad_resources),
  662. .resource = samsung_keypad_resources,
  663. };
  664. void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
  665. {
  666. struct samsung_keypad_platdata *npd;
  667. npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
  668. &samsung_device_keypad);
  669. if (!npd->cfg_gpio)
  670. npd->cfg_gpio = samsung_keypad_cfg_gpio;
  671. }
  672. #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
  673. /* LCD Controller */
  674. #ifdef CONFIG_PLAT_S3C24XX
  675. static struct resource s3c_lcd_resource[] = {
  676. [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
  677. [1] = DEFINE_RES_IRQ(IRQ_LCD),
  678. };
  679. struct platform_device s3c_device_lcd = {
  680. .name = "s3c2410-lcd",
  681. .id = -1,
  682. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  683. .resource = s3c_lcd_resource,
  684. .dev = {
  685. .dma_mask = &samsung_device_dma_mask,
  686. .coherent_dma_mask = DMA_BIT_MASK(32),
  687. }
  688. };
  689. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  690. {
  691. struct s3c2410fb_mach_info *npd;
  692. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
  693. if (npd) {
  694. npd->displays = kmemdup(pd->displays,
  695. sizeof(struct s3c2410fb_display) * npd->num_displays,
  696. GFP_KERNEL);
  697. if (!npd->displays)
  698. printk(KERN_ERR "no memory for LCD display data\n");
  699. } else {
  700. printk(KERN_ERR "no memory for LCD platform data\n");
  701. }
  702. }
  703. #endif /* CONFIG_PLAT_S3C24XX */
  704. /* MFC */
  705. #ifdef CONFIG_S5P_DEV_MFC
  706. static struct resource s5p_mfc_resource[] = {
  707. [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
  708. [1] = DEFINE_RES_IRQ(IRQ_MFC),
  709. };
  710. struct platform_device s5p_device_mfc = {
  711. .name = "s5p-mfc",
  712. .id = -1,
  713. .num_resources = ARRAY_SIZE(s5p_mfc_resource),
  714. .resource = s5p_mfc_resource,
  715. };
  716. /*
  717. * MFC hardware has 2 memory interfaces which are modelled as two separate
  718. * platform devices to let dma-mapping distinguish between them.
  719. *
  720. * MFC parent device (s5p_device_mfc) must be registered before memory
  721. * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
  722. */
  723. struct platform_device s5p_device_mfc_l = {
  724. .name = "s5p-mfc-l",
  725. .id = -1,
  726. .dev = {
  727. .parent = &s5p_device_mfc.dev,
  728. .dma_mask = &samsung_device_dma_mask,
  729. .coherent_dma_mask = DMA_BIT_MASK(32),
  730. },
  731. };
  732. struct platform_device s5p_device_mfc_r = {
  733. .name = "s5p-mfc-r",
  734. .id = -1,
  735. .dev = {
  736. .parent = &s5p_device_mfc.dev,
  737. .dma_mask = &samsung_device_dma_mask,
  738. .coherent_dma_mask = DMA_BIT_MASK(32),
  739. },
  740. };
  741. #endif /* CONFIG_S5P_DEV_MFC */
  742. /* MIPI CSIS */
  743. #ifdef CONFIG_S5P_DEV_CSIS0
  744. static struct resource s5p_mipi_csis0_resource[] = {
  745. [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_4K),
  746. [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
  747. };
  748. struct platform_device s5p_device_mipi_csis0 = {
  749. .name = "s5p-mipi-csis",
  750. .id = 0,
  751. .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
  752. .resource = s5p_mipi_csis0_resource,
  753. };
  754. #endif /* CONFIG_S5P_DEV_CSIS0 */
  755. #ifdef CONFIG_S5P_DEV_CSIS1
  756. static struct resource s5p_mipi_csis1_resource[] = {
  757. [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_4K),
  758. [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
  759. };
  760. struct platform_device s5p_device_mipi_csis1 = {
  761. .name = "s5p-mipi-csis",
  762. .id = 1,
  763. .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
  764. .resource = s5p_mipi_csis1_resource,
  765. };
  766. #endif
  767. /* NAND */
  768. #ifdef CONFIG_S3C_DEV_NAND
  769. static struct resource s3c_nand_resource[] = {
  770. [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
  771. };
  772. struct platform_device s3c_device_nand = {
  773. .name = "s3c2410-nand",
  774. .id = -1,
  775. .num_resources = ARRAY_SIZE(s3c_nand_resource),
  776. .resource = s3c_nand_resource,
  777. };
  778. /*
  779. * s3c_nand_copy_set() - copy nand set data
  780. * @set: The new structure, directly copied from the old.
  781. *
  782. * Copy all the fields from the NAND set field from what is probably __initdata
  783. * to new kernel memory. The code returns 0 if the copy happened correctly or
  784. * an error code for the calling function to display.
  785. *
  786. * Note, we currently do not try and look to see if we've already copied the
  787. * data in a previous set.
  788. */
  789. static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
  790. {
  791. void *ptr;
  792. int size;
  793. size = sizeof(struct mtd_partition) * set->nr_partitions;
  794. if (size) {
  795. ptr = kmemdup(set->partitions, size, GFP_KERNEL);
  796. set->partitions = ptr;
  797. if (!ptr)
  798. return -ENOMEM;
  799. }
  800. if (set->nr_map && set->nr_chips) {
  801. size = sizeof(int) * set->nr_chips;
  802. ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
  803. set->nr_map = ptr;
  804. if (!ptr)
  805. return -ENOMEM;
  806. }
  807. if (set->ecc_layout) {
  808. ptr = kmemdup(set->ecc_layout,
  809. sizeof(struct nand_ecclayout), GFP_KERNEL);
  810. set->ecc_layout = ptr;
  811. if (!ptr)
  812. return -ENOMEM;
  813. }
  814. return 0;
  815. }
  816. void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
  817. {
  818. struct s3c2410_platform_nand *npd;
  819. int size;
  820. int ret;
  821. /* note, if we get a failure in allocation, we simply drop out of the
  822. * function. If there is so little memory available at initialisation
  823. * time then there is little chance the system is going to run.
  824. */
  825. npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
  826. &s3c_device_nand);
  827. if (!npd)
  828. return;
  829. /* now see if we need to copy any of the nand set data */
  830. size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
  831. if (size) {
  832. struct s3c2410_nand_set *from = npd->sets;
  833. struct s3c2410_nand_set *to;
  834. int i;
  835. to = kmemdup(from, size, GFP_KERNEL);
  836. npd->sets = to; /* set, even if we failed */
  837. if (!to) {
  838. printk(KERN_ERR "%s: no memory for sets\n", __func__);
  839. return;
  840. }
  841. for (i = 0; i < npd->nr_sets; i++) {
  842. ret = s3c_nand_copy_set(to);
  843. if (ret) {
  844. printk(KERN_ERR "%s: failed to copy set %d\n",
  845. __func__, i);
  846. return;
  847. }
  848. to++;
  849. }
  850. }
  851. }
  852. #endif /* CONFIG_S3C_DEV_NAND */
  853. /* ONENAND */
  854. #ifdef CONFIG_S3C_DEV_ONENAND
  855. static struct resource s3c_onenand_resources[] = {
  856. [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
  857. [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
  858. [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
  859. };
  860. struct platform_device s3c_device_onenand = {
  861. .name = "samsung-onenand",
  862. .id = 0,
  863. .num_resources = ARRAY_SIZE(s3c_onenand_resources),
  864. .resource = s3c_onenand_resources,
  865. };
  866. #endif /* CONFIG_S3C_DEV_ONENAND */
  867. #ifdef CONFIG_S3C64XX_DEV_ONENAND1
  868. static struct resource s3c64xx_onenand1_resources[] = {
  869. [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
  870. [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
  871. [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
  872. };
  873. struct platform_device s3c64xx_device_onenand1 = {
  874. .name = "samsung-onenand",
  875. .id = 1,
  876. .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
  877. .resource = s3c64xx_onenand1_resources,
  878. };
  879. void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
  880. {
  881. s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
  882. &s3c64xx_device_onenand1);
  883. }
  884. #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
  885. #ifdef CONFIG_S5P_DEV_ONENAND
  886. static struct resource s5p_onenand_resources[] = {
  887. [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
  888. [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
  889. [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
  890. };
  891. struct platform_device s5p_device_onenand = {
  892. .name = "s5pc110-onenand",
  893. .id = -1,
  894. .num_resources = ARRAY_SIZE(s5p_onenand_resources),
  895. .resource = s5p_onenand_resources,
  896. };
  897. #endif /* CONFIG_S5P_DEV_ONENAND */
  898. /* PMU */
  899. #ifdef CONFIG_PLAT_S5P
  900. static struct resource s5p_pmu_resource[] = {
  901. DEFINE_RES_IRQ(IRQ_PMU)
  902. };
  903. struct platform_device s5p_device_pmu = {
  904. .name = "arm-pmu",
  905. .id = ARM_PMU_DEVICE_CPU,
  906. .num_resources = ARRAY_SIZE(s5p_pmu_resource),
  907. .resource = s5p_pmu_resource,
  908. };
  909. static int __init s5p_pmu_init(void)
  910. {
  911. platform_device_register(&s5p_device_pmu);
  912. return 0;
  913. }
  914. arch_initcall(s5p_pmu_init);
  915. #endif /* CONFIG_PLAT_S5P */
  916. /* PWM Timer */
  917. #ifdef CONFIG_SAMSUNG_DEV_PWM
  918. #define TIMER_RESOURCE_SIZE (1)
  919. #define TIMER_RESOURCE(_tmr, _irq) \
  920. (struct resource [TIMER_RESOURCE_SIZE]) { \
  921. [0] = { \
  922. .start = _irq, \
  923. .end = _irq, \
  924. .flags = IORESOURCE_IRQ \
  925. } \
  926. }
  927. #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
  928. .name = "s3c24xx-pwm", \
  929. .id = _tmr_no, \
  930. .num_resources = TIMER_RESOURCE_SIZE, \
  931. .resource = TIMER_RESOURCE(_tmr_no, _irq), \
  932. /*
  933. * since we already have an static mapping for the timer,
  934. * we do not bother setting any IO resource for the base.
  935. */
  936. struct platform_device s3c_device_timer[] = {
  937. [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
  938. [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
  939. [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
  940. [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
  941. [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
  942. };
  943. #endif /* CONFIG_SAMSUNG_DEV_PWM */
  944. /* RTC */
  945. #ifdef CONFIG_PLAT_S3C24XX
  946. static struct resource s3c_rtc_resource[] = {
  947. [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
  948. [1] = DEFINE_RES_IRQ(IRQ_RTC),
  949. [2] = DEFINE_RES_IRQ(IRQ_TICK),
  950. };
  951. struct platform_device s3c_device_rtc = {
  952. .name = "s3c2410-rtc",
  953. .id = -1,
  954. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  955. .resource = s3c_rtc_resource,
  956. };
  957. #endif /* CONFIG_PLAT_S3C24XX */
  958. #ifdef CONFIG_S3C_DEV_RTC
  959. static struct resource s3c_rtc_resource[] = {
  960. [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
  961. [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
  962. [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
  963. };
  964. struct platform_device s3c_device_rtc = {
  965. .name = "s3c64xx-rtc",
  966. .id = -1,
  967. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  968. .resource = s3c_rtc_resource,
  969. };
  970. #endif /* CONFIG_S3C_DEV_RTC */
  971. /* SDI */
  972. #ifdef CONFIG_PLAT_S3C24XX
  973. static struct resource s3c_sdi_resource[] = {
  974. [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
  975. [1] = DEFINE_RES_IRQ(IRQ_SDI),
  976. };
  977. struct platform_device s3c_device_sdi = {
  978. .name = "s3c2410-sdi",
  979. .id = -1,
  980. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  981. .resource = s3c_sdi_resource,
  982. };
  983. void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
  984. {
  985. s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
  986. &s3c_device_sdi);
  987. }
  988. #endif /* CONFIG_PLAT_S3C24XX */
  989. /* SPI */
  990. #ifdef CONFIG_PLAT_S3C24XX
  991. static struct resource s3c_spi0_resource[] = {
  992. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
  993. [1] = DEFINE_RES_IRQ(IRQ_SPI0),
  994. };
  995. struct platform_device s3c_device_spi0 = {
  996. .name = "s3c2410-spi",
  997. .id = 0,
  998. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  999. .resource = s3c_spi0_resource,
  1000. .dev = {
  1001. .dma_mask = &samsung_device_dma_mask,
  1002. .coherent_dma_mask = DMA_BIT_MASK(32),
  1003. }
  1004. };
  1005. static struct resource s3c_spi1_resource[] = {
  1006. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
  1007. [1] = DEFINE_RES_IRQ(IRQ_SPI1),
  1008. };
  1009. struct platform_device s3c_device_spi1 = {
  1010. .name = "s3c2410-spi",
  1011. .id = 1,
  1012. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  1013. .resource = s3c_spi1_resource,
  1014. .dev = {
  1015. .dma_mask = &samsung_device_dma_mask,
  1016. .coherent_dma_mask = DMA_BIT_MASK(32),
  1017. }
  1018. };
  1019. #endif /* CONFIG_PLAT_S3C24XX */
  1020. /* Touchscreen */
  1021. #ifdef CONFIG_PLAT_S3C24XX
  1022. static struct resource s3c_ts_resource[] = {
  1023. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  1024. [1] = DEFINE_RES_IRQ(IRQ_TC),
  1025. };
  1026. struct platform_device s3c_device_ts = {
  1027. .name = "s3c2410-ts",
  1028. .id = -1,
  1029. .dev.parent = &s3c_device_adc.dev,
  1030. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  1031. .resource = s3c_ts_resource,
  1032. };
  1033. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
  1034. {
  1035. s3c_set_platdata(hard_s3c2410ts_info,
  1036. sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
  1037. }
  1038. #endif /* CONFIG_PLAT_S3C24XX */
  1039. #ifdef CONFIG_SAMSUNG_DEV_TS
  1040. static struct resource s3c_ts_resource[] = {
  1041. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  1042. [1] = DEFINE_RES_IRQ(IRQ_TC),
  1043. };
  1044. static struct s3c2410_ts_mach_info default_ts_data __initdata = {
  1045. .delay = 10000,
  1046. .presc = 49,
  1047. .oversampling_shift = 2,
  1048. };
  1049. struct platform_device s3c_device_ts = {
  1050. .name = "s3c64xx-ts",
  1051. .id = -1,
  1052. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  1053. .resource = s3c_ts_resource,
  1054. };
  1055. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
  1056. {
  1057. if (!pd)
  1058. pd = &default_ts_data;
  1059. s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
  1060. &s3c_device_ts);
  1061. }
  1062. #endif /* CONFIG_SAMSUNG_DEV_TS */
  1063. /* TV */
  1064. #ifdef CONFIG_S5P_DEV_TV
  1065. static struct resource s5p_hdmi_resources[] = {
  1066. [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
  1067. [1] = DEFINE_RES_IRQ(IRQ_HDMI),
  1068. };
  1069. struct platform_device s5p_device_hdmi = {
  1070. .name = "s5p-hdmi",
  1071. .id = -1,
  1072. .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
  1073. .resource = s5p_hdmi_resources,
  1074. };
  1075. static struct resource s5p_sdo_resources[] = {
  1076. [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
  1077. [1] = DEFINE_RES_IRQ(IRQ_SDO),
  1078. };
  1079. struct platform_device s5p_device_sdo = {
  1080. .name = "s5p-sdo",
  1081. .id = -1,
  1082. .num_resources = ARRAY_SIZE(s5p_sdo_resources),
  1083. .resource = s5p_sdo_resources,
  1084. };
  1085. static struct resource s5p_mixer_resources[] = {
  1086. [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
  1087. [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
  1088. [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
  1089. };
  1090. struct platform_device s5p_device_mixer = {
  1091. .name = "s5p-mixer",
  1092. .id = -1,
  1093. .num_resources = ARRAY_SIZE(s5p_mixer_resources),
  1094. .resource = s5p_mixer_resources,
  1095. .dev = {
  1096. .dma_mask = &samsung_device_dma_mask,
  1097. .coherent_dma_mask = DMA_BIT_MASK(32),
  1098. }
  1099. };
  1100. #endif /* CONFIG_S5P_DEV_TV */
  1101. /* USB */
  1102. #ifdef CONFIG_S3C_DEV_USB_HOST
  1103. static struct resource s3c_usb_resource[] = {
  1104. [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
  1105. [1] = DEFINE_RES_IRQ(IRQ_USBH),
  1106. };
  1107. struct platform_device s3c_device_ohci = {
  1108. .name = "s3c2410-ohci",
  1109. .id = -1,
  1110. .num_resources = ARRAY_SIZE(s3c_usb_resource),
  1111. .resource = s3c_usb_resource,
  1112. .dev = {
  1113. .dma_mask = &samsung_device_dma_mask,
  1114. .coherent_dma_mask = DMA_BIT_MASK(32),
  1115. }
  1116. };
  1117. /*
  1118. * s3c_ohci_set_platdata - initialise OHCI device platform data
  1119. * @info: The platform data.
  1120. *
  1121. * This call copies the @info passed in and sets the device .platform_data
  1122. * field to that copy. The @info is copied so that the original can be marked
  1123. * __initdata.
  1124. */
  1125. void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
  1126. {
  1127. s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
  1128. &s3c_device_ohci);
  1129. }
  1130. #endif /* CONFIG_S3C_DEV_USB_HOST */
  1131. /* USB Device (Gadget) */
  1132. #ifdef CONFIG_PLAT_S3C24XX
  1133. static struct resource s3c_usbgadget_resource[] = {
  1134. [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
  1135. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  1136. };
  1137. struct platform_device s3c_device_usbgadget = {
  1138. .name = "s3c2410-usbgadget",
  1139. .id = -1,
  1140. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  1141. .resource = s3c_usbgadget_resource,
  1142. };
  1143. void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
  1144. {
  1145. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
  1146. }
  1147. #endif /* CONFIG_PLAT_S3C24XX */
  1148. /* USB EHCI Host Controller */
  1149. #ifdef CONFIG_S5P_DEV_USB_EHCI
  1150. static struct resource s5p_ehci_resource[] = {
  1151. [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
  1152. [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
  1153. };
  1154. struct platform_device s5p_device_ehci = {
  1155. .name = "s5p-ehci",
  1156. .id = -1,
  1157. .num_resources = ARRAY_SIZE(s5p_ehci_resource),
  1158. .resource = s5p_ehci_resource,
  1159. .dev = {
  1160. .dma_mask = &samsung_device_dma_mask,
  1161. .coherent_dma_mask = DMA_BIT_MASK(32),
  1162. }
  1163. };
  1164. void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
  1165. {
  1166. struct s5p_ehci_platdata *npd;
  1167. npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
  1168. &s5p_device_ehci);
  1169. if (!npd->phy_init)
  1170. npd->phy_init = s5p_usb_phy_init;
  1171. if (!npd->phy_exit)
  1172. npd->phy_exit = s5p_usb_phy_exit;
  1173. }
  1174. #endif /* CONFIG_S5P_DEV_USB_EHCI */
  1175. /* USB HSOTG */
  1176. #ifdef CONFIG_S3C_DEV_USB_HSOTG
  1177. static struct resource s3c_usb_hsotg_resources[] = {
  1178. [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_16K),
  1179. [1] = DEFINE_RES_IRQ(IRQ_OTG),
  1180. };
  1181. struct platform_device s3c_device_usb_hsotg = {
  1182. .name = "s3c-hsotg",
  1183. .id = -1,
  1184. .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
  1185. .resource = s3c_usb_hsotg_resources,
  1186. .dev = {
  1187. .dma_mask = &samsung_device_dma_mask,
  1188. .coherent_dma_mask = DMA_BIT_MASK(32),
  1189. },
  1190. };
  1191. #endif /* CONFIG_S3C_DEV_USB_HSOTG */
  1192. /* USB High Spped 2.0 Device (Gadget) */
  1193. #ifdef CONFIG_PLAT_S3C24XX
  1194. static struct resource s3c_hsudc_resource[] = {
  1195. [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
  1196. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  1197. };
  1198. struct platform_device s3c_device_usb_hsudc = {
  1199. .name = "s3c-hsudc",
  1200. .id = -1,
  1201. .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
  1202. .resource = s3c_hsudc_resource,
  1203. .dev = {
  1204. .dma_mask = &samsung_device_dma_mask,
  1205. .coherent_dma_mask = DMA_BIT_MASK(32),
  1206. },
  1207. };
  1208. void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
  1209. {
  1210. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
  1211. }
  1212. #endif /* CONFIG_PLAT_S3C24XX */
  1213. /* WDT */
  1214. #ifdef CONFIG_S3C_DEV_WDT
  1215. static struct resource s3c_wdt_resource[] = {
  1216. [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
  1217. [1] = DEFINE_RES_IRQ(IRQ_WDT),
  1218. };
  1219. struct platform_device s3c_device_wdt = {
  1220. .name = "s3c2410-wdt",
  1221. .id = -1,
  1222. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  1223. .resource = s3c_wdt_resource,
  1224. };
  1225. #endif /* CONFIG_S3C_DEV_WDT */