sdhi-sh7372.h 387 B

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  1. #ifndef SDHI_SH7372_H
  2. #define SDHI_SH7372_H
  3. #define SDGENCNTA 0xfe40009c
  4. /* The countdown of SDGENCNTA is controlled by
  5. * ZB3D2CLK which runs at 149.5MHz.
  6. * That is 149.5ticks/us. Approximate this as 150ticks/us.
  7. */
  8. static void udelay(int us)
  9. {
  10. __raw_writel(us * 150, SDGENCNTA);
  11. while(__raw_readl(SDGENCNTA)) ;
  12. }
  13. static void msleep(int ms)
  14. {
  15. udelay(ms * 1000);
  16. }
  17. #endif