board-ag5evm.c 15 KB

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  1. /*
  2. * arch/arm/mach-shmobile/board-ag5evm.c
  3. *
  4. * Copyright (C) 2010 Takashi Yoshii <yoshii.takashi.zj@renesas.com>
  5. * Copyright (C) 2009 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. *
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/delay.h>
  27. #include <linux/io.h>
  28. #include <linux/dma-mapping.h>
  29. #include <linux/serial_sci.h>
  30. #include <linux/smsc911x.h>
  31. #include <linux/gpio.h>
  32. #include <linux/input.h>
  33. #include <linux/input/sh_keysc.h>
  34. #include <linux/mmc/host.h>
  35. #include <linux/mmc/sh_mmcif.h>
  36. #include <linux/mmc/sh_mobile_sdhi.h>
  37. #include <linux/mfd/tmio.h>
  38. #include <linux/sh_clk.h>
  39. #include <linux/dma-mapping.h>
  40. #include <video/sh_mobile_lcdc.h>
  41. #include <video/sh_mipi_dsi.h>
  42. #include <sound/sh_fsi.h>
  43. #include <mach/hardware.h>
  44. #include <mach/sh73a0.h>
  45. #include <mach/common.h>
  46. #include <asm/mach-types.h>
  47. #include <asm/mach/arch.h>
  48. #include <asm/mach/map.h>
  49. #include <asm/mach/time.h>
  50. #include <asm/hardware/gic.h>
  51. #include <asm/hardware/cache-l2x0.h>
  52. #include <asm/traps.h>
  53. static struct resource smsc9220_resources[] = {
  54. [0] = {
  55. .start = 0x14000000,
  56. .end = 0x14000000 + SZ_64K - 1,
  57. .flags = IORESOURCE_MEM,
  58. },
  59. [1] = {
  60. .start = SH73A0_PINT0_IRQ(2), /* PINTA2 */
  61. .flags = IORESOURCE_IRQ,
  62. },
  63. };
  64. static struct smsc911x_platform_config smsc9220_platdata = {
  65. .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
  66. .phy_interface = PHY_INTERFACE_MODE_MII,
  67. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  68. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  69. };
  70. static struct platform_device eth_device = {
  71. .name = "smsc911x",
  72. .id = 0,
  73. .dev = {
  74. .platform_data = &smsc9220_platdata,
  75. },
  76. .resource = smsc9220_resources,
  77. .num_resources = ARRAY_SIZE(smsc9220_resources),
  78. };
  79. static struct sh_keysc_info keysc_platdata = {
  80. .mode = SH_KEYSC_MODE_6,
  81. .scan_timing = 3,
  82. .delay = 100,
  83. .keycodes = {
  84. KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, KEY_G,
  85. KEY_H, KEY_I, KEY_J, KEY_K, KEY_L, KEY_M, KEY_N,
  86. KEY_O, KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T, KEY_U,
  87. KEY_V, KEY_W, KEY_X, KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP,
  88. KEY_SPACE, KEY_9, KEY_6, KEY_3, KEY_WAKEUP, KEY_RIGHT, \
  89. KEY_COFFEE,
  90. KEY_0, KEY_8, KEY_5, KEY_2, KEY_DOWN, KEY_ENTER, KEY_UP,
  91. KEY_KPASTERISK, KEY_7, KEY_4, KEY_1, KEY_STOP, KEY_LEFT, \
  92. KEY_COMPUTER,
  93. },
  94. };
  95. static struct resource keysc_resources[] = {
  96. [0] = {
  97. .name = "KEYSC",
  98. .start = 0xe61b0000,
  99. .end = 0xe61b0098 - 1,
  100. .flags = IORESOURCE_MEM,
  101. },
  102. [1] = {
  103. .start = gic_spi(71),
  104. .flags = IORESOURCE_IRQ,
  105. },
  106. };
  107. static struct platform_device keysc_device = {
  108. .name = "sh_keysc",
  109. .id = 0,
  110. .num_resources = ARRAY_SIZE(keysc_resources),
  111. .resource = keysc_resources,
  112. .dev = {
  113. .platform_data = &keysc_platdata,
  114. },
  115. };
  116. /* FSI A */
  117. static struct resource fsi_resources[] = {
  118. [0] = {
  119. .name = "FSI",
  120. .start = 0xEC230000,
  121. .end = 0xEC230400 - 1,
  122. .flags = IORESOURCE_MEM,
  123. },
  124. [1] = {
  125. .start = gic_spi(146),
  126. .flags = IORESOURCE_IRQ,
  127. },
  128. };
  129. static struct platform_device fsi_device = {
  130. .name = "sh_fsi2",
  131. .id = -1,
  132. .num_resources = ARRAY_SIZE(fsi_resources),
  133. .resource = fsi_resources,
  134. };
  135. static struct resource sh_mmcif_resources[] = {
  136. [0] = {
  137. .name = "MMCIF",
  138. .start = 0xe6bd0000,
  139. .end = 0xe6bd00ff,
  140. .flags = IORESOURCE_MEM,
  141. },
  142. [1] = {
  143. .start = gic_spi(141),
  144. .flags = IORESOURCE_IRQ,
  145. },
  146. [2] = {
  147. .start = gic_spi(140),
  148. .flags = IORESOURCE_IRQ,
  149. },
  150. };
  151. static struct sh_mmcif_dma sh_mmcif_dma = {
  152. .chan_priv_rx = {
  153. .slave_id = SHDMA_SLAVE_MMCIF_RX,
  154. },
  155. .chan_priv_tx = {
  156. .slave_id = SHDMA_SLAVE_MMCIF_TX,
  157. },
  158. };
  159. static struct sh_mmcif_plat_data sh_mmcif_platdata = {
  160. .sup_pclk = 0,
  161. .ocr = MMC_VDD_165_195,
  162. .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
  163. .dma = &sh_mmcif_dma,
  164. };
  165. static struct platform_device mmc_device = {
  166. .name = "sh_mmcif",
  167. .id = 0,
  168. .dev = {
  169. .dma_mask = NULL,
  170. .coherent_dma_mask = 0xffffffff,
  171. .platform_data = &sh_mmcif_platdata,
  172. },
  173. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  174. .resource = sh_mmcif_resources,
  175. };
  176. /* IrDA */
  177. static struct resource irda_resources[] = {
  178. [0] = {
  179. .start = 0xE6D00000,
  180. .end = 0xE6D01FD4 - 1,
  181. .flags = IORESOURCE_MEM,
  182. },
  183. [1] = {
  184. .start = gic_spi(95),
  185. .flags = IORESOURCE_IRQ,
  186. },
  187. };
  188. static struct platform_device irda_device = {
  189. .name = "sh_irda",
  190. .id = 0,
  191. .resource = irda_resources,
  192. .num_resources = ARRAY_SIZE(irda_resources),
  193. };
  194. static unsigned char lcd_backlight_seq[3][2] = {
  195. { 0x04, 0x07 },
  196. { 0x23, 0x80 },
  197. { 0x03, 0x01 },
  198. };
  199. static void lcd_backlight_on(void)
  200. {
  201. struct i2c_adapter *a;
  202. struct i2c_msg msg;
  203. int k;
  204. a = i2c_get_adapter(1);
  205. for (k = 0; a && k < 3; k++) {
  206. msg.addr = 0x6d;
  207. msg.buf = &lcd_backlight_seq[k][0];
  208. msg.len = 2;
  209. msg.flags = 0;
  210. if (i2c_transfer(a, &msg, 1) != 1)
  211. break;
  212. }
  213. }
  214. static void lcd_backlight_reset(void)
  215. {
  216. gpio_set_value(GPIO_PORT235, 0);
  217. mdelay(24);
  218. gpio_set_value(GPIO_PORT235, 1);
  219. }
  220. static void lcd_on(void *board_data, struct fb_info *info)
  221. {
  222. lcd_backlight_on();
  223. }
  224. static void lcd_off(void *board_data)
  225. {
  226. lcd_backlight_reset();
  227. }
  228. /* LCDC0 */
  229. static const struct fb_videomode lcdc0_modes[] = {
  230. {
  231. .name = "R63302(QHD)",
  232. .xres = 544,
  233. .yres = 961,
  234. .left_margin = 72,
  235. .right_margin = 600,
  236. .hsync_len = 16,
  237. .upper_margin = 8,
  238. .lower_margin = 8,
  239. .vsync_len = 2,
  240. .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
  241. },
  242. };
  243. static struct sh_mobile_lcdc_info lcdc0_info = {
  244. .clock_source = LCDC_CLK_PERIPHERAL,
  245. .ch[0] = {
  246. .chan = LCDC_CHAN_MAINLCD,
  247. .interface_type = RGB24,
  248. .clock_divider = 1,
  249. .flags = LCDC_FLAGS_DWPOL,
  250. .lcd_size_cfg.width = 44,
  251. .lcd_size_cfg.height = 79,
  252. .bpp = 16,
  253. .lcd_cfg = lcdc0_modes,
  254. .num_cfg = ARRAY_SIZE(lcdc0_modes),
  255. .board_cfg = {
  256. .display_on = lcd_on,
  257. .display_off = lcd_off,
  258. },
  259. }
  260. };
  261. static struct resource lcdc0_resources[] = {
  262. [0] = {
  263. .name = "LCDC0",
  264. .start = 0xfe940000, /* P4-only space */
  265. .end = 0xfe943fff,
  266. .flags = IORESOURCE_MEM,
  267. },
  268. [1] = {
  269. .start = intcs_evt2irq(0x580),
  270. .flags = IORESOURCE_IRQ,
  271. },
  272. };
  273. static struct platform_device lcdc0_device = {
  274. .name = "sh_mobile_lcdc_fb",
  275. .num_resources = ARRAY_SIZE(lcdc0_resources),
  276. .resource = lcdc0_resources,
  277. .id = 0,
  278. .dev = {
  279. .platform_data = &lcdc0_info,
  280. .coherent_dma_mask = ~0,
  281. },
  282. };
  283. /* MIPI-DSI */
  284. static struct resource mipidsi0_resources[] = {
  285. [0] = {
  286. .name = "DSI0",
  287. .start = 0xfeab0000,
  288. .end = 0xfeab3fff,
  289. .flags = IORESOURCE_MEM,
  290. },
  291. [1] = {
  292. .name = "DSI0",
  293. .start = 0xfeab4000,
  294. .end = 0xfeab7fff,
  295. .flags = IORESOURCE_MEM,
  296. },
  297. };
  298. static struct sh_mipi_dsi_info mipidsi0_info = {
  299. .data_format = MIPI_RGB888,
  300. .lcd_chan = &lcdc0_info.ch[0],
  301. .vsynw_offset = 20,
  302. .clksrc = 1,
  303. .flags = SH_MIPI_DSI_HSABM,
  304. };
  305. static struct platform_device mipidsi0_device = {
  306. .name = "sh-mipi-dsi",
  307. .num_resources = ARRAY_SIZE(mipidsi0_resources),
  308. .resource = mipidsi0_resources,
  309. .id = 0,
  310. .dev = {
  311. .platform_data = &mipidsi0_info,
  312. },
  313. };
  314. /* SDHI0 */
  315. static irqreturn_t ag5evm_sdhi0_gpio_cd(int irq, void *arg)
  316. {
  317. struct device *dev = arg;
  318. struct sh_mobile_sdhi_info *info = dev->platform_data;
  319. struct tmio_mmc_data *pdata = info->pdata;
  320. tmio_mmc_cd_wakeup(pdata);
  321. return IRQ_HANDLED;
  322. }
  323. static struct sh_mobile_sdhi_info sdhi0_info = {
  324. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  325. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  326. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
  327. .tmio_caps = MMC_CAP_SD_HIGHSPEED,
  328. .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
  329. };
  330. static struct resource sdhi0_resources[] = {
  331. [0] = {
  332. .name = "SDHI0",
  333. .start = 0xee100000,
  334. .end = 0xee1000ff,
  335. .flags = IORESOURCE_MEM,
  336. },
  337. [1] = {
  338. .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
  339. .start = gic_spi(83),
  340. .flags = IORESOURCE_IRQ,
  341. },
  342. [2] = {
  343. .name = SH_MOBILE_SDHI_IRQ_SDCARD,
  344. .start = gic_spi(84),
  345. .flags = IORESOURCE_IRQ,
  346. },
  347. [3] = {
  348. .name = SH_MOBILE_SDHI_IRQ_SDIO,
  349. .start = gic_spi(85),
  350. .flags = IORESOURCE_IRQ,
  351. },
  352. };
  353. static struct platform_device sdhi0_device = {
  354. .name = "sh_mobile_sdhi",
  355. .id = 0,
  356. .num_resources = ARRAY_SIZE(sdhi0_resources),
  357. .resource = sdhi0_resources,
  358. .dev = {
  359. .platform_data = &sdhi0_info,
  360. },
  361. };
  362. void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state)
  363. {
  364. gpio_set_value(GPIO_PORT114, state);
  365. }
  366. static struct sh_mobile_sdhi_info sh_sdhi1_info = {
  367. .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
  368. .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ,
  369. .tmio_ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
  370. .set_pwr = ag5evm_sdhi1_set_pwr,
  371. };
  372. static struct resource sdhi1_resources[] = {
  373. [0] = {
  374. .name = "SDHI1",
  375. .start = 0xee120000,
  376. .end = 0xee1200ff,
  377. .flags = IORESOURCE_MEM,
  378. },
  379. [1] = {
  380. .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
  381. .start = gic_spi(87),
  382. .flags = IORESOURCE_IRQ,
  383. },
  384. [2] = {
  385. .name = SH_MOBILE_SDHI_IRQ_SDCARD,
  386. .start = gic_spi(88),
  387. .flags = IORESOURCE_IRQ,
  388. },
  389. [3] = {
  390. .name = SH_MOBILE_SDHI_IRQ_SDIO,
  391. .start = gic_spi(89),
  392. .flags = IORESOURCE_IRQ,
  393. },
  394. };
  395. static struct platform_device sdhi1_device = {
  396. .name = "sh_mobile_sdhi",
  397. .id = 1,
  398. .dev = {
  399. .platform_data = &sh_sdhi1_info,
  400. },
  401. .num_resources = ARRAY_SIZE(sdhi1_resources),
  402. .resource = sdhi1_resources,
  403. };
  404. static struct platform_device *ag5evm_devices[] __initdata = {
  405. &eth_device,
  406. &keysc_device,
  407. &fsi_device,
  408. &mmc_device,
  409. &irda_device,
  410. &lcdc0_device,
  411. &mipidsi0_device,
  412. &sdhi0_device,
  413. &sdhi1_device,
  414. };
  415. static struct map_desc ag5evm_io_desc[] __initdata = {
  416. /* create a 1:1 entity map for 0xe6xxxxxx
  417. * used by CPGA, INTC and PFC.
  418. */
  419. {
  420. .virtual = 0xe6000000,
  421. .pfn = __phys_to_pfn(0xe6000000),
  422. .length = 256 << 20,
  423. .type = MT_DEVICE_NONSHARED
  424. },
  425. };
  426. static void __init ag5evm_map_io(void)
  427. {
  428. iotable_init(ag5evm_io_desc, ARRAY_SIZE(ag5evm_io_desc));
  429. /* DMA memory at 0xf6000000 - 0xffdfffff */
  430. init_consistent_dma_size(158 << 20);
  431. /* setup early devices and console here as well */
  432. sh73a0_add_early_devices();
  433. shmobile_setup_console();
  434. }
  435. #define DSI0PHYCR 0xe615006c
  436. static void __init ag5evm_init(void)
  437. {
  438. sh73a0_pinmux_init();
  439. /* enable SCIFA2 */
  440. gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
  441. gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
  442. gpio_request(GPIO_FN_SCIFA2_RTS1_, NULL);
  443. gpio_request(GPIO_FN_SCIFA2_CTS1_, NULL);
  444. /* enable KEYSC */
  445. gpio_request(GPIO_FN_KEYIN0_PU, NULL);
  446. gpio_request(GPIO_FN_KEYIN1_PU, NULL);
  447. gpio_request(GPIO_FN_KEYIN2_PU, NULL);
  448. gpio_request(GPIO_FN_KEYIN3_PU, NULL);
  449. gpio_request(GPIO_FN_KEYIN4_PU, NULL);
  450. gpio_request(GPIO_FN_KEYIN5_PU, NULL);
  451. gpio_request(GPIO_FN_KEYIN6_PU, NULL);
  452. gpio_request(GPIO_FN_KEYIN7_PU, NULL);
  453. gpio_request(GPIO_FN_KEYOUT0, NULL);
  454. gpio_request(GPIO_FN_KEYOUT1, NULL);
  455. gpio_request(GPIO_FN_KEYOUT2, NULL);
  456. gpio_request(GPIO_FN_KEYOUT3, NULL);
  457. gpio_request(GPIO_FN_KEYOUT4, NULL);
  458. gpio_request(GPIO_FN_KEYOUT5, NULL);
  459. gpio_request(GPIO_FN_PORT59_KEYOUT6, NULL);
  460. gpio_request(GPIO_FN_PORT58_KEYOUT7, NULL);
  461. gpio_request(GPIO_FN_KEYOUT8, NULL);
  462. gpio_request(GPIO_FN_PORT149_KEYOUT9, NULL);
  463. /* enable I2C channel 2 and 3 */
  464. gpio_request(GPIO_FN_PORT236_I2C_SDA2, NULL);
  465. gpio_request(GPIO_FN_PORT237_I2C_SCL2, NULL);
  466. gpio_request(GPIO_FN_PORT248_I2C_SCL3, NULL);
  467. gpio_request(GPIO_FN_PORT249_I2C_SDA3, NULL);
  468. /* enable MMCIF */
  469. gpio_request(GPIO_FN_MMCCLK0, NULL);
  470. gpio_request(GPIO_FN_MMCCMD0_PU, NULL);
  471. gpio_request(GPIO_FN_MMCD0_0_PU, NULL);
  472. gpio_request(GPIO_FN_MMCD0_1_PU, NULL);
  473. gpio_request(GPIO_FN_MMCD0_2_PU, NULL);
  474. gpio_request(GPIO_FN_MMCD0_3_PU, NULL);
  475. gpio_request(GPIO_FN_MMCD0_4_PU, NULL);
  476. gpio_request(GPIO_FN_MMCD0_5_PU, NULL);
  477. gpio_request(GPIO_FN_MMCD0_6_PU, NULL);
  478. gpio_request(GPIO_FN_MMCD0_7_PU, NULL);
  479. gpio_request(GPIO_PORT208, NULL); /* Reset */
  480. gpio_direction_output(GPIO_PORT208, 1);
  481. /* enable SMSC911X */
  482. gpio_request(GPIO_PORT144, NULL); /* PINTA2 */
  483. gpio_direction_input(GPIO_PORT144);
  484. gpio_request(GPIO_PORT145, NULL); /* RESET */
  485. gpio_direction_output(GPIO_PORT145, 1);
  486. /* FSI A */
  487. gpio_request(GPIO_FN_FSIACK, NULL);
  488. gpio_request(GPIO_FN_FSIAILR, NULL);
  489. gpio_request(GPIO_FN_FSIAIBT, NULL);
  490. gpio_request(GPIO_FN_FSIAISLD, NULL);
  491. gpio_request(GPIO_FN_FSIAOSLD, NULL);
  492. /* IrDA */
  493. gpio_request(GPIO_FN_PORT241_IRDA_OUT, NULL);
  494. gpio_request(GPIO_FN_PORT242_IRDA_IN, NULL);
  495. gpio_request(GPIO_FN_PORT243_IRDA_FIRSEL, NULL);
  496. /* LCD panel */
  497. gpio_request(GPIO_PORT217, NULL); /* RESET */
  498. gpio_direction_output(GPIO_PORT217, 0);
  499. mdelay(1);
  500. gpio_set_value(GPIO_PORT217, 1);
  501. mdelay(100);
  502. /* LCD backlight controller */
  503. gpio_request(GPIO_PORT235, NULL); /* RESET */
  504. gpio_direction_output(GPIO_PORT235, 0);
  505. lcd_backlight_reset();
  506. /* MIPI-DSI clock setup */
  507. __raw_writel(0x2a809010, DSI0PHYCR);
  508. /* enable SDHI0 on CN15 [SD I/F] */
  509. gpio_request(GPIO_FN_SDHICD0, NULL);
  510. gpio_request(GPIO_FN_SDHIWP0, NULL);
  511. gpio_request(GPIO_FN_SDHICMD0, NULL);
  512. gpio_request(GPIO_FN_SDHICLK0, NULL);
  513. gpio_request(GPIO_FN_SDHID0_3, NULL);
  514. gpio_request(GPIO_FN_SDHID0_2, NULL);
  515. gpio_request(GPIO_FN_SDHID0_1, NULL);
  516. gpio_request(GPIO_FN_SDHID0_0, NULL);
  517. if (!request_irq(intcs_evt2irq(0x3c0), ag5evm_sdhi0_gpio_cd,
  518. IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
  519. "sdhi0 cd", &sdhi0_device.dev))
  520. sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD;
  521. else
  522. pr_warn("Unable to setup SDHI0 GPIO IRQ\n");
  523. /* enable SDHI1 on CN4 [WLAN I/F] */
  524. gpio_request(GPIO_FN_SDHICLK1, NULL);
  525. gpio_request(GPIO_FN_SDHICMD1_PU, NULL);
  526. gpio_request(GPIO_FN_SDHID1_3_PU, NULL);
  527. gpio_request(GPIO_FN_SDHID1_2_PU, NULL);
  528. gpio_request(GPIO_FN_SDHID1_1_PU, NULL);
  529. gpio_request(GPIO_FN_SDHID1_0_PU, NULL);
  530. gpio_request(GPIO_PORT114, "sdhi1_power");
  531. gpio_direction_output(GPIO_PORT114, 0);
  532. #ifdef CONFIG_CACHE_L2X0
  533. /* Shared attribute override enable, 64K*8way */
  534. l2x0_init(__io(0xf0100000), 0x00460000, 0xc2000fff);
  535. #endif
  536. sh73a0_add_standard_devices();
  537. platform_add_devices(ag5evm_devices, ARRAY_SIZE(ag5evm_devices));
  538. }
  539. static void __init ag5evm_timer_init(void)
  540. {
  541. sh73a0_clock_init();
  542. shmobile_timer.init();
  543. return;
  544. }
  545. struct sys_timer ag5evm_timer = {
  546. .init = ag5evm_timer_init,
  547. };
  548. MACHINE_START(AG5EVM, "ag5evm")
  549. .map_io = ag5evm_map_io,
  550. .init_irq = sh73a0_init_irq,
  551. .handle_irq = shmobile_handle_irq_gic,
  552. .init_machine = ag5evm_init,
  553. .timer = &ag5evm_timer,
  554. MACHINE_END