mach-universal_c210.c 26 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/platform_device.h>
  10. #include <linux/serial_core.h>
  11. #include <linux/input.h>
  12. #include <linux/i2c.h>
  13. #include <linux/gpio_keys.h>
  14. #include <linux/gpio.h>
  15. #include <linux/fb.h>
  16. #include <linux/mfd/max8998.h>
  17. #include <linux/regulator/machine.h>
  18. #include <linux/regulator/fixed.h>
  19. #include <linux/regulator/max8952.h>
  20. #include <linux/mmc/host.h>
  21. #include <linux/i2c-gpio.h>
  22. #include <linux/i2c/mcs.h>
  23. #include <linux/i2c/atmel_mxt_ts.h>
  24. #include <asm/mach/arch.h>
  25. #include <asm/mach-types.h>
  26. #include <plat/regs-serial.h>
  27. #include <plat/exynos4.h>
  28. #include <plat/cpu.h>
  29. #include <plat/devs.h>
  30. #include <plat/iic.h>
  31. #include <plat/gpio-cfg.h>
  32. #include <plat/fb.h>
  33. #include <plat/mfc.h>
  34. #include <plat/sdhci.h>
  35. #include <plat/pd.h>
  36. #include <plat/regs-fb-v4.h>
  37. #include <plat/fimc-core.h>
  38. #include <plat/camport.h>
  39. #include <plat/mipi_csis.h>
  40. #include <mach/map.h>
  41. #include <media/v4l2-mediabus.h>
  42. #include <media/s5p_fimc.h>
  43. #include <media/m5mols.h>
  44. /* Following are default values for UCON, ULCON and UFCON UART registers */
  45. #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  46. S3C2410_UCON_RXILEVEL | \
  47. S3C2410_UCON_TXIRQMODE | \
  48. S3C2410_UCON_RXIRQMODE | \
  49. S3C2410_UCON_RXFIFO_TOI | \
  50. S3C2443_UCON_RXERR_IRQEN)
  51. #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
  52. #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  53. S5PV210_UFCON_TXTRIG256 | \
  54. S5PV210_UFCON_RXTRIG256)
  55. static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
  56. [0] = {
  57. .hwport = 0,
  58. .ucon = UNIVERSAL_UCON_DEFAULT,
  59. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  60. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  61. },
  62. [1] = {
  63. .hwport = 1,
  64. .ucon = UNIVERSAL_UCON_DEFAULT,
  65. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  66. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  67. },
  68. [2] = {
  69. .hwport = 2,
  70. .ucon = UNIVERSAL_UCON_DEFAULT,
  71. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  72. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  73. },
  74. [3] = {
  75. .hwport = 3,
  76. .ucon = UNIVERSAL_UCON_DEFAULT,
  77. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  78. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  79. },
  80. };
  81. static struct regulator_consumer_supply max8952_consumer =
  82. REGULATOR_SUPPLY("vdd_arm", NULL);
  83. static struct max8952_platform_data universal_max8952_pdata __initdata = {
  84. .gpio_vid0 = EXYNOS4_GPX0(3),
  85. .gpio_vid1 = EXYNOS4_GPX0(4),
  86. .gpio_en = -1, /* Not controllable, set "Always High" */
  87. .default_mode = 0, /* vid0 = 0, vid1 = 0 */
  88. .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
  89. .sync_freq = 0, /* default: fastest */
  90. .ramp_speed = 0, /* default: fastest */
  91. .reg_data = {
  92. .constraints = {
  93. .name = "VARM_1.2V",
  94. .min_uV = 770000,
  95. .max_uV = 1400000,
  96. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  97. .always_on = 1,
  98. .boot_on = 1,
  99. },
  100. .num_consumer_supplies = 1,
  101. .consumer_supplies = &max8952_consumer,
  102. },
  103. };
  104. static struct regulator_consumer_supply lp3974_buck1_consumer =
  105. REGULATOR_SUPPLY("vdd_int", NULL);
  106. static struct regulator_consumer_supply lp3974_buck2_consumer =
  107. REGULATOR_SUPPLY("vddg3d", NULL);
  108. static struct regulator_consumer_supply lp3974_buck3_consumer =
  109. REGULATOR_SUPPLY("vdet", "s5p-sdo");
  110. static struct regulator_init_data lp3974_buck1_data = {
  111. .constraints = {
  112. .name = "VINT_1.1V",
  113. .min_uV = 750000,
  114. .max_uV = 1500000,
  115. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  116. REGULATOR_CHANGE_STATUS,
  117. .boot_on = 1,
  118. .state_mem = {
  119. .disabled = 1,
  120. },
  121. },
  122. .num_consumer_supplies = 1,
  123. .consumer_supplies = &lp3974_buck1_consumer,
  124. };
  125. static struct regulator_init_data lp3974_buck2_data = {
  126. .constraints = {
  127. .name = "VG3D_1.1V",
  128. .min_uV = 750000,
  129. .max_uV = 1500000,
  130. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  131. REGULATOR_CHANGE_STATUS,
  132. .boot_on = 1,
  133. .state_mem = {
  134. .disabled = 1,
  135. },
  136. },
  137. .num_consumer_supplies = 1,
  138. .consumer_supplies = &lp3974_buck2_consumer,
  139. };
  140. static struct regulator_init_data lp3974_buck3_data = {
  141. .constraints = {
  142. .name = "VCC_1.8V",
  143. .min_uV = 1800000,
  144. .max_uV = 1800000,
  145. .apply_uV = 1,
  146. .always_on = 1,
  147. .state_mem = {
  148. .enabled = 1,
  149. },
  150. },
  151. .num_consumer_supplies = 1,
  152. .consumer_supplies = &lp3974_buck3_consumer,
  153. };
  154. static struct regulator_init_data lp3974_buck4_data = {
  155. .constraints = {
  156. .name = "VMEM_1.2V",
  157. .min_uV = 1200000,
  158. .max_uV = 1200000,
  159. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  160. .apply_uV = 1,
  161. .state_mem = {
  162. .disabled = 1,
  163. },
  164. },
  165. };
  166. static struct regulator_init_data lp3974_ldo2_data = {
  167. .constraints = {
  168. .name = "VALIVE_1.2V",
  169. .min_uV = 1200000,
  170. .max_uV = 1200000,
  171. .apply_uV = 1,
  172. .always_on = 1,
  173. .state_mem = {
  174. .enabled = 1,
  175. },
  176. },
  177. };
  178. static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
  179. REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
  180. REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
  181. REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
  182. };
  183. static struct regulator_init_data lp3974_ldo3_data = {
  184. .constraints = {
  185. .name = "VUSB+MIPI_1.1V",
  186. .min_uV = 1100000,
  187. .max_uV = 1100000,
  188. .apply_uV = 1,
  189. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  190. .state_mem = {
  191. .disabled = 1,
  192. },
  193. },
  194. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
  195. .consumer_supplies = lp3974_ldo3_consumer,
  196. };
  197. static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
  198. REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
  199. };
  200. static struct regulator_init_data lp3974_ldo4_data = {
  201. .constraints = {
  202. .name = "VADC_3.3V",
  203. .min_uV = 3300000,
  204. .max_uV = 3300000,
  205. .apply_uV = 1,
  206. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  207. .state_mem = {
  208. .disabled = 1,
  209. },
  210. },
  211. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
  212. .consumer_supplies = lp3974_ldo4_consumer,
  213. };
  214. static struct regulator_init_data lp3974_ldo5_data = {
  215. .constraints = {
  216. .name = "VTF_2.8V",
  217. .min_uV = 2800000,
  218. .max_uV = 2800000,
  219. .apply_uV = 1,
  220. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  221. .state_mem = {
  222. .disabled = 1,
  223. },
  224. },
  225. };
  226. static struct regulator_init_data lp3974_ldo6_data = {
  227. .constraints = {
  228. .name = "LDO6",
  229. .min_uV = 2000000,
  230. .max_uV = 2000000,
  231. .apply_uV = 1,
  232. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  233. .state_mem = {
  234. .disabled = 1,
  235. },
  236. },
  237. };
  238. static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
  239. REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"),
  240. };
  241. static struct regulator_init_data lp3974_ldo7_data = {
  242. .constraints = {
  243. .name = "VLCD+VMIPI_1.8V",
  244. .min_uV = 1800000,
  245. .max_uV = 1800000,
  246. .apply_uV = 1,
  247. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  248. .state_mem = {
  249. .disabled = 1,
  250. },
  251. },
  252. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
  253. .consumer_supplies = lp3974_ldo7_consumer,
  254. };
  255. static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
  256. REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
  257. };
  258. static struct regulator_init_data lp3974_ldo8_data = {
  259. .constraints = {
  260. .name = "VUSB+VDAC_3.3V",
  261. .min_uV = 3300000,
  262. .max_uV = 3300000,
  263. .apply_uV = 1,
  264. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  265. .state_mem = {
  266. .disabled = 1,
  267. },
  268. },
  269. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
  270. .consumer_supplies = lp3974_ldo8_consumer,
  271. };
  272. static struct regulator_init_data lp3974_ldo9_data = {
  273. .constraints = {
  274. .name = "VCC_2.8V",
  275. .min_uV = 2800000,
  276. .max_uV = 2800000,
  277. .apply_uV = 1,
  278. .always_on = 1,
  279. .state_mem = {
  280. .enabled = 1,
  281. },
  282. },
  283. };
  284. static struct regulator_init_data lp3974_ldo10_data = {
  285. .constraints = {
  286. .name = "VPLL_1.1V",
  287. .min_uV = 1100000,
  288. .max_uV = 1100000,
  289. .boot_on = 1,
  290. .apply_uV = 1,
  291. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  292. .state_mem = {
  293. .disabled = 1,
  294. },
  295. },
  296. };
  297. static struct regulator_consumer_supply lp3974_ldo11_consumer =
  298. REGULATOR_SUPPLY("dig_28", "0-001f");
  299. static struct regulator_init_data lp3974_ldo11_data = {
  300. .constraints = {
  301. .name = "CAM_AF_3.3V",
  302. .min_uV = 3300000,
  303. .max_uV = 3300000,
  304. .apply_uV = 1,
  305. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  306. .state_mem = {
  307. .disabled = 1,
  308. },
  309. },
  310. .num_consumer_supplies = 1,
  311. .consumer_supplies = &lp3974_ldo11_consumer,
  312. };
  313. static struct regulator_init_data lp3974_ldo12_data = {
  314. .constraints = {
  315. .name = "PS_2.8V",
  316. .min_uV = 2800000,
  317. .max_uV = 2800000,
  318. .apply_uV = 1,
  319. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  320. .state_mem = {
  321. .disabled = 1,
  322. },
  323. },
  324. };
  325. static struct regulator_init_data lp3974_ldo13_data = {
  326. .constraints = {
  327. .name = "VHIC_1.2V",
  328. .min_uV = 1200000,
  329. .max_uV = 1200000,
  330. .apply_uV = 1,
  331. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  332. .state_mem = {
  333. .disabled = 1,
  334. },
  335. },
  336. };
  337. static struct regulator_consumer_supply lp3974_ldo14_consumer =
  338. REGULATOR_SUPPLY("dig_18", "0-001f");
  339. static struct regulator_init_data lp3974_ldo14_data = {
  340. .constraints = {
  341. .name = "CAM_I_HOST_1.8V",
  342. .min_uV = 1800000,
  343. .max_uV = 1800000,
  344. .apply_uV = 1,
  345. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  346. .state_mem = {
  347. .disabled = 1,
  348. },
  349. },
  350. .num_consumer_supplies = 1,
  351. .consumer_supplies = &lp3974_ldo14_consumer,
  352. };
  353. static struct regulator_consumer_supply lp3974_ldo15_consumer =
  354. REGULATOR_SUPPLY("dig_12", "0-001f");
  355. static struct regulator_init_data lp3974_ldo15_data = {
  356. .constraints = {
  357. .name = "CAM_S_DIG+FM33_CORE_1.2V",
  358. .min_uV = 1200000,
  359. .max_uV = 1200000,
  360. .apply_uV = 1,
  361. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  362. .state_mem = {
  363. .disabled = 1,
  364. },
  365. },
  366. .num_consumer_supplies = 1,
  367. .consumer_supplies = &lp3974_ldo15_consumer,
  368. };
  369. static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
  370. REGULATOR_SUPPLY("a_sensor", "0-001f"),
  371. };
  372. static struct regulator_init_data lp3974_ldo16_data = {
  373. .constraints = {
  374. .name = "CAM_S_ANA_2.8V",
  375. .min_uV = 2800000,
  376. .max_uV = 2800000,
  377. .apply_uV = 1,
  378. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  379. .state_mem = {
  380. .disabled = 1,
  381. },
  382. },
  383. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
  384. .consumer_supplies = lp3974_ldo16_consumer,
  385. };
  386. static struct regulator_init_data lp3974_ldo17_data = {
  387. .constraints = {
  388. .name = "VCC_3.0V_LCD",
  389. .min_uV = 3000000,
  390. .max_uV = 3000000,
  391. .apply_uV = 1,
  392. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  393. .boot_on = 1,
  394. .state_mem = {
  395. .disabled = 1,
  396. },
  397. },
  398. };
  399. static struct regulator_init_data lp3974_32khz_ap_data = {
  400. .constraints = {
  401. .name = "32KHz AP",
  402. .always_on = 1,
  403. .state_mem = {
  404. .enabled = 1,
  405. },
  406. },
  407. };
  408. static struct regulator_init_data lp3974_32khz_cp_data = {
  409. .constraints = {
  410. .name = "32KHz CP",
  411. .state_mem = {
  412. .disabled = 1,
  413. },
  414. },
  415. };
  416. static struct regulator_init_data lp3974_vichg_data = {
  417. .constraints = {
  418. .name = "VICHG",
  419. .state_mem = {
  420. .disabled = 1,
  421. },
  422. },
  423. };
  424. static struct regulator_init_data lp3974_esafeout1_data = {
  425. .constraints = {
  426. .name = "SAFEOUT1",
  427. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  428. .state_mem = {
  429. .enabled = 1,
  430. },
  431. },
  432. };
  433. static struct regulator_init_data lp3974_esafeout2_data = {
  434. .constraints = {
  435. .name = "SAFEOUT2",
  436. .boot_on = 1,
  437. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  438. .state_mem = {
  439. .enabled = 1,
  440. },
  441. },
  442. };
  443. static struct max8998_regulator_data lp3974_regulators[] = {
  444. { MAX8998_LDO2, &lp3974_ldo2_data },
  445. { MAX8998_LDO3, &lp3974_ldo3_data },
  446. { MAX8998_LDO4, &lp3974_ldo4_data },
  447. { MAX8998_LDO5, &lp3974_ldo5_data },
  448. { MAX8998_LDO6, &lp3974_ldo6_data },
  449. { MAX8998_LDO7, &lp3974_ldo7_data },
  450. { MAX8998_LDO8, &lp3974_ldo8_data },
  451. { MAX8998_LDO9, &lp3974_ldo9_data },
  452. { MAX8998_LDO10, &lp3974_ldo10_data },
  453. { MAX8998_LDO11, &lp3974_ldo11_data },
  454. { MAX8998_LDO12, &lp3974_ldo12_data },
  455. { MAX8998_LDO13, &lp3974_ldo13_data },
  456. { MAX8998_LDO14, &lp3974_ldo14_data },
  457. { MAX8998_LDO15, &lp3974_ldo15_data },
  458. { MAX8998_LDO16, &lp3974_ldo16_data },
  459. { MAX8998_LDO17, &lp3974_ldo17_data },
  460. { MAX8998_BUCK1, &lp3974_buck1_data },
  461. { MAX8998_BUCK2, &lp3974_buck2_data },
  462. { MAX8998_BUCK3, &lp3974_buck3_data },
  463. { MAX8998_BUCK4, &lp3974_buck4_data },
  464. { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
  465. { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
  466. { MAX8998_ENVICHG, &lp3974_vichg_data },
  467. { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
  468. { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
  469. };
  470. static struct max8998_platform_data universal_lp3974_pdata = {
  471. .num_regulators = ARRAY_SIZE(lp3974_regulators),
  472. .regulators = lp3974_regulators,
  473. .buck1_voltage1 = 1100000, /* INT */
  474. .buck1_voltage2 = 1000000,
  475. .buck1_voltage3 = 1100000,
  476. .buck1_voltage4 = 1000000,
  477. .buck1_set1 = EXYNOS4_GPX0(5),
  478. .buck1_set2 = EXYNOS4_GPX0(6),
  479. .buck2_voltage1 = 1200000, /* G3D */
  480. .buck2_voltage2 = 1100000,
  481. .buck1_default_idx = 0,
  482. .buck2_set3 = EXYNOS4_GPE2(0),
  483. .buck2_default_idx = 0,
  484. .wakeup = true,
  485. };
  486. enum fixed_regulator_id {
  487. FIXED_REG_ID_MMC0,
  488. FIXED_REG_ID_HDMI_5V,
  489. FIXED_REG_ID_CAM_S_IF,
  490. FIXED_REG_ID_CAM_I_CORE,
  491. FIXED_REG_ID_CAM_VT_DIO,
  492. };
  493. static struct regulator_consumer_supply hdmi_fixed_consumer =
  494. REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
  495. static struct regulator_init_data hdmi_fixed_voltage_init_data = {
  496. .constraints = {
  497. .name = "HDMI_5V",
  498. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  499. },
  500. .num_consumer_supplies = 1,
  501. .consumer_supplies = &hdmi_fixed_consumer,
  502. };
  503. static struct fixed_voltage_config hdmi_fixed_voltage_config = {
  504. .supply_name = "HDMI_EN1",
  505. .microvolts = 5000000,
  506. .gpio = EXYNOS4_GPE0(1),
  507. .enable_high = true,
  508. .init_data = &hdmi_fixed_voltage_init_data,
  509. };
  510. static struct platform_device hdmi_fixed_voltage = {
  511. .name = "reg-fixed-voltage",
  512. .id = FIXED_REG_ID_HDMI_5V,
  513. .dev = {
  514. .platform_data = &hdmi_fixed_voltage_config,
  515. },
  516. };
  517. /* GPIO I2C 5 (PMIC) */
  518. static struct i2c_board_info i2c5_devs[] __initdata = {
  519. {
  520. I2C_BOARD_INFO("max8952", 0xC0 >> 1),
  521. .platform_data = &universal_max8952_pdata,
  522. }, {
  523. I2C_BOARD_INFO("lp3974", 0xCC >> 1),
  524. .platform_data = &universal_lp3974_pdata,
  525. },
  526. };
  527. /* I2C3 (TSP) */
  528. static struct mxt_platform_data qt602240_platform_data = {
  529. .x_line = 19,
  530. .y_line = 11,
  531. .x_size = 800,
  532. .y_size = 480,
  533. .blen = 0x11,
  534. .threshold = 0x28,
  535. .voltage = 2800000, /* 2.8V */
  536. .orient = MXT_DIAGONAL,
  537. };
  538. static struct i2c_board_info i2c3_devs[] __initdata = {
  539. {
  540. I2C_BOARD_INFO("qt602240_ts", 0x4a),
  541. .platform_data = &qt602240_platform_data,
  542. },
  543. };
  544. static void __init universal_tsp_init(void)
  545. {
  546. int gpio;
  547. /* TSP_LDO_ON: XMDMADDR_11 */
  548. gpio = EXYNOS4_GPE2(3);
  549. gpio_request(gpio, "TSP_LDO_ON");
  550. gpio_direction_output(gpio, 1);
  551. gpio_export(gpio, 0);
  552. /* TSP_INT: XMDMADDR_7 */
  553. gpio = EXYNOS4_GPE1(7);
  554. gpio_request(gpio, "TSP_INT");
  555. s5p_register_gpio_interrupt(gpio);
  556. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  557. s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
  558. i2c3_devs[0].irq = gpio_to_irq(gpio);
  559. }
  560. /* GPIO I2C 12 (3 Touchkey) */
  561. static uint32_t touchkey_keymap[] = {
  562. /* MCS_KEY_MAP(value, keycode) */
  563. MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
  564. MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
  565. };
  566. static struct mcs_platform_data touchkey_data = {
  567. .keymap = touchkey_keymap,
  568. .keymap_size = ARRAY_SIZE(touchkey_keymap),
  569. .key_maxval = 2,
  570. };
  571. /* GPIO I2C 3_TOUCH 2.8V */
  572. #define I2C_GPIO_BUS_12 12
  573. static struct i2c_gpio_platform_data i2c_gpio12_data = {
  574. .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
  575. .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
  576. };
  577. static struct platform_device i2c_gpio12 = {
  578. .name = "i2c-gpio",
  579. .id = I2C_GPIO_BUS_12,
  580. .dev = {
  581. .platform_data = &i2c_gpio12_data,
  582. },
  583. };
  584. static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
  585. {
  586. I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
  587. .platform_data = &touchkey_data,
  588. },
  589. };
  590. static void __init universal_touchkey_init(void)
  591. {
  592. int gpio;
  593. gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
  594. gpio_request(gpio, "3_TOUCH_INT");
  595. s5p_register_gpio_interrupt(gpio);
  596. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  597. i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
  598. gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
  599. gpio_request(gpio, "3_TOUCH_EN");
  600. gpio_direction_output(gpio, 1);
  601. }
  602. static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
  603. .frequency = 300 * 1000,
  604. .sda_delay = 200,
  605. };
  606. /* GPIO KEYS */
  607. static struct gpio_keys_button universal_gpio_keys_tables[] = {
  608. {
  609. .code = KEY_VOLUMEUP,
  610. .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
  611. .desc = "gpio-keys: KEY_VOLUMEUP",
  612. .type = EV_KEY,
  613. .active_low = 1,
  614. .debounce_interval = 1,
  615. }, {
  616. .code = KEY_VOLUMEDOWN,
  617. .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
  618. .desc = "gpio-keys: KEY_VOLUMEDOWN",
  619. .type = EV_KEY,
  620. .active_low = 1,
  621. .debounce_interval = 1,
  622. }, {
  623. .code = KEY_CONFIG,
  624. .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
  625. .desc = "gpio-keys: KEY_CONFIG",
  626. .type = EV_KEY,
  627. .active_low = 1,
  628. .debounce_interval = 1,
  629. }, {
  630. .code = KEY_CAMERA,
  631. .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
  632. .desc = "gpio-keys: KEY_CAMERA",
  633. .type = EV_KEY,
  634. .active_low = 1,
  635. .debounce_interval = 1,
  636. }, {
  637. .code = KEY_OK,
  638. .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
  639. .desc = "gpio-keys: KEY_OK",
  640. .type = EV_KEY,
  641. .active_low = 1,
  642. .debounce_interval = 1,
  643. },
  644. };
  645. static struct gpio_keys_platform_data universal_gpio_keys_data = {
  646. .buttons = universal_gpio_keys_tables,
  647. .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
  648. };
  649. static struct platform_device universal_gpio_keys = {
  650. .name = "gpio-keys",
  651. .dev = {
  652. .platform_data = &universal_gpio_keys_data,
  653. },
  654. };
  655. /* eMMC */
  656. static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
  657. .max_width = 8,
  658. .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
  659. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  660. MMC_CAP_DISABLE),
  661. .cd_type = S3C_SDHCI_CD_PERMANENT,
  662. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  663. };
  664. static struct regulator_consumer_supply mmc0_supplies[] = {
  665. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
  666. };
  667. static struct regulator_init_data mmc0_fixed_voltage_init_data = {
  668. .constraints = {
  669. .name = "VMEM_VDD_2.8V",
  670. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  671. },
  672. .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
  673. .consumer_supplies = mmc0_supplies,
  674. };
  675. static struct fixed_voltage_config mmc0_fixed_voltage_config = {
  676. .supply_name = "MASSMEMORY_EN",
  677. .microvolts = 2800000,
  678. .gpio = EXYNOS4_GPE1(3),
  679. .enable_high = true,
  680. .init_data = &mmc0_fixed_voltage_init_data,
  681. };
  682. static struct platform_device mmc0_fixed_voltage = {
  683. .name = "reg-fixed-voltage",
  684. .id = FIXED_REG_ID_MMC0,
  685. .dev = {
  686. .platform_data = &mmc0_fixed_voltage_config,
  687. },
  688. };
  689. /* SD */
  690. static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
  691. .max_width = 4,
  692. .host_caps = MMC_CAP_4_BIT_DATA |
  693. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  694. MMC_CAP_DISABLE,
  695. .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
  696. .ext_cd_gpio_invert = 1,
  697. .cd_type = S3C_SDHCI_CD_GPIO,
  698. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  699. };
  700. /* WiFi */
  701. static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
  702. .max_width = 4,
  703. .host_caps = MMC_CAP_4_BIT_DATA |
  704. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  705. MMC_CAP_DISABLE,
  706. .cd_type = S3C_SDHCI_CD_EXTERNAL,
  707. };
  708. static void __init universal_sdhci_init(void)
  709. {
  710. s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
  711. s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
  712. s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
  713. }
  714. /* I2C1 */
  715. static struct i2c_board_info i2c1_devs[] __initdata = {
  716. /* Gyro, To be updated */
  717. };
  718. /* Frame Buffer */
  719. static struct s3c_fb_pd_win universal_fb_win0 = {
  720. .win_mode = {
  721. .left_margin = 16,
  722. .right_margin = 16,
  723. .upper_margin = 2,
  724. .lower_margin = 28,
  725. .hsync_len = 2,
  726. .vsync_len = 1,
  727. .xres = 480,
  728. .yres = 800,
  729. .refresh = 55,
  730. },
  731. .max_bpp = 32,
  732. .default_bpp = 16,
  733. };
  734. static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
  735. .win[0] = &universal_fb_win0,
  736. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
  737. VIDCON0_CLKSEL_LCD,
  738. .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
  739. | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  740. .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
  741. };
  742. static struct regulator_consumer_supply cam_i_core_supply =
  743. REGULATOR_SUPPLY("core", "0-001f");
  744. static struct regulator_init_data cam_i_core_reg_init_data = {
  745. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  746. .num_consumer_supplies = 1,
  747. .consumer_supplies = &cam_i_core_supply,
  748. };
  749. static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
  750. .supply_name = "CAM_I_CORE_1.2V",
  751. .microvolts = 1200000,
  752. .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
  753. .enable_high = 1,
  754. .init_data = &cam_i_core_reg_init_data,
  755. };
  756. static struct platform_device cam_i_core_fixed_reg_dev = {
  757. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
  758. .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
  759. };
  760. static struct regulator_consumer_supply cam_s_if_supply =
  761. REGULATOR_SUPPLY("d_sensor", "0-001f");
  762. static struct regulator_init_data cam_s_if_reg_init_data = {
  763. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  764. .num_consumer_supplies = 1,
  765. .consumer_supplies = &cam_s_if_supply,
  766. };
  767. static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
  768. .supply_name = "CAM_S_IF_1.8V",
  769. .microvolts = 1800000,
  770. .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
  771. .enable_high = 1,
  772. .init_data = &cam_s_if_reg_init_data,
  773. };
  774. static struct platform_device cam_s_if_fixed_reg_dev = {
  775. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
  776. .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
  777. };
  778. static struct s5p_platform_mipi_csis mipi_csis_platdata = {
  779. .clk_rate = 166000000UL,
  780. .lanes = 2,
  781. .alignment = 32,
  782. .hs_settle = 12,
  783. .phy_enable = s5p_csis_phy_enable,
  784. };
  785. #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
  786. #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
  787. #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
  788. static int m5mols_set_power(struct device *dev, int on)
  789. {
  790. gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
  791. gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
  792. return 0;
  793. }
  794. static struct m5mols_platform_data m5mols_platdata = {
  795. .gpio_reset = GPIO_CAM_MEGA_nRST,
  796. .reset_polarity = 0,
  797. .set_power = m5mols_set_power,
  798. };
  799. static struct i2c_board_info m5mols_board_info = {
  800. I2C_BOARD_INFO("M5MOLS", 0x1F),
  801. .platform_data = &m5mols_platdata,
  802. };
  803. static struct s5p_fimc_isp_info universal_camera_sensors[] = {
  804. {
  805. .mux_id = 0,
  806. .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
  807. V4L2_MBUS_VSYNC_ACTIVE_LOW,
  808. .bus_type = FIMC_MIPI_CSI2,
  809. .board_info = &m5mols_board_info,
  810. .i2c_bus_num = 0,
  811. .clk_frequency = 21600000UL,
  812. .csi_data_align = 32,
  813. },
  814. };
  815. static struct s5p_platform_fimc fimc_md_platdata = {
  816. .isp_info = universal_camera_sensors,
  817. .num_clients = ARRAY_SIZE(universal_camera_sensors),
  818. };
  819. static struct gpio universal_camera_gpios[] = {
  820. { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
  821. { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
  822. { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
  823. { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
  824. };
  825. static void universal_camera_init(void)
  826. {
  827. s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
  828. &s5p_device_mipi_csis0);
  829. s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
  830. &s5p_device_fimc_md);
  831. if (gpio_request_array(universal_camera_gpios,
  832. ARRAY_SIZE(universal_camera_gpios))) {
  833. pr_err("%s: GPIO request failed\n", __func__);
  834. return;
  835. }
  836. if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
  837. m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
  838. else
  839. pr_err("Failed to configure 8M_ISP_INT GPIO\n");
  840. /* Free GPIOs controlled directly by the sensor drivers. */
  841. gpio_free(GPIO_CAM_MEGA_nRST);
  842. gpio_free(GPIO_CAM_8M_ISP_INT);
  843. if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
  844. pr_err("Camera port A setup failed\n");
  845. }
  846. static struct platform_device *universal_devices[] __initdata = {
  847. /* Samsung Platform Devices */
  848. &s5p_device_mipi_csis0,
  849. &s5p_device_fimc0,
  850. &s5p_device_fimc1,
  851. &s5p_device_fimc2,
  852. &s5p_device_fimc3,
  853. &mmc0_fixed_voltage,
  854. &s3c_device_hsmmc0,
  855. &s3c_device_hsmmc2,
  856. &s3c_device_hsmmc3,
  857. &s3c_device_i2c0,
  858. &s3c_device_i2c3,
  859. &s3c_device_i2c5,
  860. &s5p_device_i2c_hdmiphy,
  861. &hdmi_fixed_voltage,
  862. &exynos4_device_pd[PD_TV],
  863. &s5p_device_hdmi,
  864. &s5p_device_sdo,
  865. &s5p_device_mixer,
  866. /* Universal Devices */
  867. &i2c_gpio12,
  868. &universal_gpio_keys,
  869. &s5p_device_onenand,
  870. &s5p_device_fimd0,
  871. &s5p_device_mfc,
  872. &s5p_device_mfc_l,
  873. &s5p_device_mfc_r,
  874. &exynos4_device_pd[PD_MFC],
  875. &exynos4_device_pd[PD_LCD0],
  876. &exynos4_device_pd[PD_CAM],
  877. &cam_i_core_fixed_reg_dev,
  878. &cam_s_if_fixed_reg_dev,
  879. &s5p_device_fimc_md,
  880. };
  881. static void __init universal_map_io(void)
  882. {
  883. s5p_init_io(NULL, 0, S5P_VA_CHIPID);
  884. s3c24xx_init_clocks(24000000);
  885. s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
  886. }
  887. void s5p_tv_setup(void)
  888. {
  889. /* direct HPD to HDMI chip */
  890. gpio_request(EXYNOS4_GPX3(7), "hpd-plug");
  891. gpio_direction_input(EXYNOS4_GPX3(7));
  892. s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
  893. s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
  894. /* setup dependencies between TV devices */
  895. s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
  896. s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
  897. }
  898. static void __init universal_reserve(void)
  899. {
  900. s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
  901. }
  902. static void __init universal_machine_init(void)
  903. {
  904. universal_sdhci_init();
  905. s5p_tv_setup();
  906. s3c_i2c0_set_platdata(&universal_i2c0_platdata);
  907. i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
  908. universal_tsp_init();
  909. s3c_i2c3_set_platdata(NULL);
  910. i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
  911. s3c_i2c5_set_platdata(NULL);
  912. s5p_i2c_hdmiphy_set_platdata(NULL);
  913. i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
  914. s5p_fimd0_set_platdata(&universal_lcd_pdata);
  915. universal_touchkey_init();
  916. i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
  917. ARRAY_SIZE(i2c_gpio12_devs));
  918. universal_camera_init();
  919. /* Last */
  920. platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
  921. s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
  922. s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
  923. s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
  924. s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev;
  925. s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev;
  926. s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev;
  927. s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
  928. }
  929. MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
  930. /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
  931. .atag_offset = 0x100,
  932. .init_irq = exynos4_init_irq,
  933. .map_io = universal_map_io,
  934. .init_machine = universal_machine_init,
  935. .timer = &exynos4_timer,
  936. .reserve = &universal_reserve,
  937. MACHINE_END