mach-smdkv310.c 10 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-smdkv310.c
  2. *
  3. * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/serial_core.h>
  11. #include <linux/delay.h>
  12. #include <linux/gpio.h>
  13. #include <linux/lcd.h>
  14. #include <linux/mmc/host.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/smsc911x.h>
  17. #include <linux/io.h>
  18. #include <linux/i2c.h>
  19. #include <linux/input.h>
  20. #include <linux/pwm_backlight.h>
  21. #include <asm/mach/arch.h>
  22. #include <asm/mach-types.h>
  23. #include <video/platform_lcd.h>
  24. #include <plat/regs-serial.h>
  25. #include <plat/regs-srom.h>
  26. #include <plat/regs-fb-v4.h>
  27. #include <plat/exynos4.h>
  28. #include <plat/cpu.h>
  29. #include <plat/devs.h>
  30. #include <plat/fb.h>
  31. #include <plat/keypad.h>
  32. #include <plat/sdhci.h>
  33. #include <plat/iic.h>
  34. #include <plat/pd.h>
  35. #include <plat/gpio-cfg.h>
  36. #include <plat/backlight.h>
  37. #include <plat/mfc.h>
  38. #include <plat/ehci.h>
  39. #include <plat/clock.h>
  40. #include <mach/map.h>
  41. /* Following are default values for UCON, ULCON and UFCON UART registers */
  42. #define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  43. S3C2410_UCON_RXILEVEL | \
  44. S3C2410_UCON_TXIRQMODE | \
  45. S3C2410_UCON_RXIRQMODE | \
  46. S3C2410_UCON_RXFIFO_TOI | \
  47. S3C2443_UCON_RXERR_IRQEN)
  48. #define SMDKV310_ULCON_DEFAULT S3C2410_LCON_CS8
  49. #define SMDKV310_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  50. S5PV210_UFCON_TXTRIG4 | \
  51. S5PV210_UFCON_RXTRIG4)
  52. static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
  53. [0] = {
  54. .hwport = 0,
  55. .flags = 0,
  56. .ucon = SMDKV310_UCON_DEFAULT,
  57. .ulcon = SMDKV310_ULCON_DEFAULT,
  58. .ufcon = SMDKV310_UFCON_DEFAULT,
  59. },
  60. [1] = {
  61. .hwport = 1,
  62. .flags = 0,
  63. .ucon = SMDKV310_UCON_DEFAULT,
  64. .ulcon = SMDKV310_ULCON_DEFAULT,
  65. .ufcon = SMDKV310_UFCON_DEFAULT,
  66. },
  67. [2] = {
  68. .hwport = 2,
  69. .flags = 0,
  70. .ucon = SMDKV310_UCON_DEFAULT,
  71. .ulcon = SMDKV310_ULCON_DEFAULT,
  72. .ufcon = SMDKV310_UFCON_DEFAULT,
  73. },
  74. [3] = {
  75. .hwport = 3,
  76. .flags = 0,
  77. .ucon = SMDKV310_UCON_DEFAULT,
  78. .ulcon = SMDKV310_ULCON_DEFAULT,
  79. .ufcon = SMDKV310_UFCON_DEFAULT,
  80. },
  81. };
  82. static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
  83. .cd_type = S3C_SDHCI_CD_INTERNAL,
  84. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  85. #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
  86. .max_width = 8,
  87. .host_caps = MMC_CAP_8_BIT_DATA,
  88. #endif
  89. };
  90. static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
  91. .cd_type = S3C_SDHCI_CD_GPIO,
  92. .ext_cd_gpio = EXYNOS4_GPK0(2),
  93. .ext_cd_gpio_invert = 1,
  94. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  95. };
  96. static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
  97. .cd_type = S3C_SDHCI_CD_INTERNAL,
  98. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  99. #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
  100. .max_width = 8,
  101. .host_caps = MMC_CAP_8_BIT_DATA,
  102. #endif
  103. };
  104. static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
  105. .cd_type = S3C_SDHCI_CD_GPIO,
  106. .ext_cd_gpio = EXYNOS4_GPK2(2),
  107. .ext_cd_gpio_invert = 1,
  108. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  109. };
  110. static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
  111. unsigned int power)
  112. {
  113. if (power) {
  114. #if !defined(CONFIG_BACKLIGHT_PWM)
  115. gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
  116. gpio_free(EXYNOS4_GPD0(1));
  117. #endif
  118. /* fire nRESET on power up */
  119. gpio_request(EXYNOS4_GPX0(6), "GPX0");
  120. gpio_direction_output(EXYNOS4_GPX0(6), 1);
  121. mdelay(100);
  122. gpio_set_value(EXYNOS4_GPX0(6), 0);
  123. mdelay(10);
  124. gpio_set_value(EXYNOS4_GPX0(6), 1);
  125. mdelay(10);
  126. gpio_free(EXYNOS4_GPX0(6));
  127. } else {
  128. #if !defined(CONFIG_BACKLIGHT_PWM)
  129. gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
  130. gpio_free(EXYNOS4_GPD0(1));
  131. #endif
  132. }
  133. }
  134. static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
  135. .set_power = lcd_lte480wv_set_power,
  136. };
  137. static struct platform_device smdkv310_lcd_lte480wv = {
  138. .name = "platform-lcd",
  139. .dev.parent = &s5p_device_fimd0.dev,
  140. .dev.platform_data = &smdkv310_lcd_lte480wv_data,
  141. };
  142. static struct s3c_fb_pd_win smdkv310_fb_win0 = {
  143. .win_mode = {
  144. .left_margin = 13,
  145. .right_margin = 8,
  146. .upper_margin = 7,
  147. .lower_margin = 5,
  148. .hsync_len = 3,
  149. .vsync_len = 1,
  150. .xres = 800,
  151. .yres = 480,
  152. },
  153. .max_bpp = 32,
  154. .default_bpp = 24,
  155. };
  156. static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
  157. .win[0] = &smdkv310_fb_win0,
  158. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  159. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  160. .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
  161. };
  162. static struct resource smdkv310_smsc911x_resources[] = {
  163. [0] = {
  164. .start = EXYNOS4_PA_SROM_BANK(1),
  165. .end = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
  166. .flags = IORESOURCE_MEM,
  167. },
  168. [1] = {
  169. .start = IRQ_EINT(5),
  170. .end = IRQ_EINT(5),
  171. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  172. },
  173. };
  174. static struct smsc911x_platform_config smsc9215_config = {
  175. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  176. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  177. .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
  178. .phy_interface = PHY_INTERFACE_MODE_MII,
  179. .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
  180. };
  181. static struct platform_device smdkv310_smsc911x = {
  182. .name = "smsc911x",
  183. .id = -1,
  184. .num_resources = ARRAY_SIZE(smdkv310_smsc911x_resources),
  185. .resource = smdkv310_smsc911x_resources,
  186. .dev = {
  187. .platform_data = &smsc9215_config,
  188. },
  189. };
  190. static uint32_t smdkv310_keymap[] __initdata = {
  191. /* KEY(row, col, keycode) */
  192. KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
  193. KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
  194. KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
  195. KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
  196. };
  197. static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
  198. .keymap = smdkv310_keymap,
  199. .keymap_size = ARRAY_SIZE(smdkv310_keymap),
  200. };
  201. static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
  202. .keymap_data = &smdkv310_keymap_data,
  203. .rows = 2,
  204. .cols = 8,
  205. };
  206. static struct i2c_board_info i2c_devs1[] __initdata = {
  207. {I2C_BOARD_INFO("wm8994", 0x1a),},
  208. };
  209. /* USB EHCI */
  210. static struct s5p_ehci_platdata smdkv310_ehci_pdata;
  211. static void __init smdkv310_ehci_init(void)
  212. {
  213. struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata;
  214. s5p_ehci_set_platdata(pdata);
  215. }
  216. static struct platform_device *smdkv310_devices[] __initdata = {
  217. &s3c_device_hsmmc0,
  218. &s3c_device_hsmmc1,
  219. &s3c_device_hsmmc2,
  220. &s3c_device_hsmmc3,
  221. &s3c_device_i2c1,
  222. &s5p_device_i2c_hdmiphy,
  223. &s3c_device_rtc,
  224. &s3c_device_wdt,
  225. &s5p_device_ehci,
  226. &s5p_device_fimc0,
  227. &s5p_device_fimc1,
  228. &s5p_device_fimc2,
  229. &s5p_device_fimc3,
  230. &exynos4_device_ac97,
  231. &exynos4_device_i2s0,
  232. &samsung_device_keypad,
  233. &s5p_device_mfc,
  234. &s5p_device_mfc_l,
  235. &s5p_device_mfc_r,
  236. &exynos4_device_pd[PD_MFC],
  237. &exynos4_device_pd[PD_G3D],
  238. &exynos4_device_pd[PD_LCD0],
  239. &exynos4_device_pd[PD_LCD1],
  240. &exynos4_device_pd[PD_CAM],
  241. &exynos4_device_pd[PD_TV],
  242. &exynos4_device_pd[PD_GPS],
  243. &exynos4_device_spdif,
  244. &exynos4_device_sysmmu,
  245. &samsung_asoc_dma,
  246. &samsung_asoc_idma,
  247. &s5p_device_fimd0,
  248. &smdkv310_lcd_lte480wv,
  249. &smdkv310_smsc911x,
  250. &exynos4_device_ahci,
  251. &s5p_device_hdmi,
  252. &s5p_device_mixer,
  253. };
  254. static void __init smdkv310_smsc911x_init(void)
  255. {
  256. u32 cs1;
  257. /* configure nCS1 width to 16 bits */
  258. cs1 = __raw_readl(S5P_SROM_BW) &
  259. ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
  260. cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
  261. (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
  262. (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
  263. S5P_SROM_BW__NCS1__SHIFT;
  264. __raw_writel(cs1, S5P_SROM_BW);
  265. /* set timing for nCS1 suitable for ethernet chip */
  266. __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
  267. (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
  268. (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
  269. (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
  270. (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
  271. (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
  272. (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
  273. }
  274. /* LCD Backlight data */
  275. static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
  276. .no = EXYNOS4_GPD0(1),
  277. .func = S3C_GPIO_SFN(2),
  278. };
  279. static struct platform_pwm_backlight_data smdkv310_bl_data = {
  280. .pwm_id = 1,
  281. .pwm_period_ns = 1000,
  282. };
  283. static void s5p_tv_setup(void)
  284. {
  285. /* direct HPD to HDMI chip */
  286. WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
  287. s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
  288. s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
  289. /* setup dependencies between TV devices */
  290. s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
  291. s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
  292. }
  293. static void __init smdkv310_map_io(void)
  294. {
  295. s5p_init_io(NULL, 0, S5P_VA_CHIPID);
  296. s3c24xx_init_clocks(24000000);
  297. s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
  298. }
  299. static void __init smdkv310_reserve(void)
  300. {
  301. s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
  302. }
  303. static void __init smdkv310_machine_init(void)
  304. {
  305. s3c_i2c1_set_platdata(NULL);
  306. i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
  307. smdkv310_smsc911x_init();
  308. s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
  309. s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
  310. s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
  311. s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
  312. s5p_tv_setup();
  313. s5p_i2c_hdmiphy_set_platdata(NULL);
  314. samsung_keypad_set_platdata(&smdkv310_keypad_data);
  315. samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
  316. s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
  317. smdkv310_ehci_init();
  318. clk_xusbxti.rate = 24000000;
  319. platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
  320. s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
  321. }
  322. MACHINE_START(SMDKV310, "SMDKV310")
  323. /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
  324. /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
  325. .atag_offset = 0x100,
  326. .init_irq = exynos4_init_irq,
  327. .map_io = smdkv310_map_io,
  328. .init_machine = smdkv310_machine_init,
  329. .timer = &exynos4_timer,
  330. .reserve = &smdkv310_reserve,
  331. MACHINE_END
  332. MACHINE_START(SMDKC210, "SMDKC210")
  333. /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
  334. .atag_offset = 0x100,
  335. .init_irq = exynos4_init_irq,
  336. .map_io = smdkv310_map_io,
  337. .init_machine = smdkv310_machine_init,
  338. .timer = &exynos4_timer,
  339. MACHINE_END