nouveau_drv.c 12 KB

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  1. /*
  2. * Copyright 2005 Stephane Marchesin.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. */
  24. #include <linux/console.h>
  25. #include "drmP.h"
  26. #include "drm.h"
  27. #include "drm_crtc_helper.h"
  28. #include "nouveau_drv.h"
  29. #include "nouveau_hw.h"
  30. #include "nouveau_fb.h"
  31. #include "nouveau_fbcon.h"
  32. #include "nv50_display.h"
  33. #include "drm_pciids.h"
  34. MODULE_PARM_DESC(ctxfw, "Use external firmware blob for grctx init (NV40)");
  35. int nouveau_ctxfw = 0;
  36. module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
  37. MODULE_PARM_DESC(noagp, "Disable AGP");
  38. int nouveau_noagp;
  39. module_param_named(noagp, nouveau_noagp, int, 0400);
  40. MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
  41. static int nouveau_modeset = -1; /* kms */
  42. module_param_named(modeset, nouveau_modeset, int, 0400);
  43. MODULE_PARM_DESC(vbios, "Override default VBIOS location");
  44. char *nouveau_vbios;
  45. module_param_named(vbios, nouveau_vbios, charp, 0400);
  46. MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
  47. int nouveau_vram_pushbuf;
  48. module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
  49. MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
  50. int nouveau_vram_notify = 1;
  51. module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
  52. MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
  53. int nouveau_duallink = 1;
  54. module_param_named(duallink, nouveau_duallink, int, 0400);
  55. MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
  56. int nouveau_uscript_lvds = -1;
  57. module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
  58. MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
  59. int nouveau_uscript_tmds = -1;
  60. module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
  61. MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
  62. int nouveau_ignorelid = 0;
  63. module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
  64. MODULE_PARM_DESC(noaccel, "Disable all acceleration");
  65. int nouveau_noaccel = 0;
  66. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  67. MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
  68. int nouveau_nofbaccel = 0;
  69. module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
  70. MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
  71. int nouveau_override_conntype = 0;
  72. module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
  73. MODULE_PARM_DESC(tv_disable, "Disable TV-out detection\n");
  74. int nouveau_tv_disable = 0;
  75. module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
  76. MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
  77. "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
  78. "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
  79. "\t\tDefault: PAL\n"
  80. "\t\t*NOTE* Ignored for cards with external TV encoders.");
  81. char *nouveau_tv_norm;
  82. module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
  83. MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
  84. "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
  85. "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
  86. "\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
  87. int nouveau_reg_debug;
  88. module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
  89. int nouveau_fbpercrtc;
  90. #if 0
  91. module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
  92. #endif
  93. static struct pci_device_id pciidlist[] = {
  94. {
  95. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  96. .class = PCI_BASE_CLASS_DISPLAY << 16,
  97. .class_mask = 0xff << 16,
  98. },
  99. {
  100. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  101. .class = PCI_BASE_CLASS_DISPLAY << 16,
  102. .class_mask = 0xff << 16,
  103. },
  104. {}
  105. };
  106. MODULE_DEVICE_TABLE(pci, pciidlist);
  107. static struct drm_driver driver;
  108. static int __devinit
  109. nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  110. {
  111. return drm_get_dev(pdev, ent, &driver);
  112. }
  113. static void
  114. nouveau_pci_remove(struct pci_dev *pdev)
  115. {
  116. struct drm_device *dev = pci_get_drvdata(pdev);
  117. drm_put_dev(dev);
  118. }
  119. int
  120. nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
  121. {
  122. struct drm_device *dev = pci_get_drvdata(pdev);
  123. struct drm_nouveau_private *dev_priv = dev->dev_private;
  124. struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
  125. struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
  126. struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
  127. struct nouveau_channel *chan;
  128. struct drm_crtc *crtc;
  129. int ret, i;
  130. if (!drm_core_check_feature(dev, DRIVER_MODESET))
  131. return -ENODEV;
  132. if (pm_state.event == PM_EVENT_PRETHAW)
  133. return 0;
  134. NV_INFO(dev, "Disabling fbcon acceleration...\n");
  135. nouveau_fbcon_save_disable_accel(dev);
  136. NV_INFO(dev, "Unpinning framebuffer(s)...\n");
  137. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  138. struct nouveau_framebuffer *nouveau_fb;
  139. nouveau_fb = nouveau_framebuffer(crtc->fb);
  140. if (!nouveau_fb || !nouveau_fb->nvbo)
  141. continue;
  142. nouveau_bo_unpin(nouveau_fb->nvbo);
  143. }
  144. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  145. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  146. nouveau_bo_unmap(nv_crtc->cursor.nvbo);
  147. nouveau_bo_unpin(nv_crtc->cursor.nvbo);
  148. }
  149. NV_INFO(dev, "Evicting buffers...\n");
  150. ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
  151. NV_INFO(dev, "Idling channels...\n");
  152. for (i = 0; i < pfifo->channels; i++) {
  153. struct nouveau_fence *fence = NULL;
  154. chan = dev_priv->fifos[i];
  155. if (!chan || (dev_priv->card_type >= NV_50 &&
  156. chan == dev_priv->fifos[0]))
  157. continue;
  158. ret = nouveau_fence_new(chan, &fence, true);
  159. if (ret == 0) {
  160. ret = nouveau_fence_wait(fence, NULL, false, false);
  161. nouveau_fence_unref((void *)&fence);
  162. }
  163. if (ret) {
  164. NV_ERROR(dev, "Failed to idle channel %d for suspend\n",
  165. chan->id);
  166. }
  167. }
  168. pgraph->fifo_access(dev, false);
  169. nouveau_wait_for_idle(dev);
  170. pfifo->reassign(dev, false);
  171. pfifo->disable(dev);
  172. pfifo->unload_context(dev);
  173. pgraph->unload_context(dev);
  174. NV_INFO(dev, "Suspending GPU objects...\n");
  175. ret = nouveau_gpuobj_suspend(dev);
  176. if (ret) {
  177. NV_ERROR(dev, "... failed: %d\n", ret);
  178. goto out_abort;
  179. }
  180. ret = pinstmem->suspend(dev);
  181. if (ret) {
  182. NV_ERROR(dev, "... failed: %d\n", ret);
  183. nouveau_gpuobj_suspend_cleanup(dev);
  184. goto out_abort;
  185. }
  186. NV_INFO(dev, "And we're gone!\n");
  187. pci_save_state(pdev);
  188. if (pm_state.event == PM_EVENT_SUSPEND) {
  189. pci_disable_device(pdev);
  190. pci_set_power_state(pdev, PCI_D3hot);
  191. }
  192. acquire_console_sem();
  193. nouveau_fbcon_set_suspend(dev, 1);
  194. release_console_sem();
  195. nouveau_fbcon_restore_accel(dev);
  196. return 0;
  197. out_abort:
  198. NV_INFO(dev, "Re-enabling acceleration..\n");
  199. pfifo->enable(dev);
  200. pfifo->reassign(dev, true);
  201. pgraph->fifo_access(dev, true);
  202. return ret;
  203. }
  204. int
  205. nouveau_pci_resume(struct pci_dev *pdev)
  206. {
  207. struct drm_device *dev = pci_get_drvdata(pdev);
  208. struct drm_nouveau_private *dev_priv = dev->dev_private;
  209. struct nouveau_engine *engine = &dev_priv->engine;
  210. struct drm_crtc *crtc;
  211. int ret, i;
  212. if (!drm_core_check_feature(dev, DRIVER_MODESET))
  213. return -ENODEV;
  214. nouveau_fbcon_save_disable_accel(dev);
  215. NV_INFO(dev, "We're back, enabling device...\n");
  216. pci_set_power_state(pdev, PCI_D0);
  217. pci_restore_state(pdev);
  218. if (pci_enable_device(pdev))
  219. return -1;
  220. pci_set_master(dev->pdev);
  221. NV_INFO(dev, "POSTing device...\n");
  222. ret = nouveau_run_vbios_init(dev);
  223. if (ret)
  224. return ret;
  225. if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
  226. ret = nouveau_mem_init_agp(dev);
  227. if (ret) {
  228. NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
  229. return ret;
  230. }
  231. }
  232. NV_INFO(dev, "Reinitialising engines...\n");
  233. engine->instmem.resume(dev);
  234. engine->mc.init(dev);
  235. engine->timer.init(dev);
  236. engine->fb.init(dev);
  237. engine->graph.init(dev);
  238. engine->fifo.init(dev);
  239. NV_INFO(dev, "Restoring GPU objects...\n");
  240. nouveau_gpuobj_resume(dev);
  241. nouveau_irq_postinstall(dev);
  242. /* Re-write SKIPS, they'll have been lost over the suspend */
  243. if (nouveau_vram_pushbuf) {
  244. struct nouveau_channel *chan;
  245. int j;
  246. for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
  247. chan = dev_priv->fifos[i];
  248. if (!chan || !chan->pushbuf_bo)
  249. continue;
  250. for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
  251. nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
  252. }
  253. }
  254. NV_INFO(dev, "Restoring mode...\n");
  255. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  256. struct nouveau_framebuffer *nouveau_fb;
  257. nouveau_fb = nouveau_framebuffer(crtc->fb);
  258. if (!nouveau_fb || !nouveau_fb->nvbo)
  259. continue;
  260. nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
  261. }
  262. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  263. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  264. int ret;
  265. ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
  266. if (!ret)
  267. ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
  268. if (ret)
  269. NV_ERROR(dev, "Could not pin/map cursor.\n");
  270. }
  271. if (dev_priv->card_type < NV_50) {
  272. nv04_display_restore(dev);
  273. NVLockVgaCrtcs(dev, false);
  274. } else
  275. nv50_display_init(dev);
  276. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  277. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  278. nv_crtc->cursor.set_offset(nv_crtc,
  279. nv_crtc->cursor.nvbo->bo.offset -
  280. dev_priv->vm_vram_base);
  281. nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
  282. nv_crtc->cursor_saved_y);
  283. }
  284. /* Force CLUT to get re-loaded during modeset */
  285. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  286. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  287. nv_crtc->lut.depth = 0;
  288. }
  289. acquire_console_sem();
  290. nouveau_fbcon_set_suspend(dev, 0);
  291. release_console_sem();
  292. nouveau_fbcon_zfill_all(dev);
  293. drm_helper_resume_force_mode(dev);
  294. nouveau_fbcon_restore_accel(dev);
  295. return 0;
  296. }
  297. static struct drm_driver driver = {
  298. .driver_features =
  299. DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
  300. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
  301. .load = nouveau_load,
  302. .firstopen = nouveau_firstopen,
  303. .lastclose = nouveau_lastclose,
  304. .unload = nouveau_unload,
  305. .preclose = nouveau_preclose,
  306. #if defined(CONFIG_DRM_NOUVEAU_DEBUG)
  307. .debugfs_init = nouveau_debugfs_init,
  308. .debugfs_cleanup = nouveau_debugfs_takedown,
  309. #endif
  310. .irq_preinstall = nouveau_irq_preinstall,
  311. .irq_postinstall = nouveau_irq_postinstall,
  312. .irq_uninstall = nouveau_irq_uninstall,
  313. .irq_handler = nouveau_irq_handler,
  314. .reclaim_buffers = drm_core_reclaim_buffers,
  315. .get_map_ofs = drm_core_get_map_ofs,
  316. .get_reg_ofs = drm_core_get_reg_ofs,
  317. .ioctls = nouveau_ioctls,
  318. .fops = {
  319. .owner = THIS_MODULE,
  320. .open = drm_open,
  321. .release = drm_release,
  322. .unlocked_ioctl = drm_ioctl,
  323. .mmap = nouveau_ttm_mmap,
  324. .poll = drm_poll,
  325. .fasync = drm_fasync,
  326. #if defined(CONFIG_COMPAT)
  327. .compat_ioctl = nouveau_compat_ioctl,
  328. #endif
  329. },
  330. .pci_driver = {
  331. .name = DRIVER_NAME,
  332. .id_table = pciidlist,
  333. .probe = nouveau_pci_probe,
  334. .remove = nouveau_pci_remove,
  335. .suspend = nouveau_pci_suspend,
  336. .resume = nouveau_pci_resume
  337. },
  338. .gem_init_object = nouveau_gem_object_new,
  339. .gem_free_object = nouveau_gem_object_del,
  340. .name = DRIVER_NAME,
  341. .desc = DRIVER_DESC,
  342. #ifdef GIT_REVISION
  343. .date = GIT_REVISION,
  344. #else
  345. .date = DRIVER_DATE,
  346. #endif
  347. .major = DRIVER_MAJOR,
  348. .minor = DRIVER_MINOR,
  349. .patchlevel = DRIVER_PATCHLEVEL,
  350. };
  351. static int __init nouveau_init(void)
  352. {
  353. driver.num_ioctls = nouveau_max_ioctl;
  354. if (nouveau_modeset == -1) {
  355. #ifdef CONFIG_VGA_CONSOLE
  356. if (vgacon_text_force())
  357. nouveau_modeset = 0;
  358. else
  359. #endif
  360. nouveau_modeset = 1;
  361. }
  362. if (nouveau_modeset == 1) {
  363. driver.driver_features |= DRIVER_MODESET;
  364. nouveau_register_dsm_handler();
  365. }
  366. return drm_init(&driver);
  367. }
  368. static void __exit nouveau_exit(void)
  369. {
  370. drm_exit(&driver);
  371. nouveau_unregister_dsm_handler();
  372. }
  373. module_init(nouveau_init);
  374. module_exit(nouveau_exit);
  375. MODULE_AUTHOR(DRIVER_AUTHOR);
  376. MODULE_DESCRIPTION(DRIVER_DESC);
  377. MODULE_LICENSE("GPL and additional rights");