armada-xp-mv78460.dtsi 2.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112
  1. /*
  2. * Device Tree Include file for Marvell Armada XP family SoC
  3. *
  4. * Copyright (C) 2012 Marvell
  5. *
  6. * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. *
  12. * Contains definitions specific to the Armada XP MV78460 SoC that are not
  13. * common to all Armada XP SoCs.
  14. */
  15. /include/ "armada-xp.dtsi"
  16. / {
  17. model = "Marvell Armada XP MV78460 SoC";
  18. compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
  19. aliases {
  20. gpio0 = &gpio0;
  21. gpio1 = &gpio1;
  22. gpio2 = &gpio2;
  23. };
  24. cpus {
  25. #address-cells = <1>;
  26. #size-cells = <0>;
  27. cpu@0 {
  28. device_type = "cpu";
  29. compatible = "marvell,sheeva-v7";
  30. reg = <0>;
  31. clocks = <&cpuclk 0>;
  32. };
  33. cpu@1 {
  34. device_type = "cpu";
  35. compatible = "marvell,sheeva-v7";
  36. reg = <1>;
  37. clocks = <&cpuclk 1>;
  38. };
  39. cpu@2 {
  40. device_type = "cpu";
  41. compatible = "marvell,sheeva-v7";
  42. reg = <2>;
  43. clocks = <&cpuclk 2>;
  44. };
  45. cpu@3 {
  46. device_type = "cpu";
  47. compatible = "marvell,sheeva-v7";
  48. reg = <3>;
  49. clocks = <&cpuclk 3>;
  50. };
  51. };
  52. soc {
  53. pinctrl {
  54. compatible = "marvell,mv78460-pinctrl";
  55. reg = <0xd0018000 0x38>;
  56. };
  57. gpio0: gpio@d0018100 {
  58. compatible = "marvell,armadaxp-gpio";
  59. reg = <0xd0018100 0x40>,
  60. <0xd0018800 0x30>;
  61. ngpios = <32>;
  62. gpio-controller;
  63. #gpio-cells = <2>;
  64. interrupt-controller;
  65. #interrupts-cells = <2>;
  66. interrupts = <16>, <17>, <18>, <19>;
  67. };
  68. gpio1: gpio@d0018140 {
  69. compatible = "marvell,armadaxp-gpio";
  70. reg = <0xd0018140 0x40>,
  71. <0xd0018840 0x30>;
  72. ngpios = <32>;
  73. gpio-controller;
  74. #gpio-cells = <2>;
  75. interrupt-controller;
  76. #interrupts-cells = <2>;
  77. interrupts = <20>, <21>, <22>, <23>;
  78. };
  79. gpio2: gpio@d0018180 {
  80. compatible = "marvell,armadaxp-gpio";
  81. reg = <0xd0018180 0x40>,
  82. <0xd0018870 0x30>;
  83. ngpios = <3>;
  84. gpio-controller;
  85. #gpio-cells = <2>;
  86. interrupt-controller;
  87. #interrupts-cells = <2>;
  88. interrupts = <24>;
  89. };
  90. ethernet@d0034000 {
  91. compatible = "marvell,armada-370-neta";
  92. reg = <0xd0034000 0x2500>;
  93. interrupts = <14>;
  94. clocks = <&gateclk 1>;
  95. status = "disabled";
  96. };
  97. };
  98. };