board-qsd8x50.c 4.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176
  1. /* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  15. * 02110-1301, USA.
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/irq.h>
  19. #include <linux/gpio.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/bootmem.h>
  22. #include <linux/delay.h>
  23. #include <asm/mach-types.h>
  24. #include <asm/mach/arch.h>
  25. #include <asm/io.h>
  26. #include <asm/setup.h>
  27. #include <mach/vreg.h>
  28. #include <mach/mpp.h>
  29. #include <mach/gpio.h>
  30. #include <mach/board.h>
  31. #include <mach/dma.h>
  32. #include <mach/memory.h>
  33. #include "devices.h"
  34. #include "timer.h"
  35. #include "socinfo.h"
  36. #include "proc_comm.h"
  37. #define MSM_SHARED_RAM_PHYS (MSM_SMI_BASE + 0x00100000)
  38. static struct resource smc91x_resources[] = {
  39. [0] = {
  40. .flags = IORESOURCE_MEM,
  41. },
  42. [1] = {
  43. .flags = IORESOURCE_IRQ,
  44. },
  45. };
  46. static struct platform_device smc91x_device = {
  47. .name = "smc91x",
  48. .id = 0,
  49. .num_resources = ARRAY_SIZE(smc91x_resources),
  50. .resource = smc91x_resources,
  51. };
  52. static struct platform_device *devices[] __initdata = {
  53. &smc91x_device,
  54. &msm_device_smd,
  55. &msm_device_dmov,
  56. &msm_device_nand,
  57. };
  58. static void __init qsd8x50_init_irq(void)
  59. {
  60. msm_init_irq();
  61. }
  62. static void __init qsd8x50_init_host(void)
  63. {
  64. if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa())
  65. return;
  66. vreg_usb = vreg_get(NULL, "boost");
  67. if (IS_ERR(vreg_usb)) {
  68. printk(KERN_ERR "%s: vreg get failed (%ld)\n",
  69. __func__, PTR_ERR(vreg_usb));
  70. return;
  71. }
  72. platform_device_register(&msm_device_hsusb_otg);
  73. }
  74. static void __init qsd8x50_cfg_smc91x(void)
  75. {
  76. int rc = 0;
  77. if (machine_is_qsd8x50_surf() || machine_is_qsd8x50a_surf()) {
  78. smc91x_resources[0].start = 0x70000300;
  79. smc91x_resources[0].end = 0x700003ff;
  80. smc91x_resources[1].start = MSM_GPIO_TO_INT(156);
  81. smc91x_resources[1].end = MSM_GPIO_TO_INT(156);
  82. } else if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa()) {
  83. smc91x_resources[0].start = 0x84000300;
  84. smc91x_resources[0].end = 0x840003ff;
  85. smc91x_resources[1].start = MSM_GPIO_TO_INT(87);
  86. smc91x_resources[1].end = MSM_GPIO_TO_INT(87);
  87. rc = gpio_tlmm_config(GPIO_CFG(87, 0, GPIO_INPUT,
  88. GPIO_PULL_DOWN, GPIO_2MA),
  89. GPIO_ENABLE);
  90. if (rc) {
  91. printk(KERN_ERR "%s: gpio_tlmm_config=%d\n",
  92. __func__, rc);
  93. }
  94. } else
  95. printk(KERN_ERR "%s: invalid machine type\n", __func__);
  96. }
  97. static void __init qsd8x50_init(void)
  98. {
  99. if (socinfo_init() < 0)
  100. printk(KERN_ERR "%s: socinfo_init() failed!\n",
  101. __func__);
  102. qsd8x50_cfg_smc91x();
  103. platform_add_devices(devices, ARRAY_SIZE(devices));
  104. }
  105. static void __init qsd8x50_map_io(void)
  106. {
  107. msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
  108. msm_map_qsd8x50_io();
  109. msm_clock_init(msm_clocks_8x50, msm_num_clocks_8x50);
  110. }
  111. MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")
  112. #ifdef CONFIG_MSM_DEBUG_UART
  113. .phys_io = MSM_DEBUG_UART_PHYS,
  114. .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
  115. #endif
  116. .boot_params = PHYS_OFFSET + 0x100,
  117. .map_io = qsd8x50_map_io,
  118. .init_irq = qsd8x50_init_irq,
  119. .init_machine = qsd8x50_init,
  120. .timer = &msm_timer,
  121. MACHINE_END
  122. MACHINE_START(QSD8X50_FFA, "QCT QSD8X50 FFA")
  123. #ifdef CONFIG_MSM_DEBUG_UART
  124. .phys_io = MSM_DEBUG_UART_PHYS,
  125. .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
  126. #endif
  127. .boot_params = PHYS_OFFSET + 0x100,
  128. .map_io = qsd8x50_map_io,
  129. .init_irq = qsd8x50_init_irq,
  130. .init_machine = qsd8x50_init,
  131. .timer = &msm_timer,
  132. MACHINE_END
  133. MACHINE_START(QSD8X50A_SURF, "QCT QSD8X50A SURF")
  134. #ifdef CONFIG_MSM_DEBUG_UART
  135. .phys_io = MSM_DEBUG_UART_PHYS,
  136. .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
  137. #endif
  138. .boot_params = PHYS_OFFSET + 0x100,
  139. .map_io = qsd8x50_map_io,
  140. .init_irq = qsd8x50_init_irq,
  141. .init_machine = qsd8x50_init,
  142. .timer = &msm_timer,
  143. MACHINE_END
  144. MACHINE_START(QSD8X50A_FFA, "QCT QSD8X50A FFA")
  145. #ifdef CONFIG_MSM_DEBUG_UART
  146. .phys_io = MSM_DEBUG_UART_PHYS,
  147. .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
  148. #endif
  149. .boot_params = PHYS_OFFSET + 0x100,
  150. .map_io = qsd8x50_map_io,
  151. .init_irq = qsd8x50_init_irq,
  152. .init_machine = qsd8x50_init,
  153. .timer = &msm_timer,
  154. MACHINE_END