core.c 20 KB

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  1. /*
  2. * Filename: core.c
  3. *
  4. *
  5. * Authors: Joshua Morris <josh.h.morris@us.ibm.com>
  6. * Philip Kelleher <pjk1939@linux.vnet.ibm.com>
  7. *
  8. * (C) Copyright 2013 IBM Corporation
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of the
  13. * License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  18. * General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software Foundation,
  22. * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. */
  24. #include <linux/kernel.h>
  25. #include <linux/init.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/module.h>
  28. #include <linux/pci.h>
  29. #include <linux/reboot.h>
  30. #include <linux/slab.h>
  31. #include <linux/bitops.h>
  32. #include <linux/delay.h>
  33. #include <linux/genhd.h>
  34. #include <linux/idr.h>
  35. #include "rsxx_priv.h"
  36. #include "rsxx_cfg.h"
  37. #define NO_LEGACY 0
  38. MODULE_DESCRIPTION("IBM FlashSystem 70/80 PCIe SSD Device Driver");
  39. MODULE_AUTHOR("Joshua Morris/Philip Kelleher, IBM");
  40. MODULE_LICENSE("GPL");
  41. MODULE_VERSION(DRIVER_VERSION);
  42. static unsigned int force_legacy = NO_LEGACY;
  43. module_param(force_legacy, uint, 0444);
  44. MODULE_PARM_DESC(force_legacy, "Force the use of legacy type PCI interrupts");
  45. static DEFINE_IDA(rsxx_disk_ida);
  46. static DEFINE_SPINLOCK(rsxx_ida_lock);
  47. /*----------------- Interrupt Control & Handling -------------------*/
  48. static void rsxx_mask_interrupts(struct rsxx_cardinfo *card)
  49. {
  50. card->isr_mask = 0;
  51. card->ier_mask = 0;
  52. }
  53. static void __enable_intr(unsigned int *mask, unsigned int intr)
  54. {
  55. *mask |= intr;
  56. }
  57. static void __disable_intr(unsigned int *mask, unsigned int intr)
  58. {
  59. *mask &= ~intr;
  60. }
  61. /*
  62. * NOTE: Disabling the IER will disable the hardware interrupt.
  63. * Disabling the ISR will disable the software handling of the ISR bit.
  64. *
  65. * Enable/Disable interrupt functions assume the card->irq_lock
  66. * is held by the caller.
  67. */
  68. void rsxx_enable_ier(struct rsxx_cardinfo *card, unsigned int intr)
  69. {
  70. if (unlikely(card->halt) ||
  71. unlikely(card->eeh_state))
  72. return;
  73. __enable_intr(&card->ier_mask, intr);
  74. iowrite32(card->ier_mask, card->regmap + IER);
  75. }
  76. void rsxx_disable_ier(struct rsxx_cardinfo *card, unsigned int intr)
  77. {
  78. if (unlikely(card->eeh_state))
  79. return;
  80. __disable_intr(&card->ier_mask, intr);
  81. iowrite32(card->ier_mask, card->regmap + IER);
  82. }
  83. void rsxx_enable_ier_and_isr(struct rsxx_cardinfo *card,
  84. unsigned int intr)
  85. {
  86. if (unlikely(card->halt) ||
  87. unlikely(card->eeh_state))
  88. return;
  89. __enable_intr(&card->isr_mask, intr);
  90. __enable_intr(&card->ier_mask, intr);
  91. iowrite32(card->ier_mask, card->regmap + IER);
  92. }
  93. void rsxx_disable_ier_and_isr(struct rsxx_cardinfo *card,
  94. unsigned int intr)
  95. {
  96. if (unlikely(card->eeh_state))
  97. return;
  98. __disable_intr(&card->isr_mask, intr);
  99. __disable_intr(&card->ier_mask, intr);
  100. iowrite32(card->ier_mask, card->regmap + IER);
  101. }
  102. static irqreturn_t rsxx_isr(int irq, void *pdata)
  103. {
  104. struct rsxx_cardinfo *card = pdata;
  105. unsigned int isr;
  106. int handled = 0;
  107. int reread_isr;
  108. int i;
  109. spin_lock(&card->irq_lock);
  110. do {
  111. reread_isr = 0;
  112. if (unlikely(card->eeh_state))
  113. break;
  114. isr = ioread32(card->regmap + ISR);
  115. if (isr == 0xffffffff) {
  116. /*
  117. * A few systems seem to have an intermittent issue
  118. * where PCI reads return all Fs, but retrying the read
  119. * a little later will return as expected.
  120. */
  121. dev_info(CARD_TO_DEV(card),
  122. "ISR = 0xFFFFFFFF, retrying later\n");
  123. break;
  124. }
  125. isr &= card->isr_mask;
  126. if (!isr)
  127. break;
  128. for (i = 0; i < card->n_targets; i++) {
  129. if (isr & CR_INTR_DMA(i)) {
  130. if (card->ier_mask & CR_INTR_DMA(i)) {
  131. rsxx_disable_ier(card, CR_INTR_DMA(i));
  132. reread_isr = 1;
  133. }
  134. queue_work(card->ctrl[i].done_wq,
  135. &card->ctrl[i].dma_done_work);
  136. handled++;
  137. }
  138. }
  139. if (isr & CR_INTR_CREG) {
  140. queue_work(card->creg_ctrl.creg_wq,
  141. &card->creg_ctrl.done_work);
  142. handled++;
  143. }
  144. if (isr & CR_INTR_EVENT) {
  145. queue_work(card->event_wq, &card->event_work);
  146. rsxx_disable_ier_and_isr(card, CR_INTR_EVENT);
  147. handled++;
  148. }
  149. } while (reread_isr);
  150. spin_unlock(&card->irq_lock);
  151. return handled ? IRQ_HANDLED : IRQ_NONE;
  152. }
  153. /*----------------- Card Event Handler -------------------*/
  154. static const char * const rsxx_card_state_to_str(unsigned int state)
  155. {
  156. static const char * const state_strings[] = {
  157. "Unknown", "Shutdown", "Starting", "Formatting",
  158. "Uninitialized", "Good", "Shutting Down",
  159. "Fault", "Read Only Fault", "dStroying"
  160. };
  161. return state_strings[ffs(state)];
  162. }
  163. static void card_state_change(struct rsxx_cardinfo *card,
  164. unsigned int new_state)
  165. {
  166. int st;
  167. dev_info(CARD_TO_DEV(card),
  168. "card state change detected.(%s -> %s)\n",
  169. rsxx_card_state_to_str(card->state),
  170. rsxx_card_state_to_str(new_state));
  171. card->state = new_state;
  172. /* Don't attach DMA interfaces if the card has an invalid config */
  173. if (!card->config_valid)
  174. return;
  175. switch (new_state) {
  176. case CARD_STATE_RD_ONLY_FAULT:
  177. dev_crit(CARD_TO_DEV(card),
  178. "Hardware has entered read-only mode!\n");
  179. /*
  180. * Fall through so the DMA devices can be attached and
  181. * the user can attempt to pull off their data.
  182. */
  183. case CARD_STATE_GOOD:
  184. st = rsxx_get_card_size8(card, &card->size8);
  185. if (st)
  186. dev_err(CARD_TO_DEV(card),
  187. "Failed attaching DMA devices\n");
  188. if (card->config_valid)
  189. set_capacity(card->gendisk, card->size8 >> 9);
  190. break;
  191. case CARD_STATE_FAULT:
  192. dev_crit(CARD_TO_DEV(card),
  193. "Hardware Fault reported!\n");
  194. /* Fall through. */
  195. /* Everything else, detach DMA interface if it's attached. */
  196. case CARD_STATE_SHUTDOWN:
  197. case CARD_STATE_STARTING:
  198. case CARD_STATE_FORMATTING:
  199. case CARD_STATE_UNINITIALIZED:
  200. case CARD_STATE_SHUTTING_DOWN:
  201. /*
  202. * dStroy is a term coined by marketing to represent the low level
  203. * secure erase.
  204. */
  205. case CARD_STATE_DSTROYING:
  206. set_capacity(card->gendisk, 0);
  207. break;
  208. }
  209. }
  210. static void card_event_handler(struct work_struct *work)
  211. {
  212. struct rsxx_cardinfo *card;
  213. unsigned int state;
  214. unsigned long flags;
  215. int st;
  216. card = container_of(work, struct rsxx_cardinfo, event_work);
  217. if (unlikely(card->halt))
  218. return;
  219. /*
  220. * Enable the interrupt now to avoid any weird race conditions where a
  221. * state change might occur while rsxx_get_card_state() is
  222. * processing a returned creg cmd.
  223. */
  224. spin_lock_irqsave(&card->irq_lock, flags);
  225. rsxx_enable_ier_and_isr(card, CR_INTR_EVENT);
  226. spin_unlock_irqrestore(&card->irq_lock, flags);
  227. st = rsxx_get_card_state(card, &state);
  228. if (st) {
  229. dev_info(CARD_TO_DEV(card),
  230. "Failed reading state after event.\n");
  231. return;
  232. }
  233. if (card->state != state)
  234. card_state_change(card, state);
  235. if (card->creg_ctrl.creg_stats.stat & CREG_STAT_LOG_PENDING)
  236. rsxx_read_hw_log(card);
  237. }
  238. /*----------------- Card Operations -------------------*/
  239. static int card_shutdown(struct rsxx_cardinfo *card)
  240. {
  241. unsigned int state;
  242. signed long start;
  243. const int timeout = msecs_to_jiffies(120000);
  244. int st;
  245. /* We can't issue a shutdown if the card is in a transition state */
  246. start = jiffies;
  247. do {
  248. st = rsxx_get_card_state(card, &state);
  249. if (st)
  250. return st;
  251. } while (state == CARD_STATE_STARTING &&
  252. (jiffies - start < timeout));
  253. if (state == CARD_STATE_STARTING)
  254. return -ETIMEDOUT;
  255. /* Only issue a shutdown if we need to */
  256. if ((state != CARD_STATE_SHUTTING_DOWN) &&
  257. (state != CARD_STATE_SHUTDOWN)) {
  258. st = rsxx_issue_card_cmd(card, CARD_CMD_SHUTDOWN);
  259. if (st)
  260. return st;
  261. }
  262. start = jiffies;
  263. do {
  264. st = rsxx_get_card_state(card, &state);
  265. if (st)
  266. return st;
  267. } while (state != CARD_STATE_SHUTDOWN &&
  268. (jiffies - start < timeout));
  269. if (state != CARD_STATE_SHUTDOWN)
  270. return -ETIMEDOUT;
  271. return 0;
  272. }
  273. static int rsxx_eeh_frozen(struct pci_dev *dev)
  274. {
  275. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  276. int i;
  277. int st;
  278. dev_warn(&dev->dev, "IBM FlashSystem PCI: preparing for slot reset.\n");
  279. card->eeh_state = 1;
  280. rsxx_mask_interrupts(card);
  281. /*
  282. * We need to guarantee that the write for eeh_state and masking
  283. * interrupts does not become reordered. This will prevent a possible
  284. * race condition with the EEH code.
  285. */
  286. wmb();
  287. pci_disable_device(dev);
  288. st = rsxx_eeh_save_issued_dmas(card);
  289. if (st)
  290. return st;
  291. rsxx_eeh_save_issued_creg(card);
  292. for (i = 0; i < card->n_targets; i++) {
  293. if (card->ctrl[i].status.buf)
  294. pci_free_consistent(card->dev, STATUS_BUFFER_SIZE8,
  295. card->ctrl[i].status.buf,
  296. card->ctrl[i].status.dma_addr);
  297. if (card->ctrl[i].cmd.buf)
  298. pci_free_consistent(card->dev, COMMAND_BUFFER_SIZE8,
  299. card->ctrl[i].cmd.buf,
  300. card->ctrl[i].cmd.dma_addr);
  301. }
  302. return 0;
  303. }
  304. static void rsxx_eeh_failure(struct pci_dev *dev)
  305. {
  306. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  307. int i;
  308. dev_err(&dev->dev, "IBM FlashSystem PCI: disabling failed card.\n");
  309. card->eeh_state = 1;
  310. for (i = 0; i < card->n_targets; i++)
  311. del_timer_sync(&card->ctrl[i].activity_timer);
  312. rsxx_eeh_cancel_dmas(card);
  313. }
  314. static int rsxx_eeh_fifo_flush_poll(struct rsxx_cardinfo *card)
  315. {
  316. unsigned int status;
  317. int iter = 0;
  318. /* We need to wait for the hardware to reset */
  319. while (iter++ < 10) {
  320. status = ioread32(card->regmap + PCI_RECONFIG);
  321. if (status & RSXX_FLUSH_BUSY) {
  322. ssleep(1);
  323. continue;
  324. }
  325. if (status & RSXX_FLUSH_TIMEOUT)
  326. dev_warn(CARD_TO_DEV(card), "HW: flash controller timeout\n");
  327. return 0;
  328. }
  329. /* Hardware failed resetting itself. */
  330. return -1;
  331. }
  332. static pci_ers_result_t rsxx_error_detected(struct pci_dev *dev,
  333. enum pci_channel_state error)
  334. {
  335. int st;
  336. if (dev->revision < RSXX_EEH_SUPPORT)
  337. return PCI_ERS_RESULT_NONE;
  338. if (error == pci_channel_io_perm_failure) {
  339. rsxx_eeh_failure(dev);
  340. return PCI_ERS_RESULT_DISCONNECT;
  341. }
  342. st = rsxx_eeh_frozen(dev);
  343. if (st) {
  344. dev_err(&dev->dev, "Slot reset setup failed\n");
  345. rsxx_eeh_failure(dev);
  346. return PCI_ERS_RESULT_DISCONNECT;
  347. }
  348. return PCI_ERS_RESULT_NEED_RESET;
  349. }
  350. static pci_ers_result_t rsxx_slot_reset(struct pci_dev *dev)
  351. {
  352. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  353. unsigned long flags;
  354. int i;
  355. int st;
  356. dev_warn(&dev->dev,
  357. "IBM FlashSystem PCI: recovering from slot reset.\n");
  358. st = pci_enable_device(dev);
  359. if (st)
  360. goto failed_hw_setup;
  361. pci_set_master(dev);
  362. st = rsxx_eeh_fifo_flush_poll(card);
  363. if (st)
  364. goto failed_hw_setup;
  365. rsxx_dma_queue_reset(card);
  366. for (i = 0; i < card->n_targets; i++) {
  367. st = rsxx_hw_buffers_init(dev, &card->ctrl[i]);
  368. if (st)
  369. goto failed_hw_buffers_init;
  370. }
  371. if (card->config_valid)
  372. rsxx_dma_configure(card);
  373. /* Clears the ISR register from spurious interrupts */
  374. st = ioread32(card->regmap + ISR);
  375. card->eeh_state = 0;
  376. st = rsxx_eeh_remap_dmas(card);
  377. if (st)
  378. goto failed_remap_dmas;
  379. spin_lock_irqsave(&card->irq_lock, flags);
  380. if (card->n_targets & RSXX_MAX_TARGETS)
  381. rsxx_enable_ier_and_isr(card, CR_INTR_ALL_G);
  382. else
  383. rsxx_enable_ier_and_isr(card, CR_INTR_ALL_C);
  384. spin_unlock_irqrestore(&card->irq_lock, flags);
  385. rsxx_kick_creg_queue(card);
  386. for (i = 0; i < card->n_targets; i++) {
  387. spin_lock(&card->ctrl[i].queue_lock);
  388. if (list_empty(&card->ctrl[i].queue)) {
  389. spin_unlock(&card->ctrl[i].queue_lock);
  390. continue;
  391. }
  392. spin_unlock(&card->ctrl[i].queue_lock);
  393. queue_work(card->ctrl[i].issue_wq,
  394. &card->ctrl[i].issue_dma_work);
  395. }
  396. dev_info(&dev->dev, "IBM FlashSystem PCI: recovery complete.\n");
  397. return PCI_ERS_RESULT_RECOVERED;
  398. failed_hw_buffers_init:
  399. failed_remap_dmas:
  400. for (i = 0; i < card->n_targets; i++) {
  401. if (card->ctrl[i].status.buf)
  402. pci_free_consistent(card->dev,
  403. STATUS_BUFFER_SIZE8,
  404. card->ctrl[i].status.buf,
  405. card->ctrl[i].status.dma_addr);
  406. if (card->ctrl[i].cmd.buf)
  407. pci_free_consistent(card->dev,
  408. COMMAND_BUFFER_SIZE8,
  409. card->ctrl[i].cmd.buf,
  410. card->ctrl[i].cmd.dma_addr);
  411. }
  412. failed_hw_setup:
  413. rsxx_eeh_failure(dev);
  414. return PCI_ERS_RESULT_DISCONNECT;
  415. }
  416. /*----------------- Driver Initialization & Setup -------------------*/
  417. /* Returns: 0 if the driver is compatible with the device
  418. -1 if the driver is NOT compatible with the device */
  419. static int rsxx_compatibility_check(struct rsxx_cardinfo *card)
  420. {
  421. unsigned char pci_rev;
  422. pci_read_config_byte(card->dev, PCI_REVISION_ID, &pci_rev);
  423. if (pci_rev > RS70_PCI_REV_SUPPORTED)
  424. return -1;
  425. return 0;
  426. }
  427. static int rsxx_pci_probe(struct pci_dev *dev,
  428. const struct pci_device_id *id)
  429. {
  430. struct rsxx_cardinfo *card;
  431. int st;
  432. dev_info(&dev->dev, "PCI-Flash SSD discovered\n");
  433. card = kzalloc(sizeof(*card), GFP_KERNEL);
  434. if (!card)
  435. return -ENOMEM;
  436. card->dev = dev;
  437. pci_set_drvdata(dev, card);
  438. do {
  439. if (!ida_pre_get(&rsxx_disk_ida, GFP_KERNEL)) {
  440. st = -ENOMEM;
  441. goto failed_ida_get;
  442. }
  443. spin_lock(&rsxx_ida_lock);
  444. st = ida_get_new(&rsxx_disk_ida, &card->disk_id);
  445. spin_unlock(&rsxx_ida_lock);
  446. } while (st == -EAGAIN);
  447. if (st)
  448. goto failed_ida_get;
  449. st = pci_enable_device(dev);
  450. if (st)
  451. goto failed_enable;
  452. pci_set_master(dev);
  453. pci_set_dma_max_seg_size(dev, RSXX_HW_BLK_SIZE);
  454. st = pci_set_dma_mask(dev, DMA_BIT_MASK(64));
  455. if (st) {
  456. dev_err(CARD_TO_DEV(card),
  457. "No usable DMA configuration,aborting\n");
  458. goto failed_dma_mask;
  459. }
  460. st = pci_request_regions(dev, DRIVER_NAME);
  461. if (st) {
  462. dev_err(CARD_TO_DEV(card),
  463. "Failed to request memory region\n");
  464. goto failed_request_regions;
  465. }
  466. if (pci_resource_len(dev, 0) == 0) {
  467. dev_err(CARD_TO_DEV(card), "BAR0 has length 0!\n");
  468. st = -ENOMEM;
  469. goto failed_iomap;
  470. }
  471. card->regmap = pci_iomap(dev, 0, 0);
  472. if (!card->regmap) {
  473. dev_err(CARD_TO_DEV(card), "Failed to map BAR0\n");
  474. st = -ENOMEM;
  475. goto failed_iomap;
  476. }
  477. spin_lock_init(&card->irq_lock);
  478. card->halt = 0;
  479. card->eeh_state = 0;
  480. spin_lock_irq(&card->irq_lock);
  481. rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
  482. spin_unlock_irq(&card->irq_lock);
  483. if (!force_legacy) {
  484. st = pci_enable_msi(dev);
  485. if (st)
  486. dev_warn(CARD_TO_DEV(card),
  487. "Failed to enable MSI\n");
  488. }
  489. st = request_irq(dev->irq, rsxx_isr, IRQF_DISABLED | IRQF_SHARED,
  490. DRIVER_NAME, card);
  491. if (st) {
  492. dev_err(CARD_TO_DEV(card),
  493. "Failed requesting IRQ%d\n", dev->irq);
  494. goto failed_irq;
  495. }
  496. /************* Setup Processor Command Interface *************/
  497. st = rsxx_creg_setup(card);
  498. if (st) {
  499. dev_err(CARD_TO_DEV(card), "Failed to setup creg interface.\n");
  500. goto failed_creg_setup;
  501. }
  502. spin_lock_irq(&card->irq_lock);
  503. rsxx_enable_ier_and_isr(card, CR_INTR_CREG);
  504. spin_unlock_irq(&card->irq_lock);
  505. st = rsxx_compatibility_check(card);
  506. if (st) {
  507. dev_warn(CARD_TO_DEV(card),
  508. "Incompatible driver detected. Please update the driver.\n");
  509. st = -EINVAL;
  510. goto failed_compatiblity_check;
  511. }
  512. /************* Load Card Config *************/
  513. st = rsxx_load_config(card);
  514. if (st)
  515. dev_err(CARD_TO_DEV(card),
  516. "Failed loading card config\n");
  517. /************* Setup DMA Engine *************/
  518. st = rsxx_get_num_targets(card, &card->n_targets);
  519. if (st)
  520. dev_info(CARD_TO_DEV(card),
  521. "Failed reading the number of DMA targets\n");
  522. card->ctrl = kzalloc(card->n_targets * sizeof(*card->ctrl), GFP_KERNEL);
  523. if (!card->ctrl) {
  524. st = -ENOMEM;
  525. goto failed_dma_setup;
  526. }
  527. st = rsxx_dma_setup(card);
  528. if (st) {
  529. dev_info(CARD_TO_DEV(card),
  530. "Failed to setup DMA engine\n");
  531. goto failed_dma_setup;
  532. }
  533. /************* Setup Card Event Handler *************/
  534. card->event_wq = create_singlethread_workqueue(DRIVER_NAME"_event");
  535. if (!card->event_wq) {
  536. dev_err(CARD_TO_DEV(card), "Failed card event setup.\n");
  537. goto failed_event_handler;
  538. }
  539. INIT_WORK(&card->event_work, card_event_handler);
  540. st = rsxx_setup_dev(card);
  541. if (st)
  542. goto failed_create_dev;
  543. rsxx_get_card_state(card, &card->state);
  544. dev_info(CARD_TO_DEV(card),
  545. "card state: %s\n",
  546. rsxx_card_state_to_str(card->state));
  547. /*
  548. * Now that the DMA Engine and devices have been setup,
  549. * we can enable the event interrupt(it kicks off actions in
  550. * those layers so we couldn't enable it right away.)
  551. */
  552. spin_lock_irq(&card->irq_lock);
  553. rsxx_enable_ier_and_isr(card, CR_INTR_EVENT);
  554. spin_unlock_irq(&card->irq_lock);
  555. if (card->state == CARD_STATE_SHUTDOWN) {
  556. st = rsxx_issue_card_cmd(card, CARD_CMD_STARTUP);
  557. if (st)
  558. dev_crit(CARD_TO_DEV(card),
  559. "Failed issuing card startup\n");
  560. } else if (card->state == CARD_STATE_GOOD ||
  561. card->state == CARD_STATE_RD_ONLY_FAULT) {
  562. st = rsxx_get_card_size8(card, &card->size8);
  563. if (st)
  564. card->size8 = 0;
  565. }
  566. rsxx_attach_dev(card);
  567. return 0;
  568. failed_create_dev:
  569. destroy_workqueue(card->event_wq);
  570. card->event_wq = NULL;
  571. failed_event_handler:
  572. rsxx_dma_destroy(card);
  573. failed_dma_setup:
  574. failed_compatiblity_check:
  575. destroy_workqueue(card->creg_ctrl.creg_wq);
  576. card->creg_ctrl.creg_wq = NULL;
  577. failed_creg_setup:
  578. spin_lock_irq(&card->irq_lock);
  579. rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
  580. spin_unlock_irq(&card->irq_lock);
  581. free_irq(dev->irq, card);
  582. if (!force_legacy)
  583. pci_disable_msi(dev);
  584. failed_irq:
  585. pci_iounmap(dev, card->regmap);
  586. failed_iomap:
  587. pci_release_regions(dev);
  588. failed_request_regions:
  589. failed_dma_mask:
  590. pci_disable_device(dev);
  591. failed_enable:
  592. spin_lock(&rsxx_ida_lock);
  593. ida_remove(&rsxx_disk_ida, card->disk_id);
  594. spin_unlock(&rsxx_ida_lock);
  595. failed_ida_get:
  596. kfree(card);
  597. return st;
  598. }
  599. static void rsxx_pci_remove(struct pci_dev *dev)
  600. {
  601. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  602. unsigned long flags;
  603. int st;
  604. int i;
  605. if (!card)
  606. return;
  607. dev_info(CARD_TO_DEV(card),
  608. "Removing PCI-Flash SSD.\n");
  609. rsxx_detach_dev(card);
  610. for (i = 0; i < card->n_targets; i++) {
  611. spin_lock_irqsave(&card->irq_lock, flags);
  612. rsxx_disable_ier_and_isr(card, CR_INTR_DMA(i));
  613. spin_unlock_irqrestore(&card->irq_lock, flags);
  614. }
  615. st = card_shutdown(card);
  616. if (st)
  617. dev_crit(CARD_TO_DEV(card), "Shutdown failed!\n");
  618. /* Sync outstanding event handlers. */
  619. spin_lock_irqsave(&card->irq_lock, flags);
  620. rsxx_disable_ier_and_isr(card, CR_INTR_EVENT);
  621. spin_unlock_irqrestore(&card->irq_lock, flags);
  622. cancel_work_sync(&card->event_work);
  623. rsxx_destroy_dev(card);
  624. rsxx_dma_destroy(card);
  625. spin_lock_irqsave(&card->irq_lock, flags);
  626. rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
  627. spin_unlock_irqrestore(&card->irq_lock, flags);
  628. /* Prevent work_structs from re-queuing themselves. */
  629. card->halt = 1;
  630. free_irq(dev->irq, card);
  631. if (!force_legacy)
  632. pci_disable_msi(dev);
  633. rsxx_creg_destroy(card);
  634. pci_iounmap(dev, card->regmap);
  635. pci_disable_device(dev);
  636. pci_release_regions(dev);
  637. kfree(card);
  638. }
  639. static int rsxx_pci_suspend(struct pci_dev *dev, pm_message_t state)
  640. {
  641. /* We don't support suspend at this time. */
  642. return -ENOSYS;
  643. }
  644. static void rsxx_pci_shutdown(struct pci_dev *dev)
  645. {
  646. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  647. unsigned long flags;
  648. int i;
  649. if (!card)
  650. return;
  651. dev_info(CARD_TO_DEV(card), "Shutting down PCI-Flash SSD.\n");
  652. rsxx_detach_dev(card);
  653. for (i = 0; i < card->n_targets; i++) {
  654. spin_lock_irqsave(&card->irq_lock, flags);
  655. rsxx_disable_ier_and_isr(card, CR_INTR_DMA(i));
  656. spin_unlock_irqrestore(&card->irq_lock, flags);
  657. }
  658. card_shutdown(card);
  659. }
  660. static const struct pci_error_handlers rsxx_err_handler = {
  661. .error_detected = rsxx_error_detected,
  662. .slot_reset = rsxx_slot_reset,
  663. };
  664. static DEFINE_PCI_DEVICE_TABLE(rsxx_pci_ids) = {
  665. {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS70_FLASH)},
  666. {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS80_FLASH)},
  667. {0,},
  668. };
  669. MODULE_DEVICE_TABLE(pci, rsxx_pci_ids);
  670. static struct pci_driver rsxx_pci_driver = {
  671. .name = DRIVER_NAME,
  672. .id_table = rsxx_pci_ids,
  673. .probe = rsxx_pci_probe,
  674. .remove = rsxx_pci_remove,
  675. .suspend = rsxx_pci_suspend,
  676. .shutdown = rsxx_pci_shutdown,
  677. .err_handler = &rsxx_err_handler,
  678. };
  679. static int __init rsxx_core_init(void)
  680. {
  681. int st;
  682. st = rsxx_dev_init();
  683. if (st)
  684. return st;
  685. st = rsxx_dma_init();
  686. if (st)
  687. goto dma_init_failed;
  688. st = rsxx_creg_init();
  689. if (st)
  690. goto creg_init_failed;
  691. return pci_register_driver(&rsxx_pci_driver);
  692. creg_init_failed:
  693. rsxx_dma_cleanup();
  694. dma_init_failed:
  695. rsxx_dev_cleanup();
  696. return st;
  697. }
  698. static void __exit rsxx_core_cleanup(void)
  699. {
  700. pci_unregister_driver(&rsxx_pci_driver);
  701. rsxx_creg_cleanup();
  702. rsxx_dma_cleanup();
  703. rsxx_dev_cleanup();
  704. }
  705. module_init(rsxx_core_init);
  706. module_exit(rsxx_core_cleanup);