fsl_qe_udc.c 65 KB

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  1. /*
  2. * driver/usb/gadget/fsl_qe_udc.c
  3. *
  4. * Copyright (c) 2006-2008 Freescale Semiconductor, Inc. All rights reserved.
  5. *
  6. * Xie Xiaobo <X.Xie@freescale.com>
  7. * Li Yang <leoli@freescale.com>
  8. * Based on bareboard code from Shlomi Gridish.
  9. *
  10. * Description:
  11. * Freescle QE/CPM USB Pheripheral Controller Driver
  12. * The controller can be found on MPC8360, MPC8272, and etc.
  13. * MPC8360 Rev 1.1 may need QE mircocode update
  14. *
  15. * This program is free software; you can redistribute it and/or modify it
  16. * under the terms of the GNU General Public License as published by the
  17. * Free Software Foundation; either version 2 of the License, or (at your
  18. * option) any later version.
  19. */
  20. #undef USB_TRACE
  21. #include <linux/module.h>
  22. #include <linux/kernel.h>
  23. #include <linux/init.h>
  24. #include <linux/ioport.h>
  25. #include <linux/types.h>
  26. #include <linux/errno.h>
  27. #include <linux/err.h>
  28. #include <linux/slab.h>
  29. #include <linux/list.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/io.h>
  32. #include <linux/moduleparam.h>
  33. #include <linux/of_platform.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/usb/ch9.h>
  36. #include <linux/usb/gadget.h>
  37. #include <linux/usb/otg.h>
  38. #include <asm/qe.h>
  39. #include <asm/cpm.h>
  40. #include <asm/dma.h>
  41. #include <asm/reg.h>
  42. #include "fsl_qe_udc.h"
  43. #define DRIVER_DESC "Freescale QE/CPM USB Device Controller driver"
  44. #define DRIVER_AUTHOR "Xie XiaoBo"
  45. #define DRIVER_VERSION "1.0"
  46. #define DMA_ADDR_INVALID (~(dma_addr_t)0)
  47. static const char driver_name[] = "fsl_qe_udc";
  48. static const char driver_desc[] = DRIVER_DESC;
  49. /*ep name is important in gadget, it should obey the convention of ep_match()*/
  50. static const char *const ep_name[] = {
  51. "ep0-control", /* everyone has ep0 */
  52. /* 3 configurable endpoints */
  53. "ep1",
  54. "ep2",
  55. "ep3",
  56. };
  57. static struct usb_endpoint_descriptor qe_ep0_desc = {
  58. .bLength = USB_DT_ENDPOINT_SIZE,
  59. .bDescriptorType = USB_DT_ENDPOINT,
  60. .bEndpointAddress = 0,
  61. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  62. .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD,
  63. };
  64. /* it is initialized in probe() */
  65. static struct qe_udc *udc_controller;
  66. /********************************************************************
  67. * Internal Used Function Start
  68. ********************************************************************/
  69. /*-----------------------------------------------------------------
  70. * done() - retire a request; caller blocked irqs
  71. *--------------------------------------------------------------*/
  72. static void done(struct qe_ep *ep, struct qe_req *req, int status)
  73. {
  74. struct qe_udc *udc = ep->udc;
  75. unsigned char stopped = ep->stopped;
  76. /* the req->queue pointer is used by ep_queue() func, in which
  77. * the request will be added into a udc_ep->queue 'd tail
  78. * so here the req will be dropped from the ep->queue
  79. */
  80. list_del_init(&req->queue);
  81. /* req.status should be set as -EINPROGRESS in ep_queue() */
  82. if (req->req.status == -EINPROGRESS)
  83. req->req.status = status;
  84. else
  85. status = req->req.status;
  86. if (req->mapped) {
  87. dma_unmap_single(udc->gadget.dev.parent,
  88. req->req.dma, req->req.length,
  89. ep_is_in(ep)
  90. ? DMA_TO_DEVICE
  91. : DMA_FROM_DEVICE);
  92. req->req.dma = DMA_ADDR_INVALID;
  93. req->mapped = 0;
  94. } else
  95. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  96. req->req.dma, req->req.length,
  97. ep_is_in(ep)
  98. ? DMA_TO_DEVICE
  99. : DMA_FROM_DEVICE);
  100. if (status && (status != -ESHUTDOWN))
  101. dev_vdbg(udc->dev, "complete %s req %p stat %d len %u/%u\n",
  102. ep->ep.name, &req->req, status,
  103. req->req.actual, req->req.length);
  104. /* don't modify queue heads during completion callback */
  105. ep->stopped = 1;
  106. spin_unlock(&udc->lock);
  107. /* this complete() should a func implemented by gadget layer,
  108. * eg fsg->bulk_in_complete() */
  109. if (req->req.complete)
  110. req->req.complete(&ep->ep, &req->req);
  111. spin_lock(&udc->lock);
  112. ep->stopped = stopped;
  113. }
  114. /*-----------------------------------------------------------------
  115. * nuke(): delete all requests related to this ep
  116. *--------------------------------------------------------------*/
  117. static void nuke(struct qe_ep *ep, int status)
  118. {
  119. /* Whether this eq has request linked */
  120. while (!list_empty(&ep->queue)) {
  121. struct qe_req *req = NULL;
  122. req = list_entry(ep->queue.next, struct qe_req, queue);
  123. done(ep, req, status);
  124. }
  125. }
  126. /*---------------------------------------------------------------------------*
  127. * USB and Endpoint manipulate process, include parameter and register *
  128. *---------------------------------------------------------------------------*/
  129. /* @value: 1--set stall 0--clean stall */
  130. static int qe_eprx_stall_change(struct qe_ep *ep, int value)
  131. {
  132. u16 tem_usep;
  133. u8 epnum = ep->epnum;
  134. struct qe_udc *udc = ep->udc;
  135. tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
  136. tem_usep = tem_usep & ~USB_RHS_MASK;
  137. if (value == 1)
  138. tem_usep |= USB_RHS_STALL;
  139. else if (ep->dir == USB_DIR_IN)
  140. tem_usep |= USB_RHS_IGNORE_OUT;
  141. out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
  142. return 0;
  143. }
  144. static int qe_eptx_stall_change(struct qe_ep *ep, int value)
  145. {
  146. u16 tem_usep;
  147. u8 epnum = ep->epnum;
  148. struct qe_udc *udc = ep->udc;
  149. tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
  150. tem_usep = tem_usep & ~USB_THS_MASK;
  151. if (value == 1)
  152. tem_usep |= USB_THS_STALL;
  153. else if (ep->dir == USB_DIR_OUT)
  154. tem_usep |= USB_THS_IGNORE_IN;
  155. out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
  156. return 0;
  157. }
  158. static int qe_ep0_stall(struct qe_udc *udc)
  159. {
  160. qe_eptx_stall_change(&udc->eps[0], 1);
  161. qe_eprx_stall_change(&udc->eps[0], 1);
  162. udc_controller->ep0_state = WAIT_FOR_SETUP;
  163. udc_controller->ep0_dir = 0;
  164. return 0;
  165. }
  166. static int qe_eprx_nack(struct qe_ep *ep)
  167. {
  168. u8 epnum = ep->epnum;
  169. struct qe_udc *udc = ep->udc;
  170. if (ep->state == EP_STATE_IDLE) {
  171. /* Set the ep's nack */
  172. clrsetbits_be16(&udc->usb_regs->usb_usep[epnum],
  173. USB_RHS_MASK, USB_RHS_NACK);
  174. /* Mask Rx and Busy interrupts */
  175. clrbits16(&udc->usb_regs->usb_usbmr,
  176. (USB_E_RXB_MASK | USB_E_BSY_MASK));
  177. ep->state = EP_STATE_NACK;
  178. }
  179. return 0;
  180. }
  181. static int qe_eprx_normal(struct qe_ep *ep)
  182. {
  183. struct qe_udc *udc = ep->udc;
  184. if (ep->state == EP_STATE_NACK) {
  185. clrsetbits_be16(&udc->usb_regs->usb_usep[ep->epnum],
  186. USB_RTHS_MASK, USB_THS_IGNORE_IN);
  187. /* Unmask RX interrupts */
  188. out_be16(&udc->usb_regs->usb_usber,
  189. USB_E_BSY_MASK | USB_E_RXB_MASK);
  190. setbits16(&udc->usb_regs->usb_usbmr,
  191. (USB_E_RXB_MASK | USB_E_BSY_MASK));
  192. ep->state = EP_STATE_IDLE;
  193. ep->has_data = 0;
  194. }
  195. return 0;
  196. }
  197. static int qe_ep_cmd_stoptx(struct qe_ep *ep)
  198. {
  199. if (ep->udc->soc_type == PORT_CPM)
  200. cpm_command(CPM_USB_STOP_TX | (ep->epnum << CPM_USB_EP_SHIFT),
  201. CPM_USB_STOP_TX_OPCODE);
  202. else
  203. qe_issue_cmd(QE_USB_STOP_TX, QE_CR_SUBBLOCK_USB,
  204. ep->epnum, 0);
  205. return 0;
  206. }
  207. static int qe_ep_cmd_restarttx(struct qe_ep *ep)
  208. {
  209. if (ep->udc->soc_type == PORT_CPM)
  210. cpm_command(CPM_USB_RESTART_TX | (ep->epnum <<
  211. CPM_USB_EP_SHIFT), CPM_USB_RESTART_TX_OPCODE);
  212. else
  213. qe_issue_cmd(QE_USB_RESTART_TX, QE_CR_SUBBLOCK_USB,
  214. ep->epnum, 0);
  215. return 0;
  216. }
  217. static int qe_ep_flushtxfifo(struct qe_ep *ep)
  218. {
  219. struct qe_udc *udc = ep->udc;
  220. int i;
  221. i = (int)ep->epnum;
  222. qe_ep_cmd_stoptx(ep);
  223. out_8(&udc->usb_regs->usb_uscom,
  224. USB_CMD_FLUSH_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
  225. out_be16(&udc->ep_param[i]->tbptr, in_be16(&udc->ep_param[i]->tbase));
  226. out_be32(&udc->ep_param[i]->tstate, 0);
  227. out_be16(&udc->ep_param[i]->tbcnt, 0);
  228. ep->c_txbd = ep->txbase;
  229. ep->n_txbd = ep->txbase;
  230. qe_ep_cmd_restarttx(ep);
  231. return 0;
  232. }
  233. static int qe_ep_filltxfifo(struct qe_ep *ep)
  234. {
  235. struct qe_udc *udc = ep->udc;
  236. out_8(&udc->usb_regs->usb_uscom,
  237. USB_CMD_STR_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
  238. return 0;
  239. }
  240. static int qe_epbds_reset(struct qe_udc *udc, int pipe_num)
  241. {
  242. struct qe_ep *ep;
  243. u32 bdring_len;
  244. struct qe_bd __iomem *bd;
  245. int i;
  246. ep = &udc->eps[pipe_num];
  247. if (ep->dir == USB_DIR_OUT)
  248. bdring_len = USB_BDRING_LEN_RX;
  249. else
  250. bdring_len = USB_BDRING_LEN;
  251. bd = ep->rxbase;
  252. for (i = 0; i < (bdring_len - 1); i++) {
  253. out_be32((u32 __iomem *)bd, R_E | R_I);
  254. bd++;
  255. }
  256. out_be32((u32 __iomem *)bd, R_E | R_I | R_W);
  257. bd = ep->txbase;
  258. for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
  259. out_be32(&bd->buf, 0);
  260. out_be32((u32 __iomem *)bd, 0);
  261. bd++;
  262. }
  263. out_be32((u32 __iomem *)bd, T_W);
  264. return 0;
  265. }
  266. static int qe_ep_reset(struct qe_udc *udc, int pipe_num)
  267. {
  268. struct qe_ep *ep;
  269. u16 tmpusep;
  270. ep = &udc->eps[pipe_num];
  271. tmpusep = in_be16(&udc->usb_regs->usb_usep[pipe_num]);
  272. tmpusep &= ~USB_RTHS_MASK;
  273. switch (ep->dir) {
  274. case USB_DIR_BOTH:
  275. qe_ep_flushtxfifo(ep);
  276. break;
  277. case USB_DIR_OUT:
  278. tmpusep |= USB_THS_IGNORE_IN;
  279. break;
  280. case USB_DIR_IN:
  281. qe_ep_flushtxfifo(ep);
  282. tmpusep |= USB_RHS_IGNORE_OUT;
  283. break;
  284. default:
  285. break;
  286. }
  287. out_be16(&udc->usb_regs->usb_usep[pipe_num], tmpusep);
  288. qe_epbds_reset(udc, pipe_num);
  289. return 0;
  290. }
  291. static int qe_ep_toggledata01(struct qe_ep *ep)
  292. {
  293. ep->data01 ^= 0x1;
  294. return 0;
  295. }
  296. static int qe_ep_bd_init(struct qe_udc *udc, unsigned char pipe_num)
  297. {
  298. struct qe_ep *ep = &udc->eps[pipe_num];
  299. unsigned long tmp_addr = 0;
  300. struct usb_ep_para __iomem *epparam;
  301. int i;
  302. struct qe_bd __iomem *bd;
  303. int bdring_len;
  304. if (ep->dir == USB_DIR_OUT)
  305. bdring_len = USB_BDRING_LEN_RX;
  306. else
  307. bdring_len = USB_BDRING_LEN;
  308. epparam = udc->ep_param[pipe_num];
  309. /* alloc multi-ram for BD rings and set the ep parameters */
  310. tmp_addr = cpm_muram_alloc(sizeof(struct qe_bd) * (bdring_len +
  311. USB_BDRING_LEN_TX), QE_ALIGNMENT_OF_BD);
  312. if (IS_ERR_VALUE(tmp_addr))
  313. return -ENOMEM;
  314. out_be16(&epparam->rbase, (u16)tmp_addr);
  315. out_be16(&epparam->tbase, (u16)(tmp_addr +
  316. (sizeof(struct qe_bd) * bdring_len)));
  317. out_be16(&epparam->rbptr, in_be16(&epparam->rbase));
  318. out_be16(&epparam->tbptr, in_be16(&epparam->tbase));
  319. ep->rxbase = cpm_muram_addr(tmp_addr);
  320. ep->txbase = cpm_muram_addr(tmp_addr + (sizeof(struct qe_bd)
  321. * bdring_len));
  322. ep->n_rxbd = ep->rxbase;
  323. ep->e_rxbd = ep->rxbase;
  324. ep->n_txbd = ep->txbase;
  325. ep->c_txbd = ep->txbase;
  326. ep->data01 = 0; /* data0 */
  327. /* Init TX and RX bds */
  328. bd = ep->rxbase;
  329. for (i = 0; i < bdring_len - 1; i++) {
  330. out_be32(&bd->buf, 0);
  331. out_be32((u32 __iomem *)bd, 0);
  332. bd++;
  333. }
  334. out_be32(&bd->buf, 0);
  335. out_be32((u32 __iomem *)bd, R_W);
  336. bd = ep->txbase;
  337. for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
  338. out_be32(&bd->buf, 0);
  339. out_be32((u32 __iomem *)bd, 0);
  340. bd++;
  341. }
  342. out_be32(&bd->buf, 0);
  343. out_be32((u32 __iomem *)bd, T_W);
  344. return 0;
  345. }
  346. static int qe_ep_rxbd_update(struct qe_ep *ep)
  347. {
  348. unsigned int size;
  349. int i;
  350. unsigned int tmp;
  351. struct qe_bd __iomem *bd;
  352. unsigned int bdring_len;
  353. if (ep->rxbase == NULL)
  354. return -EINVAL;
  355. bd = ep->rxbase;
  356. ep->rxframe = kmalloc(sizeof(*ep->rxframe), GFP_ATOMIC);
  357. if (ep->rxframe == NULL) {
  358. dev_err(ep->udc->dev, "malloc rxframe failed\n");
  359. return -ENOMEM;
  360. }
  361. qe_frame_init(ep->rxframe);
  362. if (ep->dir == USB_DIR_OUT)
  363. bdring_len = USB_BDRING_LEN_RX;
  364. else
  365. bdring_len = USB_BDRING_LEN;
  366. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (bdring_len + 1);
  367. ep->rxbuffer = kzalloc(size, GFP_ATOMIC);
  368. if (ep->rxbuffer == NULL) {
  369. dev_err(ep->udc->dev, "malloc rxbuffer failed,size=%d\n",
  370. size);
  371. kfree(ep->rxframe);
  372. return -ENOMEM;
  373. }
  374. ep->rxbuf_d = virt_to_phys((void *)ep->rxbuffer);
  375. if (ep->rxbuf_d == DMA_ADDR_INVALID) {
  376. ep->rxbuf_d = dma_map_single(udc_controller->gadget.dev.parent,
  377. ep->rxbuffer,
  378. size,
  379. DMA_FROM_DEVICE);
  380. ep->rxbufmap = 1;
  381. } else {
  382. dma_sync_single_for_device(udc_controller->gadget.dev.parent,
  383. ep->rxbuf_d, size,
  384. DMA_FROM_DEVICE);
  385. ep->rxbufmap = 0;
  386. }
  387. size = ep->ep.maxpacket + USB_CRC_SIZE + 2;
  388. tmp = ep->rxbuf_d;
  389. tmp = (u32)(((tmp >> 2) << 2) + 4);
  390. for (i = 0; i < bdring_len - 1; i++) {
  391. out_be32(&bd->buf, tmp);
  392. out_be32((u32 __iomem *)bd, (R_E | R_I));
  393. tmp = tmp + size;
  394. bd++;
  395. }
  396. out_be32(&bd->buf, tmp);
  397. out_be32((u32 __iomem *)bd, (R_E | R_I | R_W));
  398. return 0;
  399. }
  400. static int qe_ep_register_init(struct qe_udc *udc, unsigned char pipe_num)
  401. {
  402. struct qe_ep *ep = &udc->eps[pipe_num];
  403. struct usb_ep_para __iomem *epparam;
  404. u16 usep, logepnum;
  405. u16 tmp;
  406. u8 rtfcr = 0;
  407. epparam = udc->ep_param[pipe_num];
  408. usep = 0;
  409. logepnum = (ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
  410. usep |= (logepnum << USB_EPNUM_SHIFT);
  411. switch (ep->desc->bmAttributes & 0x03) {
  412. case USB_ENDPOINT_XFER_BULK:
  413. usep |= USB_TRANS_BULK;
  414. break;
  415. case USB_ENDPOINT_XFER_ISOC:
  416. usep |= USB_TRANS_ISO;
  417. break;
  418. case USB_ENDPOINT_XFER_INT:
  419. usep |= USB_TRANS_INT;
  420. break;
  421. default:
  422. usep |= USB_TRANS_CTR;
  423. break;
  424. }
  425. switch (ep->dir) {
  426. case USB_DIR_OUT:
  427. usep |= USB_THS_IGNORE_IN;
  428. break;
  429. case USB_DIR_IN:
  430. usep |= USB_RHS_IGNORE_OUT;
  431. break;
  432. default:
  433. break;
  434. }
  435. out_be16(&udc->usb_regs->usb_usep[pipe_num], usep);
  436. rtfcr = 0x30;
  437. out_8(&epparam->rbmr, rtfcr);
  438. out_8(&epparam->tbmr, rtfcr);
  439. tmp = (u16)(ep->ep.maxpacket + USB_CRC_SIZE);
  440. /* MRBLR must be divisble by 4 */
  441. tmp = (u16)(((tmp >> 2) << 2) + 4);
  442. out_be16(&epparam->mrblr, tmp);
  443. return 0;
  444. }
  445. static int qe_ep_init(struct qe_udc *udc,
  446. unsigned char pipe_num,
  447. const struct usb_endpoint_descriptor *desc)
  448. {
  449. struct qe_ep *ep = &udc->eps[pipe_num];
  450. unsigned long flags;
  451. int reval = 0;
  452. u16 max = 0;
  453. max = le16_to_cpu(desc->wMaxPacketSize);
  454. /* check the max package size validate for this endpoint */
  455. /* Refer to USB2.0 spec table 9-13,
  456. */
  457. if (pipe_num != 0) {
  458. switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
  459. case USB_ENDPOINT_XFER_BULK:
  460. if (strstr(ep->ep.name, "-iso")
  461. || strstr(ep->ep.name, "-int"))
  462. goto en_done;
  463. switch (udc->gadget.speed) {
  464. case USB_SPEED_HIGH:
  465. if ((max == 128) || (max == 256) || (max == 512))
  466. break;
  467. default:
  468. switch (max) {
  469. case 4:
  470. case 8:
  471. case 16:
  472. case 32:
  473. case 64:
  474. break;
  475. default:
  476. case USB_SPEED_LOW:
  477. goto en_done;
  478. }
  479. }
  480. break;
  481. case USB_ENDPOINT_XFER_INT:
  482. if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
  483. goto en_done;
  484. switch (udc->gadget.speed) {
  485. case USB_SPEED_HIGH:
  486. if (max <= 1024)
  487. break;
  488. case USB_SPEED_FULL:
  489. if (max <= 64)
  490. break;
  491. default:
  492. if (max <= 8)
  493. break;
  494. goto en_done;
  495. }
  496. break;
  497. case USB_ENDPOINT_XFER_ISOC:
  498. if (strstr(ep->ep.name, "-bulk")
  499. || strstr(ep->ep.name, "-int"))
  500. goto en_done;
  501. switch (udc->gadget.speed) {
  502. case USB_SPEED_HIGH:
  503. if (max <= 1024)
  504. break;
  505. case USB_SPEED_FULL:
  506. if (max <= 1023)
  507. break;
  508. default:
  509. goto en_done;
  510. }
  511. break;
  512. case USB_ENDPOINT_XFER_CONTROL:
  513. if (strstr(ep->ep.name, "-iso")
  514. || strstr(ep->ep.name, "-int"))
  515. goto en_done;
  516. switch (udc->gadget.speed) {
  517. case USB_SPEED_HIGH:
  518. case USB_SPEED_FULL:
  519. switch (max) {
  520. case 1:
  521. case 2:
  522. case 4:
  523. case 8:
  524. case 16:
  525. case 32:
  526. case 64:
  527. break;
  528. default:
  529. goto en_done;
  530. }
  531. case USB_SPEED_LOW:
  532. switch (max) {
  533. case 1:
  534. case 2:
  535. case 4:
  536. case 8:
  537. break;
  538. default:
  539. goto en_done;
  540. }
  541. default:
  542. goto en_done;
  543. }
  544. break;
  545. default:
  546. goto en_done;
  547. }
  548. } /* if ep0*/
  549. spin_lock_irqsave(&udc->lock, flags);
  550. /* initialize ep structure */
  551. ep->ep.maxpacket = max;
  552. ep->tm = (u8)(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
  553. ep->desc = desc;
  554. ep->stopped = 0;
  555. ep->init = 1;
  556. if (pipe_num == 0) {
  557. ep->dir = USB_DIR_BOTH;
  558. udc->ep0_dir = USB_DIR_OUT;
  559. udc->ep0_state = WAIT_FOR_SETUP;
  560. } else {
  561. switch (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) {
  562. case USB_DIR_OUT:
  563. ep->dir = USB_DIR_OUT;
  564. break;
  565. case USB_DIR_IN:
  566. ep->dir = USB_DIR_IN;
  567. default:
  568. break;
  569. }
  570. }
  571. /* hardware special operation */
  572. qe_ep_bd_init(udc, pipe_num);
  573. if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_OUT)) {
  574. reval = qe_ep_rxbd_update(ep);
  575. if (reval)
  576. goto en_done1;
  577. }
  578. if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_IN)) {
  579. ep->txframe = kmalloc(sizeof(*ep->txframe), GFP_ATOMIC);
  580. if (ep->txframe == NULL) {
  581. dev_err(udc->dev, "malloc txframe failed\n");
  582. goto en_done2;
  583. }
  584. qe_frame_init(ep->txframe);
  585. }
  586. qe_ep_register_init(udc, pipe_num);
  587. /* Now HW will be NAKing transfers to that EP,
  588. * until a buffer is queued to it. */
  589. spin_unlock_irqrestore(&udc->lock, flags);
  590. return 0;
  591. en_done2:
  592. kfree(ep->rxbuffer);
  593. kfree(ep->rxframe);
  594. en_done1:
  595. spin_unlock_irqrestore(&udc->lock, flags);
  596. en_done:
  597. dev_err(udc->dev, "failed to initialize %s\n", ep->ep.name);
  598. return -ENODEV;
  599. }
  600. static inline void qe_usb_enable(void)
  601. {
  602. setbits8(&udc_controller->usb_regs->usb_usmod, USB_MODE_EN);
  603. }
  604. static inline void qe_usb_disable(void)
  605. {
  606. clrbits8(&udc_controller->usb_regs->usb_usmod, USB_MODE_EN);
  607. }
  608. /*----------------------------------------------------------------------------*
  609. * USB and EP basic manipulate function end *
  610. *----------------------------------------------------------------------------*/
  611. /******************************************************************************
  612. UDC transmit and receive process
  613. ******************************************************************************/
  614. static void recycle_one_rxbd(struct qe_ep *ep)
  615. {
  616. u32 bdstatus;
  617. bdstatus = in_be32((u32 __iomem *)ep->e_rxbd);
  618. bdstatus = R_I | R_E | (bdstatus & R_W);
  619. out_be32((u32 __iomem *)ep->e_rxbd, bdstatus);
  620. if (bdstatus & R_W)
  621. ep->e_rxbd = ep->rxbase;
  622. else
  623. ep->e_rxbd++;
  624. }
  625. static void recycle_rxbds(struct qe_ep *ep, unsigned char stopatnext)
  626. {
  627. u32 bdstatus;
  628. struct qe_bd __iomem *bd, *nextbd;
  629. unsigned char stop = 0;
  630. nextbd = ep->n_rxbd;
  631. bd = ep->e_rxbd;
  632. bdstatus = in_be32((u32 __iomem *)bd);
  633. while (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK) && !stop) {
  634. bdstatus = R_E | R_I | (bdstatus & R_W);
  635. out_be32((u32 __iomem *)bd, bdstatus);
  636. if (bdstatus & R_W)
  637. bd = ep->rxbase;
  638. else
  639. bd++;
  640. bdstatus = in_be32((u32 __iomem *)bd);
  641. if (stopatnext && (bd == nextbd))
  642. stop = 1;
  643. }
  644. ep->e_rxbd = bd;
  645. }
  646. static void ep_recycle_rxbds(struct qe_ep *ep)
  647. {
  648. struct qe_bd __iomem *bd = ep->n_rxbd;
  649. u32 bdstatus;
  650. u8 epnum = ep->epnum;
  651. struct qe_udc *udc = ep->udc;
  652. bdstatus = in_be32((u32 __iomem *)bd);
  653. if (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK)) {
  654. bd = ep->rxbase +
  655. ((in_be16(&udc->ep_param[epnum]->rbptr) -
  656. in_be16(&udc->ep_param[epnum]->rbase))
  657. >> 3);
  658. bdstatus = in_be32((u32 __iomem *)bd);
  659. if (bdstatus & R_W)
  660. bd = ep->rxbase;
  661. else
  662. bd++;
  663. ep->e_rxbd = bd;
  664. recycle_rxbds(ep, 0);
  665. ep->e_rxbd = ep->n_rxbd;
  666. } else
  667. recycle_rxbds(ep, 1);
  668. if (in_be16(&udc->usb_regs->usb_usber) & USB_E_BSY_MASK)
  669. out_be16(&udc->usb_regs->usb_usber, USB_E_BSY_MASK);
  670. if (ep->has_data <= 0 && (!list_empty(&ep->queue)))
  671. qe_eprx_normal(ep);
  672. ep->localnack = 0;
  673. }
  674. static void setup_received_handle(struct qe_udc *udc,
  675. struct usb_ctrlrequest *setup);
  676. static int qe_ep_rxframe_handle(struct qe_ep *ep);
  677. static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req);
  678. /* when BD PID is setup, handle the packet */
  679. static int ep0_setup_handle(struct qe_udc *udc)
  680. {
  681. struct qe_ep *ep = &udc->eps[0];
  682. struct qe_frame *pframe;
  683. unsigned int fsize;
  684. u8 *cp;
  685. pframe = ep->rxframe;
  686. if ((frame_get_info(pframe) & PID_SETUP)
  687. && (udc->ep0_state == WAIT_FOR_SETUP)) {
  688. fsize = frame_get_length(pframe);
  689. if (unlikely(fsize != 8))
  690. return -EINVAL;
  691. cp = (u8 *)&udc->local_setup_buff;
  692. memcpy(cp, pframe->data, fsize);
  693. ep->data01 = 1;
  694. /* handle the usb command base on the usb_ctrlrequest */
  695. setup_received_handle(udc, &udc->local_setup_buff);
  696. return 0;
  697. }
  698. return -EINVAL;
  699. }
  700. static int qe_ep0_rx(struct qe_udc *udc)
  701. {
  702. struct qe_ep *ep = &udc->eps[0];
  703. struct qe_frame *pframe;
  704. struct qe_bd __iomem *bd;
  705. u32 bdstatus, length;
  706. u32 vaddr;
  707. pframe = ep->rxframe;
  708. if (ep->dir == USB_DIR_IN) {
  709. dev_err(udc->dev, "ep0 not a control endpoint\n");
  710. return -EINVAL;
  711. }
  712. bd = ep->n_rxbd;
  713. bdstatus = in_be32((u32 __iomem *)bd);
  714. length = bdstatus & BD_LENGTH_MASK;
  715. while (!(bdstatus & R_E) && length) {
  716. if ((bdstatus & R_F) && (bdstatus & R_L)
  717. && !(bdstatus & R_ERROR)) {
  718. if (length == USB_CRC_SIZE) {
  719. udc->ep0_state = WAIT_FOR_SETUP;
  720. dev_vdbg(udc->dev,
  721. "receive a ZLP in status phase\n");
  722. } else {
  723. qe_frame_clean(pframe);
  724. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  725. frame_set_data(pframe, (u8 *)vaddr);
  726. frame_set_length(pframe,
  727. (length - USB_CRC_SIZE));
  728. frame_set_status(pframe, FRAME_OK);
  729. switch (bdstatus & R_PID) {
  730. case R_PID_SETUP:
  731. frame_set_info(pframe, PID_SETUP);
  732. break;
  733. case R_PID_DATA1:
  734. frame_set_info(pframe, PID_DATA1);
  735. break;
  736. default:
  737. frame_set_info(pframe, PID_DATA0);
  738. break;
  739. }
  740. if ((bdstatus & R_PID) == R_PID_SETUP)
  741. ep0_setup_handle(udc);
  742. else
  743. qe_ep_rxframe_handle(ep);
  744. }
  745. } else {
  746. dev_err(udc->dev, "The receive frame with error!\n");
  747. }
  748. /* note: don't clear the rxbd's buffer address */
  749. recycle_one_rxbd(ep);
  750. /* Get next BD */
  751. if (bdstatus & R_W)
  752. bd = ep->rxbase;
  753. else
  754. bd++;
  755. bdstatus = in_be32((u32 __iomem *)bd);
  756. length = bdstatus & BD_LENGTH_MASK;
  757. }
  758. ep->n_rxbd = bd;
  759. return 0;
  760. }
  761. static int qe_ep_rxframe_handle(struct qe_ep *ep)
  762. {
  763. struct qe_frame *pframe;
  764. u8 framepid = 0;
  765. unsigned int fsize;
  766. u8 *cp;
  767. struct qe_req *req;
  768. pframe = ep->rxframe;
  769. if (frame_get_info(pframe) & PID_DATA1)
  770. framepid = 0x1;
  771. if (framepid != ep->data01) {
  772. dev_err(ep->udc->dev, "the data01 error!\n");
  773. return -EIO;
  774. }
  775. fsize = frame_get_length(pframe);
  776. if (list_empty(&ep->queue)) {
  777. dev_err(ep->udc->dev, "the %s have no requeue!\n", ep->name);
  778. } else {
  779. req = list_entry(ep->queue.next, struct qe_req, queue);
  780. cp = (u8 *)(req->req.buf) + req->req.actual;
  781. if (cp) {
  782. memcpy(cp, pframe->data, fsize);
  783. req->req.actual += fsize;
  784. if ((fsize < ep->ep.maxpacket) ||
  785. (req->req.actual >= req->req.length)) {
  786. if (ep->epnum == 0)
  787. ep0_req_complete(ep->udc, req);
  788. else
  789. done(ep, req, 0);
  790. if (list_empty(&ep->queue) && ep->epnum != 0)
  791. qe_eprx_nack(ep);
  792. }
  793. }
  794. }
  795. qe_ep_toggledata01(ep);
  796. return 0;
  797. }
  798. static void ep_rx_tasklet(unsigned long data)
  799. {
  800. struct qe_udc *udc = (struct qe_udc *)data;
  801. struct qe_ep *ep;
  802. struct qe_frame *pframe;
  803. struct qe_bd __iomem *bd;
  804. unsigned long flags;
  805. u32 bdstatus, length;
  806. u32 vaddr, i;
  807. spin_lock_irqsave(&udc->lock, flags);
  808. for (i = 1; i < USB_MAX_ENDPOINTS; i++) {
  809. ep = &udc->eps[i];
  810. if (ep->dir == USB_DIR_IN || ep->enable_tasklet == 0) {
  811. dev_dbg(udc->dev,
  812. "This is a transmit ep or disable tasklet!\n");
  813. continue;
  814. }
  815. pframe = ep->rxframe;
  816. bd = ep->n_rxbd;
  817. bdstatus = in_be32((u32 __iomem *)bd);
  818. length = bdstatus & BD_LENGTH_MASK;
  819. while (!(bdstatus & R_E) && length) {
  820. if (list_empty(&ep->queue)) {
  821. qe_eprx_nack(ep);
  822. dev_dbg(udc->dev,
  823. "The rxep have noreq %d\n",
  824. ep->has_data);
  825. break;
  826. }
  827. if ((bdstatus & R_F) && (bdstatus & R_L)
  828. && !(bdstatus & R_ERROR)) {
  829. qe_frame_clean(pframe);
  830. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  831. frame_set_data(pframe, (u8 *)vaddr);
  832. frame_set_length(pframe,
  833. (length - USB_CRC_SIZE));
  834. frame_set_status(pframe, FRAME_OK);
  835. switch (bdstatus & R_PID) {
  836. case R_PID_DATA1:
  837. frame_set_info(pframe, PID_DATA1);
  838. break;
  839. case R_PID_SETUP:
  840. frame_set_info(pframe, PID_SETUP);
  841. break;
  842. default:
  843. frame_set_info(pframe, PID_DATA0);
  844. break;
  845. }
  846. /* handle the rx frame */
  847. qe_ep_rxframe_handle(ep);
  848. } else {
  849. dev_err(udc->dev,
  850. "error in received frame\n");
  851. }
  852. /* note: don't clear the rxbd's buffer address */
  853. /*clear the length */
  854. out_be32((u32 __iomem *)bd, bdstatus & BD_STATUS_MASK);
  855. ep->has_data--;
  856. if (!(ep->localnack))
  857. recycle_one_rxbd(ep);
  858. /* Get next BD */
  859. if (bdstatus & R_W)
  860. bd = ep->rxbase;
  861. else
  862. bd++;
  863. bdstatus = in_be32((u32 __iomem *)bd);
  864. length = bdstatus & BD_LENGTH_MASK;
  865. }
  866. ep->n_rxbd = bd;
  867. if (ep->localnack)
  868. ep_recycle_rxbds(ep);
  869. ep->enable_tasklet = 0;
  870. } /* for i=1 */
  871. spin_unlock_irqrestore(&udc->lock, flags);
  872. }
  873. static int qe_ep_rx(struct qe_ep *ep)
  874. {
  875. struct qe_udc *udc;
  876. struct qe_frame *pframe;
  877. struct qe_bd __iomem *bd;
  878. u16 swoffs, ucoffs, emptybds;
  879. udc = ep->udc;
  880. pframe = ep->rxframe;
  881. if (ep->dir == USB_DIR_IN) {
  882. dev_err(udc->dev, "transmit ep in rx function\n");
  883. return -EINVAL;
  884. }
  885. bd = ep->n_rxbd;
  886. swoffs = (u16)(bd - ep->rxbase);
  887. ucoffs = (u16)((in_be16(&udc->ep_param[ep->epnum]->rbptr) -
  888. in_be16(&udc->ep_param[ep->epnum]->rbase)) >> 3);
  889. if (swoffs < ucoffs)
  890. emptybds = USB_BDRING_LEN_RX - ucoffs + swoffs;
  891. else
  892. emptybds = swoffs - ucoffs;
  893. if (emptybds < MIN_EMPTY_BDS) {
  894. qe_eprx_nack(ep);
  895. ep->localnack = 1;
  896. dev_vdbg(udc->dev, "%d empty bds, send NACK\n", emptybds);
  897. }
  898. ep->has_data = USB_BDRING_LEN_RX - emptybds;
  899. if (list_empty(&ep->queue)) {
  900. qe_eprx_nack(ep);
  901. dev_vdbg(udc->dev, "The rxep have no req queued with %d BDs\n",
  902. ep->has_data);
  903. return 0;
  904. }
  905. tasklet_schedule(&udc->rx_tasklet);
  906. ep->enable_tasklet = 1;
  907. return 0;
  908. }
  909. /* send data from a frame, no matter what tx_req */
  910. static int qe_ep_tx(struct qe_ep *ep, struct qe_frame *frame)
  911. {
  912. struct qe_udc *udc = ep->udc;
  913. struct qe_bd __iomem *bd;
  914. u16 saveusbmr;
  915. u32 bdstatus, pidmask;
  916. u32 paddr;
  917. if (ep->dir == USB_DIR_OUT) {
  918. dev_err(udc->dev, "receive ep passed to tx function\n");
  919. return -EINVAL;
  920. }
  921. /* Disable the Tx interrupt */
  922. saveusbmr = in_be16(&udc->usb_regs->usb_usbmr);
  923. out_be16(&udc->usb_regs->usb_usbmr,
  924. saveusbmr & ~(USB_E_TXB_MASK | USB_E_TXE_MASK));
  925. bd = ep->n_txbd;
  926. bdstatus = in_be32((u32 __iomem *)bd);
  927. if (!(bdstatus & (T_R | BD_LENGTH_MASK))) {
  928. if (frame_get_length(frame) == 0) {
  929. frame_set_data(frame, udc->nullbuf);
  930. frame_set_length(frame, 2);
  931. frame->info |= (ZLP | NO_CRC);
  932. dev_vdbg(udc->dev, "the frame size = 0\n");
  933. }
  934. paddr = virt_to_phys((void *)frame->data);
  935. out_be32(&bd->buf, paddr);
  936. bdstatus = (bdstatus&T_W);
  937. if (!(frame_get_info(frame) & NO_CRC))
  938. bdstatus |= T_R | T_I | T_L | T_TC
  939. | frame_get_length(frame);
  940. else
  941. bdstatus |= T_R | T_I | T_L | frame_get_length(frame);
  942. /* if the packet is a ZLP in status phase */
  943. if ((ep->epnum == 0) && (udc->ep0_state == DATA_STATE_NEED_ZLP))
  944. ep->data01 = 0x1;
  945. if (ep->data01) {
  946. pidmask = T_PID_DATA1;
  947. frame->info |= PID_DATA1;
  948. } else {
  949. pidmask = T_PID_DATA0;
  950. frame->info |= PID_DATA0;
  951. }
  952. bdstatus |= T_CNF;
  953. bdstatus |= pidmask;
  954. out_be32((u32 __iomem *)bd, bdstatus);
  955. qe_ep_filltxfifo(ep);
  956. /* enable the TX interrupt */
  957. out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
  958. qe_ep_toggledata01(ep);
  959. if (bdstatus & T_W)
  960. ep->n_txbd = ep->txbase;
  961. else
  962. ep->n_txbd++;
  963. return 0;
  964. } else {
  965. out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
  966. dev_vdbg(udc->dev, "The tx bd is not ready!\n");
  967. return -EBUSY;
  968. }
  969. }
  970. /* when a bd was transmitted, the function can
  971. * handle the tx_req, not include ep0 */
  972. static int txcomplete(struct qe_ep *ep, unsigned char restart)
  973. {
  974. if (ep->tx_req != NULL) {
  975. if (!restart) {
  976. int asent = ep->last;
  977. ep->sent += asent;
  978. ep->last -= asent;
  979. } else {
  980. ep->last = 0;
  981. }
  982. /* a request already were transmitted completely */
  983. if ((ep->tx_req->req.length - ep->sent) <= 0) {
  984. ep->tx_req->req.actual = (unsigned int)ep->sent;
  985. done(ep, ep->tx_req, 0);
  986. ep->tx_req = NULL;
  987. ep->last = 0;
  988. ep->sent = 0;
  989. }
  990. }
  991. /* we should gain a new tx_req fot this endpoint */
  992. if (ep->tx_req == NULL) {
  993. if (!list_empty(&ep->queue)) {
  994. ep->tx_req = list_entry(ep->queue.next, struct qe_req,
  995. queue);
  996. ep->last = 0;
  997. ep->sent = 0;
  998. }
  999. }
  1000. return 0;
  1001. }
  1002. /* give a frame and a tx_req, send some data */
  1003. static int qe_usb_senddata(struct qe_ep *ep, struct qe_frame *frame)
  1004. {
  1005. unsigned int size;
  1006. u8 *buf;
  1007. qe_frame_clean(frame);
  1008. size = min_t(u32, (ep->tx_req->req.length - ep->sent),
  1009. ep->ep.maxpacket);
  1010. buf = (u8 *)ep->tx_req->req.buf + ep->sent;
  1011. if (buf && size) {
  1012. ep->last = size;
  1013. frame_set_data(frame, buf);
  1014. frame_set_length(frame, size);
  1015. frame_set_status(frame, FRAME_OK);
  1016. frame_set_info(frame, 0);
  1017. return qe_ep_tx(ep, frame);
  1018. }
  1019. return -EIO;
  1020. }
  1021. /* give a frame struct,send a ZLP */
  1022. static int sendnulldata(struct qe_ep *ep, struct qe_frame *frame, uint infor)
  1023. {
  1024. struct qe_udc *udc = ep->udc;
  1025. if (frame == NULL)
  1026. return -ENODEV;
  1027. qe_frame_clean(frame);
  1028. frame_set_data(frame, (u8 *)udc->nullbuf);
  1029. frame_set_length(frame, 2);
  1030. frame_set_status(frame, FRAME_OK);
  1031. frame_set_info(frame, (ZLP | NO_CRC | infor));
  1032. return qe_ep_tx(ep, frame);
  1033. }
  1034. static int frame_create_tx(struct qe_ep *ep, struct qe_frame *frame)
  1035. {
  1036. struct qe_req *req = ep->tx_req;
  1037. int reval;
  1038. if (req == NULL)
  1039. return -ENODEV;
  1040. if ((req->req.length - ep->sent) > 0)
  1041. reval = qe_usb_senddata(ep, frame);
  1042. else
  1043. reval = sendnulldata(ep, frame, 0);
  1044. return reval;
  1045. }
  1046. /* if direction is DIR_IN, the status is Device->Host
  1047. * if direction is DIR_OUT, the status transaction is Device<-Host
  1048. * in status phase, udc create a request and gain status */
  1049. static int ep0_prime_status(struct qe_udc *udc, int direction)
  1050. {
  1051. struct qe_ep *ep = &udc->eps[0];
  1052. if (direction == USB_DIR_IN) {
  1053. udc->ep0_state = DATA_STATE_NEED_ZLP;
  1054. udc->ep0_dir = USB_DIR_IN;
  1055. sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
  1056. } else {
  1057. udc->ep0_dir = USB_DIR_OUT;
  1058. udc->ep0_state = WAIT_FOR_OUT_STATUS;
  1059. }
  1060. return 0;
  1061. }
  1062. /* a request complete in ep0, whether gadget request or udc request */
  1063. static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req)
  1064. {
  1065. struct qe_ep *ep = &udc->eps[0];
  1066. /* because usb and ep's status already been set in ch9setaddress() */
  1067. switch (udc->ep0_state) {
  1068. case DATA_STATE_XMIT:
  1069. done(ep, req, 0);
  1070. /* receive status phase */
  1071. if (ep0_prime_status(udc, USB_DIR_OUT))
  1072. qe_ep0_stall(udc);
  1073. break;
  1074. case DATA_STATE_NEED_ZLP:
  1075. done(ep, req, 0);
  1076. udc->ep0_state = WAIT_FOR_SETUP;
  1077. break;
  1078. case DATA_STATE_RECV:
  1079. done(ep, req, 0);
  1080. /* send status phase */
  1081. if (ep0_prime_status(udc, USB_DIR_IN))
  1082. qe_ep0_stall(udc);
  1083. break;
  1084. case WAIT_FOR_OUT_STATUS:
  1085. done(ep, req, 0);
  1086. udc->ep0_state = WAIT_FOR_SETUP;
  1087. break;
  1088. case WAIT_FOR_SETUP:
  1089. dev_vdbg(udc->dev, "Unexpected interrupt\n");
  1090. break;
  1091. default:
  1092. qe_ep0_stall(udc);
  1093. break;
  1094. }
  1095. }
  1096. static int ep0_txcomplete(struct qe_ep *ep, unsigned char restart)
  1097. {
  1098. struct qe_req *tx_req = NULL;
  1099. struct qe_frame *frame = ep->txframe;
  1100. if ((frame_get_info(frame) & (ZLP | NO_REQ)) == (ZLP | NO_REQ)) {
  1101. if (!restart)
  1102. ep->udc->ep0_state = WAIT_FOR_SETUP;
  1103. else
  1104. sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
  1105. return 0;
  1106. }
  1107. tx_req = ep->tx_req;
  1108. if (tx_req != NULL) {
  1109. if (!restart) {
  1110. int asent = ep->last;
  1111. ep->sent += asent;
  1112. ep->last -= asent;
  1113. } else {
  1114. ep->last = 0;
  1115. }
  1116. /* a request already were transmitted completely */
  1117. if ((ep->tx_req->req.length - ep->sent) <= 0) {
  1118. ep->tx_req->req.actual = (unsigned int)ep->sent;
  1119. ep0_req_complete(ep->udc, ep->tx_req);
  1120. ep->tx_req = NULL;
  1121. ep->last = 0;
  1122. ep->sent = 0;
  1123. }
  1124. } else {
  1125. dev_vdbg(ep->udc->dev, "the ep0_controller have no req\n");
  1126. }
  1127. return 0;
  1128. }
  1129. static int ep0_txframe_handle(struct qe_ep *ep)
  1130. {
  1131. /* if have error, transmit again */
  1132. if (frame_get_status(ep->txframe) & FRAME_ERROR) {
  1133. qe_ep_flushtxfifo(ep);
  1134. dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
  1135. if (frame_get_info(ep->txframe) & PID_DATA0)
  1136. ep->data01 = 0;
  1137. else
  1138. ep->data01 = 1;
  1139. ep0_txcomplete(ep, 1);
  1140. } else
  1141. ep0_txcomplete(ep, 0);
  1142. frame_create_tx(ep, ep->txframe);
  1143. return 0;
  1144. }
  1145. static int qe_ep0_txconf(struct qe_ep *ep)
  1146. {
  1147. struct qe_bd __iomem *bd;
  1148. struct qe_frame *pframe;
  1149. u32 bdstatus;
  1150. bd = ep->c_txbd;
  1151. bdstatus = in_be32((u32 __iomem *)bd);
  1152. while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
  1153. pframe = ep->txframe;
  1154. /* clear and recycle the BD */
  1155. out_be32((u32 __iomem *)bd, bdstatus & T_W);
  1156. out_be32(&bd->buf, 0);
  1157. if (bdstatus & T_W)
  1158. ep->c_txbd = ep->txbase;
  1159. else
  1160. ep->c_txbd++;
  1161. if (ep->c_txbd == ep->n_txbd) {
  1162. if (bdstatus & DEVICE_T_ERROR) {
  1163. frame_set_status(pframe, FRAME_ERROR);
  1164. if (bdstatus & T_TO)
  1165. pframe->status |= TX_ER_TIMEOUT;
  1166. if (bdstatus & T_UN)
  1167. pframe->status |= TX_ER_UNDERUN;
  1168. }
  1169. ep0_txframe_handle(ep);
  1170. }
  1171. bd = ep->c_txbd;
  1172. bdstatus = in_be32((u32 __iomem *)bd);
  1173. }
  1174. return 0;
  1175. }
  1176. static int ep_txframe_handle(struct qe_ep *ep)
  1177. {
  1178. if (frame_get_status(ep->txframe) & FRAME_ERROR) {
  1179. qe_ep_flushtxfifo(ep);
  1180. dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
  1181. if (frame_get_info(ep->txframe) & PID_DATA0)
  1182. ep->data01 = 0;
  1183. else
  1184. ep->data01 = 1;
  1185. txcomplete(ep, 1);
  1186. } else
  1187. txcomplete(ep, 0);
  1188. frame_create_tx(ep, ep->txframe); /* send the data */
  1189. return 0;
  1190. }
  1191. /* confirm the already trainsmited bd */
  1192. static int qe_ep_txconf(struct qe_ep *ep)
  1193. {
  1194. struct qe_bd __iomem *bd;
  1195. struct qe_frame *pframe = NULL;
  1196. u32 bdstatus;
  1197. unsigned char breakonrxinterrupt = 0;
  1198. bd = ep->c_txbd;
  1199. bdstatus = in_be32((u32 __iomem *)bd);
  1200. while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
  1201. pframe = ep->txframe;
  1202. if (bdstatus & DEVICE_T_ERROR) {
  1203. frame_set_status(pframe, FRAME_ERROR);
  1204. if (bdstatus & T_TO)
  1205. pframe->status |= TX_ER_TIMEOUT;
  1206. if (bdstatus & T_UN)
  1207. pframe->status |= TX_ER_UNDERUN;
  1208. }
  1209. /* clear and recycle the BD */
  1210. out_be32((u32 __iomem *)bd, bdstatus & T_W);
  1211. out_be32(&bd->buf, 0);
  1212. if (bdstatus & T_W)
  1213. ep->c_txbd = ep->txbase;
  1214. else
  1215. ep->c_txbd++;
  1216. /* handle the tx frame */
  1217. ep_txframe_handle(ep);
  1218. bd = ep->c_txbd;
  1219. bdstatus = in_be32((u32 __iomem *)bd);
  1220. }
  1221. if (breakonrxinterrupt)
  1222. return -EIO;
  1223. else
  1224. return 0;
  1225. }
  1226. /* Add a request in queue, and try to transmit a packet */
  1227. static int ep_req_send(struct qe_ep *ep, struct qe_req *req)
  1228. {
  1229. int reval = 0;
  1230. if (ep->tx_req == NULL) {
  1231. ep->sent = 0;
  1232. ep->last = 0;
  1233. txcomplete(ep, 0); /* can gain a new tx_req */
  1234. reval = frame_create_tx(ep, ep->txframe);
  1235. }
  1236. return reval;
  1237. }
  1238. /* Maybe this is a good ideal */
  1239. static int ep_req_rx(struct qe_ep *ep, struct qe_req *req)
  1240. {
  1241. struct qe_udc *udc = ep->udc;
  1242. struct qe_frame *pframe = NULL;
  1243. struct qe_bd __iomem *bd;
  1244. u32 bdstatus, length;
  1245. u32 vaddr, fsize;
  1246. u8 *cp;
  1247. u8 finish_req = 0;
  1248. u8 framepid;
  1249. if (list_empty(&ep->queue)) {
  1250. dev_vdbg(udc->dev, "the req already finish!\n");
  1251. return 0;
  1252. }
  1253. pframe = ep->rxframe;
  1254. bd = ep->n_rxbd;
  1255. bdstatus = in_be32((u32 __iomem *)bd);
  1256. length = bdstatus & BD_LENGTH_MASK;
  1257. while (!(bdstatus & R_E) && length) {
  1258. if (finish_req)
  1259. break;
  1260. if ((bdstatus & R_F) && (bdstatus & R_L)
  1261. && !(bdstatus & R_ERROR)) {
  1262. qe_frame_clean(pframe);
  1263. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  1264. frame_set_data(pframe, (u8 *)vaddr);
  1265. frame_set_length(pframe, (length - USB_CRC_SIZE));
  1266. frame_set_status(pframe, FRAME_OK);
  1267. switch (bdstatus & R_PID) {
  1268. case R_PID_DATA1:
  1269. frame_set_info(pframe, PID_DATA1); break;
  1270. default:
  1271. frame_set_info(pframe, PID_DATA0); break;
  1272. }
  1273. /* handle the rx frame */
  1274. if (frame_get_info(pframe) & PID_DATA1)
  1275. framepid = 0x1;
  1276. else
  1277. framepid = 0;
  1278. if (framepid != ep->data01) {
  1279. dev_vdbg(udc->dev, "the data01 error!\n");
  1280. } else {
  1281. fsize = frame_get_length(pframe);
  1282. cp = (u8 *)(req->req.buf) + req->req.actual;
  1283. if (cp) {
  1284. memcpy(cp, pframe->data, fsize);
  1285. req->req.actual += fsize;
  1286. if ((fsize < ep->ep.maxpacket)
  1287. || (req->req.actual >=
  1288. req->req.length)) {
  1289. finish_req = 1;
  1290. done(ep, req, 0);
  1291. if (list_empty(&ep->queue))
  1292. qe_eprx_nack(ep);
  1293. }
  1294. }
  1295. qe_ep_toggledata01(ep);
  1296. }
  1297. } else {
  1298. dev_err(udc->dev, "The receive frame with error!\n");
  1299. }
  1300. /* note: don't clear the rxbd's buffer address *
  1301. * only Clear the length */
  1302. out_be32((u32 __iomem *)bd, (bdstatus & BD_STATUS_MASK));
  1303. ep->has_data--;
  1304. /* Get next BD */
  1305. if (bdstatus & R_W)
  1306. bd = ep->rxbase;
  1307. else
  1308. bd++;
  1309. bdstatus = in_be32((u32 __iomem *)bd);
  1310. length = bdstatus & BD_LENGTH_MASK;
  1311. }
  1312. ep->n_rxbd = bd;
  1313. ep_recycle_rxbds(ep);
  1314. return 0;
  1315. }
  1316. /* only add the request in queue */
  1317. static int ep_req_receive(struct qe_ep *ep, struct qe_req *req)
  1318. {
  1319. if (ep->state == EP_STATE_NACK) {
  1320. if (ep->has_data <= 0) {
  1321. /* Enable rx and unmask rx interrupt */
  1322. qe_eprx_normal(ep);
  1323. } else {
  1324. /* Copy the exist BD data */
  1325. ep_req_rx(ep, req);
  1326. }
  1327. }
  1328. return 0;
  1329. }
  1330. /********************************************************************
  1331. Internal Used Function End
  1332. ********************************************************************/
  1333. /*-----------------------------------------------------------------------
  1334. Endpoint Management Functions For Gadget
  1335. -----------------------------------------------------------------------*/
  1336. static int qe_ep_enable(struct usb_ep *_ep,
  1337. const struct usb_endpoint_descriptor *desc)
  1338. {
  1339. struct qe_udc *udc;
  1340. struct qe_ep *ep;
  1341. int retval = 0;
  1342. unsigned char epnum;
  1343. ep = container_of(_ep, struct qe_ep, ep);
  1344. /* catch various bogus parameters */
  1345. if (!_ep || !desc || ep->desc || _ep->name == ep_name[0] ||
  1346. (desc->bDescriptorType != USB_DT_ENDPOINT))
  1347. return -EINVAL;
  1348. udc = ep->udc;
  1349. if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
  1350. return -ESHUTDOWN;
  1351. epnum = (u8)desc->bEndpointAddress & 0xF;
  1352. retval = qe_ep_init(udc, epnum, desc);
  1353. if (retval != 0) {
  1354. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  1355. dev_dbg(udc->dev, "enable ep%d failed\n", ep->epnum);
  1356. return -EINVAL;
  1357. }
  1358. dev_dbg(udc->dev, "enable ep%d successful\n", ep->epnum);
  1359. return 0;
  1360. }
  1361. static int qe_ep_disable(struct usb_ep *_ep)
  1362. {
  1363. struct qe_udc *udc;
  1364. struct qe_ep *ep;
  1365. unsigned long flags;
  1366. unsigned int size;
  1367. ep = container_of(_ep, struct qe_ep, ep);
  1368. udc = ep->udc;
  1369. if (!_ep || !ep->desc) {
  1370. dev_dbg(udc->dev, "%s not enabled\n", _ep ? ep->ep.name : NULL);
  1371. return -EINVAL;
  1372. }
  1373. spin_lock_irqsave(&udc->lock, flags);
  1374. /* Nuke all pending requests (does flush) */
  1375. nuke(ep, -ESHUTDOWN);
  1376. ep->desc = NULL;
  1377. ep->stopped = 1;
  1378. spin_unlock_irqrestore(&udc->lock, flags);
  1379. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  1380. if (ep->dir == USB_DIR_OUT)
  1381. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
  1382. (USB_BDRING_LEN_RX + 1);
  1383. else
  1384. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
  1385. (USB_BDRING_LEN + 1);
  1386. if (ep->dir != USB_DIR_IN) {
  1387. kfree(ep->rxframe);
  1388. if (ep->rxbufmap) {
  1389. dma_unmap_single(udc_controller->gadget.dev.parent,
  1390. ep->rxbuf_d, size,
  1391. DMA_FROM_DEVICE);
  1392. ep->rxbuf_d = DMA_ADDR_INVALID;
  1393. } else {
  1394. dma_sync_single_for_cpu(
  1395. udc_controller->gadget.dev.parent,
  1396. ep->rxbuf_d, size,
  1397. DMA_FROM_DEVICE);
  1398. }
  1399. kfree(ep->rxbuffer);
  1400. }
  1401. if (ep->dir != USB_DIR_OUT)
  1402. kfree(ep->txframe);
  1403. dev_dbg(udc->dev, "disabled %s OK\n", _ep->name);
  1404. return 0;
  1405. }
  1406. static struct usb_request *qe_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  1407. {
  1408. struct qe_req *req;
  1409. req = kzalloc(sizeof(*req), gfp_flags);
  1410. if (!req)
  1411. return NULL;
  1412. req->req.dma = DMA_ADDR_INVALID;
  1413. INIT_LIST_HEAD(&req->queue);
  1414. return &req->req;
  1415. }
  1416. static void qe_free_request(struct usb_ep *_ep, struct usb_request *_req)
  1417. {
  1418. struct qe_req *req;
  1419. req = container_of(_req, struct qe_req, req);
  1420. if (_req)
  1421. kfree(req);
  1422. }
  1423. static int __qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req)
  1424. {
  1425. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1426. struct qe_req *req = container_of(_req, struct qe_req, req);
  1427. struct qe_udc *udc;
  1428. int reval;
  1429. udc = ep->udc;
  1430. /* catch various bogus parameters */
  1431. if (!_req || !req->req.complete || !req->req.buf
  1432. || !list_empty(&req->queue)) {
  1433. dev_dbg(udc->dev, "bad params\n");
  1434. return -EINVAL;
  1435. }
  1436. if (!_ep || (!ep->desc && ep_index(ep))) {
  1437. dev_dbg(udc->dev, "bad ep\n");
  1438. return -EINVAL;
  1439. }
  1440. if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
  1441. return -ESHUTDOWN;
  1442. req->ep = ep;
  1443. /* map virtual address to hardware */
  1444. if (req->req.dma == DMA_ADDR_INVALID) {
  1445. req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
  1446. req->req.buf,
  1447. req->req.length,
  1448. ep_is_in(ep)
  1449. ? DMA_TO_DEVICE :
  1450. DMA_FROM_DEVICE);
  1451. req->mapped = 1;
  1452. } else {
  1453. dma_sync_single_for_device(ep->udc->gadget.dev.parent,
  1454. req->req.dma, req->req.length,
  1455. ep_is_in(ep)
  1456. ? DMA_TO_DEVICE :
  1457. DMA_FROM_DEVICE);
  1458. req->mapped = 0;
  1459. }
  1460. req->req.status = -EINPROGRESS;
  1461. req->req.actual = 0;
  1462. list_add_tail(&req->queue, &ep->queue);
  1463. dev_vdbg(udc->dev, "gadget have request in %s! %d\n",
  1464. ep->name, req->req.length);
  1465. /* push the request to device */
  1466. if (ep_is_in(ep))
  1467. reval = ep_req_send(ep, req);
  1468. /* EP0 */
  1469. if (ep_index(ep) == 0 && req->req.length > 0) {
  1470. if (ep_is_in(ep))
  1471. udc->ep0_state = DATA_STATE_XMIT;
  1472. else
  1473. udc->ep0_state = DATA_STATE_RECV;
  1474. }
  1475. if (ep->dir == USB_DIR_OUT)
  1476. reval = ep_req_receive(ep, req);
  1477. return 0;
  1478. }
  1479. /* queues (submits) an I/O request to an endpoint */
  1480. static int qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
  1481. gfp_t gfp_flags)
  1482. {
  1483. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1484. struct qe_udc *udc = ep->udc;
  1485. unsigned long flags;
  1486. int ret;
  1487. spin_lock_irqsave(&udc->lock, flags);
  1488. ret = __qe_ep_queue(_ep, _req);
  1489. spin_unlock_irqrestore(&udc->lock, flags);
  1490. return ret;
  1491. }
  1492. /* dequeues (cancels, unlinks) an I/O request from an endpoint */
  1493. static int qe_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1494. {
  1495. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1496. struct qe_req *req;
  1497. unsigned long flags;
  1498. if (!_ep || !_req)
  1499. return -EINVAL;
  1500. spin_lock_irqsave(&ep->udc->lock, flags);
  1501. /* make sure it's actually queued on this endpoint */
  1502. list_for_each_entry(req, &ep->queue, queue) {
  1503. if (&req->req == _req)
  1504. break;
  1505. }
  1506. if (&req->req != _req) {
  1507. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1508. return -EINVAL;
  1509. }
  1510. done(ep, req, -ECONNRESET);
  1511. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1512. return 0;
  1513. }
  1514. /*-----------------------------------------------------------------
  1515. * modify the endpoint halt feature
  1516. * @ep: the non-isochronous endpoint being stalled
  1517. * @value: 1--set halt 0--clear halt
  1518. * Returns zero, or a negative error code.
  1519. *----------------------------------------------------------------*/
  1520. static int qe_ep_set_halt(struct usb_ep *_ep, int value)
  1521. {
  1522. struct qe_ep *ep;
  1523. unsigned long flags;
  1524. int status = -EOPNOTSUPP;
  1525. struct qe_udc *udc;
  1526. ep = container_of(_ep, struct qe_ep, ep);
  1527. if (!_ep || !ep->desc) {
  1528. status = -EINVAL;
  1529. goto out;
  1530. }
  1531. udc = ep->udc;
  1532. /* Attempt to halt IN ep will fail if any transfer requests
  1533. * are still queue */
  1534. if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
  1535. status = -EAGAIN;
  1536. goto out;
  1537. }
  1538. status = 0;
  1539. spin_lock_irqsave(&ep->udc->lock, flags);
  1540. qe_eptx_stall_change(ep, value);
  1541. qe_eprx_stall_change(ep, value);
  1542. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1543. if (ep->epnum == 0) {
  1544. udc->ep0_state = WAIT_FOR_SETUP;
  1545. udc->ep0_dir = 0;
  1546. }
  1547. /* set data toggle to DATA0 on clear halt */
  1548. if (value == 0)
  1549. ep->data01 = 0;
  1550. out:
  1551. dev_vdbg(udc->dev, "%s %s halt stat %d\n", ep->ep.name,
  1552. value ? "set" : "clear", status);
  1553. return status;
  1554. }
  1555. static struct usb_ep_ops qe_ep_ops = {
  1556. .enable = qe_ep_enable,
  1557. .disable = qe_ep_disable,
  1558. .alloc_request = qe_alloc_request,
  1559. .free_request = qe_free_request,
  1560. .queue = qe_ep_queue,
  1561. .dequeue = qe_ep_dequeue,
  1562. .set_halt = qe_ep_set_halt,
  1563. };
  1564. /*------------------------------------------------------------------------
  1565. Gadget Driver Layer Operations
  1566. ------------------------------------------------------------------------*/
  1567. /* Get the current frame number */
  1568. static int qe_get_frame(struct usb_gadget *gadget)
  1569. {
  1570. u16 tmp;
  1571. tmp = in_be16(&udc_controller->usb_param->frame_n);
  1572. if (tmp & 0x8000)
  1573. tmp = tmp & 0x07ff;
  1574. else
  1575. tmp = -EINVAL;
  1576. return (int)tmp;
  1577. }
  1578. /* Tries to wake up the host connected to this gadget
  1579. *
  1580. * Return : 0-success
  1581. * Negative-this feature not enabled by host or not supported by device hw
  1582. */
  1583. static int qe_wakeup(struct usb_gadget *gadget)
  1584. {
  1585. return -ENOTSUPP;
  1586. }
  1587. /* Notify controller that VBUS is powered, Called by whatever
  1588. detects VBUS sessions */
  1589. static int qe_vbus_session(struct usb_gadget *gadget, int is_active)
  1590. {
  1591. return -ENOTSUPP;
  1592. }
  1593. /* constrain controller's VBUS power usage
  1594. * This call is used by gadget drivers during SET_CONFIGURATION calls,
  1595. * reporting how much power the device may consume. For example, this
  1596. * could affect how quickly batteries are recharged.
  1597. *
  1598. * Returns zero on success, else negative errno.
  1599. */
  1600. static int qe_vbus_draw(struct usb_gadget *gadget, unsigned mA)
  1601. {
  1602. return -ENOTSUPP;
  1603. }
  1604. /* Change Data+ pullup status
  1605. * this func is used by usb_gadget_connect/disconnect
  1606. */
  1607. static int qe_pullup(struct usb_gadget *gadget, int is_on)
  1608. {
  1609. return -ENOTSUPP;
  1610. }
  1611. /* defined in usb_gadget.h */
  1612. static struct usb_gadget_ops qe_gadget_ops = {
  1613. .get_frame = qe_get_frame,
  1614. .wakeup = qe_wakeup,
  1615. /* .set_selfpowered = qe_set_selfpowered,*/ /* always selfpowered */
  1616. .vbus_session = qe_vbus_session,
  1617. .vbus_draw = qe_vbus_draw,
  1618. .pullup = qe_pullup,
  1619. };
  1620. /*-------------------------------------------------------------------------
  1621. USB ep0 Setup process in BUS Enumeration
  1622. -------------------------------------------------------------------------*/
  1623. static int udc_reset_ep_queue(struct qe_udc *udc, u8 pipe)
  1624. {
  1625. struct qe_ep *ep = &udc->eps[pipe];
  1626. nuke(ep, -ECONNRESET);
  1627. ep->tx_req = NULL;
  1628. return 0;
  1629. }
  1630. static int reset_queues(struct qe_udc *udc)
  1631. {
  1632. u8 pipe;
  1633. for (pipe = 0; pipe < USB_MAX_ENDPOINTS; pipe++)
  1634. udc_reset_ep_queue(udc, pipe);
  1635. /* report disconnect; the driver is already quiesced */
  1636. spin_unlock(&udc->lock);
  1637. udc->driver->disconnect(&udc->gadget);
  1638. spin_lock(&udc->lock);
  1639. return 0;
  1640. }
  1641. static void ch9setaddress(struct qe_udc *udc, u16 value, u16 index,
  1642. u16 length)
  1643. {
  1644. /* Save the new address to device struct */
  1645. udc->device_address = (u8) value;
  1646. /* Update usb state */
  1647. udc->usb_state = USB_STATE_ADDRESS;
  1648. /* Status phase , send a ZLP */
  1649. if (ep0_prime_status(udc, USB_DIR_IN))
  1650. qe_ep0_stall(udc);
  1651. }
  1652. static void ownercomplete(struct usb_ep *_ep, struct usb_request *_req)
  1653. {
  1654. struct qe_req *req = container_of(_req, struct qe_req, req);
  1655. req->req.buf = NULL;
  1656. kfree(req);
  1657. }
  1658. static void ch9getstatus(struct qe_udc *udc, u8 request_type, u16 value,
  1659. u16 index, u16 length)
  1660. {
  1661. u16 usb_status = 0;
  1662. struct qe_req *req;
  1663. struct qe_ep *ep;
  1664. int status = 0;
  1665. ep = &udc->eps[0];
  1666. if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  1667. /* Get device status */
  1668. usb_status = 1 << USB_DEVICE_SELF_POWERED;
  1669. } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
  1670. /* Get interface status */
  1671. /* We don't have interface information in udc driver */
  1672. usb_status = 0;
  1673. } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
  1674. /* Get endpoint status */
  1675. int pipe = index & USB_ENDPOINT_NUMBER_MASK;
  1676. struct qe_ep *target_ep = &udc->eps[pipe];
  1677. u16 usep;
  1678. /* stall if endpoint doesn't exist */
  1679. if (!target_ep->desc)
  1680. goto stall;
  1681. usep = in_be16(&udc->usb_regs->usb_usep[pipe]);
  1682. if (index & USB_DIR_IN) {
  1683. if (target_ep->dir != USB_DIR_IN)
  1684. goto stall;
  1685. if ((usep & USB_THS_MASK) == USB_THS_STALL)
  1686. usb_status = 1 << USB_ENDPOINT_HALT;
  1687. } else {
  1688. if (target_ep->dir != USB_DIR_OUT)
  1689. goto stall;
  1690. if ((usep & USB_RHS_MASK) == USB_RHS_STALL)
  1691. usb_status = 1 << USB_ENDPOINT_HALT;
  1692. }
  1693. }
  1694. req = container_of(qe_alloc_request(&ep->ep, GFP_KERNEL),
  1695. struct qe_req, req);
  1696. req->req.length = 2;
  1697. req->req.buf = udc->statusbuf;
  1698. *(u16 *)req->req.buf = cpu_to_le16(usb_status);
  1699. req->req.status = -EINPROGRESS;
  1700. req->req.actual = 0;
  1701. req->req.complete = ownercomplete;
  1702. udc->ep0_dir = USB_DIR_IN;
  1703. /* data phase */
  1704. status = __qe_ep_queue(&ep->ep, &req->req);
  1705. if (status == 0)
  1706. return;
  1707. stall:
  1708. dev_err(udc->dev, "Can't respond to getstatus request \n");
  1709. qe_ep0_stall(udc);
  1710. }
  1711. /* only handle the setup request, suppose the device in normal status */
  1712. static void setup_received_handle(struct qe_udc *udc,
  1713. struct usb_ctrlrequest *setup)
  1714. {
  1715. /* Fix Endian (udc->local_setup_buff is cpu Endian now)*/
  1716. u16 wValue = le16_to_cpu(setup->wValue);
  1717. u16 wIndex = le16_to_cpu(setup->wIndex);
  1718. u16 wLength = le16_to_cpu(setup->wLength);
  1719. /* clear the previous request in the ep0 */
  1720. udc_reset_ep_queue(udc, 0);
  1721. if (setup->bRequestType & USB_DIR_IN)
  1722. udc->ep0_dir = USB_DIR_IN;
  1723. else
  1724. udc->ep0_dir = USB_DIR_OUT;
  1725. switch (setup->bRequest) {
  1726. case USB_REQ_GET_STATUS:
  1727. /* Data+Status phase form udc */
  1728. if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
  1729. != (USB_DIR_IN | USB_TYPE_STANDARD))
  1730. break;
  1731. ch9getstatus(udc, setup->bRequestType, wValue, wIndex,
  1732. wLength);
  1733. return;
  1734. case USB_REQ_SET_ADDRESS:
  1735. /* Status phase from udc */
  1736. if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD |
  1737. USB_RECIP_DEVICE))
  1738. break;
  1739. ch9setaddress(udc, wValue, wIndex, wLength);
  1740. return;
  1741. case USB_REQ_CLEAR_FEATURE:
  1742. case USB_REQ_SET_FEATURE:
  1743. /* Requests with no data phase, status phase from udc */
  1744. if ((setup->bRequestType & USB_TYPE_MASK)
  1745. != USB_TYPE_STANDARD)
  1746. break;
  1747. if ((setup->bRequestType & USB_RECIP_MASK)
  1748. == USB_RECIP_ENDPOINT) {
  1749. int pipe = wIndex & USB_ENDPOINT_NUMBER_MASK;
  1750. struct qe_ep *ep;
  1751. if (wValue != 0 || wLength != 0
  1752. || pipe > USB_MAX_ENDPOINTS)
  1753. break;
  1754. ep = &udc->eps[pipe];
  1755. spin_unlock(&udc->lock);
  1756. qe_ep_set_halt(&ep->ep,
  1757. (setup->bRequest == USB_REQ_SET_FEATURE)
  1758. ? 1 : 0);
  1759. spin_lock(&udc->lock);
  1760. }
  1761. ep0_prime_status(udc, USB_DIR_IN);
  1762. return;
  1763. default:
  1764. break;
  1765. }
  1766. if (wLength) {
  1767. /* Data phase from gadget, status phase from udc */
  1768. if (setup->bRequestType & USB_DIR_IN) {
  1769. udc->ep0_state = DATA_STATE_XMIT;
  1770. udc->ep0_dir = USB_DIR_IN;
  1771. } else {
  1772. udc->ep0_state = DATA_STATE_RECV;
  1773. udc->ep0_dir = USB_DIR_OUT;
  1774. }
  1775. spin_unlock(&udc->lock);
  1776. if (udc->driver->setup(&udc->gadget,
  1777. &udc->local_setup_buff) < 0)
  1778. qe_ep0_stall(udc);
  1779. spin_lock(&udc->lock);
  1780. } else {
  1781. /* No data phase, IN status from gadget */
  1782. udc->ep0_dir = USB_DIR_IN;
  1783. spin_unlock(&udc->lock);
  1784. if (udc->driver->setup(&udc->gadget,
  1785. &udc->local_setup_buff) < 0)
  1786. qe_ep0_stall(udc);
  1787. spin_lock(&udc->lock);
  1788. udc->ep0_state = DATA_STATE_NEED_ZLP;
  1789. }
  1790. }
  1791. /*-------------------------------------------------------------------------
  1792. USB Interrupt handlers
  1793. -------------------------------------------------------------------------*/
  1794. static void suspend_irq(struct qe_udc *udc)
  1795. {
  1796. udc->resume_state = udc->usb_state;
  1797. udc->usb_state = USB_STATE_SUSPENDED;
  1798. /* report suspend to the driver ,serial.c not support this*/
  1799. if (udc->driver->suspend)
  1800. udc->driver->suspend(&udc->gadget);
  1801. }
  1802. static void resume_irq(struct qe_udc *udc)
  1803. {
  1804. udc->usb_state = udc->resume_state;
  1805. udc->resume_state = 0;
  1806. /* report resume to the driver , serial.c not support this*/
  1807. if (udc->driver->resume)
  1808. udc->driver->resume(&udc->gadget);
  1809. }
  1810. static void idle_irq(struct qe_udc *udc)
  1811. {
  1812. u8 usbs;
  1813. usbs = in_8(&udc->usb_regs->usb_usbs);
  1814. if (usbs & USB_IDLE_STATUS_MASK) {
  1815. if ((udc->usb_state) != USB_STATE_SUSPENDED)
  1816. suspend_irq(udc);
  1817. } else {
  1818. if (udc->usb_state == USB_STATE_SUSPENDED)
  1819. resume_irq(udc);
  1820. }
  1821. }
  1822. static int reset_irq(struct qe_udc *udc)
  1823. {
  1824. unsigned char i;
  1825. qe_usb_disable();
  1826. out_8(&udc->usb_regs->usb_usadr, 0);
  1827. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1828. if (udc->eps[i].init)
  1829. qe_ep_reset(udc, i);
  1830. }
  1831. reset_queues(udc);
  1832. udc->usb_state = USB_STATE_DEFAULT;
  1833. udc->ep0_state = WAIT_FOR_SETUP;
  1834. udc->ep0_dir = USB_DIR_OUT;
  1835. qe_usb_enable();
  1836. return 0;
  1837. }
  1838. static int bsy_irq(struct qe_udc *udc)
  1839. {
  1840. return 0;
  1841. }
  1842. static int txe_irq(struct qe_udc *udc)
  1843. {
  1844. return 0;
  1845. }
  1846. /* ep0 tx interrupt also in here */
  1847. static int tx_irq(struct qe_udc *udc)
  1848. {
  1849. struct qe_ep *ep;
  1850. struct qe_bd __iomem *bd;
  1851. int i, res = 0;
  1852. if ((udc->usb_state == USB_STATE_ADDRESS)
  1853. && (in_8(&udc->usb_regs->usb_usadr) == 0))
  1854. out_8(&udc->usb_regs->usb_usadr, udc->device_address);
  1855. for (i = (USB_MAX_ENDPOINTS-1); ((i >= 0) && (res == 0)); i--) {
  1856. ep = &udc->eps[i];
  1857. if (ep && ep->init && (ep->dir != USB_DIR_OUT)) {
  1858. bd = ep->c_txbd;
  1859. if (!(in_be32((u32 __iomem *)bd) & T_R)
  1860. && (in_be32(&bd->buf))) {
  1861. /* confirm the transmitted bd */
  1862. if (ep->epnum == 0)
  1863. res = qe_ep0_txconf(ep);
  1864. else
  1865. res = qe_ep_txconf(ep);
  1866. }
  1867. }
  1868. }
  1869. return res;
  1870. }
  1871. /* setup packect's rx is handle in the function too */
  1872. static void rx_irq(struct qe_udc *udc)
  1873. {
  1874. struct qe_ep *ep;
  1875. struct qe_bd __iomem *bd;
  1876. int i;
  1877. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1878. ep = &udc->eps[i];
  1879. if (ep && ep->init && (ep->dir != USB_DIR_IN)) {
  1880. bd = ep->n_rxbd;
  1881. if (!(in_be32((u32 __iomem *)bd) & R_E)
  1882. && (in_be32(&bd->buf))) {
  1883. if (ep->epnum == 0) {
  1884. qe_ep0_rx(udc);
  1885. } else {
  1886. /*non-setup package receive*/
  1887. qe_ep_rx(ep);
  1888. }
  1889. }
  1890. }
  1891. }
  1892. }
  1893. static irqreturn_t qe_udc_irq(int irq, void *_udc)
  1894. {
  1895. struct qe_udc *udc = (struct qe_udc *)_udc;
  1896. u16 irq_src;
  1897. irqreturn_t status = IRQ_NONE;
  1898. unsigned long flags;
  1899. spin_lock_irqsave(&udc->lock, flags);
  1900. irq_src = in_be16(&udc->usb_regs->usb_usber) &
  1901. in_be16(&udc->usb_regs->usb_usbmr);
  1902. /* Clear notification bits */
  1903. out_be16(&udc->usb_regs->usb_usber, irq_src);
  1904. /* USB Interrupt */
  1905. if (irq_src & USB_E_IDLE_MASK) {
  1906. idle_irq(udc);
  1907. irq_src &= ~USB_E_IDLE_MASK;
  1908. status = IRQ_HANDLED;
  1909. }
  1910. if (irq_src & USB_E_TXB_MASK) {
  1911. tx_irq(udc);
  1912. irq_src &= ~USB_E_TXB_MASK;
  1913. status = IRQ_HANDLED;
  1914. }
  1915. if (irq_src & USB_E_RXB_MASK) {
  1916. rx_irq(udc);
  1917. irq_src &= ~USB_E_RXB_MASK;
  1918. status = IRQ_HANDLED;
  1919. }
  1920. if (irq_src & USB_E_RESET_MASK) {
  1921. reset_irq(udc);
  1922. irq_src &= ~USB_E_RESET_MASK;
  1923. status = IRQ_HANDLED;
  1924. }
  1925. if (irq_src & USB_E_BSY_MASK) {
  1926. bsy_irq(udc);
  1927. irq_src &= ~USB_E_BSY_MASK;
  1928. status = IRQ_HANDLED;
  1929. }
  1930. if (irq_src & USB_E_TXE_MASK) {
  1931. txe_irq(udc);
  1932. irq_src &= ~USB_E_TXE_MASK;
  1933. status = IRQ_HANDLED;
  1934. }
  1935. spin_unlock_irqrestore(&udc->lock, flags);
  1936. return status;
  1937. }
  1938. /*-------------------------------------------------------------------------
  1939. Gadget driver register and unregister.
  1940. --------------------------------------------------------------------------*/
  1941. int usb_gadget_register_driver(struct usb_gadget_driver *driver)
  1942. {
  1943. int retval;
  1944. unsigned long flags = 0;
  1945. /* standard operations */
  1946. if (!udc_controller)
  1947. return -ENODEV;
  1948. if (!driver || (driver->speed != USB_SPEED_FULL
  1949. && driver->speed != USB_SPEED_HIGH)
  1950. || !driver->bind || !driver->disconnect
  1951. || !driver->setup)
  1952. return -EINVAL;
  1953. if (udc_controller->driver)
  1954. return -EBUSY;
  1955. /* lock is needed but whether should use this lock or another */
  1956. spin_lock_irqsave(&udc_controller->lock, flags);
  1957. driver->driver.bus = NULL;
  1958. /* hook up the driver */
  1959. udc_controller->driver = driver;
  1960. udc_controller->gadget.dev.driver = &driver->driver;
  1961. udc_controller->gadget.speed = (enum usb_device_speed)(driver->speed);
  1962. spin_unlock_irqrestore(&udc_controller->lock, flags);
  1963. retval = driver->bind(&udc_controller->gadget);
  1964. if (retval) {
  1965. dev_err(udc_controller->dev, "bind to %s --> %d",
  1966. driver->driver.name, retval);
  1967. udc_controller->gadget.dev.driver = NULL;
  1968. udc_controller->driver = NULL;
  1969. return retval;
  1970. }
  1971. /* Enable IRQ reg and Set usbcmd reg EN bit */
  1972. qe_usb_enable();
  1973. out_be16(&udc_controller->usb_regs->usb_usber, 0xffff);
  1974. out_be16(&udc_controller->usb_regs->usb_usbmr, USB_E_DEFAULT_DEVICE);
  1975. udc_controller->usb_state = USB_STATE_ATTACHED;
  1976. udc_controller->ep0_state = WAIT_FOR_SETUP;
  1977. udc_controller->ep0_dir = USB_DIR_OUT;
  1978. dev_info(udc_controller->dev, "%s bind to driver %s \n",
  1979. udc_controller->gadget.name, driver->driver.name);
  1980. return 0;
  1981. }
  1982. EXPORT_SYMBOL(usb_gadget_register_driver);
  1983. int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
  1984. {
  1985. struct qe_ep *loop_ep;
  1986. unsigned long flags;
  1987. if (!udc_controller)
  1988. return -ENODEV;
  1989. if (!driver || driver != udc_controller->driver)
  1990. return -EINVAL;
  1991. /* stop usb controller, disable intr */
  1992. qe_usb_disable();
  1993. /* in fact, no needed */
  1994. udc_controller->usb_state = USB_STATE_ATTACHED;
  1995. udc_controller->ep0_state = WAIT_FOR_SETUP;
  1996. udc_controller->ep0_dir = 0;
  1997. /* stand operation */
  1998. spin_lock_irqsave(&udc_controller->lock, flags);
  1999. udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
  2000. nuke(&udc_controller->eps[0], -ESHUTDOWN);
  2001. list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list,
  2002. ep.ep_list)
  2003. nuke(loop_ep, -ESHUTDOWN);
  2004. spin_unlock_irqrestore(&udc_controller->lock, flags);
  2005. /* report disconnect; the controller is already quiesced */
  2006. driver->disconnect(&udc_controller->gadget);
  2007. /* unbind gadget and unhook driver. */
  2008. driver->unbind(&udc_controller->gadget);
  2009. udc_controller->gadget.dev.driver = NULL;
  2010. udc_controller->driver = NULL;
  2011. dev_info(udc_controller->dev, "unregistered gadget driver '%s'\r\n",
  2012. driver->driver.name);
  2013. return 0;
  2014. }
  2015. EXPORT_SYMBOL(usb_gadget_unregister_driver);
  2016. /* udc structure's alloc and setup, include ep-param alloc */
  2017. static struct qe_udc __devinit *qe_udc_config(struct of_device *ofdev)
  2018. {
  2019. struct qe_udc *udc;
  2020. struct device_node *np = ofdev->node;
  2021. unsigned int tmp_addr = 0;
  2022. struct usb_device_para __iomem *usbpram;
  2023. unsigned int i;
  2024. u64 size;
  2025. u32 offset;
  2026. udc = kzalloc(sizeof(*udc), GFP_KERNEL);
  2027. if (udc == NULL) {
  2028. dev_err(&ofdev->dev, "malloc udc failed\n");
  2029. goto cleanup;
  2030. }
  2031. udc->dev = &ofdev->dev;
  2032. /* get default address of usb parameter in MURAM from device tree */
  2033. offset = *of_get_address(np, 1, &size, NULL);
  2034. udc->usb_param = cpm_muram_addr(offset);
  2035. memset_io(udc->usb_param, 0, size);
  2036. usbpram = udc->usb_param;
  2037. out_be16(&usbpram->frame_n, 0);
  2038. out_be32(&usbpram->rstate, 0);
  2039. tmp_addr = cpm_muram_alloc((USB_MAX_ENDPOINTS *
  2040. sizeof(struct usb_ep_para)),
  2041. USB_EP_PARA_ALIGNMENT);
  2042. if (IS_ERR_VALUE(tmp_addr))
  2043. goto cleanup;
  2044. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  2045. out_be16(&usbpram->epptr[i], (u16)tmp_addr);
  2046. udc->ep_param[i] = cpm_muram_addr(tmp_addr);
  2047. tmp_addr += 32;
  2048. }
  2049. memset_io(udc->ep_param[0], 0,
  2050. USB_MAX_ENDPOINTS * sizeof(struct usb_ep_para));
  2051. udc->resume_state = USB_STATE_NOTATTACHED;
  2052. udc->usb_state = USB_STATE_POWERED;
  2053. udc->ep0_dir = 0;
  2054. spin_lock_init(&udc->lock);
  2055. return udc;
  2056. cleanup:
  2057. kfree(udc);
  2058. return NULL;
  2059. }
  2060. /* USB Controller register init */
  2061. static int __devinit qe_udc_reg_init(struct qe_udc *udc)
  2062. {
  2063. struct usb_ctlr __iomem *qe_usbregs;
  2064. qe_usbregs = udc->usb_regs;
  2065. /* Init the usb register */
  2066. out_8(&qe_usbregs->usb_usmod, 0x01);
  2067. out_be16(&qe_usbregs->usb_usbmr, 0);
  2068. out_8(&qe_usbregs->usb_uscom, 0);
  2069. out_be16(&qe_usbregs->usb_usber, USBER_ALL_CLEAR);
  2070. return 0;
  2071. }
  2072. static int __devinit qe_ep_config(struct qe_udc *udc, unsigned char pipe_num)
  2073. {
  2074. struct qe_ep *ep = &udc->eps[pipe_num];
  2075. ep->udc = udc;
  2076. strcpy(ep->name, ep_name[pipe_num]);
  2077. ep->ep.name = ep_name[pipe_num];
  2078. ep->ep.ops = &qe_ep_ops;
  2079. ep->stopped = 1;
  2080. ep->ep.maxpacket = (unsigned short) ~0;
  2081. ep->desc = NULL;
  2082. ep->dir = 0xff;
  2083. ep->epnum = (u8)pipe_num;
  2084. ep->sent = 0;
  2085. ep->last = 0;
  2086. ep->init = 0;
  2087. ep->rxframe = NULL;
  2088. ep->txframe = NULL;
  2089. ep->tx_req = NULL;
  2090. ep->state = EP_STATE_IDLE;
  2091. ep->has_data = 0;
  2092. /* the queue lists any req for this ep */
  2093. INIT_LIST_HEAD(&ep->queue);
  2094. /* gagdet.ep_list used for ep_autoconfig so no ep0*/
  2095. if (pipe_num != 0)
  2096. list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
  2097. ep->gadget = &udc->gadget;
  2098. return 0;
  2099. }
  2100. /*-----------------------------------------------------------------------
  2101. * UDC device Driver operation functions *
  2102. *----------------------------------------------------------------------*/
  2103. static void qe_udc_release(struct device *dev)
  2104. {
  2105. int i = 0;
  2106. complete(udc_controller->done);
  2107. cpm_muram_free(cpm_muram_offset(udc_controller->ep_param[0]));
  2108. for (i = 0; i < USB_MAX_ENDPOINTS; i++)
  2109. udc_controller->ep_param[i] = NULL;
  2110. kfree(udc_controller);
  2111. udc_controller = NULL;
  2112. }
  2113. /* Driver probe functions */
  2114. static int __devinit qe_udc_probe(struct of_device *ofdev,
  2115. const struct of_device_id *match)
  2116. {
  2117. struct device_node *np = ofdev->node;
  2118. struct qe_ep *ep;
  2119. unsigned int ret = 0;
  2120. unsigned int i;
  2121. const void *prop;
  2122. prop = of_get_property(np, "mode", NULL);
  2123. if (!prop || strcmp(prop, "peripheral"))
  2124. return -ENODEV;
  2125. /* Initialize the udc structure including QH member and other member */
  2126. udc_controller = qe_udc_config(ofdev);
  2127. if (!udc_controller) {
  2128. dev_err(&ofdev->dev, "failed to initialize\n");
  2129. return -ENOMEM;
  2130. }
  2131. udc_controller->soc_type = (unsigned long)match->data;
  2132. udc_controller->usb_regs = of_iomap(np, 0);
  2133. if (!udc_controller->usb_regs) {
  2134. ret = -ENOMEM;
  2135. goto err1;
  2136. }
  2137. /* initialize usb hw reg except for regs for EP,
  2138. * leave usbintr reg untouched*/
  2139. qe_udc_reg_init(udc_controller);
  2140. /* here comes the stand operations for probe
  2141. * set the qe_udc->gadget.xxx */
  2142. udc_controller->gadget.ops = &qe_gadget_ops;
  2143. /* gadget.ep0 is a pointer */
  2144. udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
  2145. INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
  2146. /* modify in register gadget process */
  2147. udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
  2148. /* name: Identifies the controller hardware type. */
  2149. udc_controller->gadget.name = driver_name;
  2150. device_initialize(&udc_controller->gadget.dev);
  2151. dev_set_name(&udc_controller->gadget.dev, "gadget");
  2152. udc_controller->gadget.dev.release = qe_udc_release;
  2153. udc_controller->gadget.dev.parent = &ofdev->dev;
  2154. /* initialize qe_ep struct */
  2155. for (i = 0; i < USB_MAX_ENDPOINTS ; i++) {
  2156. /* because the ep type isn't decide here so
  2157. * qe_ep_init() should be called in ep_enable() */
  2158. /* setup the qe_ep struct and link ep.ep.list
  2159. * into gadget.ep_list */
  2160. qe_ep_config(udc_controller, (unsigned char)i);
  2161. }
  2162. /* ep0 initialization in here */
  2163. ret = qe_ep_init(udc_controller, 0, &qe_ep0_desc);
  2164. if (ret)
  2165. goto err2;
  2166. /* create a buf for ZLP send, need to remain zeroed */
  2167. udc_controller->nullbuf = kzalloc(256, GFP_KERNEL);
  2168. if (udc_controller->nullbuf == NULL) {
  2169. dev_err(udc_controller->dev, "cannot alloc nullbuf\n");
  2170. ret = -ENOMEM;
  2171. goto err3;
  2172. }
  2173. /* buffer for data of get_status request */
  2174. udc_controller->statusbuf = kzalloc(2, GFP_KERNEL);
  2175. if (udc_controller->statusbuf == NULL) {
  2176. ret = -ENOMEM;
  2177. goto err4;
  2178. }
  2179. udc_controller->nullp = virt_to_phys((void *)udc_controller->nullbuf);
  2180. if (udc_controller->nullp == DMA_ADDR_INVALID) {
  2181. udc_controller->nullp = dma_map_single(
  2182. udc_controller->gadget.dev.parent,
  2183. udc_controller->nullbuf,
  2184. 256,
  2185. DMA_TO_DEVICE);
  2186. udc_controller->nullmap = 1;
  2187. } else {
  2188. dma_sync_single_for_device(udc_controller->gadget.dev.parent,
  2189. udc_controller->nullp, 256,
  2190. DMA_TO_DEVICE);
  2191. }
  2192. tasklet_init(&udc_controller->rx_tasklet, ep_rx_tasklet,
  2193. (unsigned long)udc_controller);
  2194. /* request irq and disable DR */
  2195. udc_controller->usb_irq = irq_of_parse_and_map(np, 0);
  2196. if (!udc_controller->usb_irq) {
  2197. ret = -EINVAL;
  2198. goto err_noirq;
  2199. }
  2200. ret = request_irq(udc_controller->usb_irq, qe_udc_irq, 0,
  2201. driver_name, udc_controller);
  2202. if (ret) {
  2203. dev_err(udc_controller->dev, "cannot request irq %d err %d \n",
  2204. udc_controller->usb_irq, ret);
  2205. goto err5;
  2206. }
  2207. ret = device_add(&udc_controller->gadget.dev);
  2208. if (ret)
  2209. goto err6;
  2210. dev_info(udc_controller->dev,
  2211. "%s USB controller initialized as device\n",
  2212. (udc_controller->soc_type == PORT_QE) ? "QE" : "CPM");
  2213. return 0;
  2214. err6:
  2215. free_irq(udc_controller->usb_irq, udc_controller);
  2216. err5:
  2217. irq_dispose_mapping(udc_controller->usb_irq);
  2218. err_noirq:
  2219. if (udc_controller->nullmap) {
  2220. dma_unmap_single(udc_controller->gadget.dev.parent,
  2221. udc_controller->nullp, 256,
  2222. DMA_TO_DEVICE);
  2223. udc_controller->nullp = DMA_ADDR_INVALID;
  2224. } else {
  2225. dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
  2226. udc_controller->nullp, 256,
  2227. DMA_TO_DEVICE);
  2228. }
  2229. kfree(udc_controller->statusbuf);
  2230. err4:
  2231. kfree(udc_controller->nullbuf);
  2232. err3:
  2233. ep = &udc_controller->eps[0];
  2234. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  2235. kfree(ep->rxframe);
  2236. kfree(ep->rxbuffer);
  2237. kfree(ep->txframe);
  2238. err2:
  2239. iounmap(udc_controller->usb_regs);
  2240. err1:
  2241. kfree(udc_controller);
  2242. udc_controller = NULL;
  2243. return ret;
  2244. }
  2245. #ifdef CONFIG_PM
  2246. static int qe_udc_suspend(struct of_device *dev, pm_message_t state)
  2247. {
  2248. return -ENOTSUPP;
  2249. }
  2250. static int qe_udc_resume(struct of_device *dev)
  2251. {
  2252. return -ENOTSUPP;
  2253. }
  2254. #endif
  2255. static int __devexit qe_udc_remove(struct of_device *ofdev)
  2256. {
  2257. struct qe_ep *ep;
  2258. unsigned int size;
  2259. DECLARE_COMPLETION(done);
  2260. if (!udc_controller)
  2261. return -ENODEV;
  2262. udc_controller->done = &done;
  2263. tasklet_disable(&udc_controller->rx_tasklet);
  2264. if (udc_controller->nullmap) {
  2265. dma_unmap_single(udc_controller->gadget.dev.parent,
  2266. udc_controller->nullp, 256,
  2267. DMA_TO_DEVICE);
  2268. udc_controller->nullp = DMA_ADDR_INVALID;
  2269. } else {
  2270. dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
  2271. udc_controller->nullp, 256,
  2272. DMA_TO_DEVICE);
  2273. }
  2274. kfree(udc_controller->statusbuf);
  2275. kfree(udc_controller->nullbuf);
  2276. ep = &udc_controller->eps[0];
  2277. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  2278. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (USB_BDRING_LEN + 1);
  2279. kfree(ep->rxframe);
  2280. if (ep->rxbufmap) {
  2281. dma_unmap_single(udc_controller->gadget.dev.parent,
  2282. ep->rxbuf_d, size,
  2283. DMA_FROM_DEVICE);
  2284. ep->rxbuf_d = DMA_ADDR_INVALID;
  2285. } else {
  2286. dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
  2287. ep->rxbuf_d, size,
  2288. DMA_FROM_DEVICE);
  2289. }
  2290. kfree(ep->rxbuffer);
  2291. kfree(ep->txframe);
  2292. free_irq(udc_controller->usb_irq, udc_controller);
  2293. irq_dispose_mapping(udc_controller->usb_irq);
  2294. tasklet_kill(&udc_controller->rx_tasklet);
  2295. iounmap(udc_controller->usb_regs);
  2296. device_unregister(&udc_controller->gadget.dev);
  2297. /* wait for release() of gadget.dev to free udc */
  2298. wait_for_completion(&done);
  2299. return 0;
  2300. }
  2301. /*-------------------------------------------------------------------------*/
  2302. static struct of_device_id __devinitdata qe_udc_match[] = {
  2303. {
  2304. .compatible = "fsl,mpc8360-qe-usb",
  2305. .data = (void *)PORT_QE,
  2306. },
  2307. {
  2308. .compatible = "fsl,mpc8272-cpm-usb",
  2309. .data = (void *)PORT_CPM,
  2310. },
  2311. {},
  2312. };
  2313. MODULE_DEVICE_TABLE(of, qe_udc_match);
  2314. static struct of_platform_driver udc_driver = {
  2315. .name = (char *)driver_name,
  2316. .match_table = qe_udc_match,
  2317. .probe = qe_udc_probe,
  2318. .remove = __devexit_p(qe_udc_remove),
  2319. #ifdef CONFIG_PM
  2320. .suspend = qe_udc_suspend,
  2321. .resume = qe_udc_resume,
  2322. #endif
  2323. };
  2324. static int __init qe_udc_init(void)
  2325. {
  2326. printk(KERN_INFO "%s: %s, %s\n", driver_name, driver_desc,
  2327. DRIVER_VERSION);
  2328. return of_register_platform_driver(&udc_driver);
  2329. }
  2330. static void __exit qe_udc_exit(void)
  2331. {
  2332. of_unregister_platform_driver(&udc_driver);
  2333. }
  2334. module_init(qe_udc_init);
  2335. module_exit(qe_udc_exit);
  2336. MODULE_DESCRIPTION(DRIVER_DESC);
  2337. MODULE_AUTHOR(DRIVER_AUTHOR);
  2338. MODULE_LICENSE("GPL");