radeon_object.c 12 KB

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  1. /*
  2. * Copyright 2009 Jerome Glisse.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20. *
  21. * The above copyright notice and this permission notice (including the
  22. * next paragraph) shall be included in all copies or substantial portions
  23. * of the Software.
  24. *
  25. */
  26. /*
  27. * Authors:
  28. * Jerome Glisse <glisse@freedesktop.org>
  29. * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30. * Dave Airlie
  31. */
  32. #include <linux/list.h>
  33. #include <drm/drmP.h>
  34. #include "radeon_drm.h"
  35. #include "radeon.h"
  36. int radeon_ttm_init(struct radeon_device *rdev);
  37. void radeon_ttm_fini(struct radeon_device *rdev);
  38. static void radeon_bo_clear_surface_reg(struct radeon_bo *bo);
  39. /*
  40. * To exclude mutual BO access we rely on bo_reserve exclusion, as all
  41. * function are calling it.
  42. */
  43. static void radeon_ttm_bo_destroy(struct ttm_buffer_object *tbo)
  44. {
  45. struct radeon_bo *bo;
  46. bo = container_of(tbo, struct radeon_bo, tbo);
  47. mutex_lock(&bo->rdev->gem.mutex);
  48. list_del_init(&bo->list);
  49. mutex_unlock(&bo->rdev->gem.mutex);
  50. radeon_bo_clear_surface_reg(bo);
  51. kfree(bo);
  52. }
  53. static inline u32 radeon_ttm_flags_from_domain(u32 domain)
  54. {
  55. u32 flags = 0;
  56. if (domain & RADEON_GEM_DOMAIN_VRAM) {
  57. flags |= TTM_PL_FLAG_VRAM | TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED;
  58. }
  59. if (domain & RADEON_GEM_DOMAIN_GTT) {
  60. flags |= TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
  61. }
  62. if (domain & RADEON_GEM_DOMAIN_CPU) {
  63. flags |= TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING;
  64. }
  65. if (!flags) {
  66. flags |= TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING;
  67. }
  68. return flags;
  69. }
  70. int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj,
  71. unsigned long size, bool kernel, u32 domain,
  72. struct radeon_bo **bo_ptr)
  73. {
  74. struct radeon_bo *bo;
  75. enum ttm_bo_type type;
  76. u32 flags;
  77. int r;
  78. if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
  79. rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
  80. }
  81. if (kernel) {
  82. type = ttm_bo_type_kernel;
  83. } else {
  84. type = ttm_bo_type_device;
  85. }
  86. *bo_ptr = NULL;
  87. bo = kzalloc(sizeof(struct radeon_bo), GFP_KERNEL);
  88. if (bo == NULL)
  89. return -ENOMEM;
  90. bo->rdev = rdev;
  91. bo->gobj = gobj;
  92. bo->surface_reg = -1;
  93. INIT_LIST_HEAD(&bo->list);
  94. flags = radeon_ttm_flags_from_domain(domain);
  95. retry:
  96. r = ttm_buffer_object_init(&rdev->mman.bdev, &bo->tbo, size, type,
  97. flags, 0, 0, true, NULL, size,
  98. &radeon_ttm_bo_destroy);
  99. if (unlikely(r != 0)) {
  100. if (r == -ERESTART)
  101. goto retry;
  102. /* ttm call radeon_ttm_object_object_destroy if error happen */
  103. dev_err(rdev->dev, "object_init failed for (%ld, 0x%08X)\n",
  104. size, flags);
  105. return r;
  106. }
  107. *bo_ptr = bo;
  108. if (gobj) {
  109. mutex_lock(&bo->rdev->gem.mutex);
  110. list_add_tail(&bo->list, &rdev->gem.objects);
  111. mutex_unlock(&bo->rdev->gem.mutex);
  112. }
  113. return 0;
  114. }
  115. int radeon_bo_kmap(struct radeon_bo *bo, void **ptr)
  116. {
  117. bool is_iomem;
  118. int r;
  119. if (bo->kptr) {
  120. if (ptr) {
  121. *ptr = bo->kptr;
  122. }
  123. return 0;
  124. }
  125. r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, &bo->kmap);
  126. if (r) {
  127. return r;
  128. }
  129. bo->kptr = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);
  130. if (ptr) {
  131. *ptr = bo->kptr;
  132. }
  133. radeon_bo_check_tiling(bo, 0, 0);
  134. return 0;
  135. }
  136. void radeon_bo_kunmap(struct radeon_bo *bo)
  137. {
  138. if (bo->kptr == NULL)
  139. return;
  140. bo->kptr = NULL;
  141. radeon_bo_check_tiling(bo, 0, 0);
  142. ttm_bo_kunmap(&bo->kmap);
  143. }
  144. void radeon_bo_unref(struct radeon_bo **bo)
  145. {
  146. struct ttm_buffer_object *tbo;
  147. if ((*bo) == NULL)
  148. return;
  149. tbo = &((*bo)->tbo);
  150. ttm_bo_unref(&tbo);
  151. if (tbo == NULL)
  152. *bo = NULL;
  153. }
  154. int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
  155. {
  156. u32 flags;
  157. u32 tmp;
  158. int r;
  159. flags = radeon_ttm_flags_from_domain(domain);
  160. if (bo->pin_count) {
  161. bo->pin_count++;
  162. if (gpu_addr)
  163. *gpu_addr = radeon_bo_gpu_offset(bo);
  164. return 0;
  165. }
  166. tmp = bo->tbo.mem.placement;
  167. ttm_flag_masked(&tmp, flags, TTM_PL_MASK_MEM);
  168. bo->tbo.proposed_placement = tmp | TTM_PL_FLAG_NO_EVICT |
  169. TTM_PL_MASK_CACHING;
  170. retry:
  171. r = ttm_buffer_object_validate(&bo->tbo, bo->tbo.proposed_placement,
  172. true, false);
  173. if (likely(r == 0)) {
  174. bo->pin_count = 1;
  175. if (gpu_addr != NULL)
  176. *gpu_addr = radeon_bo_gpu_offset(bo);
  177. }
  178. if (unlikely(r != 0)) {
  179. if (r == -ERESTART)
  180. goto retry;
  181. dev_err(bo->rdev->dev, "%p pin failed\n", bo);
  182. }
  183. return r;
  184. }
  185. int radeon_bo_unpin(struct radeon_bo *bo)
  186. {
  187. int r;
  188. if (!bo->pin_count) {
  189. dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo);
  190. return 0;
  191. }
  192. bo->pin_count--;
  193. if (bo->pin_count)
  194. return 0;
  195. bo->tbo.proposed_placement = bo->tbo.mem.placement &
  196. ~TTM_PL_FLAG_NO_EVICT;
  197. retry:
  198. r = ttm_buffer_object_validate(&bo->tbo, bo->tbo.proposed_placement,
  199. true, false);
  200. if (unlikely(r != 0)) {
  201. if (r == -ERESTART)
  202. goto retry;
  203. dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo);
  204. return r;
  205. }
  206. return 0;
  207. }
  208. int radeon_bo_evict_vram(struct radeon_device *rdev)
  209. {
  210. if (rdev->flags & RADEON_IS_IGP) {
  211. /* Useless to evict on IGP chips */
  212. return 0;
  213. }
  214. return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
  215. }
  216. void radeon_bo_force_delete(struct radeon_device *rdev)
  217. {
  218. struct radeon_bo *bo, *n;
  219. struct drm_gem_object *gobj;
  220. if (list_empty(&rdev->gem.objects)) {
  221. return;
  222. }
  223. dev_err(rdev->dev, "Userspace still has active objects !\n");
  224. list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) {
  225. mutex_lock(&rdev->ddev->struct_mutex);
  226. gobj = bo->gobj;
  227. dev_err(rdev->dev, "%p %p %lu %lu force free\n",
  228. gobj, bo, (unsigned long)gobj->size,
  229. *((unsigned long *)&gobj->refcount));
  230. mutex_lock(&bo->rdev->gem.mutex);
  231. list_del_init(&bo->list);
  232. mutex_unlock(&bo->rdev->gem.mutex);
  233. radeon_bo_unref(&bo);
  234. gobj->driver_private = NULL;
  235. drm_gem_object_unreference(gobj);
  236. mutex_unlock(&rdev->ddev->struct_mutex);
  237. }
  238. }
  239. int radeon_bo_init(struct radeon_device *rdev)
  240. {
  241. /* Add an MTRR for the VRAM */
  242. rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size,
  243. MTRR_TYPE_WRCOMB, 1);
  244. DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
  245. rdev->mc.mc_vram_size >> 20,
  246. (unsigned long long)rdev->mc.aper_size >> 20);
  247. DRM_INFO("RAM width %dbits %cDR\n",
  248. rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S');
  249. return radeon_ttm_init(rdev);
  250. }
  251. void radeon_bo_fini(struct radeon_device *rdev)
  252. {
  253. radeon_ttm_fini(rdev);
  254. }
  255. void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
  256. struct list_head *head)
  257. {
  258. if (lobj->wdomain) {
  259. list_add(&lobj->list, head);
  260. } else {
  261. list_add_tail(&lobj->list, head);
  262. }
  263. }
  264. int radeon_bo_list_reserve(struct list_head *head)
  265. {
  266. struct radeon_bo_list *lobj;
  267. int r;
  268. list_for_each_entry(lobj, head, list){
  269. r = radeon_bo_reserve(lobj->bo, false);
  270. if (unlikely(r != 0))
  271. return r;
  272. }
  273. return 0;
  274. }
  275. void radeon_bo_list_unreserve(struct list_head *head)
  276. {
  277. struct radeon_bo_list *lobj;
  278. list_for_each_entry(lobj, head, list) {
  279. /* only unreserve object we successfully reserved */
  280. if (radeon_bo_is_reserved(lobj->bo))
  281. radeon_bo_unreserve(lobj->bo);
  282. }
  283. }
  284. int radeon_bo_list_validate(struct list_head *head, void *fence)
  285. {
  286. struct radeon_bo_list *lobj;
  287. struct radeon_bo *bo;
  288. struct radeon_fence *old_fence = NULL;
  289. int r;
  290. r = radeon_bo_list_reserve(head);
  291. if (unlikely(r != 0)) {
  292. return r;
  293. }
  294. list_for_each_entry(lobj, head, list) {
  295. bo = lobj->bo;
  296. if (!bo->pin_count) {
  297. if (lobj->wdomain) {
  298. bo->tbo.proposed_placement =
  299. radeon_ttm_flags_from_domain(lobj->wdomain);
  300. } else {
  301. bo->tbo.proposed_placement =
  302. radeon_ttm_flags_from_domain(lobj->rdomain);
  303. }
  304. retry:
  305. r = ttm_buffer_object_validate(&bo->tbo,
  306. bo->tbo.proposed_placement,
  307. true, false);
  308. if (unlikely(r)) {
  309. if (r == -ERESTART)
  310. goto retry;
  311. return r;
  312. }
  313. }
  314. lobj->gpu_offset = radeon_bo_gpu_offset(bo);
  315. lobj->tiling_flags = bo->tiling_flags;
  316. if (fence) {
  317. old_fence = (struct radeon_fence *)bo->tbo.sync_obj;
  318. bo->tbo.sync_obj = radeon_fence_ref(fence);
  319. bo->tbo.sync_obj_arg = NULL;
  320. }
  321. if (old_fence) {
  322. radeon_fence_unref(&old_fence);
  323. }
  324. }
  325. return 0;
  326. }
  327. void radeon_bo_list_unvalidate(struct list_head *head, void *fence)
  328. {
  329. struct radeon_bo_list *lobj;
  330. struct radeon_fence *old_fence;
  331. if (fence)
  332. list_for_each_entry(lobj, head, list) {
  333. old_fence = to_radeon_fence(lobj->bo->tbo.sync_obj);
  334. if (old_fence == fence) {
  335. lobj->bo->tbo.sync_obj = NULL;
  336. radeon_fence_unref(&old_fence);
  337. }
  338. }
  339. radeon_bo_list_unreserve(head);
  340. }
  341. int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
  342. struct vm_area_struct *vma)
  343. {
  344. return ttm_fbdev_mmap(vma, &bo->tbo);
  345. }
  346. static int radeon_bo_get_surface_reg(struct radeon_bo *bo)
  347. {
  348. struct radeon_device *rdev = bo->rdev;
  349. struct radeon_surface_reg *reg;
  350. struct radeon_bo *old_object;
  351. int steal;
  352. int i;
  353. BUG_ON(!atomic_read(&bo->tbo.reserved));
  354. if (!bo->tiling_flags)
  355. return 0;
  356. if (bo->surface_reg >= 0) {
  357. reg = &rdev->surface_regs[bo->surface_reg];
  358. i = bo->surface_reg;
  359. goto out;
  360. }
  361. steal = -1;
  362. for (i = 0; i < RADEON_GEM_MAX_SURFACES; i++) {
  363. reg = &rdev->surface_regs[i];
  364. if (!reg->bo)
  365. break;
  366. old_object = reg->bo;
  367. if (old_object->pin_count == 0)
  368. steal = i;
  369. }
  370. /* if we are all out */
  371. if (i == RADEON_GEM_MAX_SURFACES) {
  372. if (steal == -1)
  373. return -ENOMEM;
  374. /* find someone with a surface reg and nuke their BO */
  375. reg = &rdev->surface_regs[steal];
  376. old_object = reg->bo;
  377. /* blow away the mapping */
  378. DRM_DEBUG("stealing surface reg %d from %p\n", steal, old_object);
  379. ttm_bo_unmap_virtual(&old_object->tbo);
  380. old_object->surface_reg = -1;
  381. i = steal;
  382. }
  383. bo->surface_reg = i;
  384. reg->bo = bo;
  385. out:
  386. radeon_set_surface_reg(rdev, i, bo->tiling_flags, bo->pitch,
  387. bo->tbo.mem.mm_node->start << PAGE_SHIFT,
  388. bo->tbo.num_pages << PAGE_SHIFT);
  389. return 0;
  390. }
  391. static void radeon_bo_clear_surface_reg(struct radeon_bo *bo)
  392. {
  393. struct radeon_device *rdev = bo->rdev;
  394. struct radeon_surface_reg *reg;
  395. if (bo->surface_reg == -1)
  396. return;
  397. reg = &rdev->surface_regs[bo->surface_reg];
  398. radeon_clear_surface_reg(rdev, bo->surface_reg);
  399. reg->bo = NULL;
  400. bo->surface_reg = -1;
  401. }
  402. int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
  403. uint32_t tiling_flags, uint32_t pitch)
  404. {
  405. int r;
  406. r = radeon_bo_reserve(bo, false);
  407. if (unlikely(r != 0))
  408. return r;
  409. bo->tiling_flags = tiling_flags;
  410. bo->pitch = pitch;
  411. radeon_bo_unreserve(bo);
  412. return 0;
  413. }
  414. void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
  415. uint32_t *tiling_flags,
  416. uint32_t *pitch)
  417. {
  418. BUG_ON(!atomic_read(&bo->tbo.reserved));
  419. if (tiling_flags)
  420. *tiling_flags = bo->tiling_flags;
  421. if (pitch)
  422. *pitch = bo->pitch;
  423. }
  424. int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
  425. bool force_drop)
  426. {
  427. BUG_ON(!atomic_read(&bo->tbo.reserved));
  428. if (!(bo->tiling_flags & RADEON_TILING_SURFACE))
  429. return 0;
  430. if (force_drop) {
  431. radeon_bo_clear_surface_reg(bo);
  432. return 0;
  433. }
  434. if (bo->tbo.mem.mem_type != TTM_PL_VRAM) {
  435. if (!has_moved)
  436. return 0;
  437. if (bo->surface_reg >= 0)
  438. radeon_bo_clear_surface_reg(bo);
  439. return 0;
  440. }
  441. if ((bo->surface_reg >= 0) && !has_moved)
  442. return 0;
  443. return radeon_bo_get_surface_reg(bo);
  444. }
  445. void radeon_bo_move_notify(struct ttm_buffer_object *bo,
  446. struct ttm_mem_reg *mem)
  447. {
  448. struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
  449. radeon_bo_check_tiling(rbo, 0, 1);
  450. }
  451. void radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
  452. {
  453. struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
  454. radeon_bo_check_tiling(rbo, 0, 0);
  455. }