fsl_soc.c 31 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398
  1. /*
  2. * FSL SoC setup code
  3. *
  4. * Maintained by Kumar Gala (see MAINTAINERS for contact information)
  5. *
  6. * 2006 (c) MontaVista Software, Inc.
  7. * Vitaly Bordug <vbordug@ru.mvista.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/stddef.h>
  15. #include <linux/kernel.h>
  16. #include <linux/init.h>
  17. #include <linux/errno.h>
  18. #include <linux/major.h>
  19. #include <linux/delay.h>
  20. #include <linux/irq.h>
  21. #include <linux/module.h>
  22. #include <linux/device.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/phy.h>
  26. #include <linux/phy_fixed.h>
  27. #include <linux/spi/spi.h>
  28. #include <linux/fsl_devices.h>
  29. #include <linux/fs_enet_pd.h>
  30. #include <linux/fs_uart_pd.h>
  31. #include <asm/system.h>
  32. #include <asm/atomic.h>
  33. #include <asm/io.h>
  34. #include <asm/irq.h>
  35. #include <asm/time.h>
  36. #include <asm/prom.h>
  37. #include <sysdev/fsl_soc.h>
  38. #include <mm/mmu_decl.h>
  39. #include <asm/cpm2.h>
  40. extern void init_fcc_ioports(struct fs_platform_info*);
  41. extern void init_fec_ioports(struct fs_platform_info*);
  42. extern void init_smc_ioports(struct fs_uart_platform_info*);
  43. static phys_addr_t immrbase = -1;
  44. phys_addr_t get_immrbase(void)
  45. {
  46. struct device_node *soc;
  47. if (immrbase != -1)
  48. return immrbase;
  49. soc = of_find_node_by_type(NULL, "soc");
  50. if (soc) {
  51. int size;
  52. u32 naddr;
  53. const u32 *prop = of_get_property(soc, "#address-cells", &size);
  54. if (prop && size == 4)
  55. naddr = *prop;
  56. else
  57. naddr = 2;
  58. prop = of_get_property(soc, "ranges", &size);
  59. if (prop)
  60. immrbase = of_translate_address(soc, prop + naddr);
  61. of_node_put(soc);
  62. }
  63. return immrbase;
  64. }
  65. EXPORT_SYMBOL(get_immrbase);
  66. #if defined(CONFIG_CPM2) || defined(CONFIG_8xx)
  67. static u32 brgfreq = -1;
  68. u32 get_brgfreq(void)
  69. {
  70. struct device_node *node;
  71. const unsigned int *prop;
  72. int size;
  73. if (brgfreq != -1)
  74. return brgfreq;
  75. node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg");
  76. if (node) {
  77. prop = of_get_property(node, "clock-frequency", &size);
  78. if (prop && size == 4)
  79. brgfreq = *prop;
  80. of_node_put(node);
  81. return brgfreq;
  82. }
  83. /* Legacy device binding -- will go away when no users are left. */
  84. node = of_find_node_by_type(NULL, "cpm");
  85. if (node) {
  86. prop = of_get_property(node, "brg-frequency", &size);
  87. if (prop && size == 4)
  88. brgfreq = *prop;
  89. of_node_put(node);
  90. }
  91. return brgfreq;
  92. }
  93. EXPORT_SYMBOL(get_brgfreq);
  94. static u32 fs_baudrate = -1;
  95. u32 get_baudrate(void)
  96. {
  97. struct device_node *node;
  98. if (fs_baudrate != -1)
  99. return fs_baudrate;
  100. node = of_find_node_by_type(NULL, "serial");
  101. if (node) {
  102. int size;
  103. const unsigned int *prop = of_get_property(node,
  104. "current-speed", &size);
  105. if (prop)
  106. fs_baudrate = *prop;
  107. of_node_put(node);
  108. }
  109. return fs_baudrate;
  110. }
  111. EXPORT_SYMBOL(get_baudrate);
  112. #endif /* CONFIG_CPM2 */
  113. #ifdef CONFIG_FIXED_PHY
  114. static int __init of_add_fixed_phys(void)
  115. {
  116. int ret;
  117. struct device_node *np;
  118. u32 *fixed_link;
  119. struct fixed_phy_status status = {};
  120. for_each_node_by_name(np, "ethernet") {
  121. fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL);
  122. if (!fixed_link)
  123. continue;
  124. status.link = 1;
  125. status.duplex = fixed_link[1];
  126. status.speed = fixed_link[2];
  127. status.pause = fixed_link[3];
  128. status.asym_pause = fixed_link[4];
  129. ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status);
  130. if (ret) {
  131. of_node_put(np);
  132. return ret;
  133. }
  134. }
  135. return 0;
  136. }
  137. arch_initcall(of_add_fixed_phys);
  138. #endif /* CONFIG_FIXED_PHY */
  139. static int __init gfar_mdio_of_init(void)
  140. {
  141. struct device_node *np = NULL;
  142. struct platform_device *mdio_dev;
  143. struct resource res;
  144. int ret;
  145. np = of_find_compatible_node(np, NULL, "fsl,gianfar-mdio");
  146. /* try the deprecated version */
  147. if (!np)
  148. np = of_find_compatible_node(np, "mdio", "gianfar");
  149. if (np) {
  150. int k;
  151. struct device_node *child = NULL;
  152. struct gianfar_mdio_data mdio_data;
  153. memset(&res, 0, sizeof(res));
  154. memset(&mdio_data, 0, sizeof(mdio_data));
  155. ret = of_address_to_resource(np, 0, &res);
  156. if (ret)
  157. goto err;
  158. mdio_dev =
  159. platform_device_register_simple("fsl-gianfar_mdio",
  160. res.start, &res, 1);
  161. if (IS_ERR(mdio_dev)) {
  162. ret = PTR_ERR(mdio_dev);
  163. goto err;
  164. }
  165. for (k = 0; k < 32; k++)
  166. mdio_data.irq[k] = PHY_POLL;
  167. while ((child = of_get_next_child(np, child)) != NULL) {
  168. int irq = irq_of_parse_and_map(child, 0);
  169. if (irq != NO_IRQ) {
  170. const u32 *id = of_get_property(child,
  171. "reg", NULL);
  172. mdio_data.irq[*id] = irq;
  173. }
  174. }
  175. ret =
  176. platform_device_add_data(mdio_dev, &mdio_data,
  177. sizeof(struct gianfar_mdio_data));
  178. if (ret)
  179. goto unreg;
  180. }
  181. of_node_put(np);
  182. return 0;
  183. unreg:
  184. platform_device_unregister(mdio_dev);
  185. err:
  186. of_node_put(np);
  187. return ret;
  188. }
  189. arch_initcall(gfar_mdio_of_init);
  190. static const char *gfar_tx_intr = "tx";
  191. static const char *gfar_rx_intr = "rx";
  192. static const char *gfar_err_intr = "error";
  193. static int __init gfar_of_init(void)
  194. {
  195. struct device_node *np;
  196. unsigned int i;
  197. struct platform_device *gfar_dev;
  198. struct resource res;
  199. int ret;
  200. for (np = NULL, i = 0;
  201. (np = of_find_compatible_node(np, "network", "gianfar")) != NULL;
  202. i++) {
  203. struct resource r[4];
  204. struct device_node *phy, *mdio;
  205. struct gianfar_platform_data gfar_data;
  206. const unsigned int *id;
  207. const char *model;
  208. const char *ctype;
  209. const void *mac_addr;
  210. const phandle *ph;
  211. int n_res = 2;
  212. memset(r, 0, sizeof(r));
  213. memset(&gfar_data, 0, sizeof(gfar_data));
  214. ret = of_address_to_resource(np, 0, &r[0]);
  215. if (ret)
  216. goto err;
  217. of_irq_to_resource(np, 0, &r[1]);
  218. model = of_get_property(np, "model", NULL);
  219. /* If we aren't the FEC we have multiple interrupts */
  220. if (model && strcasecmp(model, "FEC")) {
  221. r[1].name = gfar_tx_intr;
  222. r[2].name = gfar_rx_intr;
  223. of_irq_to_resource(np, 1, &r[2]);
  224. r[3].name = gfar_err_intr;
  225. of_irq_to_resource(np, 2, &r[3]);
  226. n_res += 2;
  227. }
  228. gfar_dev =
  229. platform_device_register_simple("fsl-gianfar", i, &r[0],
  230. n_res);
  231. if (IS_ERR(gfar_dev)) {
  232. ret = PTR_ERR(gfar_dev);
  233. goto err;
  234. }
  235. mac_addr = of_get_mac_address(np);
  236. if (mac_addr)
  237. memcpy(gfar_data.mac_addr, mac_addr, 6);
  238. if (model && !strcasecmp(model, "TSEC"))
  239. gfar_data.device_flags =
  240. FSL_GIANFAR_DEV_HAS_GIGABIT |
  241. FSL_GIANFAR_DEV_HAS_COALESCE |
  242. FSL_GIANFAR_DEV_HAS_RMON |
  243. FSL_GIANFAR_DEV_HAS_MULTI_INTR;
  244. if (model && !strcasecmp(model, "eTSEC"))
  245. gfar_data.device_flags =
  246. FSL_GIANFAR_DEV_HAS_GIGABIT |
  247. FSL_GIANFAR_DEV_HAS_COALESCE |
  248. FSL_GIANFAR_DEV_HAS_RMON |
  249. FSL_GIANFAR_DEV_HAS_MULTI_INTR |
  250. FSL_GIANFAR_DEV_HAS_CSUM |
  251. FSL_GIANFAR_DEV_HAS_VLAN |
  252. FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
  253. ctype = of_get_property(np, "phy-connection-type", NULL);
  254. /* We only care about rgmii-id. The rest are autodetected */
  255. if (ctype && !strcmp(ctype, "rgmii-id"))
  256. gfar_data.interface = PHY_INTERFACE_MODE_RGMII_ID;
  257. else
  258. gfar_data.interface = PHY_INTERFACE_MODE_MII;
  259. ph = of_get_property(np, "phy-handle", NULL);
  260. if (ph == NULL) {
  261. u32 *fixed_link;
  262. fixed_link = (u32 *)of_get_property(np, "fixed-link",
  263. NULL);
  264. if (!fixed_link) {
  265. ret = -ENODEV;
  266. goto unreg;
  267. }
  268. gfar_data.bus_id = 0;
  269. gfar_data.phy_id = fixed_link[0];
  270. } else {
  271. phy = of_find_node_by_phandle(*ph);
  272. if (phy == NULL) {
  273. ret = -ENODEV;
  274. goto unreg;
  275. }
  276. mdio = of_get_parent(phy);
  277. id = of_get_property(phy, "reg", NULL);
  278. ret = of_address_to_resource(mdio, 0, &res);
  279. if (ret) {
  280. of_node_put(phy);
  281. of_node_put(mdio);
  282. goto unreg;
  283. }
  284. gfar_data.phy_id = *id;
  285. gfar_data.bus_id = res.start;
  286. of_node_put(phy);
  287. of_node_put(mdio);
  288. }
  289. ret =
  290. platform_device_add_data(gfar_dev, &gfar_data,
  291. sizeof(struct
  292. gianfar_platform_data));
  293. if (ret)
  294. goto unreg;
  295. }
  296. return 0;
  297. unreg:
  298. platform_device_unregister(gfar_dev);
  299. err:
  300. return ret;
  301. }
  302. arch_initcall(gfar_of_init);
  303. #ifdef CONFIG_I2C_BOARDINFO
  304. #include <linux/i2c.h>
  305. struct i2c_driver_device {
  306. char *of_device;
  307. char *i2c_driver;
  308. char *i2c_type;
  309. };
  310. static struct i2c_driver_device i2c_devices[] __initdata = {
  311. {"ricoh,rs5c372a", "rtc-rs5c372", "rs5c372a",},
  312. {"ricoh,rs5c372b", "rtc-rs5c372", "rs5c372b",},
  313. {"ricoh,rv5c386", "rtc-rs5c372", "rv5c386",},
  314. {"ricoh,rv5c387a", "rtc-rs5c372", "rv5c387a",},
  315. {"dallas,ds1307", "rtc-ds1307", "ds1307",},
  316. {"dallas,ds1337", "rtc-ds1307", "ds1337",},
  317. {"dallas,ds1338", "rtc-ds1307", "ds1338",},
  318. {"dallas,ds1339", "rtc-ds1307", "ds1339",},
  319. {"dallas,ds1340", "rtc-ds1307", "ds1340",},
  320. {"stm,m41t00", "rtc-ds1307", "m41t00"},
  321. {"dallas,ds1374", "rtc-ds1374", "rtc-ds1374",},
  322. };
  323. static int __init of_find_i2c_driver(struct device_node *node,
  324. struct i2c_board_info *info)
  325. {
  326. int i;
  327. for (i = 0; i < ARRAY_SIZE(i2c_devices); i++) {
  328. if (!of_device_is_compatible(node, i2c_devices[i].of_device))
  329. continue;
  330. if (strlcpy(info->driver_name, i2c_devices[i].i2c_driver,
  331. KOBJ_NAME_LEN) >= KOBJ_NAME_LEN ||
  332. strlcpy(info->type, i2c_devices[i].i2c_type,
  333. I2C_NAME_SIZE) >= I2C_NAME_SIZE)
  334. return -ENOMEM;
  335. return 0;
  336. }
  337. return -ENODEV;
  338. }
  339. static void __init of_register_i2c_devices(struct device_node *adap_node,
  340. int bus_num)
  341. {
  342. struct device_node *node = NULL;
  343. while ((node = of_get_next_child(adap_node, node))) {
  344. struct i2c_board_info info = {};
  345. const u32 *addr;
  346. int len;
  347. addr = of_get_property(node, "reg", &len);
  348. if (!addr || len < sizeof(int) || *addr > (1 << 10) - 1) {
  349. printk(KERN_WARNING "fsl_soc.c: invalid i2c device entry\n");
  350. continue;
  351. }
  352. info.irq = irq_of_parse_and_map(node, 0);
  353. if (info.irq == NO_IRQ)
  354. info.irq = -1;
  355. if (of_find_i2c_driver(node, &info) < 0)
  356. continue;
  357. info.addr = *addr;
  358. i2c_register_board_info(bus_num, &info, 1);
  359. }
  360. }
  361. static int __init fsl_i2c_of_init(void)
  362. {
  363. struct device_node *np;
  364. unsigned int i = 0;
  365. struct platform_device *i2c_dev;
  366. int ret;
  367. for_each_compatible_node(np, NULL, "fsl-i2c") {
  368. struct resource r[2];
  369. struct fsl_i2c_platform_data i2c_data;
  370. const unsigned char *flags = NULL;
  371. memset(&r, 0, sizeof(r));
  372. memset(&i2c_data, 0, sizeof(i2c_data));
  373. ret = of_address_to_resource(np, 0, &r[0]);
  374. if (ret)
  375. goto err;
  376. of_irq_to_resource(np, 0, &r[1]);
  377. i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2);
  378. if (IS_ERR(i2c_dev)) {
  379. ret = PTR_ERR(i2c_dev);
  380. goto err;
  381. }
  382. i2c_data.device_flags = 0;
  383. flags = of_get_property(np, "dfsrr", NULL);
  384. if (flags)
  385. i2c_data.device_flags |= FSL_I2C_DEV_SEPARATE_DFSRR;
  386. flags = of_get_property(np, "fsl5200-clocking", NULL);
  387. if (flags)
  388. i2c_data.device_flags |= FSL_I2C_DEV_CLOCK_5200;
  389. ret =
  390. platform_device_add_data(i2c_dev, &i2c_data,
  391. sizeof(struct
  392. fsl_i2c_platform_data));
  393. if (ret)
  394. goto unreg;
  395. of_register_i2c_devices(np, i++);
  396. }
  397. return 0;
  398. unreg:
  399. platform_device_unregister(i2c_dev);
  400. err:
  401. return ret;
  402. }
  403. arch_initcall(fsl_i2c_of_init);
  404. #endif
  405. #ifdef CONFIG_PPC_83xx
  406. static int __init mpc83xx_wdt_init(void)
  407. {
  408. struct resource r;
  409. struct device_node *soc, *np;
  410. struct platform_device *dev;
  411. const unsigned int *freq;
  412. int ret;
  413. np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
  414. if (!np) {
  415. ret = -ENODEV;
  416. goto nodev;
  417. }
  418. soc = of_find_node_by_type(NULL, "soc");
  419. if (!soc) {
  420. ret = -ENODEV;
  421. goto nosoc;
  422. }
  423. freq = of_get_property(soc, "bus-frequency", NULL);
  424. if (!freq) {
  425. ret = -ENODEV;
  426. goto err;
  427. }
  428. memset(&r, 0, sizeof(r));
  429. ret = of_address_to_resource(np, 0, &r);
  430. if (ret)
  431. goto err;
  432. dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
  433. if (IS_ERR(dev)) {
  434. ret = PTR_ERR(dev);
  435. goto err;
  436. }
  437. ret = platform_device_add_data(dev, freq, sizeof(int));
  438. if (ret)
  439. goto unreg;
  440. of_node_put(soc);
  441. of_node_put(np);
  442. return 0;
  443. unreg:
  444. platform_device_unregister(dev);
  445. err:
  446. of_node_put(soc);
  447. nosoc:
  448. of_node_put(np);
  449. nodev:
  450. return ret;
  451. }
  452. arch_initcall(mpc83xx_wdt_init);
  453. #endif
  454. static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
  455. {
  456. if (!phy_type)
  457. return FSL_USB2_PHY_NONE;
  458. if (!strcasecmp(phy_type, "ulpi"))
  459. return FSL_USB2_PHY_ULPI;
  460. if (!strcasecmp(phy_type, "utmi"))
  461. return FSL_USB2_PHY_UTMI;
  462. if (!strcasecmp(phy_type, "utmi_wide"))
  463. return FSL_USB2_PHY_UTMI_WIDE;
  464. if (!strcasecmp(phy_type, "serial"))
  465. return FSL_USB2_PHY_SERIAL;
  466. return FSL_USB2_PHY_NONE;
  467. }
  468. static int __init fsl_usb_of_init(void)
  469. {
  470. struct device_node *np;
  471. unsigned int i = 0;
  472. struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL,
  473. *usb_dev_dr_client = NULL;
  474. int ret;
  475. for_each_compatible_node(np, NULL, "fsl-usb2-mph") {
  476. struct resource r[2];
  477. struct fsl_usb2_platform_data usb_data;
  478. const unsigned char *prop = NULL;
  479. memset(&r, 0, sizeof(r));
  480. memset(&usb_data, 0, sizeof(usb_data));
  481. ret = of_address_to_resource(np, 0, &r[0]);
  482. if (ret)
  483. goto err;
  484. of_irq_to_resource(np, 0, &r[1]);
  485. usb_dev_mph =
  486. platform_device_register_simple("fsl-ehci", i, r, 2);
  487. if (IS_ERR(usb_dev_mph)) {
  488. ret = PTR_ERR(usb_dev_mph);
  489. goto err;
  490. }
  491. usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL;
  492. usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask;
  493. usb_data.operating_mode = FSL_USB2_MPH_HOST;
  494. prop = of_get_property(np, "port0", NULL);
  495. if (prop)
  496. usb_data.port_enables |= FSL_USB2_PORT0_ENABLED;
  497. prop = of_get_property(np, "port1", NULL);
  498. if (prop)
  499. usb_data.port_enables |= FSL_USB2_PORT1_ENABLED;
  500. prop = of_get_property(np, "phy_type", NULL);
  501. usb_data.phy_mode = determine_usb_phy(prop);
  502. ret =
  503. platform_device_add_data(usb_dev_mph, &usb_data,
  504. sizeof(struct
  505. fsl_usb2_platform_data));
  506. if (ret)
  507. goto unreg_mph;
  508. i++;
  509. }
  510. for_each_compatible_node(np, NULL, "fsl-usb2-dr") {
  511. struct resource r[2];
  512. struct fsl_usb2_platform_data usb_data;
  513. const unsigned char *prop = NULL;
  514. memset(&r, 0, sizeof(r));
  515. memset(&usb_data, 0, sizeof(usb_data));
  516. ret = of_address_to_resource(np, 0, &r[0]);
  517. if (ret)
  518. goto unreg_mph;
  519. of_irq_to_resource(np, 0, &r[1]);
  520. prop = of_get_property(np, "dr_mode", NULL);
  521. if (!prop || !strcmp(prop, "host")) {
  522. usb_data.operating_mode = FSL_USB2_DR_HOST;
  523. usb_dev_dr_host = platform_device_register_simple(
  524. "fsl-ehci", i, r, 2);
  525. if (IS_ERR(usb_dev_dr_host)) {
  526. ret = PTR_ERR(usb_dev_dr_host);
  527. goto err;
  528. }
  529. } else if (prop && !strcmp(prop, "peripheral")) {
  530. usb_data.operating_mode = FSL_USB2_DR_DEVICE;
  531. usb_dev_dr_client = platform_device_register_simple(
  532. "fsl-usb2-udc", i, r, 2);
  533. if (IS_ERR(usb_dev_dr_client)) {
  534. ret = PTR_ERR(usb_dev_dr_client);
  535. goto err;
  536. }
  537. } else if (prop && !strcmp(prop, "otg")) {
  538. usb_data.operating_mode = FSL_USB2_DR_OTG;
  539. usb_dev_dr_host = platform_device_register_simple(
  540. "fsl-ehci", i, r, 2);
  541. if (IS_ERR(usb_dev_dr_host)) {
  542. ret = PTR_ERR(usb_dev_dr_host);
  543. goto err;
  544. }
  545. usb_dev_dr_client = platform_device_register_simple(
  546. "fsl-usb2-udc", i, r, 2);
  547. if (IS_ERR(usb_dev_dr_client)) {
  548. ret = PTR_ERR(usb_dev_dr_client);
  549. goto err;
  550. }
  551. } else {
  552. ret = -EINVAL;
  553. goto err;
  554. }
  555. prop = of_get_property(np, "phy_type", NULL);
  556. usb_data.phy_mode = determine_usb_phy(prop);
  557. if (usb_dev_dr_host) {
  558. usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL;
  559. usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host->
  560. dev.coherent_dma_mask;
  561. if ((ret = platform_device_add_data(usb_dev_dr_host,
  562. &usb_data, sizeof(struct
  563. fsl_usb2_platform_data))))
  564. goto unreg_dr;
  565. }
  566. if (usb_dev_dr_client) {
  567. usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL;
  568. usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client->
  569. dev.coherent_dma_mask;
  570. if ((ret = platform_device_add_data(usb_dev_dr_client,
  571. &usb_data, sizeof(struct
  572. fsl_usb2_platform_data))))
  573. goto unreg_dr;
  574. }
  575. i++;
  576. }
  577. return 0;
  578. unreg_dr:
  579. if (usb_dev_dr_host)
  580. platform_device_unregister(usb_dev_dr_host);
  581. if (usb_dev_dr_client)
  582. platform_device_unregister(usb_dev_dr_client);
  583. unreg_mph:
  584. if (usb_dev_mph)
  585. platform_device_unregister(usb_dev_mph);
  586. err:
  587. return ret;
  588. }
  589. arch_initcall(fsl_usb_of_init);
  590. #ifndef CONFIG_PPC_CPM_NEW_BINDING
  591. #ifdef CONFIG_CPM2
  592. extern void init_scc_ioports(struct fs_uart_platform_info*);
  593. static const char fcc_regs[] = "fcc_regs";
  594. static const char fcc_regs_c[] = "fcc_regs_c";
  595. static const char fcc_pram[] = "fcc_pram";
  596. static char bus_id[9][BUS_ID_SIZE];
  597. static int __init fs_enet_of_init(void)
  598. {
  599. struct device_node *np;
  600. unsigned int i;
  601. struct platform_device *fs_enet_dev;
  602. struct resource res;
  603. int ret;
  604. for (np = NULL, i = 0;
  605. (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL;
  606. i++) {
  607. struct resource r[4];
  608. struct device_node *phy, *mdio;
  609. struct fs_platform_info fs_enet_data;
  610. const unsigned int *id, *phy_addr, *phy_irq;
  611. const void *mac_addr;
  612. const phandle *ph;
  613. const char *model;
  614. memset(r, 0, sizeof(r));
  615. memset(&fs_enet_data, 0, sizeof(fs_enet_data));
  616. ret = of_address_to_resource(np, 0, &r[0]);
  617. if (ret)
  618. goto err;
  619. r[0].name = fcc_regs;
  620. ret = of_address_to_resource(np, 1, &r[1]);
  621. if (ret)
  622. goto err;
  623. r[1].name = fcc_pram;
  624. ret = of_address_to_resource(np, 2, &r[2]);
  625. if (ret)
  626. goto err;
  627. r[2].name = fcc_regs_c;
  628. fs_enet_data.fcc_regs_c = r[2].start;
  629. of_irq_to_resource(np, 0, &r[3]);
  630. fs_enet_dev =
  631. platform_device_register_simple("fsl-cpm-fcc", i, &r[0], 4);
  632. if (IS_ERR(fs_enet_dev)) {
  633. ret = PTR_ERR(fs_enet_dev);
  634. goto err;
  635. }
  636. model = of_get_property(np, "model", NULL);
  637. if (model == NULL) {
  638. ret = -ENODEV;
  639. goto unreg;
  640. }
  641. mac_addr = of_get_mac_address(np);
  642. if (mac_addr)
  643. memcpy(fs_enet_data.macaddr, mac_addr, 6);
  644. ph = of_get_property(np, "phy-handle", NULL);
  645. phy = of_find_node_by_phandle(*ph);
  646. if (phy == NULL) {
  647. ret = -ENODEV;
  648. goto unreg;
  649. }
  650. phy_addr = of_get_property(phy, "reg", NULL);
  651. fs_enet_data.phy_addr = *phy_addr;
  652. phy_irq = of_get_property(phy, "interrupts", NULL);
  653. id = of_get_property(np, "device-id", NULL);
  654. fs_enet_data.fs_no = *id;
  655. strcpy(fs_enet_data.fs_type, model);
  656. mdio = of_get_parent(phy);
  657. ret = of_address_to_resource(mdio, 0, &res);
  658. if (ret) {
  659. of_node_put(phy);
  660. of_node_put(mdio);
  661. goto unreg;
  662. }
  663. fs_enet_data.clk_rx = *((u32 *)of_get_property(np,
  664. "rx-clock", NULL));
  665. fs_enet_data.clk_tx = *((u32 *)of_get_property(np,
  666. "tx-clock", NULL));
  667. if (strstr(model, "FCC")) {
  668. int fcc_index = *id - 1;
  669. const unsigned char *mdio_bb_prop;
  670. fs_enet_data.dpram_offset = (u32)cpm_dpram_addr(0);
  671. fs_enet_data.rx_ring = 32;
  672. fs_enet_data.tx_ring = 32;
  673. fs_enet_data.rx_copybreak = 240;
  674. fs_enet_data.use_napi = 0;
  675. fs_enet_data.napi_weight = 17;
  676. fs_enet_data.mem_offset = FCC_MEM_OFFSET(fcc_index);
  677. fs_enet_data.cp_page = CPM_CR_FCC_PAGE(fcc_index);
  678. fs_enet_data.cp_block = CPM_CR_FCC_SBLOCK(fcc_index);
  679. snprintf((char*)&bus_id[(*id)], BUS_ID_SIZE, "%x:%02x",
  680. (u32)res.start, fs_enet_data.phy_addr);
  681. fs_enet_data.bus_id = (char*)&bus_id[(*id)];
  682. fs_enet_data.init_ioports = init_fcc_ioports;
  683. mdio_bb_prop = of_get_property(phy, "bitbang", NULL);
  684. if (mdio_bb_prop) {
  685. struct platform_device *fs_enet_mdio_bb_dev;
  686. struct fs_mii_bb_platform_info fs_enet_mdio_bb_data;
  687. fs_enet_mdio_bb_dev =
  688. platform_device_register_simple("fsl-bb-mdio",
  689. i, NULL, 0);
  690. memset(&fs_enet_mdio_bb_data, 0,
  691. sizeof(struct fs_mii_bb_platform_info));
  692. fs_enet_mdio_bb_data.mdio_dat.bit =
  693. mdio_bb_prop[0];
  694. fs_enet_mdio_bb_data.mdio_dir.bit =
  695. mdio_bb_prop[1];
  696. fs_enet_mdio_bb_data.mdc_dat.bit =
  697. mdio_bb_prop[2];
  698. fs_enet_mdio_bb_data.mdio_port =
  699. mdio_bb_prop[3];
  700. fs_enet_mdio_bb_data.mdc_port =
  701. mdio_bb_prop[4];
  702. fs_enet_mdio_bb_data.delay =
  703. mdio_bb_prop[5];
  704. fs_enet_mdio_bb_data.irq[0] = phy_irq[0];
  705. fs_enet_mdio_bb_data.irq[1] = -1;
  706. fs_enet_mdio_bb_data.irq[2] = -1;
  707. fs_enet_mdio_bb_data.irq[3] = phy_irq[0];
  708. fs_enet_mdio_bb_data.irq[31] = -1;
  709. fs_enet_mdio_bb_data.mdio_dat.offset =
  710. (u32)&cpm2_immr->im_ioport.iop_pdatc;
  711. fs_enet_mdio_bb_data.mdio_dir.offset =
  712. (u32)&cpm2_immr->im_ioport.iop_pdirc;
  713. fs_enet_mdio_bb_data.mdc_dat.offset =
  714. (u32)&cpm2_immr->im_ioport.iop_pdatc;
  715. ret = platform_device_add_data(
  716. fs_enet_mdio_bb_dev,
  717. &fs_enet_mdio_bb_data,
  718. sizeof(struct fs_mii_bb_platform_info));
  719. if (ret)
  720. goto unreg;
  721. }
  722. of_node_put(phy);
  723. of_node_put(mdio);
  724. ret = platform_device_add_data(fs_enet_dev, &fs_enet_data,
  725. sizeof(struct
  726. fs_platform_info));
  727. if (ret)
  728. goto unreg;
  729. }
  730. }
  731. return 0;
  732. unreg:
  733. platform_device_unregister(fs_enet_dev);
  734. err:
  735. return ret;
  736. }
  737. arch_initcall(fs_enet_of_init);
  738. static const char scc_regs[] = "regs";
  739. static const char scc_pram[] = "pram";
  740. static int __init cpm_uart_of_init(void)
  741. {
  742. struct device_node *np;
  743. unsigned int i;
  744. struct platform_device *cpm_uart_dev;
  745. int ret;
  746. for (np = NULL, i = 0;
  747. (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL;
  748. i++) {
  749. struct resource r[3];
  750. struct fs_uart_platform_info cpm_uart_data;
  751. const int *id;
  752. const char *model;
  753. memset(r, 0, sizeof(r));
  754. memset(&cpm_uart_data, 0, sizeof(cpm_uart_data));
  755. ret = of_address_to_resource(np, 0, &r[0]);
  756. if (ret)
  757. goto err;
  758. r[0].name = scc_regs;
  759. ret = of_address_to_resource(np, 1, &r[1]);
  760. if (ret)
  761. goto err;
  762. r[1].name = scc_pram;
  763. of_irq_to_resource(np, 0, &r[2]);
  764. cpm_uart_dev =
  765. platform_device_register_simple("fsl-cpm-scc:uart", i, &r[0], 3);
  766. if (IS_ERR(cpm_uart_dev)) {
  767. ret = PTR_ERR(cpm_uart_dev);
  768. goto err;
  769. }
  770. id = of_get_property(np, "device-id", NULL);
  771. cpm_uart_data.fs_no = *id;
  772. model = of_get_property(np, "model", NULL);
  773. strcpy(cpm_uart_data.fs_type, model);
  774. cpm_uart_data.uart_clk = ppc_proc_freq;
  775. cpm_uart_data.tx_num_fifo = 4;
  776. cpm_uart_data.tx_buf_size = 32;
  777. cpm_uart_data.rx_num_fifo = 4;
  778. cpm_uart_data.rx_buf_size = 32;
  779. cpm_uart_data.clk_rx = *((u32 *)of_get_property(np,
  780. "rx-clock", NULL));
  781. cpm_uart_data.clk_tx = *((u32 *)of_get_property(np,
  782. "tx-clock", NULL));
  783. ret =
  784. platform_device_add_data(cpm_uart_dev, &cpm_uart_data,
  785. sizeof(struct
  786. fs_uart_platform_info));
  787. if (ret)
  788. goto unreg;
  789. }
  790. return 0;
  791. unreg:
  792. platform_device_unregister(cpm_uart_dev);
  793. err:
  794. return ret;
  795. }
  796. arch_initcall(cpm_uart_of_init);
  797. #endif /* CONFIG_CPM2 */
  798. #ifdef CONFIG_8xx
  799. extern void init_scc_ioports(struct fs_platform_info*);
  800. extern int platform_device_skip(const char *model, int id);
  801. static int __init fs_enet_mdio_of_init(void)
  802. {
  803. struct device_node *np;
  804. unsigned int i;
  805. struct platform_device *mdio_dev;
  806. struct resource res;
  807. int ret;
  808. for (np = NULL, i = 0;
  809. (np = of_find_compatible_node(np, "mdio", "fs_enet")) != NULL;
  810. i++) {
  811. struct fs_mii_fec_platform_info mdio_data;
  812. memset(&res, 0, sizeof(res));
  813. memset(&mdio_data, 0, sizeof(mdio_data));
  814. ret = of_address_to_resource(np, 0, &res);
  815. if (ret)
  816. goto err;
  817. mdio_dev =
  818. platform_device_register_simple("fsl-cpm-fec-mdio",
  819. res.start, &res, 1);
  820. if (IS_ERR(mdio_dev)) {
  821. ret = PTR_ERR(mdio_dev);
  822. goto err;
  823. }
  824. mdio_data.mii_speed = ((((ppc_proc_freq + 4999999) / 2500000) / 2) & 0x3F) << 1;
  825. ret =
  826. platform_device_add_data(mdio_dev, &mdio_data,
  827. sizeof(struct fs_mii_fec_platform_info));
  828. if (ret)
  829. goto unreg;
  830. }
  831. return 0;
  832. unreg:
  833. platform_device_unregister(mdio_dev);
  834. err:
  835. return ret;
  836. }
  837. arch_initcall(fs_enet_mdio_of_init);
  838. static const char *enet_regs = "regs";
  839. static const char *enet_pram = "pram";
  840. static const char *enet_irq = "interrupt";
  841. static char bus_id[9][BUS_ID_SIZE];
  842. static int __init fs_enet_of_init(void)
  843. {
  844. struct device_node *np;
  845. unsigned int i;
  846. struct platform_device *fs_enet_dev = NULL;
  847. struct resource res;
  848. int ret;
  849. for (np = NULL, i = 0;
  850. (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL;
  851. i++) {
  852. struct resource r[4];
  853. struct device_node *phy = NULL, *mdio = NULL;
  854. struct fs_platform_info fs_enet_data;
  855. const unsigned int *id;
  856. const unsigned int *phy_addr;
  857. const void *mac_addr;
  858. const phandle *ph;
  859. const char *model;
  860. memset(r, 0, sizeof(r));
  861. memset(&fs_enet_data, 0, sizeof(fs_enet_data));
  862. model = of_get_property(np, "model", NULL);
  863. if (model == NULL) {
  864. ret = -ENODEV;
  865. goto unreg;
  866. }
  867. id = of_get_property(np, "device-id", NULL);
  868. fs_enet_data.fs_no = *id;
  869. if (platform_device_skip(model, *id))
  870. continue;
  871. ret = of_address_to_resource(np, 0, &r[0]);
  872. if (ret)
  873. goto err;
  874. r[0].name = enet_regs;
  875. mac_addr = of_get_mac_address(np);
  876. if (mac_addr)
  877. memcpy(fs_enet_data.macaddr, mac_addr, 6);
  878. ph = of_get_property(np, "phy-handle", NULL);
  879. if (ph != NULL)
  880. phy = of_find_node_by_phandle(*ph);
  881. if (phy != NULL) {
  882. phy_addr = of_get_property(phy, "reg", NULL);
  883. fs_enet_data.phy_addr = *phy_addr;
  884. fs_enet_data.has_phy = 1;
  885. mdio = of_get_parent(phy);
  886. ret = of_address_to_resource(mdio, 0, &res);
  887. if (ret) {
  888. of_node_put(phy);
  889. of_node_put(mdio);
  890. goto unreg;
  891. }
  892. }
  893. model = of_get_property(np, "model", NULL);
  894. strcpy(fs_enet_data.fs_type, model);
  895. if (strstr(model, "FEC")) {
  896. r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
  897. r[1].flags = IORESOURCE_IRQ;
  898. r[1].name = enet_irq;
  899. fs_enet_dev =
  900. platform_device_register_simple("fsl-cpm-fec", i, &r[0], 2);
  901. if (IS_ERR(fs_enet_dev)) {
  902. ret = PTR_ERR(fs_enet_dev);
  903. goto err;
  904. }
  905. fs_enet_data.rx_ring = 128;
  906. fs_enet_data.tx_ring = 16;
  907. fs_enet_data.rx_copybreak = 240;
  908. fs_enet_data.use_napi = 1;
  909. fs_enet_data.napi_weight = 17;
  910. snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%x:%02x",
  911. (u32)res.start, fs_enet_data.phy_addr);
  912. fs_enet_data.bus_id = (char*)&bus_id[i];
  913. fs_enet_data.init_ioports = init_fec_ioports;
  914. }
  915. if (strstr(model, "SCC")) {
  916. ret = of_address_to_resource(np, 1, &r[1]);
  917. if (ret)
  918. goto err;
  919. r[1].name = enet_pram;
  920. r[2].start = r[2].end = irq_of_parse_and_map(np, 0);
  921. r[2].flags = IORESOURCE_IRQ;
  922. r[2].name = enet_irq;
  923. fs_enet_dev =
  924. platform_device_register_simple("fsl-cpm-scc", i, &r[0], 3);
  925. if (IS_ERR(fs_enet_dev)) {
  926. ret = PTR_ERR(fs_enet_dev);
  927. goto err;
  928. }
  929. fs_enet_data.rx_ring = 64;
  930. fs_enet_data.tx_ring = 8;
  931. fs_enet_data.rx_copybreak = 240;
  932. fs_enet_data.use_napi = 1;
  933. fs_enet_data.napi_weight = 17;
  934. snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%s", "fixed@10:1");
  935. fs_enet_data.bus_id = (char*)&bus_id[i];
  936. fs_enet_data.init_ioports = init_scc_ioports;
  937. }
  938. of_node_put(phy);
  939. of_node_put(mdio);
  940. ret = platform_device_add_data(fs_enet_dev, &fs_enet_data,
  941. sizeof(struct
  942. fs_platform_info));
  943. if (ret)
  944. goto unreg;
  945. }
  946. return 0;
  947. unreg:
  948. platform_device_unregister(fs_enet_dev);
  949. err:
  950. return ret;
  951. }
  952. arch_initcall(fs_enet_of_init);
  953. static int __init fsl_pcmcia_of_init(void)
  954. {
  955. struct device_node *np;
  956. /*
  957. * Register all the devices which type is "pcmcia"
  958. */
  959. for_each_compatible_node(np, "pcmcia", "fsl,pq-pcmcia")
  960. of_platform_device_create(np, "m8xx-pcmcia", NULL);
  961. return 0;
  962. }
  963. arch_initcall(fsl_pcmcia_of_init);
  964. static const char *smc_regs = "regs";
  965. static const char *smc_pram = "pram";
  966. static int __init cpm_smc_uart_of_init(void)
  967. {
  968. struct device_node *np;
  969. unsigned int i;
  970. struct platform_device *cpm_uart_dev;
  971. int ret;
  972. for (np = NULL, i = 0;
  973. (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL;
  974. i++) {
  975. struct resource r[3];
  976. struct fs_uart_platform_info cpm_uart_data;
  977. const int *id;
  978. const char *model;
  979. memset(r, 0, sizeof(r));
  980. memset(&cpm_uart_data, 0, sizeof(cpm_uart_data));
  981. ret = of_address_to_resource(np, 0, &r[0]);
  982. if (ret)
  983. goto err;
  984. r[0].name = smc_regs;
  985. ret = of_address_to_resource(np, 1, &r[1]);
  986. if (ret)
  987. goto err;
  988. r[1].name = smc_pram;
  989. r[2].start = r[2].end = irq_of_parse_and_map(np, 0);
  990. r[2].flags = IORESOURCE_IRQ;
  991. cpm_uart_dev =
  992. platform_device_register_simple("fsl-cpm-smc:uart", i, &r[0], 3);
  993. if (IS_ERR(cpm_uart_dev)) {
  994. ret = PTR_ERR(cpm_uart_dev);
  995. goto err;
  996. }
  997. model = of_get_property(np, "model", NULL);
  998. strcpy(cpm_uart_data.fs_type, model);
  999. id = of_get_property(np, "device-id", NULL);
  1000. cpm_uart_data.fs_no = *id;
  1001. cpm_uart_data.uart_clk = ppc_proc_freq;
  1002. cpm_uart_data.tx_num_fifo = 4;
  1003. cpm_uart_data.tx_buf_size = 32;
  1004. cpm_uart_data.rx_num_fifo = 4;
  1005. cpm_uart_data.rx_buf_size = 32;
  1006. ret =
  1007. platform_device_add_data(cpm_uart_dev, &cpm_uart_data,
  1008. sizeof(struct
  1009. fs_uart_platform_info));
  1010. if (ret)
  1011. goto unreg;
  1012. }
  1013. return 0;
  1014. unreg:
  1015. platform_device_unregister(cpm_uart_dev);
  1016. err:
  1017. return ret;
  1018. }
  1019. arch_initcall(cpm_smc_uart_of_init);
  1020. #endif /* CONFIG_8xx */
  1021. #endif /* CONFIG_PPC_CPM_NEW_BINDING */
  1022. int __init fsl_spi_init(struct spi_board_info *board_infos,
  1023. unsigned int num_board_infos,
  1024. void (*activate_cs)(u8 cs, u8 polarity),
  1025. void (*deactivate_cs)(u8 cs, u8 polarity))
  1026. {
  1027. struct device_node *np;
  1028. unsigned int i;
  1029. const u32 *sysclk;
  1030. /* SPI controller is either clocked from QE or SoC clock */
  1031. np = of_find_compatible_node(NULL, NULL, "fsl,qe");
  1032. if (!np)
  1033. np = of_find_node_by_type(NULL, "qe");
  1034. if (!np)
  1035. np = of_find_node_by_type(NULL, "soc");
  1036. if (!np)
  1037. return -ENODEV;
  1038. sysclk = of_get_property(np, "bus-frequency", NULL);
  1039. if (!sysclk)
  1040. return -ENODEV;
  1041. for (np = NULL, i = 1;
  1042. (np = of_find_compatible_node(np, "spi", "fsl_spi")) != NULL;
  1043. i++) {
  1044. int ret = 0;
  1045. unsigned int j;
  1046. const void *prop;
  1047. struct resource res[2];
  1048. struct platform_device *pdev;
  1049. struct fsl_spi_platform_data pdata = {
  1050. .activate_cs = activate_cs,
  1051. .deactivate_cs = deactivate_cs,
  1052. };
  1053. memset(res, 0, sizeof(res));
  1054. pdata.sysclk = *sysclk;
  1055. prop = of_get_property(np, "reg", NULL);
  1056. if (!prop)
  1057. goto err;
  1058. pdata.bus_num = *(u32 *)prop;
  1059. prop = of_get_property(np, "mode", NULL);
  1060. if (prop && !strcmp(prop, "cpu-qe"))
  1061. pdata.qe_mode = 1;
  1062. for (j = 0; j < num_board_infos; j++) {
  1063. if (board_infos[j].bus_num == pdata.bus_num)
  1064. pdata.max_chipselect++;
  1065. }
  1066. if (!pdata.max_chipselect)
  1067. goto err;
  1068. ret = of_address_to_resource(np, 0, &res[0]);
  1069. if (ret)
  1070. goto err;
  1071. ret = of_irq_to_resource(np, 0, &res[1]);
  1072. if (ret == NO_IRQ)
  1073. goto err;
  1074. pdev = platform_device_alloc("mpc83xx_spi", i);
  1075. if (!pdev)
  1076. goto err;
  1077. ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
  1078. if (ret)
  1079. goto unreg;
  1080. ret = platform_device_add_resources(pdev, res,
  1081. ARRAY_SIZE(res));
  1082. if (ret)
  1083. goto unreg;
  1084. ret = platform_device_register(pdev);
  1085. if (ret)
  1086. goto unreg;
  1087. continue;
  1088. unreg:
  1089. platform_device_del(pdev);
  1090. err:
  1091. continue;
  1092. }
  1093. return spi_register_board_info(board_infos, num_board_infos);
  1094. }
  1095. #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
  1096. static __be32 __iomem *rstcr;
  1097. static int __init setup_rstcr(void)
  1098. {
  1099. struct device_node *np;
  1100. np = of_find_node_by_name(NULL, "global-utilities");
  1101. if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
  1102. const u32 *prop = of_get_property(np, "reg", NULL);
  1103. if (prop) {
  1104. /* map reset control register
  1105. * 0xE00B0 is offset of reset control register
  1106. */
  1107. rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff);
  1108. if (!rstcr)
  1109. printk (KERN_EMERG "Error: reset control "
  1110. "register not mapped!\n");
  1111. }
  1112. } else
  1113. printk (KERN_INFO "rstcr compatible register does not exist!\n");
  1114. if (np)
  1115. of_node_put(np);
  1116. return 0;
  1117. }
  1118. arch_initcall(setup_rstcr);
  1119. void fsl_rstcr_restart(char *cmd)
  1120. {
  1121. local_irq_disable();
  1122. if (rstcr)
  1123. /* set reset control register */
  1124. out_be32(rstcr, 0x2); /* HRESET_REQ */
  1125. while (1) ;
  1126. }
  1127. #endif