udc.c 43 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810
  1. /*
  2. * udc.c - ChipIdea UDC driver
  3. *
  4. * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
  5. *
  6. * Author: David Lopo
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/device.h>
  14. #include <linux/dmapool.h>
  15. #include <linux/dma-mapping.h>
  16. #include <linux/err.h>
  17. #include <linux/init.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/module.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/io.h>
  22. #include <linux/irq.h>
  23. #include <linux/kernel.h>
  24. #include <linux/slab.h>
  25. #include <linux/pm_runtime.h>
  26. #include <linux/usb/ch9.h>
  27. #include <linux/usb/gadget.h>
  28. #include <linux/usb/otg.h>
  29. #include <linux/usb/chipidea.h>
  30. #include "ci.h"
  31. #include "udc.h"
  32. #include "bits.h"
  33. #include "debug.h"
  34. /* control endpoint description */
  35. static const struct usb_endpoint_descriptor
  36. ctrl_endpt_out_desc = {
  37. .bLength = USB_DT_ENDPOINT_SIZE,
  38. .bDescriptorType = USB_DT_ENDPOINT,
  39. .bEndpointAddress = USB_DIR_OUT,
  40. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  41. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  42. };
  43. static const struct usb_endpoint_descriptor
  44. ctrl_endpt_in_desc = {
  45. .bLength = USB_DT_ENDPOINT_SIZE,
  46. .bDescriptorType = USB_DT_ENDPOINT,
  47. .bEndpointAddress = USB_DIR_IN,
  48. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  49. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  50. };
  51. /**
  52. * hw_ep_bit: calculates the bit number
  53. * @num: endpoint number
  54. * @dir: endpoint direction
  55. *
  56. * This function returns bit number
  57. */
  58. static inline int hw_ep_bit(int num, int dir)
  59. {
  60. return num + (dir ? 16 : 0);
  61. }
  62. static inline int ep_to_bit(struct ci13xxx *ci, int n)
  63. {
  64. int fill = 16 - ci->hw_ep_max / 2;
  65. if (n >= ci->hw_ep_max / 2)
  66. n += fill;
  67. return n;
  68. }
  69. /**
  70. * hw_device_state: enables/disables interrupts & starts/stops device (execute
  71. * without interruption)
  72. * @dma: 0 => disable, !0 => enable and set dma engine
  73. *
  74. * This function returns an error code
  75. */
  76. static int hw_device_state(struct ci13xxx *ci, u32 dma)
  77. {
  78. if (dma) {
  79. hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
  80. /* interrupt, error, port change, reset, sleep/suspend */
  81. hw_write(ci, OP_USBINTR, ~0,
  82. USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
  83. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  84. } else {
  85. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  86. hw_write(ci, OP_USBINTR, ~0, 0);
  87. }
  88. return 0;
  89. }
  90. /**
  91. * hw_ep_flush: flush endpoint fifo (execute without interruption)
  92. * @num: endpoint number
  93. * @dir: endpoint direction
  94. *
  95. * This function returns an error code
  96. */
  97. static int hw_ep_flush(struct ci13xxx *ci, int num, int dir)
  98. {
  99. int n = hw_ep_bit(num, dir);
  100. do {
  101. /* flush any pending transfer */
  102. hw_write(ci, OP_ENDPTFLUSH, BIT(n), BIT(n));
  103. while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
  104. cpu_relax();
  105. } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
  106. return 0;
  107. }
  108. /**
  109. * hw_ep_disable: disables endpoint (execute without interruption)
  110. * @num: endpoint number
  111. * @dir: endpoint direction
  112. *
  113. * This function returns an error code
  114. */
  115. static int hw_ep_disable(struct ci13xxx *ci, int num, int dir)
  116. {
  117. hw_ep_flush(ci, num, dir);
  118. hw_write(ci, OP_ENDPTCTRL + num,
  119. dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
  120. return 0;
  121. }
  122. /**
  123. * hw_ep_enable: enables endpoint (execute without interruption)
  124. * @num: endpoint number
  125. * @dir: endpoint direction
  126. * @type: endpoint type
  127. *
  128. * This function returns an error code
  129. */
  130. static int hw_ep_enable(struct ci13xxx *ci, int num, int dir, int type)
  131. {
  132. u32 mask, data;
  133. if (dir) {
  134. mask = ENDPTCTRL_TXT; /* type */
  135. data = type << ffs_nr(mask);
  136. mask |= ENDPTCTRL_TXS; /* unstall */
  137. mask |= ENDPTCTRL_TXR; /* reset data toggle */
  138. data |= ENDPTCTRL_TXR;
  139. mask |= ENDPTCTRL_TXE; /* enable */
  140. data |= ENDPTCTRL_TXE;
  141. } else {
  142. mask = ENDPTCTRL_RXT; /* type */
  143. data = type << ffs_nr(mask);
  144. mask |= ENDPTCTRL_RXS; /* unstall */
  145. mask |= ENDPTCTRL_RXR; /* reset data toggle */
  146. data |= ENDPTCTRL_RXR;
  147. mask |= ENDPTCTRL_RXE; /* enable */
  148. data |= ENDPTCTRL_RXE;
  149. }
  150. hw_write(ci, OP_ENDPTCTRL + num, mask, data);
  151. return 0;
  152. }
  153. /**
  154. * hw_ep_get_halt: return endpoint halt status
  155. * @num: endpoint number
  156. * @dir: endpoint direction
  157. *
  158. * This function returns 1 if endpoint halted
  159. */
  160. static int hw_ep_get_halt(struct ci13xxx *ci, int num, int dir)
  161. {
  162. u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  163. return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
  164. }
  165. /**
  166. * hw_test_and_clear_setup_status: test & clear setup status (execute without
  167. * interruption)
  168. * @n: endpoint number
  169. *
  170. * This function returns setup status
  171. */
  172. static int hw_test_and_clear_setup_status(struct ci13xxx *ci, int n)
  173. {
  174. n = ep_to_bit(ci, n);
  175. return hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(n));
  176. }
  177. /**
  178. * hw_ep_prime: primes endpoint (execute without interruption)
  179. * @num: endpoint number
  180. * @dir: endpoint direction
  181. * @is_ctrl: true if control endpoint
  182. *
  183. * This function returns an error code
  184. */
  185. static int hw_ep_prime(struct ci13xxx *ci, int num, int dir, int is_ctrl)
  186. {
  187. int n = hw_ep_bit(num, dir);
  188. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  189. return -EAGAIN;
  190. hw_write(ci, OP_ENDPTPRIME, BIT(n), BIT(n));
  191. while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  192. cpu_relax();
  193. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  194. return -EAGAIN;
  195. /* status shoult be tested according with manual but it doesn't work */
  196. return 0;
  197. }
  198. /**
  199. * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
  200. * without interruption)
  201. * @num: endpoint number
  202. * @dir: endpoint direction
  203. * @value: true => stall, false => unstall
  204. *
  205. * This function returns an error code
  206. */
  207. static int hw_ep_set_halt(struct ci13xxx *ci, int num, int dir, int value)
  208. {
  209. if (value != 0 && value != 1)
  210. return -EINVAL;
  211. do {
  212. enum ci13xxx_regs reg = OP_ENDPTCTRL + num;
  213. u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  214. u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
  215. /* data toggle - reserved for EP0 but it's in ESS */
  216. hw_write(ci, reg, mask_xs|mask_xr,
  217. value ? mask_xs : mask_xr);
  218. } while (value != hw_ep_get_halt(ci, num, dir));
  219. return 0;
  220. }
  221. /**
  222. * hw_is_port_high_speed: test if port is high speed
  223. *
  224. * This function returns true if high speed port
  225. */
  226. static int hw_port_is_high_speed(struct ci13xxx *ci)
  227. {
  228. return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
  229. hw_read(ci, OP_PORTSC, PORTSC_HSP);
  230. }
  231. /**
  232. * hw_read_intr_enable: returns interrupt enable register
  233. *
  234. * This function returns register data
  235. */
  236. static u32 hw_read_intr_enable(struct ci13xxx *ci)
  237. {
  238. return hw_read(ci, OP_USBINTR, ~0);
  239. }
  240. /**
  241. * hw_read_intr_status: returns interrupt status register
  242. *
  243. * This function returns register data
  244. */
  245. static u32 hw_read_intr_status(struct ci13xxx *ci)
  246. {
  247. return hw_read(ci, OP_USBSTS, ~0);
  248. }
  249. /**
  250. * hw_test_and_clear_complete: test & clear complete status (execute without
  251. * interruption)
  252. * @n: endpoint number
  253. *
  254. * This function returns complete status
  255. */
  256. static int hw_test_and_clear_complete(struct ci13xxx *ci, int n)
  257. {
  258. n = ep_to_bit(ci, n);
  259. return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
  260. }
  261. /**
  262. * hw_test_and_clear_intr_active: test & clear active interrupts (execute
  263. * without interruption)
  264. *
  265. * This function returns active interrutps
  266. */
  267. static u32 hw_test_and_clear_intr_active(struct ci13xxx *ci)
  268. {
  269. u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
  270. hw_write(ci, OP_USBSTS, ~0, reg);
  271. return reg;
  272. }
  273. /**
  274. * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
  275. * interruption)
  276. *
  277. * This function returns guard value
  278. */
  279. static int hw_test_and_clear_setup_guard(struct ci13xxx *ci)
  280. {
  281. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
  282. }
  283. /**
  284. * hw_test_and_set_setup_guard: test & set setup guard (execute without
  285. * interruption)
  286. *
  287. * This function returns guard value
  288. */
  289. static int hw_test_and_set_setup_guard(struct ci13xxx *ci)
  290. {
  291. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
  292. }
  293. /**
  294. * hw_usb_set_address: configures USB address (execute without interruption)
  295. * @value: new USB address
  296. *
  297. * This function explicitly sets the address, without the "USBADRA" (advance)
  298. * feature, which is not supported by older versions of the controller.
  299. */
  300. static void hw_usb_set_address(struct ci13xxx *ci, u8 value)
  301. {
  302. hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
  303. value << ffs_nr(DEVICEADDR_USBADR));
  304. }
  305. /**
  306. * hw_usb_reset: restart device after a bus reset (execute without
  307. * interruption)
  308. *
  309. * This function returns an error code
  310. */
  311. static int hw_usb_reset(struct ci13xxx *ci)
  312. {
  313. hw_usb_set_address(ci, 0);
  314. /* ESS flushes only at end?!? */
  315. hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
  316. /* clear setup token semaphores */
  317. hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
  318. /* clear complete status */
  319. hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
  320. /* wait until all bits cleared */
  321. while (hw_read(ci, OP_ENDPTPRIME, ~0))
  322. udelay(10); /* not RTOS friendly */
  323. /* reset all endpoints ? */
  324. /* reset internal status and wait for further instructions
  325. no need to verify the port reset status (ESS does it) */
  326. return 0;
  327. }
  328. /******************************************************************************
  329. * UTIL block
  330. *****************************************************************************/
  331. /**
  332. * _usb_addr: calculates endpoint address from direction & number
  333. * @ep: endpoint
  334. */
  335. static inline u8 _usb_addr(struct ci13xxx_ep *ep)
  336. {
  337. return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
  338. }
  339. /**
  340. * _hardware_queue: configures a request at hardware level
  341. * @gadget: gadget
  342. * @mEp: endpoint
  343. *
  344. * This function returns an error code
  345. */
  346. static int _hardware_enqueue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
  347. {
  348. struct ci13xxx *ci = mEp->ci;
  349. unsigned i;
  350. int ret = 0;
  351. unsigned length = mReq->req.length;
  352. /* don't queue twice */
  353. if (mReq->req.status == -EALREADY)
  354. return -EALREADY;
  355. mReq->req.status = -EALREADY;
  356. if (mReq->req.zero && length && (length % mEp->ep.maxpacket == 0)) {
  357. mReq->zptr = dma_pool_alloc(mEp->td_pool, GFP_ATOMIC,
  358. &mReq->zdma);
  359. if (mReq->zptr == NULL)
  360. return -ENOMEM;
  361. memset(mReq->zptr, 0, sizeof(*mReq->zptr));
  362. mReq->zptr->next = TD_TERMINATE;
  363. mReq->zptr->token = TD_STATUS_ACTIVE;
  364. if (!mReq->req.no_interrupt)
  365. mReq->zptr->token |= TD_IOC;
  366. }
  367. ret = usb_gadget_map_request(&ci->gadget, &mReq->req, mEp->dir);
  368. if (ret)
  369. return ret;
  370. /*
  371. * TD configuration
  372. * TODO - handle requests which spawns into several TDs
  373. */
  374. memset(mReq->ptr, 0, sizeof(*mReq->ptr));
  375. mReq->ptr->token = length << ffs_nr(TD_TOTAL_BYTES);
  376. mReq->ptr->token &= TD_TOTAL_BYTES;
  377. mReq->ptr->token |= TD_STATUS_ACTIVE;
  378. if (mReq->zptr) {
  379. mReq->ptr->next = mReq->zdma;
  380. } else {
  381. mReq->ptr->next = TD_TERMINATE;
  382. if (!mReq->req.no_interrupt)
  383. mReq->ptr->token |= TD_IOC;
  384. }
  385. mReq->ptr->page[0] = mReq->req.dma;
  386. for (i = 1; i < 5; i++)
  387. mReq->ptr->page[i] =
  388. (mReq->req.dma + i * CI13XXX_PAGE_SIZE) & ~TD_RESERVED_MASK;
  389. if (!list_empty(&mEp->qh.queue)) {
  390. struct ci13xxx_req *mReqPrev;
  391. int n = hw_ep_bit(mEp->num, mEp->dir);
  392. int tmp_stat;
  393. mReqPrev = list_entry(mEp->qh.queue.prev,
  394. struct ci13xxx_req, queue);
  395. if (mReqPrev->zptr)
  396. mReqPrev->zptr->next = mReq->dma & TD_ADDR_MASK;
  397. else
  398. mReqPrev->ptr->next = mReq->dma & TD_ADDR_MASK;
  399. wmb();
  400. if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  401. goto done;
  402. do {
  403. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
  404. tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
  405. } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
  406. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
  407. if (tmp_stat)
  408. goto done;
  409. }
  410. /* QH configuration */
  411. mEp->qh.ptr->td.next = mReq->dma; /* TERMINATE = 0 */
  412. mEp->qh.ptr->td.token &= ~TD_STATUS; /* clear status */
  413. mEp->qh.ptr->cap |= QH_ZLT;
  414. wmb(); /* synchronize before ep prime */
  415. ret = hw_ep_prime(ci, mEp->num, mEp->dir,
  416. mEp->type == USB_ENDPOINT_XFER_CONTROL);
  417. done:
  418. return ret;
  419. }
  420. /**
  421. * _hardware_dequeue: handles a request at hardware level
  422. * @gadget: gadget
  423. * @mEp: endpoint
  424. *
  425. * This function returns an error code
  426. */
  427. static int _hardware_dequeue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
  428. {
  429. if (mReq->req.status != -EALREADY)
  430. return -EINVAL;
  431. if ((TD_STATUS_ACTIVE & mReq->ptr->token) != 0)
  432. return -EBUSY;
  433. if (mReq->zptr) {
  434. if ((TD_STATUS_ACTIVE & mReq->zptr->token) != 0)
  435. return -EBUSY;
  436. dma_pool_free(mEp->td_pool, mReq->zptr, mReq->zdma);
  437. mReq->zptr = NULL;
  438. }
  439. mReq->req.status = 0;
  440. usb_gadget_unmap_request(&mEp->ci->gadget, &mReq->req, mEp->dir);
  441. mReq->req.status = mReq->ptr->token & TD_STATUS;
  442. if ((TD_STATUS_HALTED & mReq->req.status) != 0)
  443. mReq->req.status = -1;
  444. else if ((TD_STATUS_DT_ERR & mReq->req.status) != 0)
  445. mReq->req.status = -1;
  446. else if ((TD_STATUS_TR_ERR & mReq->req.status) != 0)
  447. mReq->req.status = -1;
  448. mReq->req.actual = mReq->ptr->token & TD_TOTAL_BYTES;
  449. mReq->req.actual >>= ffs_nr(TD_TOTAL_BYTES);
  450. mReq->req.actual = mReq->req.length - mReq->req.actual;
  451. mReq->req.actual = mReq->req.status ? 0 : mReq->req.actual;
  452. return mReq->req.actual;
  453. }
  454. /**
  455. * _ep_nuke: dequeues all endpoint requests
  456. * @mEp: endpoint
  457. *
  458. * This function returns an error code
  459. * Caller must hold lock
  460. */
  461. static int _ep_nuke(struct ci13xxx_ep *mEp)
  462. __releases(mEp->lock)
  463. __acquires(mEp->lock)
  464. {
  465. if (mEp == NULL)
  466. return -EINVAL;
  467. hw_ep_flush(mEp->ci, mEp->num, mEp->dir);
  468. while (!list_empty(&mEp->qh.queue)) {
  469. /* pop oldest request */
  470. struct ci13xxx_req *mReq = \
  471. list_entry(mEp->qh.queue.next,
  472. struct ci13xxx_req, queue);
  473. list_del_init(&mReq->queue);
  474. mReq->req.status = -ESHUTDOWN;
  475. if (mReq->req.complete != NULL) {
  476. spin_unlock(mEp->lock);
  477. mReq->req.complete(&mEp->ep, &mReq->req);
  478. spin_lock(mEp->lock);
  479. }
  480. }
  481. return 0;
  482. }
  483. /**
  484. * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
  485. * @gadget: gadget
  486. *
  487. * This function returns an error code
  488. */
  489. static int _gadget_stop_activity(struct usb_gadget *gadget)
  490. {
  491. struct usb_ep *ep;
  492. struct ci13xxx *ci = container_of(gadget, struct ci13xxx, gadget);
  493. unsigned long flags;
  494. spin_lock_irqsave(&ci->lock, flags);
  495. ci->gadget.speed = USB_SPEED_UNKNOWN;
  496. ci->remote_wakeup = 0;
  497. ci->suspended = 0;
  498. spin_unlock_irqrestore(&ci->lock, flags);
  499. /* flush all endpoints */
  500. gadget_for_each_ep(ep, gadget) {
  501. usb_ep_fifo_flush(ep);
  502. }
  503. usb_ep_fifo_flush(&ci->ep0out->ep);
  504. usb_ep_fifo_flush(&ci->ep0in->ep);
  505. if (ci->driver)
  506. ci->driver->disconnect(gadget);
  507. /* make sure to disable all endpoints */
  508. gadget_for_each_ep(ep, gadget) {
  509. usb_ep_disable(ep);
  510. }
  511. if (ci->status != NULL) {
  512. usb_ep_free_request(&ci->ep0in->ep, ci->status);
  513. ci->status = NULL;
  514. }
  515. return 0;
  516. }
  517. /******************************************************************************
  518. * ISR block
  519. *****************************************************************************/
  520. /**
  521. * isr_reset_handler: USB reset interrupt handler
  522. * @ci: UDC device
  523. *
  524. * This function resets USB engine after a bus reset occurred
  525. */
  526. static void isr_reset_handler(struct ci13xxx *ci)
  527. __releases(ci->lock)
  528. __acquires(ci->lock)
  529. {
  530. int retval;
  531. dbg_event(0xFF, "BUS RST", 0);
  532. spin_unlock(&ci->lock);
  533. retval = _gadget_stop_activity(&ci->gadget);
  534. if (retval)
  535. goto done;
  536. retval = hw_usb_reset(ci);
  537. if (retval)
  538. goto done;
  539. ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
  540. if (ci->status == NULL)
  541. retval = -ENOMEM;
  542. done:
  543. spin_lock(&ci->lock);
  544. if (retval)
  545. dev_err(ci->dev, "error: %i\n", retval);
  546. }
  547. /**
  548. * isr_get_status_complete: get_status request complete function
  549. * @ep: endpoint
  550. * @req: request handled
  551. *
  552. * Caller must release lock
  553. */
  554. static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
  555. {
  556. if (ep == NULL || req == NULL)
  557. return;
  558. kfree(req->buf);
  559. usb_ep_free_request(ep, req);
  560. }
  561. /**
  562. * isr_get_status_response: get_status request response
  563. * @ci: ci struct
  564. * @setup: setup request packet
  565. *
  566. * This function returns an error code
  567. */
  568. static int isr_get_status_response(struct ci13xxx *ci,
  569. struct usb_ctrlrequest *setup)
  570. __releases(mEp->lock)
  571. __acquires(mEp->lock)
  572. {
  573. struct ci13xxx_ep *mEp = ci->ep0in;
  574. struct usb_request *req = NULL;
  575. gfp_t gfp_flags = GFP_ATOMIC;
  576. int dir, num, retval;
  577. if (mEp == NULL || setup == NULL)
  578. return -EINVAL;
  579. spin_unlock(mEp->lock);
  580. req = usb_ep_alloc_request(&mEp->ep, gfp_flags);
  581. spin_lock(mEp->lock);
  582. if (req == NULL)
  583. return -ENOMEM;
  584. req->complete = isr_get_status_complete;
  585. req->length = 2;
  586. req->buf = kzalloc(req->length, gfp_flags);
  587. if (req->buf == NULL) {
  588. retval = -ENOMEM;
  589. goto err_free_req;
  590. }
  591. if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  592. /* Assume that device is bus powered for now. */
  593. *(u16 *)req->buf = ci->remote_wakeup << 1;
  594. retval = 0;
  595. } else if ((setup->bRequestType & USB_RECIP_MASK) \
  596. == USB_RECIP_ENDPOINT) {
  597. dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
  598. TX : RX;
  599. num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
  600. *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
  601. }
  602. /* else do nothing; reserved for future use */
  603. spin_unlock(mEp->lock);
  604. retval = usb_ep_queue(&mEp->ep, req, gfp_flags);
  605. spin_lock(mEp->lock);
  606. if (retval)
  607. goto err_free_buf;
  608. return 0;
  609. err_free_buf:
  610. kfree(req->buf);
  611. err_free_req:
  612. spin_unlock(mEp->lock);
  613. usb_ep_free_request(&mEp->ep, req);
  614. spin_lock(mEp->lock);
  615. return retval;
  616. }
  617. /**
  618. * isr_setup_status_complete: setup_status request complete function
  619. * @ep: endpoint
  620. * @req: request handled
  621. *
  622. * Caller must release lock. Put the port in test mode if test mode
  623. * feature is selected.
  624. */
  625. static void
  626. isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
  627. {
  628. struct ci13xxx *ci = req->context;
  629. unsigned long flags;
  630. if (ci->setaddr) {
  631. hw_usb_set_address(ci, ci->address);
  632. ci->setaddr = false;
  633. }
  634. spin_lock_irqsave(&ci->lock, flags);
  635. if (ci->test_mode)
  636. hw_port_test_set(ci, ci->test_mode);
  637. spin_unlock_irqrestore(&ci->lock, flags);
  638. }
  639. /**
  640. * isr_setup_status_phase: queues the status phase of a setup transation
  641. * @ci: ci struct
  642. *
  643. * This function returns an error code
  644. */
  645. static int isr_setup_status_phase(struct ci13xxx *ci)
  646. __releases(mEp->lock)
  647. __acquires(mEp->lock)
  648. {
  649. int retval;
  650. struct ci13xxx_ep *mEp;
  651. mEp = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
  652. ci->status->context = ci;
  653. ci->status->complete = isr_setup_status_complete;
  654. spin_unlock(mEp->lock);
  655. retval = usb_ep_queue(&mEp->ep, ci->status, GFP_ATOMIC);
  656. spin_lock(mEp->lock);
  657. return retval;
  658. }
  659. /**
  660. * isr_tr_complete_low: transaction complete low level handler
  661. * @mEp: endpoint
  662. *
  663. * This function returns an error code
  664. * Caller must hold lock
  665. */
  666. static int isr_tr_complete_low(struct ci13xxx_ep *mEp)
  667. __releases(mEp->lock)
  668. __acquires(mEp->lock)
  669. {
  670. struct ci13xxx_req *mReq, *mReqTemp;
  671. struct ci13xxx_ep *mEpTemp = mEp;
  672. int uninitialized_var(retval);
  673. if (list_empty(&mEp->qh.queue))
  674. return -EINVAL;
  675. list_for_each_entry_safe(mReq, mReqTemp, &mEp->qh.queue,
  676. queue) {
  677. retval = _hardware_dequeue(mEp, mReq);
  678. if (retval < 0)
  679. break;
  680. list_del_init(&mReq->queue);
  681. dbg_done(_usb_addr(mEp), mReq->ptr->token, retval);
  682. if (mReq->req.complete != NULL) {
  683. spin_unlock(mEp->lock);
  684. if ((mEp->type == USB_ENDPOINT_XFER_CONTROL) &&
  685. mReq->req.length)
  686. mEpTemp = mEp->ci->ep0in;
  687. mReq->req.complete(&mEpTemp->ep, &mReq->req);
  688. spin_lock(mEp->lock);
  689. }
  690. }
  691. if (retval == -EBUSY)
  692. retval = 0;
  693. if (retval < 0)
  694. dbg_event(_usb_addr(mEp), "DONE", retval);
  695. return retval;
  696. }
  697. /**
  698. * isr_tr_complete_handler: transaction complete interrupt handler
  699. * @ci: UDC descriptor
  700. *
  701. * This function handles traffic events
  702. */
  703. static void isr_tr_complete_handler(struct ci13xxx *ci)
  704. __releases(ci->lock)
  705. __acquires(ci->lock)
  706. {
  707. unsigned i;
  708. u8 tmode = 0;
  709. for (i = 0; i < ci->hw_ep_max; i++) {
  710. struct ci13xxx_ep *mEp = &ci->ci13xxx_ep[i];
  711. int type, num, dir, err = -EINVAL;
  712. struct usb_ctrlrequest req;
  713. if (mEp->ep.desc == NULL)
  714. continue; /* not configured */
  715. if (hw_test_and_clear_complete(ci, i)) {
  716. err = isr_tr_complete_low(mEp);
  717. if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
  718. if (err > 0) /* needs status phase */
  719. err = isr_setup_status_phase(ci);
  720. if (err < 0) {
  721. dbg_event(_usb_addr(mEp),
  722. "ERROR", err);
  723. spin_unlock(&ci->lock);
  724. if (usb_ep_set_halt(&mEp->ep))
  725. dev_err(ci->dev,
  726. "error: ep_set_halt\n");
  727. spin_lock(&ci->lock);
  728. }
  729. }
  730. }
  731. if (mEp->type != USB_ENDPOINT_XFER_CONTROL ||
  732. !hw_test_and_clear_setup_status(ci, i))
  733. continue;
  734. if (i != 0) {
  735. dev_warn(ci->dev, "ctrl traffic at endpoint %d\n", i);
  736. continue;
  737. }
  738. /*
  739. * Flush data and handshake transactions of previous
  740. * setup packet.
  741. */
  742. _ep_nuke(ci->ep0out);
  743. _ep_nuke(ci->ep0in);
  744. /* read_setup_packet */
  745. do {
  746. hw_test_and_set_setup_guard(ci);
  747. memcpy(&req, &mEp->qh.ptr->setup, sizeof(req));
  748. } while (!hw_test_and_clear_setup_guard(ci));
  749. type = req.bRequestType;
  750. ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
  751. dbg_setup(_usb_addr(mEp), &req);
  752. switch (req.bRequest) {
  753. case USB_REQ_CLEAR_FEATURE:
  754. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  755. le16_to_cpu(req.wValue) ==
  756. USB_ENDPOINT_HALT) {
  757. if (req.wLength != 0)
  758. break;
  759. num = le16_to_cpu(req.wIndex);
  760. dir = num & USB_ENDPOINT_DIR_MASK;
  761. num &= USB_ENDPOINT_NUMBER_MASK;
  762. if (dir) /* TX */
  763. num += ci->hw_ep_max/2;
  764. if (!ci->ci13xxx_ep[num].wedge) {
  765. spin_unlock(&ci->lock);
  766. err = usb_ep_clear_halt(
  767. &ci->ci13xxx_ep[num].ep);
  768. spin_lock(&ci->lock);
  769. if (err)
  770. break;
  771. }
  772. err = isr_setup_status_phase(ci);
  773. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
  774. le16_to_cpu(req.wValue) ==
  775. USB_DEVICE_REMOTE_WAKEUP) {
  776. if (req.wLength != 0)
  777. break;
  778. ci->remote_wakeup = 0;
  779. err = isr_setup_status_phase(ci);
  780. } else {
  781. goto delegate;
  782. }
  783. break;
  784. case USB_REQ_GET_STATUS:
  785. if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
  786. type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
  787. type != (USB_DIR_IN|USB_RECIP_INTERFACE))
  788. goto delegate;
  789. if (le16_to_cpu(req.wLength) != 2 ||
  790. le16_to_cpu(req.wValue) != 0)
  791. break;
  792. err = isr_get_status_response(ci, &req);
  793. break;
  794. case USB_REQ_SET_ADDRESS:
  795. if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
  796. goto delegate;
  797. if (le16_to_cpu(req.wLength) != 0 ||
  798. le16_to_cpu(req.wIndex) != 0)
  799. break;
  800. ci->address = (u8)le16_to_cpu(req.wValue);
  801. ci->setaddr = true;
  802. err = isr_setup_status_phase(ci);
  803. break;
  804. case USB_REQ_SET_FEATURE:
  805. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  806. le16_to_cpu(req.wValue) ==
  807. USB_ENDPOINT_HALT) {
  808. if (req.wLength != 0)
  809. break;
  810. num = le16_to_cpu(req.wIndex);
  811. dir = num & USB_ENDPOINT_DIR_MASK;
  812. num &= USB_ENDPOINT_NUMBER_MASK;
  813. if (dir) /* TX */
  814. num += ci->hw_ep_max/2;
  815. spin_unlock(&ci->lock);
  816. err = usb_ep_set_halt(&ci->ci13xxx_ep[num].ep);
  817. spin_lock(&ci->lock);
  818. if (!err)
  819. isr_setup_status_phase(ci);
  820. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
  821. if (req.wLength != 0)
  822. break;
  823. switch (le16_to_cpu(req.wValue)) {
  824. case USB_DEVICE_REMOTE_WAKEUP:
  825. ci->remote_wakeup = 1;
  826. err = isr_setup_status_phase(ci);
  827. break;
  828. case USB_DEVICE_TEST_MODE:
  829. tmode = le16_to_cpu(req.wIndex) >> 8;
  830. switch (tmode) {
  831. case TEST_J:
  832. case TEST_K:
  833. case TEST_SE0_NAK:
  834. case TEST_PACKET:
  835. case TEST_FORCE_EN:
  836. ci->test_mode = tmode;
  837. err = isr_setup_status_phase(
  838. ci);
  839. break;
  840. default:
  841. break;
  842. }
  843. default:
  844. goto delegate;
  845. }
  846. } else {
  847. goto delegate;
  848. }
  849. break;
  850. default:
  851. delegate:
  852. if (req.wLength == 0) /* no data phase */
  853. ci->ep0_dir = TX;
  854. spin_unlock(&ci->lock);
  855. err = ci->driver->setup(&ci->gadget, &req);
  856. spin_lock(&ci->lock);
  857. break;
  858. }
  859. if (err < 0) {
  860. dbg_event(_usb_addr(mEp), "ERROR", err);
  861. spin_unlock(&ci->lock);
  862. if (usb_ep_set_halt(&mEp->ep))
  863. dev_err(ci->dev, "error: ep_set_halt\n");
  864. spin_lock(&ci->lock);
  865. }
  866. }
  867. }
  868. /******************************************************************************
  869. * ENDPT block
  870. *****************************************************************************/
  871. /**
  872. * ep_enable: configure endpoint, making it usable
  873. *
  874. * Check usb_ep_enable() at "usb_gadget.h" for details
  875. */
  876. static int ep_enable(struct usb_ep *ep,
  877. const struct usb_endpoint_descriptor *desc)
  878. {
  879. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  880. int retval = 0;
  881. unsigned long flags;
  882. if (ep == NULL || desc == NULL)
  883. return -EINVAL;
  884. spin_lock_irqsave(mEp->lock, flags);
  885. /* only internal SW should enable ctrl endpts */
  886. mEp->ep.desc = desc;
  887. if (!list_empty(&mEp->qh.queue))
  888. dev_warn(mEp->ci->dev, "enabling a non-empty endpoint!\n");
  889. mEp->dir = usb_endpoint_dir_in(desc) ? TX : RX;
  890. mEp->num = usb_endpoint_num(desc);
  891. mEp->type = usb_endpoint_type(desc);
  892. mEp->ep.maxpacket = usb_endpoint_maxp(desc);
  893. dbg_event(_usb_addr(mEp), "ENABLE", 0);
  894. mEp->qh.ptr->cap = 0;
  895. if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
  896. mEp->qh.ptr->cap |= QH_IOS;
  897. else if (mEp->type == USB_ENDPOINT_XFER_ISOC)
  898. mEp->qh.ptr->cap &= ~QH_MULT;
  899. else
  900. mEp->qh.ptr->cap &= ~QH_ZLT;
  901. mEp->qh.ptr->cap |=
  902. (mEp->ep.maxpacket << ffs_nr(QH_MAX_PKT)) & QH_MAX_PKT;
  903. mEp->qh.ptr->td.next |= TD_TERMINATE; /* needed? */
  904. /*
  905. * Enable endpoints in the HW other than ep0 as ep0
  906. * is always enabled
  907. */
  908. if (mEp->num)
  909. retval |= hw_ep_enable(mEp->ci, mEp->num, mEp->dir, mEp->type);
  910. spin_unlock_irqrestore(mEp->lock, flags);
  911. return retval;
  912. }
  913. /**
  914. * ep_disable: endpoint is no longer usable
  915. *
  916. * Check usb_ep_disable() at "usb_gadget.h" for details
  917. */
  918. static int ep_disable(struct usb_ep *ep)
  919. {
  920. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  921. int direction, retval = 0;
  922. unsigned long flags;
  923. if (ep == NULL)
  924. return -EINVAL;
  925. else if (mEp->ep.desc == NULL)
  926. return -EBUSY;
  927. spin_lock_irqsave(mEp->lock, flags);
  928. /* only internal SW should disable ctrl endpts */
  929. direction = mEp->dir;
  930. do {
  931. dbg_event(_usb_addr(mEp), "DISABLE", 0);
  932. retval |= _ep_nuke(mEp);
  933. retval |= hw_ep_disable(mEp->ci, mEp->num, mEp->dir);
  934. if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
  935. mEp->dir = (mEp->dir == TX) ? RX : TX;
  936. } while (mEp->dir != direction);
  937. mEp->ep.desc = NULL;
  938. spin_unlock_irqrestore(mEp->lock, flags);
  939. return retval;
  940. }
  941. /**
  942. * ep_alloc_request: allocate a request object to use with this endpoint
  943. *
  944. * Check usb_ep_alloc_request() at "usb_gadget.h" for details
  945. */
  946. static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
  947. {
  948. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  949. struct ci13xxx_req *mReq = NULL;
  950. if (ep == NULL)
  951. return NULL;
  952. mReq = kzalloc(sizeof(struct ci13xxx_req), gfp_flags);
  953. if (mReq != NULL) {
  954. INIT_LIST_HEAD(&mReq->queue);
  955. mReq->ptr = dma_pool_alloc(mEp->td_pool, gfp_flags,
  956. &mReq->dma);
  957. if (mReq->ptr == NULL) {
  958. kfree(mReq);
  959. mReq = NULL;
  960. }
  961. }
  962. dbg_event(_usb_addr(mEp), "ALLOC", mReq == NULL);
  963. return (mReq == NULL) ? NULL : &mReq->req;
  964. }
  965. /**
  966. * ep_free_request: frees a request object
  967. *
  968. * Check usb_ep_free_request() at "usb_gadget.h" for details
  969. */
  970. static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
  971. {
  972. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  973. struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
  974. unsigned long flags;
  975. if (ep == NULL || req == NULL) {
  976. return;
  977. } else if (!list_empty(&mReq->queue)) {
  978. dev_err(mEp->ci->dev, "freeing queued request\n");
  979. return;
  980. }
  981. spin_lock_irqsave(mEp->lock, flags);
  982. if (mReq->ptr)
  983. dma_pool_free(mEp->td_pool, mReq->ptr, mReq->dma);
  984. kfree(mReq);
  985. dbg_event(_usb_addr(mEp), "FREE", 0);
  986. spin_unlock_irqrestore(mEp->lock, flags);
  987. }
  988. /**
  989. * ep_queue: queues (submits) an I/O request to an endpoint
  990. *
  991. * Check usb_ep_queue()* at usb_gadget.h" for details
  992. */
  993. static int ep_queue(struct usb_ep *ep, struct usb_request *req,
  994. gfp_t __maybe_unused gfp_flags)
  995. {
  996. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  997. struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
  998. struct ci13xxx *ci = mEp->ci;
  999. int retval = 0;
  1000. unsigned long flags;
  1001. if (ep == NULL || req == NULL || mEp->ep.desc == NULL)
  1002. return -EINVAL;
  1003. spin_lock_irqsave(mEp->lock, flags);
  1004. if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
  1005. if (req->length)
  1006. mEp = (ci->ep0_dir == RX) ?
  1007. ci->ep0out : ci->ep0in;
  1008. if (!list_empty(&mEp->qh.queue)) {
  1009. _ep_nuke(mEp);
  1010. retval = -EOVERFLOW;
  1011. dev_warn(mEp->ci->dev, "endpoint ctrl %X nuked\n",
  1012. _usb_addr(mEp));
  1013. }
  1014. }
  1015. /* first nuke then test link, e.g. previous status has not sent */
  1016. if (!list_empty(&mReq->queue)) {
  1017. retval = -EBUSY;
  1018. dev_err(mEp->ci->dev, "request already in queue\n");
  1019. goto done;
  1020. }
  1021. if (req->length > 4 * CI13XXX_PAGE_SIZE) {
  1022. req->length = 4 * CI13XXX_PAGE_SIZE;
  1023. retval = -EMSGSIZE;
  1024. dev_warn(mEp->ci->dev, "request length truncated\n");
  1025. }
  1026. dbg_queue(_usb_addr(mEp), req, retval);
  1027. /* push request */
  1028. mReq->req.status = -EINPROGRESS;
  1029. mReq->req.actual = 0;
  1030. retval = _hardware_enqueue(mEp, mReq);
  1031. if (retval == -EALREADY) {
  1032. dbg_event(_usb_addr(mEp), "QUEUE", retval);
  1033. retval = 0;
  1034. }
  1035. if (!retval)
  1036. list_add_tail(&mReq->queue, &mEp->qh.queue);
  1037. done:
  1038. spin_unlock_irqrestore(mEp->lock, flags);
  1039. return retval;
  1040. }
  1041. /**
  1042. * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
  1043. *
  1044. * Check usb_ep_dequeue() at "usb_gadget.h" for details
  1045. */
  1046. static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
  1047. {
  1048. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1049. struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
  1050. unsigned long flags;
  1051. if (ep == NULL || req == NULL || mReq->req.status != -EALREADY ||
  1052. mEp->ep.desc == NULL || list_empty(&mReq->queue) ||
  1053. list_empty(&mEp->qh.queue))
  1054. return -EINVAL;
  1055. spin_lock_irqsave(mEp->lock, flags);
  1056. dbg_event(_usb_addr(mEp), "DEQUEUE", 0);
  1057. hw_ep_flush(mEp->ci, mEp->num, mEp->dir);
  1058. /* pop request */
  1059. list_del_init(&mReq->queue);
  1060. usb_gadget_unmap_request(&mEp->ci->gadget, req, mEp->dir);
  1061. req->status = -ECONNRESET;
  1062. if (mReq->req.complete != NULL) {
  1063. spin_unlock(mEp->lock);
  1064. mReq->req.complete(&mEp->ep, &mReq->req);
  1065. spin_lock(mEp->lock);
  1066. }
  1067. spin_unlock_irqrestore(mEp->lock, flags);
  1068. return 0;
  1069. }
  1070. /**
  1071. * ep_set_halt: sets the endpoint halt feature
  1072. *
  1073. * Check usb_ep_set_halt() at "usb_gadget.h" for details
  1074. */
  1075. static int ep_set_halt(struct usb_ep *ep, int value)
  1076. {
  1077. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1078. int direction, retval = 0;
  1079. unsigned long flags;
  1080. if (ep == NULL || mEp->ep.desc == NULL)
  1081. return -EINVAL;
  1082. spin_lock_irqsave(mEp->lock, flags);
  1083. #ifndef STALL_IN
  1084. /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
  1085. if (value && mEp->type == USB_ENDPOINT_XFER_BULK && mEp->dir == TX &&
  1086. !list_empty(&mEp->qh.queue)) {
  1087. spin_unlock_irqrestore(mEp->lock, flags);
  1088. return -EAGAIN;
  1089. }
  1090. #endif
  1091. direction = mEp->dir;
  1092. do {
  1093. dbg_event(_usb_addr(mEp), "HALT", value);
  1094. retval |= hw_ep_set_halt(mEp->ci, mEp->num, mEp->dir, value);
  1095. if (!value)
  1096. mEp->wedge = 0;
  1097. if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
  1098. mEp->dir = (mEp->dir == TX) ? RX : TX;
  1099. } while (mEp->dir != direction);
  1100. spin_unlock_irqrestore(mEp->lock, flags);
  1101. return retval;
  1102. }
  1103. /**
  1104. * ep_set_wedge: sets the halt feature and ignores clear requests
  1105. *
  1106. * Check usb_ep_set_wedge() at "usb_gadget.h" for details
  1107. */
  1108. static int ep_set_wedge(struct usb_ep *ep)
  1109. {
  1110. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1111. unsigned long flags;
  1112. if (ep == NULL || mEp->ep.desc == NULL)
  1113. return -EINVAL;
  1114. spin_lock_irqsave(mEp->lock, flags);
  1115. dbg_event(_usb_addr(mEp), "WEDGE", 0);
  1116. mEp->wedge = 1;
  1117. spin_unlock_irqrestore(mEp->lock, flags);
  1118. return usb_ep_set_halt(ep);
  1119. }
  1120. /**
  1121. * ep_fifo_flush: flushes contents of a fifo
  1122. *
  1123. * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
  1124. */
  1125. static void ep_fifo_flush(struct usb_ep *ep)
  1126. {
  1127. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1128. unsigned long flags;
  1129. if (ep == NULL) {
  1130. dev_err(mEp->ci->dev, "%02X: -EINVAL\n", _usb_addr(mEp));
  1131. return;
  1132. }
  1133. spin_lock_irqsave(mEp->lock, flags);
  1134. dbg_event(_usb_addr(mEp), "FFLUSH", 0);
  1135. hw_ep_flush(mEp->ci, mEp->num, mEp->dir);
  1136. spin_unlock_irqrestore(mEp->lock, flags);
  1137. }
  1138. /**
  1139. * Endpoint-specific part of the API to the USB controller hardware
  1140. * Check "usb_gadget.h" for details
  1141. */
  1142. static const struct usb_ep_ops usb_ep_ops = {
  1143. .enable = ep_enable,
  1144. .disable = ep_disable,
  1145. .alloc_request = ep_alloc_request,
  1146. .free_request = ep_free_request,
  1147. .queue = ep_queue,
  1148. .dequeue = ep_dequeue,
  1149. .set_halt = ep_set_halt,
  1150. .set_wedge = ep_set_wedge,
  1151. .fifo_flush = ep_fifo_flush,
  1152. };
  1153. /******************************************************************************
  1154. * GADGET block
  1155. *****************************************************************************/
  1156. static int ci13xxx_vbus_session(struct usb_gadget *_gadget, int is_active)
  1157. {
  1158. struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget);
  1159. unsigned long flags;
  1160. int gadget_ready = 0;
  1161. if (!(ci->platdata->flags & CI13XXX_PULLUP_ON_VBUS))
  1162. return -EOPNOTSUPP;
  1163. spin_lock_irqsave(&ci->lock, flags);
  1164. ci->vbus_active = is_active;
  1165. if (ci->driver)
  1166. gadget_ready = 1;
  1167. spin_unlock_irqrestore(&ci->lock, flags);
  1168. if (gadget_ready) {
  1169. if (is_active) {
  1170. pm_runtime_get_sync(&_gadget->dev);
  1171. hw_device_reset(ci, USBMODE_CM_DC);
  1172. hw_device_state(ci, ci->ep0out->qh.dma);
  1173. } else {
  1174. hw_device_state(ci, 0);
  1175. if (ci->platdata->notify_event)
  1176. ci->platdata->notify_event(ci,
  1177. CI13XXX_CONTROLLER_STOPPED_EVENT);
  1178. _gadget_stop_activity(&ci->gadget);
  1179. pm_runtime_put_sync(&_gadget->dev);
  1180. }
  1181. }
  1182. return 0;
  1183. }
  1184. static int ci13xxx_wakeup(struct usb_gadget *_gadget)
  1185. {
  1186. struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget);
  1187. unsigned long flags;
  1188. int ret = 0;
  1189. spin_lock_irqsave(&ci->lock, flags);
  1190. if (!ci->remote_wakeup) {
  1191. ret = -EOPNOTSUPP;
  1192. goto out;
  1193. }
  1194. if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
  1195. ret = -EINVAL;
  1196. goto out;
  1197. }
  1198. hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
  1199. out:
  1200. spin_unlock_irqrestore(&ci->lock, flags);
  1201. return ret;
  1202. }
  1203. static int ci13xxx_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
  1204. {
  1205. struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget);
  1206. if (ci->transceiver)
  1207. return usb_phy_set_power(ci->transceiver, mA);
  1208. return -ENOTSUPP;
  1209. }
  1210. static int ci13xxx_start(struct usb_gadget *gadget,
  1211. struct usb_gadget_driver *driver);
  1212. static int ci13xxx_stop(struct usb_gadget *gadget,
  1213. struct usb_gadget_driver *driver);
  1214. /**
  1215. * Device operations part of the API to the USB controller hardware,
  1216. * which don't involve endpoints (or i/o)
  1217. * Check "usb_gadget.h" for details
  1218. */
  1219. static const struct usb_gadget_ops usb_gadget_ops = {
  1220. .vbus_session = ci13xxx_vbus_session,
  1221. .wakeup = ci13xxx_wakeup,
  1222. .vbus_draw = ci13xxx_vbus_draw,
  1223. .udc_start = ci13xxx_start,
  1224. .udc_stop = ci13xxx_stop,
  1225. };
  1226. static int init_eps(struct ci13xxx *ci)
  1227. {
  1228. int retval = 0, i, j;
  1229. for (i = 0; i < ci->hw_ep_max/2; i++)
  1230. for (j = RX; j <= TX; j++) {
  1231. int k = i + j * ci->hw_ep_max/2;
  1232. struct ci13xxx_ep *mEp = &ci->ci13xxx_ep[k];
  1233. scnprintf(mEp->name, sizeof(mEp->name), "ep%i%s", i,
  1234. (j == TX) ? "in" : "out");
  1235. mEp->ci = ci;
  1236. mEp->lock = &ci->lock;
  1237. mEp->td_pool = ci->td_pool;
  1238. mEp->ep.name = mEp->name;
  1239. mEp->ep.ops = &usb_ep_ops;
  1240. mEp->ep.maxpacket = CTRL_PAYLOAD_MAX;
  1241. INIT_LIST_HEAD(&mEp->qh.queue);
  1242. mEp->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
  1243. &mEp->qh.dma);
  1244. if (mEp->qh.ptr == NULL)
  1245. retval = -ENOMEM;
  1246. else
  1247. memset(mEp->qh.ptr, 0, sizeof(*mEp->qh.ptr));
  1248. /*
  1249. * set up shorthands for ep0 out and in endpoints,
  1250. * don't add to gadget's ep_list
  1251. */
  1252. if (i == 0) {
  1253. if (j == RX)
  1254. ci->ep0out = mEp;
  1255. else
  1256. ci->ep0in = mEp;
  1257. continue;
  1258. }
  1259. list_add_tail(&mEp->ep.ep_list, &ci->gadget.ep_list);
  1260. }
  1261. return retval;
  1262. }
  1263. /**
  1264. * ci13xxx_start: register a gadget driver
  1265. * @gadget: our gadget
  1266. * @driver: the driver being registered
  1267. *
  1268. * Interrupts are enabled here.
  1269. */
  1270. static int ci13xxx_start(struct usb_gadget *gadget,
  1271. struct usb_gadget_driver *driver)
  1272. {
  1273. struct ci13xxx *ci = container_of(gadget, struct ci13xxx, gadget);
  1274. unsigned long flags;
  1275. int retval = -ENOMEM;
  1276. if (driver->disconnect == NULL)
  1277. return -EINVAL;
  1278. ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
  1279. retval = usb_ep_enable(&ci->ep0out->ep);
  1280. if (retval)
  1281. return retval;
  1282. ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
  1283. retval = usb_ep_enable(&ci->ep0in->ep);
  1284. if (retval)
  1285. return retval;
  1286. spin_lock_irqsave(&ci->lock, flags);
  1287. ci->driver = driver;
  1288. pm_runtime_get_sync(&ci->gadget.dev);
  1289. if (ci->platdata->flags & CI13XXX_PULLUP_ON_VBUS) {
  1290. if (ci->vbus_active) {
  1291. if (ci->platdata->flags & CI13XXX_REGS_SHARED)
  1292. hw_device_reset(ci, USBMODE_CM_DC);
  1293. } else {
  1294. pm_runtime_put_sync(&ci->gadget.dev);
  1295. goto done;
  1296. }
  1297. }
  1298. retval = hw_device_state(ci, ci->ep0out->qh.dma);
  1299. if (retval)
  1300. pm_runtime_put_sync(&ci->gadget.dev);
  1301. done:
  1302. spin_unlock_irqrestore(&ci->lock, flags);
  1303. return retval;
  1304. }
  1305. /**
  1306. * ci13xxx_stop: unregister a gadget driver
  1307. */
  1308. static int ci13xxx_stop(struct usb_gadget *gadget,
  1309. struct usb_gadget_driver *driver)
  1310. {
  1311. struct ci13xxx *ci = container_of(gadget, struct ci13xxx, gadget);
  1312. unsigned long flags;
  1313. spin_lock_irqsave(&ci->lock, flags);
  1314. if (!(ci->platdata->flags & CI13XXX_PULLUP_ON_VBUS) ||
  1315. ci->vbus_active) {
  1316. hw_device_state(ci, 0);
  1317. if (ci->platdata->notify_event)
  1318. ci->platdata->notify_event(ci,
  1319. CI13XXX_CONTROLLER_STOPPED_EVENT);
  1320. ci->driver = NULL;
  1321. spin_unlock_irqrestore(&ci->lock, flags);
  1322. _gadget_stop_activity(&ci->gadget);
  1323. spin_lock_irqsave(&ci->lock, flags);
  1324. pm_runtime_put(&ci->gadget.dev);
  1325. }
  1326. spin_unlock_irqrestore(&ci->lock, flags);
  1327. return 0;
  1328. }
  1329. /******************************************************************************
  1330. * BUS block
  1331. *****************************************************************************/
  1332. /**
  1333. * udc_irq: ci interrupt handler
  1334. *
  1335. * This function returns IRQ_HANDLED if the IRQ has been handled
  1336. * It locks access to registers
  1337. */
  1338. static irqreturn_t udc_irq(struct ci13xxx *ci)
  1339. {
  1340. irqreturn_t retval;
  1341. u32 intr;
  1342. if (ci == NULL)
  1343. return IRQ_HANDLED;
  1344. spin_lock(&ci->lock);
  1345. if (ci->platdata->flags & CI13XXX_REGS_SHARED) {
  1346. if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
  1347. USBMODE_CM_DC) {
  1348. spin_unlock(&ci->lock);
  1349. return IRQ_NONE;
  1350. }
  1351. }
  1352. intr = hw_test_and_clear_intr_active(ci);
  1353. dbg_interrupt(intr);
  1354. if (intr) {
  1355. /* order defines priority - do NOT change it */
  1356. if (USBi_URI & intr)
  1357. isr_reset_handler(ci);
  1358. if (USBi_PCI & intr) {
  1359. ci->gadget.speed = hw_port_is_high_speed(ci) ?
  1360. USB_SPEED_HIGH : USB_SPEED_FULL;
  1361. if (ci->suspended && ci->driver->resume) {
  1362. spin_unlock(&ci->lock);
  1363. ci->driver->resume(&ci->gadget);
  1364. spin_lock(&ci->lock);
  1365. ci->suspended = 0;
  1366. }
  1367. }
  1368. if (USBi_UI & intr)
  1369. isr_tr_complete_handler(ci);
  1370. if (USBi_SLI & intr) {
  1371. if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
  1372. ci->driver->suspend) {
  1373. ci->suspended = 1;
  1374. spin_unlock(&ci->lock);
  1375. ci->driver->suspend(&ci->gadget);
  1376. spin_lock(&ci->lock);
  1377. }
  1378. }
  1379. retval = IRQ_HANDLED;
  1380. } else {
  1381. retval = IRQ_NONE;
  1382. }
  1383. spin_unlock(&ci->lock);
  1384. return retval;
  1385. }
  1386. /**
  1387. * udc_release: driver release function
  1388. * @dev: device
  1389. *
  1390. * Currently does nothing
  1391. */
  1392. static void udc_release(struct device *dev)
  1393. {
  1394. }
  1395. /**
  1396. * udc_start: initialize gadget role
  1397. * @ci: chipidea controller
  1398. */
  1399. static int udc_start(struct ci13xxx *ci)
  1400. {
  1401. struct device *dev = ci->dev;
  1402. int retval = 0;
  1403. spin_lock_init(&ci->lock);
  1404. ci->gadget.ops = &usb_gadget_ops;
  1405. ci->gadget.speed = USB_SPEED_UNKNOWN;
  1406. ci->gadget.max_speed = USB_SPEED_HIGH;
  1407. ci->gadget.is_otg = 0;
  1408. ci->gadget.name = ci->platdata->name;
  1409. INIT_LIST_HEAD(&ci->gadget.ep_list);
  1410. dev_set_name(&ci->gadget.dev, "gadget");
  1411. ci->gadget.dev.dma_mask = dev->dma_mask;
  1412. ci->gadget.dev.coherent_dma_mask = dev->coherent_dma_mask;
  1413. ci->gadget.dev.parent = dev;
  1414. ci->gadget.dev.release = udc_release;
  1415. /* alloc resources */
  1416. ci->qh_pool = dma_pool_create("ci13xxx_qh", dev,
  1417. sizeof(struct ci13xxx_qh),
  1418. 64, CI13XXX_PAGE_SIZE);
  1419. if (ci->qh_pool == NULL)
  1420. return -ENOMEM;
  1421. ci->td_pool = dma_pool_create("ci13xxx_td", dev,
  1422. sizeof(struct ci13xxx_td),
  1423. 64, CI13XXX_PAGE_SIZE);
  1424. if (ci->td_pool == NULL) {
  1425. retval = -ENOMEM;
  1426. goto free_qh_pool;
  1427. }
  1428. retval = init_eps(ci);
  1429. if (retval)
  1430. goto free_pools;
  1431. ci->gadget.ep0 = &ci->ep0in->ep;
  1432. if (ci->global_phy)
  1433. ci->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
  1434. if (ci->platdata->flags & CI13XXX_REQUIRE_TRANSCEIVER) {
  1435. if (ci->transceiver == NULL) {
  1436. retval = -ENODEV;
  1437. goto free_pools;
  1438. }
  1439. }
  1440. if (!(ci->platdata->flags & CI13XXX_REGS_SHARED)) {
  1441. retval = hw_device_reset(ci, USBMODE_CM_DC);
  1442. if (retval)
  1443. goto put_transceiver;
  1444. }
  1445. retval = device_register(&ci->gadget.dev);
  1446. if (retval) {
  1447. put_device(&ci->gadget.dev);
  1448. goto put_transceiver;
  1449. }
  1450. retval = dbg_create_files(&ci->gadget.dev);
  1451. if (retval)
  1452. goto unreg_device;
  1453. if (!IS_ERR_OR_NULL(ci->transceiver)) {
  1454. retval = otg_set_peripheral(ci->transceiver->otg,
  1455. &ci->gadget);
  1456. if (retval)
  1457. goto remove_dbg;
  1458. }
  1459. retval = usb_add_gadget_udc(dev, &ci->gadget);
  1460. if (retval)
  1461. goto remove_trans;
  1462. pm_runtime_no_callbacks(&ci->gadget.dev);
  1463. pm_runtime_enable(&ci->gadget.dev);
  1464. return retval;
  1465. remove_trans:
  1466. if (!IS_ERR_OR_NULL(ci->transceiver)) {
  1467. otg_set_peripheral(ci->transceiver->otg, &ci->gadget);
  1468. if (ci->global_phy)
  1469. usb_put_phy(ci->transceiver);
  1470. }
  1471. dev_err(dev, "error = %i\n", retval);
  1472. remove_dbg:
  1473. dbg_remove_files(&ci->gadget.dev);
  1474. unreg_device:
  1475. device_unregister(&ci->gadget.dev);
  1476. put_transceiver:
  1477. if (!IS_ERR_OR_NULL(ci->transceiver) && ci->global_phy)
  1478. usb_put_phy(ci->transceiver);
  1479. free_pools:
  1480. dma_pool_destroy(ci->td_pool);
  1481. free_qh_pool:
  1482. dma_pool_destroy(ci->qh_pool);
  1483. return retval;
  1484. }
  1485. /**
  1486. * udc_remove: parent remove must call this to remove UDC
  1487. *
  1488. * No interrupts active, the IRQ has been released
  1489. */
  1490. static void udc_stop(struct ci13xxx *ci)
  1491. {
  1492. int i;
  1493. if (ci == NULL)
  1494. return;
  1495. usb_del_gadget_udc(&ci->gadget);
  1496. for (i = 0; i < ci->hw_ep_max; i++) {
  1497. struct ci13xxx_ep *mEp = &ci->ci13xxx_ep[i];
  1498. dma_pool_free(ci->qh_pool, mEp->qh.ptr, mEp->qh.dma);
  1499. }
  1500. dma_pool_destroy(ci->td_pool);
  1501. dma_pool_destroy(ci->qh_pool);
  1502. if (!IS_ERR_OR_NULL(ci->transceiver)) {
  1503. otg_set_peripheral(ci->transceiver->otg, NULL);
  1504. if (ci->global_phy)
  1505. usb_put_phy(ci->transceiver);
  1506. }
  1507. dbg_remove_files(&ci->gadget.dev);
  1508. device_unregister(&ci->gadget.dev);
  1509. /* my kobject is dynamic, I swear! */
  1510. memset(&ci->gadget, 0, sizeof(ci->gadget));
  1511. }
  1512. /**
  1513. * ci_hdrc_gadget_init - initialize device related bits
  1514. * ci: the controller
  1515. *
  1516. * This function enables the gadget role, if the device is "device capable".
  1517. */
  1518. int ci_hdrc_gadget_init(struct ci13xxx *ci)
  1519. {
  1520. struct ci_role_driver *rdrv;
  1521. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
  1522. return -ENXIO;
  1523. rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
  1524. if (!rdrv)
  1525. return -ENOMEM;
  1526. rdrv->start = udc_start;
  1527. rdrv->stop = udc_stop;
  1528. rdrv->irq = udc_irq;
  1529. rdrv->name = "gadget";
  1530. ci->roles[CI_ROLE_GADGET] = rdrv;
  1531. return 0;
  1532. }