aureon.c 62 KB

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  1. /*
  2. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  3. *
  4. * Lowlevel functions for Terratec Aureon cards
  5. *
  6. * Copyright (c) 2003 Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. *
  23. * NOTES:
  24. *
  25. * - we reuse the struct snd_akm4xxx record for storing the wm8770 codec data.
  26. * both wm and akm codecs are pretty similar, so we can integrate
  27. * both controls in the future, once if wm codecs are reused in
  28. * many boards.
  29. *
  30. * - DAC digital volumes are not implemented in the mixer.
  31. * if they show better response than DAC analog volumes, we can use them
  32. * instead.
  33. *
  34. * Lowlevel functions for AudioTrak Prodigy 7.1 (and possibly 192) cards
  35. * Copyright (c) 2003 Dimitromanolakis Apostolos <apostol@cs.utoronto.ca>
  36. *
  37. * version 0.82: Stable / not all features work yet (no communication with AC97 secondary)
  38. * added 64x/128x oversampling switch (should be 64x only for 96khz)
  39. * fixed some recording labels (still need to check the rest)
  40. * recording is working probably thanks to correct wm8770 initialization
  41. *
  42. * version 0.5: Initial release:
  43. * working: analog output, mixer, headphone amplifier switch
  44. * not working: prety much everything else, at least i could verify that
  45. * we have no digital output, no capture, pretty bad clicks and poops
  46. * on mixer switch and other coll stuff.
  47. */
  48. #include <linux/io.h>
  49. #include <linux/delay.h>
  50. #include <linux/interrupt.h>
  51. #include <linux/init.h>
  52. #include <linux/slab.h>
  53. #include <linux/mutex.h>
  54. #include <sound/core.h>
  55. #include "ice1712.h"
  56. #include "envy24ht.h"
  57. #include "aureon.h"
  58. #include <sound/tlv.h>
  59. /* AC97 register cache for Aureon */
  60. struct aureon_spec {
  61. unsigned short stac9744[64];
  62. unsigned int cs8415_mux;
  63. unsigned short master[2];
  64. unsigned short vol[8];
  65. unsigned char pca9554_out;
  66. };
  67. /* WM8770 registers */
  68. #define WM_DAC_ATTEN 0x00 /* DAC1-8 analog attenuation */
  69. #define WM_DAC_MASTER_ATTEN 0x08 /* DAC master analog attenuation */
  70. #define WM_DAC_DIG_ATTEN 0x09 /* DAC1-8 digital attenuation */
  71. #define WM_DAC_DIG_MASTER_ATTEN 0x11 /* DAC master digital attenuation */
  72. #define WM_PHASE_SWAP 0x12 /* DAC phase */
  73. #define WM_DAC_CTRL1 0x13 /* DAC control bits */
  74. #define WM_MUTE 0x14 /* mute controls */
  75. #define WM_DAC_CTRL2 0x15 /* de-emphasis and zefo-flag */
  76. #define WM_INT_CTRL 0x16 /* interface control */
  77. #define WM_MASTER 0x17 /* master clock and mode */
  78. #define WM_POWERDOWN 0x18 /* power-down controls */
  79. #define WM_ADC_GAIN 0x19 /* ADC gain L(19)/R(1a) */
  80. #define WM_ADC_MUX 0x1b /* input MUX */
  81. #define WM_OUT_MUX1 0x1c /* output MUX */
  82. #define WM_OUT_MUX2 0x1e /* output MUX */
  83. #define WM_RESET 0x1f /* software reset */
  84. /* CS8415A registers */
  85. #define CS8415_CTRL1 0x01
  86. #define CS8415_CTRL2 0x02
  87. #define CS8415_QSUB 0x14
  88. #define CS8415_RATIO 0x1E
  89. #define CS8415_C_BUFFER 0x20
  90. #define CS8415_ID 0x7F
  91. /* PCA9554 registers */
  92. #define PCA9554_DEV 0x40 /* I2C device address */
  93. #define PCA9554_IN 0x00 /* input port */
  94. #define PCA9554_OUT 0x01 /* output port */
  95. #define PCA9554_INVERT 0x02 /* input invert */
  96. #define PCA9554_DIR 0x03 /* port directions */
  97. /*
  98. * Aureon Universe additional controls using PCA9554
  99. */
  100. /*
  101. * Send data to pca9554
  102. */
  103. static void aureon_pca9554_write(struct snd_ice1712 *ice, unsigned char reg,
  104. unsigned char data)
  105. {
  106. unsigned int tmp;
  107. int i, j;
  108. unsigned char dev = PCA9554_DEV; /* ID 0100000, write */
  109. unsigned char val = 0;
  110. tmp = snd_ice1712_gpio_read(ice);
  111. snd_ice1712_gpio_set_mask(ice, ~(AUREON_SPI_MOSI|AUREON_SPI_CLK|
  112. AUREON_WM_RW|AUREON_WM_CS|
  113. AUREON_CS8415_CS));
  114. tmp |= AUREON_WM_RW;
  115. tmp |= AUREON_CS8415_CS | AUREON_WM_CS; /* disable SPI devices */
  116. tmp &= ~AUREON_SPI_MOSI;
  117. tmp &= ~AUREON_SPI_CLK;
  118. snd_ice1712_gpio_write(ice, tmp);
  119. udelay(50);
  120. /*
  121. * send i2c stop condition and start condition
  122. * to obtain sane state
  123. */
  124. tmp |= AUREON_SPI_CLK;
  125. snd_ice1712_gpio_write(ice, tmp);
  126. udelay(50);
  127. tmp |= AUREON_SPI_MOSI;
  128. snd_ice1712_gpio_write(ice, tmp);
  129. udelay(100);
  130. tmp &= ~AUREON_SPI_MOSI;
  131. snd_ice1712_gpio_write(ice, tmp);
  132. udelay(50);
  133. tmp &= ~AUREON_SPI_CLK;
  134. snd_ice1712_gpio_write(ice, tmp);
  135. udelay(100);
  136. /*
  137. * send device address, command and value,
  138. * skipping ack cycles in between
  139. */
  140. for (j = 0; j < 3; j++) {
  141. switch (j) {
  142. case 0:
  143. val = dev;
  144. break;
  145. case 1:
  146. val = reg;
  147. break;
  148. case 2:
  149. val = data;
  150. break;
  151. }
  152. for (i = 7; i >= 0; i--) {
  153. tmp &= ~AUREON_SPI_CLK;
  154. snd_ice1712_gpio_write(ice, tmp);
  155. udelay(40);
  156. if (val & (1 << i))
  157. tmp |= AUREON_SPI_MOSI;
  158. else
  159. tmp &= ~AUREON_SPI_MOSI;
  160. snd_ice1712_gpio_write(ice, tmp);
  161. udelay(40);
  162. tmp |= AUREON_SPI_CLK;
  163. snd_ice1712_gpio_write(ice, tmp);
  164. udelay(40);
  165. }
  166. tmp &= ~AUREON_SPI_CLK;
  167. snd_ice1712_gpio_write(ice, tmp);
  168. udelay(40);
  169. tmp |= AUREON_SPI_CLK;
  170. snd_ice1712_gpio_write(ice, tmp);
  171. udelay(40);
  172. tmp &= ~AUREON_SPI_CLK;
  173. snd_ice1712_gpio_write(ice, tmp);
  174. udelay(40);
  175. }
  176. tmp &= ~AUREON_SPI_CLK;
  177. snd_ice1712_gpio_write(ice, tmp);
  178. udelay(40);
  179. tmp &= ~AUREON_SPI_MOSI;
  180. snd_ice1712_gpio_write(ice, tmp);
  181. udelay(40);
  182. tmp |= AUREON_SPI_CLK;
  183. snd_ice1712_gpio_write(ice, tmp);
  184. udelay(50);
  185. tmp |= AUREON_SPI_MOSI;
  186. snd_ice1712_gpio_write(ice, tmp);
  187. udelay(100);
  188. }
  189. static int aureon_universe_inmux_info(struct snd_kcontrol *kcontrol,
  190. struct snd_ctl_elem_info *uinfo)
  191. {
  192. static const char * const texts[3] =
  193. {"Internal Aux", "Wavetable", "Rear Line-In"};
  194. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  195. uinfo->count = 1;
  196. uinfo->value.enumerated.items = 3;
  197. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  198. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  199. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  200. return 0;
  201. }
  202. static int aureon_universe_inmux_get(struct snd_kcontrol *kcontrol,
  203. struct snd_ctl_elem_value *ucontrol)
  204. {
  205. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  206. struct aureon_spec *spec = ice->spec;
  207. ucontrol->value.enumerated.item[0] = spec->pca9554_out;
  208. return 0;
  209. }
  210. static int aureon_universe_inmux_put(struct snd_kcontrol *kcontrol,
  211. struct snd_ctl_elem_value *ucontrol)
  212. {
  213. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  214. struct aureon_spec *spec = ice->spec;
  215. unsigned char oval, nval;
  216. int change;
  217. nval = ucontrol->value.enumerated.item[0];
  218. if (nval >= 3)
  219. return -EINVAL;
  220. snd_ice1712_save_gpio_status(ice);
  221. oval = spec->pca9554_out;
  222. change = (oval != nval);
  223. if (change) {
  224. aureon_pca9554_write(ice, PCA9554_OUT, nval);
  225. spec->pca9554_out = nval;
  226. }
  227. snd_ice1712_restore_gpio_status(ice);
  228. return change;
  229. }
  230. static void aureon_ac97_write(struct snd_ice1712 *ice, unsigned short reg,
  231. unsigned short val)
  232. {
  233. struct aureon_spec *spec = ice->spec;
  234. unsigned int tmp;
  235. /* Send address to XILINX chip */
  236. tmp = (snd_ice1712_gpio_read(ice) & ~0xFF) | (reg & 0x7F);
  237. snd_ice1712_gpio_write(ice, tmp);
  238. udelay(10);
  239. tmp |= AUREON_AC97_ADDR;
  240. snd_ice1712_gpio_write(ice, tmp);
  241. udelay(10);
  242. tmp &= ~AUREON_AC97_ADDR;
  243. snd_ice1712_gpio_write(ice, tmp);
  244. udelay(10);
  245. /* Send low-order byte to XILINX chip */
  246. tmp &= ~AUREON_AC97_DATA_MASK;
  247. tmp |= val & AUREON_AC97_DATA_MASK;
  248. snd_ice1712_gpio_write(ice, tmp);
  249. udelay(10);
  250. tmp |= AUREON_AC97_DATA_LOW;
  251. snd_ice1712_gpio_write(ice, tmp);
  252. udelay(10);
  253. tmp &= ~AUREON_AC97_DATA_LOW;
  254. snd_ice1712_gpio_write(ice, tmp);
  255. udelay(10);
  256. /* Send high-order byte to XILINX chip */
  257. tmp &= ~AUREON_AC97_DATA_MASK;
  258. tmp |= (val >> 8) & AUREON_AC97_DATA_MASK;
  259. snd_ice1712_gpio_write(ice, tmp);
  260. udelay(10);
  261. tmp |= AUREON_AC97_DATA_HIGH;
  262. snd_ice1712_gpio_write(ice, tmp);
  263. udelay(10);
  264. tmp &= ~AUREON_AC97_DATA_HIGH;
  265. snd_ice1712_gpio_write(ice, tmp);
  266. udelay(10);
  267. /* Instruct XILINX chip to parse the data to the STAC9744 chip */
  268. tmp |= AUREON_AC97_COMMIT;
  269. snd_ice1712_gpio_write(ice, tmp);
  270. udelay(10);
  271. tmp &= ~AUREON_AC97_COMMIT;
  272. snd_ice1712_gpio_write(ice, tmp);
  273. udelay(10);
  274. /* Store the data in out private buffer */
  275. spec->stac9744[(reg & 0x7F) >> 1] = val;
  276. }
  277. static unsigned short aureon_ac97_read(struct snd_ice1712 *ice, unsigned short reg)
  278. {
  279. struct aureon_spec *spec = ice->spec;
  280. return spec->stac9744[(reg & 0x7F) >> 1];
  281. }
  282. /*
  283. * Initialize STAC9744 chip
  284. */
  285. static int aureon_ac97_init(struct snd_ice1712 *ice)
  286. {
  287. struct aureon_spec *spec = ice->spec;
  288. int i;
  289. static const unsigned short ac97_defaults[] = {
  290. 0x00, 0x9640,
  291. 0x02, 0x8000,
  292. 0x04, 0x8000,
  293. 0x06, 0x8000,
  294. 0x0C, 0x8008,
  295. 0x0E, 0x8008,
  296. 0x10, 0x8808,
  297. 0x12, 0x8808,
  298. 0x14, 0x8808,
  299. 0x16, 0x8808,
  300. 0x18, 0x8808,
  301. 0x1C, 0x8000,
  302. 0x26, 0x000F,
  303. 0x28, 0x0201,
  304. 0x2C, 0xBB80,
  305. 0x32, 0xBB80,
  306. 0x7C, 0x8384,
  307. 0x7E, 0x7644,
  308. (unsigned short)-1
  309. };
  310. unsigned int tmp;
  311. /* Cold reset */
  312. tmp = (snd_ice1712_gpio_read(ice) | AUREON_AC97_RESET) & ~AUREON_AC97_DATA_MASK;
  313. snd_ice1712_gpio_write(ice, tmp);
  314. udelay(3);
  315. tmp &= ~AUREON_AC97_RESET;
  316. snd_ice1712_gpio_write(ice, tmp);
  317. udelay(3);
  318. tmp |= AUREON_AC97_RESET;
  319. snd_ice1712_gpio_write(ice, tmp);
  320. udelay(3);
  321. memset(&spec->stac9744, 0, sizeof(spec->stac9744));
  322. for (i = 0; ac97_defaults[i] != (unsigned short)-1; i += 2)
  323. spec->stac9744[(ac97_defaults[i]) >> 1] = ac97_defaults[i+1];
  324. /* Unmute AC'97 master volume permanently - muting is done by WM8770 */
  325. aureon_ac97_write(ice, AC97_MASTER, 0x0000);
  326. return 0;
  327. }
  328. #define AUREON_AC97_STEREO 0x80
  329. /*
  330. * AC'97 volume controls
  331. */
  332. static int aureon_ac97_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  333. {
  334. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  335. uinfo->count = kcontrol->private_value & AUREON_AC97_STEREO ? 2 : 1;
  336. uinfo->value.integer.min = 0;
  337. uinfo->value.integer.max = 31;
  338. return 0;
  339. }
  340. static int aureon_ac97_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  341. {
  342. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  343. unsigned short vol;
  344. mutex_lock(&ice->gpio_mutex);
  345. vol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  346. ucontrol->value.integer.value[0] = 0x1F - (vol & 0x1F);
  347. if (kcontrol->private_value & AUREON_AC97_STEREO)
  348. ucontrol->value.integer.value[1] = 0x1F - ((vol >> 8) & 0x1F);
  349. mutex_unlock(&ice->gpio_mutex);
  350. return 0;
  351. }
  352. static int aureon_ac97_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  353. {
  354. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  355. unsigned short ovol, nvol;
  356. int change;
  357. snd_ice1712_save_gpio_status(ice);
  358. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  359. nvol = (0x1F - ucontrol->value.integer.value[0]) & 0x001F;
  360. if (kcontrol->private_value & AUREON_AC97_STEREO)
  361. nvol |= ((0x1F - ucontrol->value.integer.value[1]) << 8) & 0x1F00;
  362. nvol |= ovol & ~0x1F1F;
  363. change = (ovol != nvol);
  364. if (change)
  365. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  366. snd_ice1712_restore_gpio_status(ice);
  367. return change;
  368. }
  369. /*
  370. * AC'97 mute controls
  371. */
  372. #define aureon_ac97_mute_info snd_ctl_boolean_mono_info
  373. static int aureon_ac97_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  374. {
  375. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  376. mutex_lock(&ice->gpio_mutex);
  377. ucontrol->value.integer.value[0] = aureon_ac97_read(ice,
  378. kcontrol->private_value & 0x7F) & 0x8000 ? 0 : 1;
  379. mutex_unlock(&ice->gpio_mutex);
  380. return 0;
  381. }
  382. static int aureon_ac97_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  383. {
  384. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  385. unsigned short ovol, nvol;
  386. int change;
  387. snd_ice1712_save_gpio_status(ice);
  388. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  389. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x8000) | (ovol & ~0x8000);
  390. change = (ovol != nvol);
  391. if (change)
  392. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  393. snd_ice1712_restore_gpio_status(ice);
  394. return change;
  395. }
  396. /*
  397. * AC'97 mute controls
  398. */
  399. #define aureon_ac97_micboost_info snd_ctl_boolean_mono_info
  400. static int aureon_ac97_micboost_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  401. {
  402. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  403. mutex_lock(&ice->gpio_mutex);
  404. ucontrol->value.integer.value[0] = aureon_ac97_read(ice, AC97_MIC) & 0x0020 ? 0 : 1;
  405. mutex_unlock(&ice->gpio_mutex);
  406. return 0;
  407. }
  408. static int aureon_ac97_micboost_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  409. {
  410. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  411. unsigned short ovol, nvol;
  412. int change;
  413. snd_ice1712_save_gpio_status(ice);
  414. ovol = aureon_ac97_read(ice, AC97_MIC);
  415. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x0020) | (ovol & ~0x0020);
  416. change = (ovol != nvol);
  417. if (change)
  418. aureon_ac97_write(ice, AC97_MIC, nvol);
  419. snd_ice1712_restore_gpio_status(ice);
  420. return change;
  421. }
  422. /*
  423. * write data in the SPI mode
  424. */
  425. static void aureon_spi_write(struct snd_ice1712 *ice, unsigned int cs, unsigned int data, int bits)
  426. {
  427. unsigned int tmp;
  428. int i;
  429. unsigned int mosi, clk;
  430. tmp = snd_ice1712_gpio_read(ice);
  431. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  432. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT) {
  433. snd_ice1712_gpio_set_mask(ice, ~(PRODIGY_SPI_MOSI|PRODIGY_SPI_CLK|PRODIGY_WM_CS));
  434. mosi = PRODIGY_SPI_MOSI;
  435. clk = PRODIGY_SPI_CLK;
  436. } else {
  437. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RW|AUREON_SPI_MOSI|AUREON_SPI_CLK|
  438. AUREON_WM_CS|AUREON_CS8415_CS));
  439. mosi = AUREON_SPI_MOSI;
  440. clk = AUREON_SPI_CLK;
  441. tmp |= AUREON_WM_RW;
  442. }
  443. tmp &= ~cs;
  444. snd_ice1712_gpio_write(ice, tmp);
  445. udelay(1);
  446. for (i = bits - 1; i >= 0; i--) {
  447. tmp &= ~clk;
  448. snd_ice1712_gpio_write(ice, tmp);
  449. udelay(1);
  450. if (data & (1 << i))
  451. tmp |= mosi;
  452. else
  453. tmp &= ~mosi;
  454. snd_ice1712_gpio_write(ice, tmp);
  455. udelay(1);
  456. tmp |= clk;
  457. snd_ice1712_gpio_write(ice, tmp);
  458. udelay(1);
  459. }
  460. tmp &= ~clk;
  461. tmp |= cs;
  462. snd_ice1712_gpio_write(ice, tmp);
  463. udelay(1);
  464. tmp |= clk;
  465. snd_ice1712_gpio_write(ice, tmp);
  466. udelay(1);
  467. }
  468. /*
  469. * Read data in SPI mode
  470. */
  471. static void aureon_spi_read(struct snd_ice1712 *ice, unsigned int cs,
  472. unsigned int data, int bits, unsigned char *buffer, int size)
  473. {
  474. int i, j;
  475. unsigned int tmp;
  476. tmp = (snd_ice1712_gpio_read(ice) & ~AUREON_SPI_CLK) | AUREON_CS8415_CS|AUREON_WM_CS;
  477. snd_ice1712_gpio_write(ice, tmp);
  478. tmp &= ~cs;
  479. snd_ice1712_gpio_write(ice, tmp);
  480. udelay(1);
  481. for (i = bits-1; i >= 0; i--) {
  482. if (data & (1 << i))
  483. tmp |= AUREON_SPI_MOSI;
  484. else
  485. tmp &= ~AUREON_SPI_MOSI;
  486. snd_ice1712_gpio_write(ice, tmp);
  487. udelay(1);
  488. tmp |= AUREON_SPI_CLK;
  489. snd_ice1712_gpio_write(ice, tmp);
  490. udelay(1);
  491. tmp &= ~AUREON_SPI_CLK;
  492. snd_ice1712_gpio_write(ice, tmp);
  493. udelay(1);
  494. }
  495. for (j = 0; j < size; j++) {
  496. unsigned char outdata = 0;
  497. for (i = 7; i >= 0; i--) {
  498. tmp = snd_ice1712_gpio_read(ice);
  499. outdata <<= 1;
  500. outdata |= (tmp & AUREON_SPI_MISO) ? 1 : 0;
  501. udelay(1);
  502. tmp |= AUREON_SPI_CLK;
  503. snd_ice1712_gpio_write(ice, tmp);
  504. udelay(1);
  505. tmp &= ~AUREON_SPI_CLK;
  506. snd_ice1712_gpio_write(ice, tmp);
  507. udelay(1);
  508. }
  509. buffer[j] = outdata;
  510. }
  511. tmp |= cs;
  512. snd_ice1712_gpio_write(ice, tmp);
  513. }
  514. static unsigned char aureon_cs8415_get(struct snd_ice1712 *ice, int reg)
  515. {
  516. unsigned char val;
  517. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  518. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, &val, 1);
  519. return val;
  520. }
  521. static void aureon_cs8415_read(struct snd_ice1712 *ice, int reg,
  522. unsigned char *buffer, int size)
  523. {
  524. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  525. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, buffer, size);
  526. }
  527. static void aureon_cs8415_put(struct snd_ice1712 *ice, int reg,
  528. unsigned char val)
  529. {
  530. aureon_spi_write(ice, AUREON_CS8415_CS, 0x200000 | (reg << 8) | val, 24);
  531. }
  532. /*
  533. * get the current register value of WM codec
  534. */
  535. static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
  536. {
  537. reg <<= 1;
  538. return ((unsigned short)ice->akm[0].images[reg] << 8) |
  539. ice->akm[0].images[reg + 1];
  540. }
  541. /*
  542. * set the register value of WM codec
  543. */
  544. static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
  545. {
  546. aureon_spi_write(ice,
  547. ((ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  548. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT) ?
  549. PRODIGY_WM_CS : AUREON_WM_CS),
  550. (reg << 9) | (val & 0x1ff), 16);
  551. }
  552. /*
  553. * set the register value of WM codec and remember it
  554. */
  555. static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
  556. {
  557. wm_put_nocache(ice, reg, val);
  558. reg <<= 1;
  559. ice->akm[0].images[reg] = val >> 8;
  560. ice->akm[0].images[reg + 1] = val;
  561. }
  562. /*
  563. */
  564. #define aureon_mono_bool_info snd_ctl_boolean_mono_info
  565. /*
  566. * AC'97 master playback mute controls (Mute on WM8770 chip)
  567. */
  568. #define aureon_ac97_mmute_info snd_ctl_boolean_mono_info
  569. static int aureon_ac97_mmute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  570. {
  571. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  572. mutex_lock(&ice->gpio_mutex);
  573. ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX1) >> 1) & 0x01;
  574. mutex_unlock(&ice->gpio_mutex);
  575. return 0;
  576. }
  577. static int aureon_ac97_mmute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  578. {
  579. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  580. unsigned short ovol, nvol;
  581. int change;
  582. snd_ice1712_save_gpio_status(ice);
  583. ovol = wm_get(ice, WM_OUT_MUX1);
  584. nvol = (ovol & ~0x02) | (ucontrol->value.integer.value[0] ? 0x02 : 0x00);
  585. change = (ovol != nvol);
  586. if (change)
  587. wm_put(ice, WM_OUT_MUX1, nvol);
  588. snd_ice1712_restore_gpio_status(ice);
  589. return change;
  590. }
  591. static const DECLARE_TLV_DB_SCALE(db_scale_wm_dac, -10000, 100, 1);
  592. static const DECLARE_TLV_DB_SCALE(db_scale_wm_pcm, -6400, 50, 1);
  593. static const DECLARE_TLV_DB_SCALE(db_scale_wm_adc, -1200, 100, 0);
  594. static const DECLARE_TLV_DB_SCALE(db_scale_ac97_master, -4650, 150, 0);
  595. static const DECLARE_TLV_DB_SCALE(db_scale_ac97_gain, -3450, 150, 0);
  596. #define WM_VOL_MAX 100
  597. #define WM_VOL_CNT 101 /* 0dB .. -100dB */
  598. #define WM_VOL_MUTE 0x8000
  599. static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index, unsigned short vol, unsigned short master)
  600. {
  601. unsigned char nvol;
  602. if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE)) {
  603. nvol = 0;
  604. } else {
  605. nvol = ((vol % WM_VOL_CNT) * (master % WM_VOL_CNT)) /
  606. WM_VOL_MAX;
  607. nvol += 0x1b;
  608. }
  609. wm_put(ice, index, nvol);
  610. wm_put_nocache(ice, index, 0x180 | nvol);
  611. }
  612. /*
  613. * DAC mute control
  614. */
  615. #define wm_pcm_mute_info snd_ctl_boolean_mono_info
  616. static int wm_pcm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  617. {
  618. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  619. mutex_lock(&ice->gpio_mutex);
  620. ucontrol->value.integer.value[0] = (wm_get(ice, WM_MUTE) & 0x10) ? 0 : 1;
  621. mutex_unlock(&ice->gpio_mutex);
  622. return 0;
  623. }
  624. static int wm_pcm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  625. {
  626. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  627. unsigned short nval, oval;
  628. int change;
  629. snd_ice1712_save_gpio_status(ice);
  630. oval = wm_get(ice, WM_MUTE);
  631. nval = (oval & ~0x10) | (ucontrol->value.integer.value[0] ? 0 : 0x10);
  632. change = (oval != nval);
  633. if (change)
  634. wm_put(ice, WM_MUTE, nval);
  635. snd_ice1712_restore_gpio_status(ice);
  636. return change;
  637. }
  638. /*
  639. * Master volume attenuation mixer control
  640. */
  641. static int wm_master_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  642. {
  643. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  644. uinfo->count = 2;
  645. uinfo->value.integer.min = 0;
  646. uinfo->value.integer.max = WM_VOL_MAX;
  647. return 0;
  648. }
  649. static int wm_master_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  650. {
  651. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  652. struct aureon_spec *spec = ice->spec;
  653. int i;
  654. for (i = 0; i < 2; i++)
  655. ucontrol->value.integer.value[i] =
  656. spec->master[i] & ~WM_VOL_MUTE;
  657. return 0;
  658. }
  659. static int wm_master_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  660. {
  661. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  662. struct aureon_spec *spec = ice->spec;
  663. int ch, change = 0;
  664. snd_ice1712_save_gpio_status(ice);
  665. for (ch = 0; ch < 2; ch++) {
  666. unsigned int vol = ucontrol->value.integer.value[ch];
  667. if (vol > WM_VOL_MAX)
  668. vol = WM_VOL_MAX;
  669. vol |= spec->master[ch] & WM_VOL_MUTE;
  670. if (vol != spec->master[ch]) {
  671. int dac;
  672. spec->master[ch] = vol;
  673. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  674. wm_set_vol(ice, WM_DAC_ATTEN + dac + ch,
  675. spec->vol[dac + ch],
  676. spec->master[ch]);
  677. change = 1;
  678. }
  679. }
  680. snd_ice1712_restore_gpio_status(ice);
  681. return change;
  682. }
  683. /*
  684. * DAC volume attenuation mixer control
  685. */
  686. static int wm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  687. {
  688. int voices = kcontrol->private_value >> 8;
  689. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  690. uinfo->count = voices;
  691. uinfo->value.integer.min = 0; /* mute (-101dB) */
  692. uinfo->value.integer.max = WM_VOL_MAX; /* 0dB */
  693. return 0;
  694. }
  695. static int wm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  696. {
  697. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  698. struct aureon_spec *spec = ice->spec;
  699. int i, ofs, voices;
  700. voices = kcontrol->private_value >> 8;
  701. ofs = kcontrol->private_value & 0xff;
  702. for (i = 0; i < voices; i++)
  703. ucontrol->value.integer.value[i] =
  704. spec->vol[ofs+i] & ~WM_VOL_MUTE;
  705. return 0;
  706. }
  707. static int wm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  708. {
  709. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  710. struct aureon_spec *spec = ice->spec;
  711. int i, idx, ofs, voices;
  712. int change = 0;
  713. voices = kcontrol->private_value >> 8;
  714. ofs = kcontrol->private_value & 0xff;
  715. snd_ice1712_save_gpio_status(ice);
  716. for (i = 0; i < voices; i++) {
  717. unsigned int vol = ucontrol->value.integer.value[i];
  718. if (vol > WM_VOL_MAX)
  719. vol = WM_VOL_MAX;
  720. vol |= spec->vol[ofs+i] & WM_VOL_MUTE;
  721. if (vol != spec->vol[ofs+i]) {
  722. spec->vol[ofs+i] = vol;
  723. idx = WM_DAC_ATTEN + ofs + i;
  724. wm_set_vol(ice, idx, spec->vol[ofs + i],
  725. spec->master[i]);
  726. change = 1;
  727. }
  728. }
  729. snd_ice1712_restore_gpio_status(ice);
  730. return change;
  731. }
  732. /*
  733. * WM8770 mute control
  734. */
  735. static int wm_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  736. {
  737. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  738. uinfo->count = kcontrol->private_value >> 8;
  739. uinfo->value.integer.min = 0;
  740. uinfo->value.integer.max = 1;
  741. return 0;
  742. }
  743. static int wm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  744. {
  745. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  746. struct aureon_spec *spec = ice->spec;
  747. int voices, ofs, i;
  748. voices = kcontrol->private_value >> 8;
  749. ofs = kcontrol->private_value & 0xFF;
  750. for (i = 0; i < voices; i++)
  751. ucontrol->value.integer.value[i] =
  752. (spec->vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
  753. return 0;
  754. }
  755. static int wm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  756. {
  757. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  758. struct aureon_spec *spec = ice->spec;
  759. int change = 0, voices, ofs, i;
  760. voices = kcontrol->private_value >> 8;
  761. ofs = kcontrol->private_value & 0xFF;
  762. snd_ice1712_save_gpio_status(ice);
  763. for (i = 0; i < voices; i++) {
  764. int val = (spec->vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
  765. if (ucontrol->value.integer.value[i] != val) {
  766. spec->vol[ofs + i] &= ~WM_VOL_MUTE;
  767. spec->vol[ofs + i] |=
  768. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  769. wm_set_vol(ice, ofs + i, spec->vol[ofs + i],
  770. spec->master[i]);
  771. change = 1;
  772. }
  773. }
  774. snd_ice1712_restore_gpio_status(ice);
  775. return change;
  776. }
  777. /*
  778. * WM8770 master mute control
  779. */
  780. #define wm_master_mute_info snd_ctl_boolean_stereo_info
  781. static int wm_master_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  782. {
  783. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  784. struct aureon_spec *spec = ice->spec;
  785. ucontrol->value.integer.value[0] =
  786. (spec->master[0] & WM_VOL_MUTE) ? 0 : 1;
  787. ucontrol->value.integer.value[1] =
  788. (spec->master[1] & WM_VOL_MUTE) ? 0 : 1;
  789. return 0;
  790. }
  791. static int wm_master_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  792. {
  793. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  794. struct aureon_spec *spec = ice->spec;
  795. int change = 0, i;
  796. snd_ice1712_save_gpio_status(ice);
  797. for (i = 0; i < 2; i++) {
  798. int val = (spec->master[i] & WM_VOL_MUTE) ? 0 : 1;
  799. if (ucontrol->value.integer.value[i] != val) {
  800. int dac;
  801. spec->master[i] &= ~WM_VOL_MUTE;
  802. spec->master[i] |=
  803. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  804. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  805. wm_set_vol(ice, WM_DAC_ATTEN + dac + i,
  806. spec->vol[dac + i],
  807. spec->master[i]);
  808. change = 1;
  809. }
  810. }
  811. snd_ice1712_restore_gpio_status(ice);
  812. return change;
  813. }
  814. /* digital master volume */
  815. #define PCM_0dB 0xff
  816. #define PCM_RES 128 /* -64dB */
  817. #define PCM_MIN (PCM_0dB - PCM_RES)
  818. static int wm_pcm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  819. {
  820. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  821. uinfo->count = 1;
  822. uinfo->value.integer.min = 0; /* mute (-64dB) */
  823. uinfo->value.integer.max = PCM_RES; /* 0dB */
  824. return 0;
  825. }
  826. static int wm_pcm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  827. {
  828. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  829. unsigned short val;
  830. mutex_lock(&ice->gpio_mutex);
  831. val = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  832. val = val > PCM_MIN ? (val - PCM_MIN) : 0;
  833. ucontrol->value.integer.value[0] = val;
  834. mutex_unlock(&ice->gpio_mutex);
  835. return 0;
  836. }
  837. static int wm_pcm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  838. {
  839. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  840. unsigned short ovol, nvol;
  841. int change = 0;
  842. nvol = ucontrol->value.integer.value[0];
  843. if (nvol > PCM_RES)
  844. return -EINVAL;
  845. snd_ice1712_save_gpio_status(ice);
  846. nvol = (nvol ? (nvol + PCM_MIN) : 0) & 0xff;
  847. ovol = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  848. if (ovol != nvol) {
  849. wm_put(ice, WM_DAC_DIG_MASTER_ATTEN, nvol); /* prelatch */
  850. wm_put_nocache(ice, WM_DAC_DIG_MASTER_ATTEN, nvol | 0x100); /* update */
  851. change = 1;
  852. }
  853. snd_ice1712_restore_gpio_status(ice);
  854. return change;
  855. }
  856. /*
  857. * ADC mute control
  858. */
  859. #define wm_adc_mute_info snd_ctl_boolean_stereo_info
  860. static int wm_adc_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  861. {
  862. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  863. unsigned short val;
  864. int i;
  865. mutex_lock(&ice->gpio_mutex);
  866. for (i = 0; i < 2; i++) {
  867. val = wm_get(ice, WM_ADC_GAIN + i);
  868. ucontrol->value.integer.value[i] = ~val>>5 & 0x1;
  869. }
  870. mutex_unlock(&ice->gpio_mutex);
  871. return 0;
  872. }
  873. static int wm_adc_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  874. {
  875. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  876. unsigned short new, old;
  877. int i, change = 0;
  878. snd_ice1712_save_gpio_status(ice);
  879. for (i = 0; i < 2; i++) {
  880. old = wm_get(ice, WM_ADC_GAIN + i);
  881. new = (~ucontrol->value.integer.value[i]<<5&0x20) | (old&~0x20);
  882. if (new != old) {
  883. wm_put(ice, WM_ADC_GAIN + i, new);
  884. change = 1;
  885. }
  886. }
  887. snd_ice1712_restore_gpio_status(ice);
  888. return change;
  889. }
  890. /*
  891. * ADC gain mixer control
  892. */
  893. static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  894. {
  895. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  896. uinfo->count = 2;
  897. uinfo->value.integer.min = 0; /* -12dB */
  898. uinfo->value.integer.max = 0x1f; /* 19dB */
  899. return 0;
  900. }
  901. static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  902. {
  903. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  904. int i, idx;
  905. unsigned short vol;
  906. mutex_lock(&ice->gpio_mutex);
  907. for (i = 0; i < 2; i++) {
  908. idx = WM_ADC_GAIN + i;
  909. vol = wm_get(ice, idx) & 0x1f;
  910. ucontrol->value.integer.value[i] = vol;
  911. }
  912. mutex_unlock(&ice->gpio_mutex);
  913. return 0;
  914. }
  915. static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  916. {
  917. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  918. int i, idx;
  919. unsigned short ovol, nvol;
  920. int change = 0;
  921. snd_ice1712_save_gpio_status(ice);
  922. for (i = 0; i < 2; i++) {
  923. idx = WM_ADC_GAIN + i;
  924. nvol = ucontrol->value.integer.value[i] & 0x1f;
  925. ovol = wm_get(ice, idx);
  926. if ((ovol & 0x1f) != nvol) {
  927. wm_put(ice, idx, nvol | (ovol & ~0x1f));
  928. change = 1;
  929. }
  930. }
  931. snd_ice1712_restore_gpio_status(ice);
  932. return change;
  933. }
  934. /*
  935. * ADC input mux mixer control
  936. */
  937. static int wm_adc_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  938. {
  939. static const char * const texts[] = {
  940. "CD", /* AIN1 */
  941. "Aux", /* AIN2 */
  942. "Line", /* AIN3 */
  943. "Mic", /* AIN4 */
  944. "AC97" /* AIN5 */
  945. };
  946. static const char * const universe_texts[] = {
  947. "Aux1", /* AIN1 */
  948. "CD", /* AIN2 */
  949. "Phono", /* AIN3 */
  950. "Line", /* AIN4 */
  951. "Aux2", /* AIN5 */
  952. "Mic", /* AIN6 */
  953. "Aux3", /* AIN7 */
  954. "AC97" /* AIN8 */
  955. };
  956. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  957. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  958. uinfo->count = 2;
  959. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
  960. uinfo->value.enumerated.items = 8;
  961. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  962. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  963. strcpy(uinfo->value.enumerated.name, universe_texts[uinfo->value.enumerated.item]);
  964. } else {
  965. uinfo->value.enumerated.items = 5;
  966. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  967. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  968. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  969. }
  970. return 0;
  971. }
  972. static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  973. {
  974. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  975. unsigned short val;
  976. mutex_lock(&ice->gpio_mutex);
  977. val = wm_get(ice, WM_ADC_MUX);
  978. ucontrol->value.enumerated.item[0] = val & 7;
  979. ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
  980. mutex_unlock(&ice->gpio_mutex);
  981. return 0;
  982. }
  983. static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  984. {
  985. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  986. unsigned short oval, nval;
  987. int change;
  988. snd_ice1712_save_gpio_status(ice);
  989. oval = wm_get(ice, WM_ADC_MUX);
  990. nval = oval & ~0x77;
  991. nval |= ucontrol->value.enumerated.item[0] & 7;
  992. nval |= (ucontrol->value.enumerated.item[1] & 7) << 4;
  993. change = (oval != nval);
  994. if (change)
  995. wm_put(ice, WM_ADC_MUX, nval);
  996. snd_ice1712_restore_gpio_status(ice);
  997. return change;
  998. }
  999. /*
  1000. * CS8415 Input mux
  1001. */
  1002. static int aureon_cs8415_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1003. {
  1004. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1005. static const char * const aureon_texts[] = {
  1006. "CD", /* RXP0 */
  1007. "Optical" /* RXP1 */
  1008. };
  1009. static const char * const prodigy_texts[] = {
  1010. "CD",
  1011. "Coax"
  1012. };
  1013. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1014. uinfo->count = 1;
  1015. uinfo->value.enumerated.items = 2;
  1016. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1017. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1018. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71)
  1019. strcpy(uinfo->value.enumerated.name, prodigy_texts[uinfo->value.enumerated.item]);
  1020. else
  1021. strcpy(uinfo->value.enumerated.name, aureon_texts[uinfo->value.enumerated.item]);
  1022. return 0;
  1023. }
  1024. static int aureon_cs8415_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1025. {
  1026. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1027. struct aureon_spec *spec = ice->spec;
  1028. /* snd_ice1712_save_gpio_status(ice); */
  1029. /* val = aureon_cs8415_get(ice, CS8415_CTRL2); */
  1030. ucontrol->value.enumerated.item[0] = spec->cs8415_mux;
  1031. /* snd_ice1712_restore_gpio_status(ice); */
  1032. return 0;
  1033. }
  1034. static int aureon_cs8415_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1035. {
  1036. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1037. struct aureon_spec *spec = ice->spec;
  1038. unsigned short oval, nval;
  1039. int change;
  1040. snd_ice1712_save_gpio_status(ice);
  1041. oval = aureon_cs8415_get(ice, CS8415_CTRL2);
  1042. nval = oval & ~0x07;
  1043. nval |= ucontrol->value.enumerated.item[0] & 7;
  1044. change = (oval != nval);
  1045. if (change)
  1046. aureon_cs8415_put(ice, CS8415_CTRL2, nval);
  1047. snd_ice1712_restore_gpio_status(ice);
  1048. spec->cs8415_mux = ucontrol->value.enumerated.item[0];
  1049. return change;
  1050. }
  1051. static int aureon_cs8415_rate_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1052. {
  1053. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1054. uinfo->count = 1;
  1055. uinfo->value.integer.min = 0;
  1056. uinfo->value.integer.max = 192000;
  1057. return 0;
  1058. }
  1059. static int aureon_cs8415_rate_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1060. {
  1061. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1062. unsigned char ratio;
  1063. ratio = aureon_cs8415_get(ice, CS8415_RATIO);
  1064. ucontrol->value.integer.value[0] = (int)((unsigned int)ratio * 750);
  1065. return 0;
  1066. }
  1067. /*
  1068. * CS8415A Mute
  1069. */
  1070. #define aureon_cs8415_mute_info snd_ctl_boolean_mono_info
  1071. static int aureon_cs8415_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1072. {
  1073. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1074. snd_ice1712_save_gpio_status(ice);
  1075. ucontrol->value.integer.value[0] = (aureon_cs8415_get(ice, CS8415_CTRL1) & 0x20) ? 0 : 1;
  1076. snd_ice1712_restore_gpio_status(ice);
  1077. return 0;
  1078. }
  1079. static int aureon_cs8415_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1080. {
  1081. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1082. unsigned char oval, nval;
  1083. int change;
  1084. snd_ice1712_save_gpio_status(ice);
  1085. oval = aureon_cs8415_get(ice, CS8415_CTRL1);
  1086. if (ucontrol->value.integer.value[0])
  1087. nval = oval & ~0x20;
  1088. else
  1089. nval = oval | 0x20;
  1090. change = (oval != nval);
  1091. if (change)
  1092. aureon_cs8415_put(ice, CS8415_CTRL1, nval);
  1093. snd_ice1712_restore_gpio_status(ice);
  1094. return change;
  1095. }
  1096. /*
  1097. * CS8415A Q-Sub info
  1098. */
  1099. static int aureon_cs8415_qsub_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1100. {
  1101. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1102. uinfo->count = 10;
  1103. return 0;
  1104. }
  1105. static int aureon_cs8415_qsub_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1106. {
  1107. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1108. snd_ice1712_save_gpio_status(ice);
  1109. aureon_cs8415_read(ice, CS8415_QSUB, ucontrol->value.bytes.data, 10);
  1110. snd_ice1712_restore_gpio_status(ice);
  1111. return 0;
  1112. }
  1113. static int aureon_cs8415_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1114. {
  1115. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1116. uinfo->count = 1;
  1117. return 0;
  1118. }
  1119. static int aureon_cs8415_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1120. {
  1121. memset(ucontrol->value.iec958.status, 0xFF, 24);
  1122. return 0;
  1123. }
  1124. static int aureon_cs8415_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1125. {
  1126. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1127. snd_ice1712_save_gpio_status(ice);
  1128. aureon_cs8415_read(ice, CS8415_C_BUFFER, ucontrol->value.iec958.status, 24);
  1129. snd_ice1712_restore_gpio_status(ice);
  1130. return 0;
  1131. }
  1132. /*
  1133. * Headphone Amplifier
  1134. */
  1135. static int aureon_set_headphone_amp(struct snd_ice1712 *ice, int enable)
  1136. {
  1137. unsigned int tmp, tmp2;
  1138. tmp2 = tmp = snd_ice1712_gpio_read(ice);
  1139. if (enable)
  1140. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1141. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT)
  1142. tmp |= AUREON_HP_SEL;
  1143. else
  1144. tmp |= PRODIGY_HP_SEL;
  1145. else
  1146. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1147. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT)
  1148. tmp &= ~AUREON_HP_SEL;
  1149. else
  1150. tmp &= ~PRODIGY_HP_SEL;
  1151. if (tmp != tmp2) {
  1152. snd_ice1712_gpio_write(ice, tmp);
  1153. return 1;
  1154. }
  1155. return 0;
  1156. }
  1157. static int aureon_get_headphone_amp(struct snd_ice1712 *ice)
  1158. {
  1159. unsigned int tmp = snd_ice1712_gpio_read(ice);
  1160. return (tmp & AUREON_HP_SEL) != 0;
  1161. }
  1162. #define aureon_hpamp_info snd_ctl_boolean_mono_info
  1163. static int aureon_hpamp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1164. {
  1165. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1166. ucontrol->value.integer.value[0] = aureon_get_headphone_amp(ice);
  1167. return 0;
  1168. }
  1169. static int aureon_hpamp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1170. {
  1171. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1172. return aureon_set_headphone_amp(ice, ucontrol->value.integer.value[0]);
  1173. }
  1174. /*
  1175. * Deemphasis
  1176. */
  1177. #define aureon_deemp_info snd_ctl_boolean_mono_info
  1178. static int aureon_deemp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1179. {
  1180. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1181. ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL2) & 0xf) == 0xf;
  1182. return 0;
  1183. }
  1184. static int aureon_deemp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1185. {
  1186. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1187. int temp, temp2;
  1188. temp2 = temp = wm_get(ice, WM_DAC_CTRL2);
  1189. if (ucontrol->value.integer.value[0])
  1190. temp |= 0xf;
  1191. else
  1192. temp &= ~0xf;
  1193. if (temp != temp2) {
  1194. wm_put(ice, WM_DAC_CTRL2, temp);
  1195. return 1;
  1196. }
  1197. return 0;
  1198. }
  1199. /*
  1200. * ADC Oversampling
  1201. */
  1202. static int aureon_oversampling_info(struct snd_kcontrol *k, struct snd_ctl_elem_info *uinfo)
  1203. {
  1204. static const char * const texts[2] = { "128x", "64x" };
  1205. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1206. uinfo->count = 1;
  1207. uinfo->value.enumerated.items = 2;
  1208. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1209. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1210. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1211. return 0;
  1212. }
  1213. static int aureon_oversampling_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1214. {
  1215. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1216. ucontrol->value.enumerated.item[0] = (wm_get(ice, WM_MASTER) & 0x8) == 0x8;
  1217. return 0;
  1218. }
  1219. static int aureon_oversampling_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1220. {
  1221. int temp, temp2;
  1222. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1223. temp2 = temp = wm_get(ice, WM_MASTER);
  1224. if (ucontrol->value.enumerated.item[0])
  1225. temp |= 0x8;
  1226. else
  1227. temp &= ~0x8;
  1228. if (temp != temp2) {
  1229. wm_put(ice, WM_MASTER, temp);
  1230. return 1;
  1231. }
  1232. return 0;
  1233. }
  1234. /*
  1235. * mixers
  1236. */
  1237. static struct snd_kcontrol_new aureon_dac_controls[] __devinitdata = {
  1238. {
  1239. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1240. .name = "Master Playback Switch",
  1241. .info = wm_master_mute_info,
  1242. .get = wm_master_mute_get,
  1243. .put = wm_master_mute_put
  1244. },
  1245. {
  1246. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1247. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1248. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1249. .name = "Master Playback Volume",
  1250. .info = wm_master_vol_info,
  1251. .get = wm_master_vol_get,
  1252. .put = wm_master_vol_put,
  1253. .tlv = { .p = db_scale_wm_dac }
  1254. },
  1255. {
  1256. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1257. .name = "Front Playback Switch",
  1258. .info = wm_mute_info,
  1259. .get = wm_mute_get,
  1260. .put = wm_mute_put,
  1261. .private_value = (2 << 8) | 0
  1262. },
  1263. {
  1264. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1265. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1266. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1267. .name = "Front Playback Volume",
  1268. .info = wm_vol_info,
  1269. .get = wm_vol_get,
  1270. .put = wm_vol_put,
  1271. .private_value = (2 << 8) | 0,
  1272. .tlv = { .p = db_scale_wm_dac }
  1273. },
  1274. {
  1275. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1276. .name = "Rear Playback Switch",
  1277. .info = wm_mute_info,
  1278. .get = wm_mute_get,
  1279. .put = wm_mute_put,
  1280. .private_value = (2 << 8) | 2
  1281. },
  1282. {
  1283. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1284. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1285. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1286. .name = "Rear Playback Volume",
  1287. .info = wm_vol_info,
  1288. .get = wm_vol_get,
  1289. .put = wm_vol_put,
  1290. .private_value = (2 << 8) | 2,
  1291. .tlv = { .p = db_scale_wm_dac }
  1292. },
  1293. {
  1294. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1295. .name = "Center Playback Switch",
  1296. .info = wm_mute_info,
  1297. .get = wm_mute_get,
  1298. .put = wm_mute_put,
  1299. .private_value = (1 << 8) | 4
  1300. },
  1301. {
  1302. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1303. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1304. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1305. .name = "Center Playback Volume",
  1306. .info = wm_vol_info,
  1307. .get = wm_vol_get,
  1308. .put = wm_vol_put,
  1309. .private_value = (1 << 8) | 4,
  1310. .tlv = { .p = db_scale_wm_dac }
  1311. },
  1312. {
  1313. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1314. .name = "LFE Playback Switch",
  1315. .info = wm_mute_info,
  1316. .get = wm_mute_get,
  1317. .put = wm_mute_put,
  1318. .private_value = (1 << 8) | 5
  1319. },
  1320. {
  1321. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1322. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1323. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1324. .name = "LFE Playback Volume",
  1325. .info = wm_vol_info,
  1326. .get = wm_vol_get,
  1327. .put = wm_vol_put,
  1328. .private_value = (1 << 8) | 5,
  1329. .tlv = { .p = db_scale_wm_dac }
  1330. },
  1331. {
  1332. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1333. .name = "Side Playback Switch",
  1334. .info = wm_mute_info,
  1335. .get = wm_mute_get,
  1336. .put = wm_mute_put,
  1337. .private_value = (2 << 8) | 6
  1338. },
  1339. {
  1340. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1341. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1342. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1343. .name = "Side Playback Volume",
  1344. .info = wm_vol_info,
  1345. .get = wm_vol_get,
  1346. .put = wm_vol_put,
  1347. .private_value = (2 << 8) | 6,
  1348. .tlv = { .p = db_scale_wm_dac }
  1349. }
  1350. };
  1351. static struct snd_kcontrol_new wm_controls[] __devinitdata = {
  1352. {
  1353. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1354. .name = "PCM Playback Switch",
  1355. .info = wm_pcm_mute_info,
  1356. .get = wm_pcm_mute_get,
  1357. .put = wm_pcm_mute_put
  1358. },
  1359. {
  1360. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1361. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1362. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1363. .name = "PCM Playback Volume",
  1364. .info = wm_pcm_vol_info,
  1365. .get = wm_pcm_vol_get,
  1366. .put = wm_pcm_vol_put,
  1367. .tlv = { .p = db_scale_wm_pcm }
  1368. },
  1369. {
  1370. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1371. .name = "Capture Switch",
  1372. .info = wm_adc_mute_info,
  1373. .get = wm_adc_mute_get,
  1374. .put = wm_adc_mute_put,
  1375. },
  1376. {
  1377. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1378. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1379. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1380. .name = "Capture Volume",
  1381. .info = wm_adc_vol_info,
  1382. .get = wm_adc_vol_get,
  1383. .put = wm_adc_vol_put,
  1384. .tlv = { .p = db_scale_wm_adc }
  1385. },
  1386. {
  1387. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1388. .name = "Capture Source",
  1389. .info = wm_adc_mux_info,
  1390. .get = wm_adc_mux_get,
  1391. .put = wm_adc_mux_put,
  1392. .private_value = 5
  1393. },
  1394. {
  1395. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1396. .name = "External Amplifier",
  1397. .info = aureon_hpamp_info,
  1398. .get = aureon_hpamp_get,
  1399. .put = aureon_hpamp_put
  1400. },
  1401. {
  1402. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1403. .name = "DAC Deemphasis Switch",
  1404. .info = aureon_deemp_info,
  1405. .get = aureon_deemp_get,
  1406. .put = aureon_deemp_put
  1407. },
  1408. {
  1409. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1410. .name = "ADC Oversampling",
  1411. .info = aureon_oversampling_info,
  1412. .get = aureon_oversampling_get,
  1413. .put = aureon_oversampling_put
  1414. }
  1415. };
  1416. static struct snd_kcontrol_new ac97_controls[] __devinitdata = {
  1417. {
  1418. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1419. .name = "AC97 Playback Switch",
  1420. .info = aureon_ac97_mmute_info,
  1421. .get = aureon_ac97_mmute_get,
  1422. .put = aureon_ac97_mmute_put,
  1423. .private_value = AC97_MASTER
  1424. },
  1425. {
  1426. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1427. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1428. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1429. .name = "AC97 Playback Volume",
  1430. .info = aureon_ac97_vol_info,
  1431. .get = aureon_ac97_vol_get,
  1432. .put = aureon_ac97_vol_put,
  1433. .private_value = AC97_MASTER|AUREON_AC97_STEREO,
  1434. .tlv = { .p = db_scale_ac97_master }
  1435. },
  1436. {
  1437. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1438. .name = "CD Playback Switch",
  1439. .info = aureon_ac97_mute_info,
  1440. .get = aureon_ac97_mute_get,
  1441. .put = aureon_ac97_mute_put,
  1442. .private_value = AC97_CD
  1443. },
  1444. {
  1445. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1446. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1447. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1448. .name = "CD Playback Volume",
  1449. .info = aureon_ac97_vol_info,
  1450. .get = aureon_ac97_vol_get,
  1451. .put = aureon_ac97_vol_put,
  1452. .private_value = AC97_CD|AUREON_AC97_STEREO,
  1453. .tlv = { .p = db_scale_ac97_gain }
  1454. },
  1455. {
  1456. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1457. .name = "Aux Playback Switch",
  1458. .info = aureon_ac97_mute_info,
  1459. .get = aureon_ac97_mute_get,
  1460. .put = aureon_ac97_mute_put,
  1461. .private_value = AC97_AUX,
  1462. },
  1463. {
  1464. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1465. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1466. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1467. .name = "Aux Playback Volume",
  1468. .info = aureon_ac97_vol_info,
  1469. .get = aureon_ac97_vol_get,
  1470. .put = aureon_ac97_vol_put,
  1471. .private_value = AC97_AUX|AUREON_AC97_STEREO,
  1472. .tlv = { .p = db_scale_ac97_gain }
  1473. },
  1474. {
  1475. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1476. .name = "Line Playback Switch",
  1477. .info = aureon_ac97_mute_info,
  1478. .get = aureon_ac97_mute_get,
  1479. .put = aureon_ac97_mute_put,
  1480. .private_value = AC97_LINE
  1481. },
  1482. {
  1483. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1484. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1485. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1486. .name = "Line Playback Volume",
  1487. .info = aureon_ac97_vol_info,
  1488. .get = aureon_ac97_vol_get,
  1489. .put = aureon_ac97_vol_put,
  1490. .private_value = AC97_LINE|AUREON_AC97_STEREO,
  1491. .tlv = { .p = db_scale_ac97_gain }
  1492. },
  1493. {
  1494. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1495. .name = "Mic Playback Switch",
  1496. .info = aureon_ac97_mute_info,
  1497. .get = aureon_ac97_mute_get,
  1498. .put = aureon_ac97_mute_put,
  1499. .private_value = AC97_MIC
  1500. },
  1501. {
  1502. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1503. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1504. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1505. .name = "Mic Playback Volume",
  1506. .info = aureon_ac97_vol_info,
  1507. .get = aureon_ac97_vol_get,
  1508. .put = aureon_ac97_vol_put,
  1509. .private_value = AC97_MIC,
  1510. .tlv = { .p = db_scale_ac97_gain }
  1511. },
  1512. {
  1513. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1514. .name = "Mic Boost (+20dB)",
  1515. .info = aureon_ac97_micboost_info,
  1516. .get = aureon_ac97_micboost_get,
  1517. .put = aureon_ac97_micboost_put
  1518. }
  1519. };
  1520. static struct snd_kcontrol_new universe_ac97_controls[] __devinitdata = {
  1521. {
  1522. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1523. .name = "AC97 Playback Switch",
  1524. .info = aureon_ac97_mmute_info,
  1525. .get = aureon_ac97_mmute_get,
  1526. .put = aureon_ac97_mmute_put,
  1527. .private_value = AC97_MASTER
  1528. },
  1529. {
  1530. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1531. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1532. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1533. .name = "AC97 Playback Volume",
  1534. .info = aureon_ac97_vol_info,
  1535. .get = aureon_ac97_vol_get,
  1536. .put = aureon_ac97_vol_put,
  1537. .private_value = AC97_MASTER|AUREON_AC97_STEREO,
  1538. .tlv = { .p = db_scale_ac97_master }
  1539. },
  1540. {
  1541. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1542. .name = "CD Playback Switch",
  1543. .info = aureon_ac97_mute_info,
  1544. .get = aureon_ac97_mute_get,
  1545. .put = aureon_ac97_mute_put,
  1546. .private_value = AC97_AUX
  1547. },
  1548. {
  1549. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1550. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1551. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1552. .name = "CD Playback Volume",
  1553. .info = aureon_ac97_vol_info,
  1554. .get = aureon_ac97_vol_get,
  1555. .put = aureon_ac97_vol_put,
  1556. .private_value = AC97_AUX|AUREON_AC97_STEREO,
  1557. .tlv = { .p = db_scale_ac97_gain }
  1558. },
  1559. {
  1560. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1561. .name = "Phono Playback Switch",
  1562. .info = aureon_ac97_mute_info,
  1563. .get = aureon_ac97_mute_get,
  1564. .put = aureon_ac97_mute_put,
  1565. .private_value = AC97_CD
  1566. },
  1567. {
  1568. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1569. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1570. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1571. .name = "Phono Playback Volume",
  1572. .info = aureon_ac97_vol_info,
  1573. .get = aureon_ac97_vol_get,
  1574. .put = aureon_ac97_vol_put,
  1575. .private_value = AC97_CD|AUREON_AC97_STEREO,
  1576. .tlv = { .p = db_scale_ac97_gain }
  1577. },
  1578. {
  1579. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1580. .name = "Line Playback Switch",
  1581. .info = aureon_ac97_mute_info,
  1582. .get = aureon_ac97_mute_get,
  1583. .put = aureon_ac97_mute_put,
  1584. .private_value = AC97_LINE
  1585. },
  1586. {
  1587. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1588. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1589. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1590. .name = "Line Playback Volume",
  1591. .info = aureon_ac97_vol_info,
  1592. .get = aureon_ac97_vol_get,
  1593. .put = aureon_ac97_vol_put,
  1594. .private_value = AC97_LINE|AUREON_AC97_STEREO,
  1595. .tlv = { .p = db_scale_ac97_gain }
  1596. },
  1597. {
  1598. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1599. .name = "Mic Playback Switch",
  1600. .info = aureon_ac97_mute_info,
  1601. .get = aureon_ac97_mute_get,
  1602. .put = aureon_ac97_mute_put,
  1603. .private_value = AC97_MIC
  1604. },
  1605. {
  1606. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1607. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1608. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1609. .name = "Mic Playback Volume",
  1610. .info = aureon_ac97_vol_info,
  1611. .get = aureon_ac97_vol_get,
  1612. .put = aureon_ac97_vol_put,
  1613. .private_value = AC97_MIC,
  1614. .tlv = { .p = db_scale_ac97_gain }
  1615. },
  1616. {
  1617. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1618. .name = "Mic Boost (+20dB)",
  1619. .info = aureon_ac97_micboost_info,
  1620. .get = aureon_ac97_micboost_get,
  1621. .put = aureon_ac97_micboost_put
  1622. },
  1623. {
  1624. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1625. .name = "Aux Playback Switch",
  1626. .info = aureon_ac97_mute_info,
  1627. .get = aureon_ac97_mute_get,
  1628. .put = aureon_ac97_mute_put,
  1629. .private_value = AC97_VIDEO,
  1630. },
  1631. {
  1632. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1633. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1634. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1635. .name = "Aux Playback Volume",
  1636. .info = aureon_ac97_vol_info,
  1637. .get = aureon_ac97_vol_get,
  1638. .put = aureon_ac97_vol_put,
  1639. .private_value = AC97_VIDEO|AUREON_AC97_STEREO,
  1640. .tlv = { .p = db_scale_ac97_gain }
  1641. },
  1642. {
  1643. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1644. .name = "Aux Source",
  1645. .info = aureon_universe_inmux_info,
  1646. .get = aureon_universe_inmux_get,
  1647. .put = aureon_universe_inmux_put
  1648. }
  1649. };
  1650. static struct snd_kcontrol_new cs8415_controls[] __devinitdata = {
  1651. {
  1652. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1653. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, SWITCH),
  1654. .info = aureon_cs8415_mute_info,
  1655. .get = aureon_cs8415_mute_get,
  1656. .put = aureon_cs8415_mute_put
  1657. },
  1658. {
  1659. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1660. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, NONE) "Source",
  1661. .info = aureon_cs8415_mux_info,
  1662. .get = aureon_cs8415_mux_get,
  1663. .put = aureon_cs8415_mux_put,
  1664. },
  1665. {
  1666. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1667. .name = SNDRV_CTL_NAME_IEC958("Q-subcode ", CAPTURE, DEFAULT),
  1668. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1669. .info = aureon_cs8415_qsub_info,
  1670. .get = aureon_cs8415_qsub_get,
  1671. },
  1672. {
  1673. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1674. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),
  1675. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1676. .info = aureon_cs8415_spdif_info,
  1677. .get = aureon_cs8415_mask_get
  1678. },
  1679. {
  1680. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1681. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
  1682. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1683. .info = aureon_cs8415_spdif_info,
  1684. .get = aureon_cs8415_spdif_get
  1685. },
  1686. {
  1687. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1688. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, NONE) "Rate",
  1689. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1690. .info = aureon_cs8415_rate_info,
  1691. .get = aureon_cs8415_rate_get
  1692. }
  1693. };
  1694. static int __devinit aureon_add_controls(struct snd_ice1712 *ice)
  1695. {
  1696. unsigned int i, counts;
  1697. int err;
  1698. counts = ARRAY_SIZE(aureon_dac_controls);
  1699. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY)
  1700. counts -= 2; /* no side */
  1701. for (i = 0; i < counts; i++) {
  1702. err = snd_ctl_add(ice->card, snd_ctl_new1(&aureon_dac_controls[i], ice));
  1703. if (err < 0)
  1704. return err;
  1705. }
  1706. for (i = 0; i < ARRAY_SIZE(wm_controls); i++) {
  1707. err = snd_ctl_add(ice->card, snd_ctl_new1(&wm_controls[i], ice));
  1708. if (err < 0)
  1709. return err;
  1710. }
  1711. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
  1712. for (i = 0; i < ARRAY_SIZE(universe_ac97_controls); i++) {
  1713. err = snd_ctl_add(ice->card, snd_ctl_new1(&universe_ac97_controls[i], ice));
  1714. if (err < 0)
  1715. return err;
  1716. }
  1717. } else if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1718. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1719. for (i = 0; i < ARRAY_SIZE(ac97_controls); i++) {
  1720. err = snd_ctl_add(ice->card, snd_ctl_new1(&ac97_controls[i], ice));
  1721. if (err < 0)
  1722. return err;
  1723. }
  1724. }
  1725. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1726. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1727. unsigned char id;
  1728. snd_ice1712_save_gpio_status(ice);
  1729. id = aureon_cs8415_get(ice, CS8415_ID);
  1730. if (id != 0x41)
  1731. snd_printk(KERN_INFO "No CS8415 chip. Skipping CS8415 controls.\n");
  1732. else if ((id & 0x0F) != 0x01)
  1733. snd_printk(KERN_INFO "Detected unsupported CS8415 rev. (%c)\n", (char)((id & 0x0F) + 'A' - 1));
  1734. else {
  1735. for (i = 0; i < ARRAY_SIZE(cs8415_controls); i++) {
  1736. struct snd_kcontrol *kctl;
  1737. err = snd_ctl_add(ice->card, (kctl = snd_ctl_new1(&cs8415_controls[i], ice)));
  1738. if (err < 0)
  1739. return err;
  1740. if (i > 1)
  1741. kctl->id.device = ice->pcm->device;
  1742. }
  1743. }
  1744. snd_ice1712_restore_gpio_status(ice);
  1745. }
  1746. return 0;
  1747. }
  1748. /*
  1749. * reset the chip
  1750. */
  1751. static int aureon_reset(struct snd_ice1712 *ice)
  1752. {
  1753. static const unsigned short wm_inits_aureon[] = {
  1754. /* These come first to reduce init pop noise */
  1755. 0x1b, 0x044, /* ADC Mux (AC'97 source) */
  1756. 0x1c, 0x00B, /* Out Mux1 (VOUT1 = DAC+AUX, VOUT2 = DAC) */
  1757. 0x1d, 0x009, /* Out Mux2 (VOUT2 = DAC, VOUT3 = DAC) */
  1758. 0x18, 0x000, /* All power-up */
  1759. 0x16, 0x122, /* I2S, normal polarity, 24bit */
  1760. 0x17, 0x022, /* 256fs, slave mode */
  1761. 0x00, 0, /* DAC1 analog mute */
  1762. 0x01, 0, /* DAC2 analog mute */
  1763. 0x02, 0, /* DAC3 analog mute */
  1764. 0x03, 0, /* DAC4 analog mute */
  1765. 0x04, 0, /* DAC5 analog mute */
  1766. 0x05, 0, /* DAC6 analog mute */
  1767. 0x06, 0, /* DAC7 analog mute */
  1768. 0x07, 0, /* DAC8 analog mute */
  1769. 0x08, 0x100, /* master analog mute */
  1770. 0x09, 0xff, /* DAC1 digital full */
  1771. 0x0a, 0xff, /* DAC2 digital full */
  1772. 0x0b, 0xff, /* DAC3 digital full */
  1773. 0x0c, 0xff, /* DAC4 digital full */
  1774. 0x0d, 0xff, /* DAC5 digital full */
  1775. 0x0e, 0xff, /* DAC6 digital full */
  1776. 0x0f, 0xff, /* DAC7 digital full */
  1777. 0x10, 0xff, /* DAC8 digital full */
  1778. 0x11, 0x1ff, /* master digital full */
  1779. 0x12, 0x000, /* phase normal */
  1780. 0x13, 0x090, /* unmute DAC L/R */
  1781. 0x14, 0x000, /* all unmute */
  1782. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1783. 0x19, 0x000, /* -12dB ADC/L */
  1784. 0x1a, 0x000, /* -12dB ADC/R */
  1785. (unsigned short)-1
  1786. };
  1787. static const unsigned short wm_inits_prodigy[] = {
  1788. /* These come first to reduce init pop noise */
  1789. 0x1b, 0x000, /* ADC Mux */
  1790. 0x1c, 0x009, /* Out Mux1 */
  1791. 0x1d, 0x009, /* Out Mux2 */
  1792. 0x18, 0x000, /* All power-up */
  1793. 0x16, 0x022, /* I2S, normal polarity, 24bit, high-pass on */
  1794. 0x17, 0x006, /* 128fs, slave mode */
  1795. 0x00, 0, /* DAC1 analog mute */
  1796. 0x01, 0, /* DAC2 analog mute */
  1797. 0x02, 0, /* DAC3 analog mute */
  1798. 0x03, 0, /* DAC4 analog mute */
  1799. 0x04, 0, /* DAC5 analog mute */
  1800. 0x05, 0, /* DAC6 analog mute */
  1801. 0x06, 0, /* DAC7 analog mute */
  1802. 0x07, 0, /* DAC8 analog mute */
  1803. 0x08, 0x100, /* master analog mute */
  1804. 0x09, 0x7f, /* DAC1 digital full */
  1805. 0x0a, 0x7f, /* DAC2 digital full */
  1806. 0x0b, 0x7f, /* DAC3 digital full */
  1807. 0x0c, 0x7f, /* DAC4 digital full */
  1808. 0x0d, 0x7f, /* DAC5 digital full */
  1809. 0x0e, 0x7f, /* DAC6 digital full */
  1810. 0x0f, 0x7f, /* DAC7 digital full */
  1811. 0x10, 0x7f, /* DAC8 digital full */
  1812. 0x11, 0x1FF, /* master digital full */
  1813. 0x12, 0x000, /* phase normal */
  1814. 0x13, 0x090, /* unmute DAC L/R */
  1815. 0x14, 0x000, /* all unmute */
  1816. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1817. 0x19, 0x000, /* -12dB ADC/L */
  1818. 0x1a, 0x000, /* -12dB ADC/R */
  1819. (unsigned short)-1
  1820. };
  1821. static const unsigned short cs_inits[] = {
  1822. 0x0441, /* RUN */
  1823. 0x0180, /* no mute, OMCK output on RMCK pin */
  1824. 0x0201, /* S/PDIF source on RXP1 */
  1825. 0x0605, /* slave, 24bit, MSB on second OSCLK, SDOUT for right channel when OLRCK is high */
  1826. (unsigned short)-1
  1827. };
  1828. unsigned int tmp;
  1829. const unsigned short *p;
  1830. int err;
  1831. struct aureon_spec *spec = ice->spec;
  1832. err = aureon_ac97_init(ice);
  1833. if (err != 0)
  1834. return err;
  1835. snd_ice1712_gpio_set_dir(ice, 0x5fffff); /* fix this for the time being */
  1836. /* reset the wm codec as the SPI mode */
  1837. snd_ice1712_save_gpio_status(ice);
  1838. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RESET|AUREON_WM_CS|AUREON_CS8415_CS|AUREON_HP_SEL));
  1839. tmp = snd_ice1712_gpio_read(ice);
  1840. tmp &= ~AUREON_WM_RESET;
  1841. snd_ice1712_gpio_write(ice, tmp);
  1842. udelay(1);
  1843. tmp |= AUREON_WM_CS | AUREON_CS8415_CS;
  1844. snd_ice1712_gpio_write(ice, tmp);
  1845. udelay(1);
  1846. tmp |= AUREON_WM_RESET;
  1847. snd_ice1712_gpio_write(ice, tmp);
  1848. udelay(1);
  1849. /* initialize WM8770 codec */
  1850. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71 ||
  1851. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  1852. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT)
  1853. p = wm_inits_prodigy;
  1854. else
  1855. p = wm_inits_aureon;
  1856. for (; *p != (unsigned short)-1; p += 2)
  1857. wm_put(ice, p[0], p[1]);
  1858. /* initialize CS8415A codec */
  1859. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1860. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1861. for (p = cs_inits; *p != (unsigned short)-1; p++)
  1862. aureon_spi_write(ice, AUREON_CS8415_CS, *p | 0x200000, 24);
  1863. spec->cs8415_mux = 1;
  1864. aureon_set_headphone_amp(ice, 1);
  1865. }
  1866. snd_ice1712_restore_gpio_status(ice);
  1867. /* initialize PCA9554 pin directions & set default input */
  1868. aureon_pca9554_write(ice, PCA9554_DIR, 0x00);
  1869. aureon_pca9554_write(ice, PCA9554_OUT, 0x00); /* internal AUX */
  1870. return 0;
  1871. }
  1872. /*
  1873. * suspend/resume
  1874. */
  1875. #ifdef CONFIG_PM_SLEEP
  1876. static int aureon_resume(struct snd_ice1712 *ice)
  1877. {
  1878. struct aureon_spec *spec = ice->spec;
  1879. int err, i;
  1880. err = aureon_reset(ice);
  1881. if (err != 0)
  1882. return err;
  1883. /* workaround for poking volume with alsamixer after resume:
  1884. * just set stored volume again */
  1885. for (i = 0; i < ice->num_total_dacs; i++)
  1886. wm_set_vol(ice, i, spec->vol[i], spec->master[i % 2]);
  1887. return 0;
  1888. }
  1889. #endif
  1890. /*
  1891. * initialize the chip
  1892. */
  1893. static int __devinit aureon_init(struct snd_ice1712 *ice)
  1894. {
  1895. struct aureon_spec *spec;
  1896. int i, err;
  1897. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1898. if (!spec)
  1899. return -ENOMEM;
  1900. ice->spec = spec;
  1901. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY) {
  1902. ice->num_total_dacs = 6;
  1903. ice->num_total_adcs = 2;
  1904. } else {
  1905. /* aureon 7.1 and prodigy 7.1 */
  1906. ice->num_total_dacs = 8;
  1907. ice->num_total_adcs = 2;
  1908. }
  1909. /* to remember the register values of CS8415 */
  1910. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  1911. if (!ice->akm)
  1912. return -ENOMEM;
  1913. ice->akm_codecs = 1;
  1914. err = aureon_reset(ice);
  1915. if (err != 0)
  1916. return err;
  1917. spec->master[0] = WM_VOL_MUTE;
  1918. spec->master[1] = WM_VOL_MUTE;
  1919. for (i = 0; i < ice->num_total_dacs; i++) {
  1920. spec->vol[i] = WM_VOL_MUTE;
  1921. wm_set_vol(ice, i, spec->vol[i], spec->master[i % 2]);
  1922. }
  1923. #ifdef CONFIG_PM_SLEEP
  1924. ice->pm_resume = aureon_resume;
  1925. ice->pm_suspend_enabled = 1;
  1926. #endif
  1927. return 0;
  1928. }
  1929. /*
  1930. * Aureon boards don't provide the EEPROM data except for the vendor IDs.
  1931. * hence the driver needs to sets up it properly.
  1932. */
  1933. static unsigned char aureon51_eeprom[] __devinitdata = {
  1934. [ICE_EEP2_SYSCONF] = 0x0a, /* clock 512, spdif-in/ADC, 3DACs */
  1935. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1936. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1937. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1938. [ICE_EEP2_GPIO_DIR] = 0xff,
  1939. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1940. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1941. [ICE_EEP2_GPIO_MASK] = 0x00,
  1942. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1943. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1944. [ICE_EEP2_GPIO_STATE] = 0x00,
  1945. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1946. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1947. };
  1948. static unsigned char aureon71_eeprom[] __devinitdata = {
  1949. [ICE_EEP2_SYSCONF] = 0x0b, /* clock 512, spdif-in/ADC, 4DACs */
  1950. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1951. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1952. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1953. [ICE_EEP2_GPIO_DIR] = 0xff,
  1954. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1955. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1956. [ICE_EEP2_GPIO_MASK] = 0x00,
  1957. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1958. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1959. [ICE_EEP2_GPIO_STATE] = 0x00,
  1960. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1961. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1962. };
  1963. #define prodigy71_eeprom aureon71_eeprom
  1964. static unsigned char aureon71_universe_eeprom[] __devinitdata = {
  1965. [ICE_EEP2_SYSCONF] = 0x2b, /* clock 512, mpu401, spdif-in/ADC,
  1966. * 4DACs
  1967. */
  1968. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1969. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1970. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1971. [ICE_EEP2_GPIO_DIR] = 0xff,
  1972. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1973. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1974. [ICE_EEP2_GPIO_MASK] = 0x00,
  1975. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1976. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1977. [ICE_EEP2_GPIO_STATE] = 0x00,
  1978. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1979. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1980. };
  1981. static unsigned char prodigy71lt_eeprom[] __devinitdata = {
  1982. [ICE_EEP2_SYSCONF] = 0x4b, /* clock 384, spdif-in/ADC, 4DACs */
  1983. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1984. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1985. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1986. [ICE_EEP2_GPIO_DIR] = 0xff,
  1987. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1988. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1989. [ICE_EEP2_GPIO_MASK] = 0x00,
  1990. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1991. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1992. [ICE_EEP2_GPIO_STATE] = 0x00,
  1993. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1994. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1995. };
  1996. #define prodigy71xt_eeprom prodigy71lt_eeprom
  1997. /* entry point */
  1998. struct snd_ice1712_card_info snd_vt1724_aureon_cards[] __devinitdata = {
  1999. {
  2000. .subvendor = VT1724_SUBDEVICE_AUREON51_SKY,
  2001. .name = "Terratec Aureon 5.1-Sky",
  2002. .model = "aureon51",
  2003. .chip_init = aureon_init,
  2004. .build_controls = aureon_add_controls,
  2005. .eeprom_size = sizeof(aureon51_eeprom),
  2006. .eeprom_data = aureon51_eeprom,
  2007. .driver = "Aureon51",
  2008. },
  2009. {
  2010. .subvendor = VT1724_SUBDEVICE_AUREON71_SPACE,
  2011. .name = "Terratec Aureon 7.1-Space",
  2012. .model = "aureon71",
  2013. .chip_init = aureon_init,
  2014. .build_controls = aureon_add_controls,
  2015. .eeprom_size = sizeof(aureon71_eeprom),
  2016. .eeprom_data = aureon71_eeprom,
  2017. .driver = "Aureon71",
  2018. },
  2019. {
  2020. .subvendor = VT1724_SUBDEVICE_AUREON71_UNIVERSE,
  2021. .name = "Terratec Aureon 7.1-Universe",
  2022. .model = "universe",
  2023. .chip_init = aureon_init,
  2024. .build_controls = aureon_add_controls,
  2025. .eeprom_size = sizeof(aureon71_universe_eeprom),
  2026. .eeprom_data = aureon71_universe_eeprom,
  2027. .driver = "Aureon71Univ", /* keep in 15 letters */
  2028. },
  2029. {
  2030. .subvendor = VT1724_SUBDEVICE_PRODIGY71,
  2031. .name = "Audiotrak Prodigy 7.1",
  2032. .model = "prodigy71",
  2033. .chip_init = aureon_init,
  2034. .build_controls = aureon_add_controls,
  2035. .eeprom_size = sizeof(prodigy71_eeprom),
  2036. .eeprom_data = prodigy71_eeprom,
  2037. .driver = "Prodigy71", /* should be identical with Aureon71 */
  2038. },
  2039. {
  2040. .subvendor = VT1724_SUBDEVICE_PRODIGY71LT,
  2041. .name = "Audiotrak Prodigy 7.1 LT",
  2042. .model = "prodigy71lt",
  2043. .chip_init = aureon_init,
  2044. .build_controls = aureon_add_controls,
  2045. .eeprom_size = sizeof(prodigy71lt_eeprom),
  2046. .eeprom_data = prodigy71lt_eeprom,
  2047. .driver = "Prodigy71LT",
  2048. },
  2049. {
  2050. .subvendor = VT1724_SUBDEVICE_PRODIGY71XT,
  2051. .name = "Audiotrak Prodigy 7.1 XT",
  2052. .model = "prodigy71xt",
  2053. .chip_init = aureon_init,
  2054. .build_controls = aureon_add_controls,
  2055. .eeprom_size = sizeof(prodigy71xt_eeprom),
  2056. .eeprom_data = prodigy71xt_eeprom,
  2057. .driver = "Prodigy71LT",
  2058. },
  2059. { } /* terminator */
  2060. };