pci.c 25 KB

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  1. /*
  2. * Copyright IBM Corp. 2012
  3. *
  4. * Author(s):
  5. * Jan Glauber <jang@linux.vnet.ibm.com>
  6. *
  7. * The System z PCI code is a rewrite from a prototype by
  8. * the following people (Kudoz!):
  9. * Alexander Schmidt
  10. * Christoph Raisch
  11. * Hannes Hering
  12. * Hoang-Nam Nguyen
  13. * Jan-Bernd Themann
  14. * Stefan Roscher
  15. * Thomas Klein
  16. */
  17. #define COMPONENT "zPCI"
  18. #define pr_fmt(fmt) COMPONENT ": " fmt
  19. #include <linux/kernel.h>
  20. #include <linux/slab.h>
  21. #include <linux/err.h>
  22. #include <linux/export.h>
  23. #include <linux/delay.h>
  24. #include <linux/irq.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/seq_file.h>
  27. #include <linux/pci.h>
  28. #include <linux/msi.h>
  29. #include <asm/isc.h>
  30. #include <asm/airq.h>
  31. #include <asm/facility.h>
  32. #include <asm/pci_insn.h>
  33. #include <asm/pci_clp.h>
  34. #include <asm/pci_dma.h>
  35. #define DEBUG /* enable pr_debug */
  36. #define SIC_IRQ_MODE_ALL 0
  37. #define SIC_IRQ_MODE_SINGLE 1
  38. #define ZPCI_NR_DMA_SPACES 1
  39. #define ZPCI_MSI_VEC_BITS 6
  40. #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS
  41. /* list of all detected zpci devices */
  42. LIST_HEAD(zpci_list);
  43. EXPORT_SYMBOL_GPL(zpci_list);
  44. DEFINE_MUTEX(zpci_list_lock);
  45. EXPORT_SYMBOL_GPL(zpci_list_lock);
  46. static struct pci_hp_callback_ops *hotplug_ops;
  47. static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES);
  48. static DEFINE_SPINLOCK(zpci_domain_lock);
  49. struct callback {
  50. irq_handler_t handler;
  51. void *data;
  52. };
  53. struct zdev_irq_map {
  54. unsigned long aibv; /* AI bit vector */
  55. int msi_vecs; /* consecutive MSI-vectors used */
  56. int __unused;
  57. struct callback cb[ZPCI_NR_MSI_VECS]; /* callback handler array */
  58. spinlock_t lock; /* protect callbacks against de-reg */
  59. };
  60. struct intr_bucket {
  61. /* amap of adapters, one bit per dev, corresponds to one irq nr */
  62. unsigned long *alloc;
  63. /* AI summary bit, global page for all devices */
  64. unsigned long *aisb;
  65. /* pointer to aibv and callback data in zdev */
  66. struct zdev_irq_map *imap[ZPCI_NR_DEVICES];
  67. /* protects the whole bucket struct */
  68. spinlock_t lock;
  69. };
  70. static struct intr_bucket *bucket;
  71. /* Adapter local summary indicator */
  72. static u8 *zpci_irq_si;
  73. static atomic_t irq_retries = ATOMIC_INIT(0);
  74. /* I/O Map */
  75. static DEFINE_SPINLOCK(zpci_iomap_lock);
  76. static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  77. struct zpci_iomap_entry *zpci_iomap_start;
  78. EXPORT_SYMBOL_GPL(zpci_iomap_start);
  79. /* highest irq summary bit */
  80. static int __read_mostly aisb_max;
  81. static struct kmem_cache *zdev_irq_cache;
  82. static struct kmem_cache *zdev_fmb_cache;
  83. static inline int irq_to_msi_nr(unsigned int irq)
  84. {
  85. return irq & ZPCI_MSI_MASK;
  86. }
  87. static inline int irq_to_dev_nr(unsigned int irq)
  88. {
  89. return irq >> ZPCI_MSI_VEC_BITS;
  90. }
  91. static inline struct zdev_irq_map *get_imap(unsigned int irq)
  92. {
  93. return bucket->imap[irq_to_dev_nr(irq)];
  94. }
  95. struct zpci_dev *get_zdev(struct pci_dev *pdev)
  96. {
  97. return (struct zpci_dev *) pdev->sysdata;
  98. }
  99. struct zpci_dev *get_zdev_by_fid(u32 fid)
  100. {
  101. struct zpci_dev *tmp, *zdev = NULL;
  102. mutex_lock(&zpci_list_lock);
  103. list_for_each_entry(tmp, &zpci_list, entry) {
  104. if (tmp->fid == fid) {
  105. zdev = tmp;
  106. break;
  107. }
  108. }
  109. mutex_unlock(&zpci_list_lock);
  110. return zdev;
  111. }
  112. bool zpci_fid_present(u32 fid)
  113. {
  114. return (get_zdev_by_fid(fid) != NULL) ? true : false;
  115. }
  116. static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus)
  117. {
  118. return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL;
  119. }
  120. int pci_domain_nr(struct pci_bus *bus)
  121. {
  122. return ((struct zpci_dev *) bus->sysdata)->domain;
  123. }
  124. EXPORT_SYMBOL_GPL(pci_domain_nr);
  125. int pci_proc_domain(struct pci_bus *bus)
  126. {
  127. return pci_domain_nr(bus);
  128. }
  129. EXPORT_SYMBOL_GPL(pci_proc_domain);
  130. /* Modify PCI: Register adapter interruptions */
  131. static int zpci_register_airq(struct zpci_dev *zdev, unsigned int aisb,
  132. u64 aibv)
  133. {
  134. u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT);
  135. struct zpci_fib *fib;
  136. int rc;
  137. fib = (void *) get_zeroed_page(GFP_KERNEL);
  138. if (!fib)
  139. return -ENOMEM;
  140. fib->isc = PCI_ISC;
  141. fib->noi = zdev->irq_map->msi_vecs;
  142. fib->sum = 1; /* enable summary notifications */
  143. fib->aibv = aibv;
  144. fib->aibvo = 0; /* every function has its own page */
  145. fib->aisb = (u64) bucket->aisb + aisb / 8;
  146. fib->aisbo = aisb & ZPCI_MSI_MASK;
  147. rc = mpcifc_instr(req, fib);
  148. pr_debug("%s mpcifc returned noi: %d\n", __func__, fib->noi);
  149. free_page((unsigned long) fib);
  150. return rc;
  151. }
  152. struct mod_pci_args {
  153. u64 base;
  154. u64 limit;
  155. u64 iota;
  156. u64 fmb_addr;
  157. };
  158. static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args)
  159. {
  160. u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn);
  161. struct zpci_fib *fib;
  162. int rc;
  163. /* The FIB must be available even if it's not used */
  164. fib = (void *) get_zeroed_page(GFP_KERNEL);
  165. if (!fib)
  166. return -ENOMEM;
  167. fib->pba = args->base;
  168. fib->pal = args->limit;
  169. fib->iota = args->iota;
  170. fib->fmb_addr = args->fmb_addr;
  171. rc = mpcifc_instr(req, fib);
  172. free_page((unsigned long) fib);
  173. return rc;
  174. }
  175. /* Modify PCI: Register I/O address translation parameters */
  176. int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
  177. u64 base, u64 limit, u64 iota)
  178. {
  179. struct mod_pci_args args = { base, limit, iota, 0 };
  180. WARN_ON_ONCE(iota & 0x3fff);
  181. args.iota |= ZPCI_IOTA_RTTO_FLAG;
  182. return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args);
  183. }
  184. /* Modify PCI: Unregister I/O address translation parameters */
  185. int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
  186. {
  187. struct mod_pci_args args = { 0, 0, 0, 0 };
  188. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args);
  189. }
  190. /* Modify PCI: Unregister adapter interruptions */
  191. static int zpci_unregister_airq(struct zpci_dev *zdev)
  192. {
  193. struct mod_pci_args args = { 0, 0, 0, 0 };
  194. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args);
  195. }
  196. /* Modify PCI: Set PCI function measurement parameters */
  197. int zpci_fmb_enable_device(struct zpci_dev *zdev)
  198. {
  199. struct mod_pci_args args = { 0, 0, 0, 0 };
  200. if (zdev->fmb)
  201. return -EINVAL;
  202. zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL);
  203. if (!zdev->fmb)
  204. return -ENOMEM;
  205. WARN_ON((u64) zdev->fmb & 0xf);
  206. args.fmb_addr = virt_to_phys(zdev->fmb);
  207. return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  208. }
  209. /* Modify PCI: Disable PCI function measurement */
  210. int zpci_fmb_disable_device(struct zpci_dev *zdev)
  211. {
  212. struct mod_pci_args args = { 0, 0, 0, 0 };
  213. int rc;
  214. if (!zdev->fmb)
  215. return -EINVAL;
  216. /* Function measurement is disabled if fmb address is zero */
  217. rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  218. kmem_cache_free(zdev_fmb_cache, zdev->fmb);
  219. zdev->fmb = NULL;
  220. return rc;
  221. }
  222. #define ZPCI_PCIAS_CFGSPC 15
  223. static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
  224. {
  225. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  226. u64 data;
  227. int rc;
  228. rc = pcilg_instr(&data, req, offset);
  229. data = data << ((8 - len) * 8);
  230. data = le64_to_cpu(data);
  231. if (!rc)
  232. *val = (u32) data;
  233. else
  234. *val = 0xffffffff;
  235. return rc;
  236. }
  237. static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
  238. {
  239. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  240. u64 data = val;
  241. int rc;
  242. data = cpu_to_le64(data);
  243. data = data >> ((8 - len) * 8);
  244. rc = pcistg_instr(data, req, offset);
  245. return rc;
  246. }
  247. void synchronize_irq(unsigned int irq)
  248. {
  249. /*
  250. * Not needed, the handler is protected by a lock and IRQs that occur
  251. * after the handler is deleted are just NOPs.
  252. */
  253. }
  254. EXPORT_SYMBOL_GPL(synchronize_irq);
  255. void enable_irq(unsigned int irq)
  256. {
  257. struct msi_desc *msi = irq_get_msi_desc(irq);
  258. zpci_msi_set_mask_bits(msi, 1, 0);
  259. }
  260. EXPORT_SYMBOL_GPL(enable_irq);
  261. void disable_irq(unsigned int irq)
  262. {
  263. struct msi_desc *msi = irq_get_msi_desc(irq);
  264. zpci_msi_set_mask_bits(msi, 1, 1);
  265. }
  266. EXPORT_SYMBOL_GPL(disable_irq);
  267. void disable_irq_nosync(unsigned int irq)
  268. {
  269. disable_irq(irq);
  270. }
  271. EXPORT_SYMBOL_GPL(disable_irq_nosync);
  272. unsigned long probe_irq_on(void)
  273. {
  274. return 0;
  275. }
  276. EXPORT_SYMBOL_GPL(probe_irq_on);
  277. int probe_irq_off(unsigned long val)
  278. {
  279. return 0;
  280. }
  281. EXPORT_SYMBOL_GPL(probe_irq_off);
  282. unsigned int probe_irq_mask(unsigned long val)
  283. {
  284. return val;
  285. }
  286. EXPORT_SYMBOL_GPL(probe_irq_mask);
  287. void pcibios_fixup_bus(struct pci_bus *bus)
  288. {
  289. }
  290. resource_size_t pcibios_align_resource(void *data, const struct resource *res,
  291. resource_size_t size,
  292. resource_size_t align)
  293. {
  294. return 0;
  295. }
  296. /* combine single writes by using store-block insn */
  297. void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
  298. {
  299. zpci_memcpy_toio(to, from, count);
  300. }
  301. /* Create a virtual mapping cookie for a PCI BAR */
  302. void __iomem *pci_iomap(struct pci_dev *pdev, int bar, unsigned long max)
  303. {
  304. struct zpci_dev *zdev = get_zdev(pdev);
  305. u64 addr;
  306. int idx;
  307. if ((bar & 7) != bar)
  308. return NULL;
  309. idx = zdev->bars[bar].map_idx;
  310. spin_lock(&zpci_iomap_lock);
  311. zpci_iomap_start[idx].fh = zdev->fh;
  312. zpci_iomap_start[idx].bar = bar;
  313. spin_unlock(&zpci_iomap_lock);
  314. addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48);
  315. return (void __iomem *) addr;
  316. }
  317. EXPORT_SYMBOL_GPL(pci_iomap);
  318. void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
  319. {
  320. unsigned int idx;
  321. idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48;
  322. spin_lock(&zpci_iomap_lock);
  323. zpci_iomap_start[idx].fh = 0;
  324. zpci_iomap_start[idx].bar = 0;
  325. spin_unlock(&zpci_iomap_lock);
  326. }
  327. EXPORT_SYMBOL_GPL(pci_iounmap);
  328. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
  329. int size, u32 *val)
  330. {
  331. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  332. if (!zdev || devfn != ZPCI_DEVFN)
  333. return 0;
  334. return zpci_cfg_load(zdev, where, val, size);
  335. }
  336. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
  337. int size, u32 val)
  338. {
  339. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  340. if (!zdev || devfn != ZPCI_DEVFN)
  341. return 0;
  342. return zpci_cfg_store(zdev, where, val, size);
  343. }
  344. static struct pci_ops pci_root_ops = {
  345. .read = pci_read,
  346. .write = pci_write,
  347. };
  348. /* store the last handled bit to implement fair scheduling of devices */
  349. static DEFINE_PER_CPU(unsigned long, next_sbit);
  350. static void zpci_irq_handler(void *dont, void *need)
  351. {
  352. unsigned long sbit, mbit, last = 0, start = __get_cpu_var(next_sbit);
  353. int rescan = 0, max = aisb_max;
  354. struct zdev_irq_map *imap;
  355. inc_irq_stat(IRQIO_PCI);
  356. sbit = start;
  357. scan:
  358. /* find summary_bit */
  359. for_each_set_bit_left_cont(sbit, bucket->aisb, max) {
  360. clear_bit(63 - (sbit & 63), bucket->aisb + (sbit >> 6));
  361. last = sbit;
  362. /* find vector bit */
  363. imap = bucket->imap[sbit];
  364. for_each_set_bit_left(mbit, &imap->aibv, imap->msi_vecs) {
  365. inc_irq_stat(IRQIO_MSI);
  366. clear_bit(63 - mbit, &imap->aibv);
  367. spin_lock(&imap->lock);
  368. if (imap->cb[mbit].handler)
  369. imap->cb[mbit].handler(mbit,
  370. imap->cb[mbit].data);
  371. spin_unlock(&imap->lock);
  372. }
  373. }
  374. if (rescan)
  375. goto out;
  376. /* scan the skipped bits */
  377. if (start > 0) {
  378. sbit = 0;
  379. max = start;
  380. start = 0;
  381. goto scan;
  382. }
  383. /* enable interrupts again */
  384. sic_instr(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  385. /* check again to not lose initiative */
  386. rmb();
  387. max = aisb_max;
  388. sbit = find_first_bit_left(bucket->aisb, max);
  389. if (sbit != max) {
  390. atomic_inc(&irq_retries);
  391. rescan++;
  392. goto scan;
  393. }
  394. out:
  395. /* store next device bit to scan */
  396. __get_cpu_var(next_sbit) = (++last >= aisb_max) ? 0 : last;
  397. }
  398. /* msi_vecs - number of requested interrupts, 0 place function to error state */
  399. static int zpci_setup_msi(struct pci_dev *pdev, int msi_vecs)
  400. {
  401. struct zpci_dev *zdev = get_zdev(pdev);
  402. unsigned int aisb, msi_nr;
  403. struct msi_desc *msi;
  404. int rc;
  405. /* store the number of used MSI vectors */
  406. zdev->irq_map->msi_vecs = min(msi_vecs, ZPCI_NR_MSI_VECS);
  407. spin_lock(&bucket->lock);
  408. aisb = find_first_zero_bit(bucket->alloc, PAGE_SIZE);
  409. /* alloc map exhausted? */
  410. if (aisb == PAGE_SIZE) {
  411. spin_unlock(&bucket->lock);
  412. return -EIO;
  413. }
  414. set_bit(aisb, bucket->alloc);
  415. spin_unlock(&bucket->lock);
  416. zdev->aisb = aisb;
  417. if (aisb + 1 > aisb_max)
  418. aisb_max = aisb + 1;
  419. /* wire up IRQ shortcut pointer */
  420. bucket->imap[zdev->aisb] = zdev->irq_map;
  421. pr_debug("%s: imap[%u] linked to %p\n", __func__, zdev->aisb, zdev->irq_map);
  422. /* TODO: irq number 0 wont be found if we return less than requested MSIs.
  423. * ignore it for now and fix in common code.
  424. */
  425. msi_nr = aisb << ZPCI_MSI_VEC_BITS;
  426. list_for_each_entry(msi, &pdev->msi_list, list) {
  427. rc = zpci_setup_msi_irq(zdev, msi, msi_nr,
  428. aisb << ZPCI_MSI_VEC_BITS);
  429. if (rc)
  430. return rc;
  431. msi_nr++;
  432. }
  433. rc = zpci_register_airq(zdev, aisb, (u64) &zdev->irq_map->aibv);
  434. if (rc) {
  435. clear_bit(aisb, bucket->alloc);
  436. dev_err(&pdev->dev, "register MSI failed with: %d\n", rc);
  437. return rc;
  438. }
  439. return (zdev->irq_map->msi_vecs == msi_vecs) ?
  440. 0 : zdev->irq_map->msi_vecs;
  441. }
  442. static void zpci_teardown_msi(struct pci_dev *pdev)
  443. {
  444. struct zpci_dev *zdev = get_zdev(pdev);
  445. struct msi_desc *msi;
  446. int aisb, rc;
  447. rc = zpci_unregister_airq(zdev);
  448. if (rc) {
  449. dev_err(&pdev->dev, "deregister MSI failed with: %d\n", rc);
  450. return;
  451. }
  452. msi = list_first_entry(&pdev->msi_list, struct msi_desc, list);
  453. aisb = irq_to_dev_nr(msi->irq);
  454. list_for_each_entry(msi, &pdev->msi_list, list)
  455. zpci_teardown_msi_irq(zdev, msi);
  456. clear_bit(aisb, bucket->alloc);
  457. if (aisb + 1 == aisb_max)
  458. aisb_max--;
  459. }
  460. int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
  461. {
  462. pr_debug("%s: requesting %d MSI-X interrupts...", __func__, nvec);
  463. if (type != PCI_CAP_ID_MSIX && type != PCI_CAP_ID_MSI)
  464. return -EINVAL;
  465. return zpci_setup_msi(pdev, nvec);
  466. }
  467. void arch_teardown_msi_irqs(struct pci_dev *pdev)
  468. {
  469. pr_info("%s: on pdev: %p\n", __func__, pdev);
  470. zpci_teardown_msi(pdev);
  471. }
  472. static void zpci_map_resources(struct zpci_dev *zdev)
  473. {
  474. struct pci_dev *pdev = zdev->pdev;
  475. resource_size_t len;
  476. int i;
  477. for (i = 0; i < PCI_BAR_COUNT; i++) {
  478. len = pci_resource_len(pdev, i);
  479. if (!len)
  480. continue;
  481. pdev->resource[i].start = (resource_size_t) pci_iomap(pdev, i, 0);
  482. pdev->resource[i].end = pdev->resource[i].start + len - 1;
  483. pr_debug("BAR%i: -> start: %Lx end: %Lx\n",
  484. i, pdev->resource[i].start, pdev->resource[i].end);
  485. }
  486. };
  487. static void zpci_unmap_resources(struct pci_dev *pdev)
  488. {
  489. resource_size_t len;
  490. int i;
  491. for (i = 0; i < PCI_BAR_COUNT; i++) {
  492. len = pci_resource_len(pdev, i);
  493. if (!len)
  494. continue;
  495. pci_iounmap(pdev, (void *) pdev->resource[i].start);
  496. }
  497. };
  498. struct zpci_dev *zpci_alloc_device(void)
  499. {
  500. struct zpci_dev *zdev;
  501. /* Alloc memory for our private pci device data */
  502. zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
  503. if (!zdev)
  504. return ERR_PTR(-ENOMEM);
  505. /* Alloc aibv & callback space */
  506. zdev->irq_map = kmem_cache_zalloc(zdev_irq_cache, GFP_KERNEL);
  507. if (!zdev->irq_map)
  508. goto error;
  509. WARN_ON((u64) zdev->irq_map & 0xff);
  510. return zdev;
  511. error:
  512. kfree(zdev);
  513. return ERR_PTR(-ENOMEM);
  514. }
  515. void zpci_free_device(struct zpci_dev *zdev)
  516. {
  517. kmem_cache_free(zdev_irq_cache, zdev->irq_map);
  518. kfree(zdev);
  519. }
  520. /* Called on removal of pci_dev, leaves zpci and bus device */
  521. static void zpci_remove_device(struct pci_dev *pdev)
  522. {
  523. struct zpci_dev *zdev = get_zdev(pdev);
  524. dev_info(&pdev->dev, "Removing device %u\n", zdev->domain);
  525. zdev->state = ZPCI_FN_STATE_CONFIGURED;
  526. zpci_dma_exit_device(zdev);
  527. zpci_fmb_disable_device(zdev);
  528. zpci_sysfs_remove_device(&pdev->dev);
  529. zpci_unmap_resources(pdev);
  530. list_del(&zdev->entry); /* can be called from init */
  531. zdev->pdev = NULL;
  532. }
  533. static void zpci_scan_devices(void)
  534. {
  535. struct zpci_dev *zdev;
  536. mutex_lock(&zpci_list_lock);
  537. list_for_each_entry(zdev, &zpci_list, entry)
  538. if (zdev->state == ZPCI_FN_STATE_CONFIGURED)
  539. zpci_scan_device(zdev);
  540. mutex_unlock(&zpci_list_lock);
  541. }
  542. /*
  543. * Too late for any s390 specific setup, since interrupts must be set up
  544. * already which requires DMA setup too and the pci scan will access the
  545. * config space, which only works if the function handle is enabled.
  546. */
  547. int pcibios_enable_device(struct pci_dev *pdev, int mask)
  548. {
  549. struct resource *res;
  550. u16 cmd;
  551. int i;
  552. pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  553. for (i = 0; i < PCI_BAR_COUNT; i++) {
  554. res = &pdev->resource[i];
  555. if (res->flags & IORESOURCE_IO)
  556. return -EINVAL;
  557. if (res->flags & IORESOURCE_MEM)
  558. cmd |= PCI_COMMAND_MEMORY;
  559. }
  560. pci_write_config_word(pdev, PCI_COMMAND, cmd);
  561. return 0;
  562. }
  563. void pcibios_disable_device(struct pci_dev *pdev)
  564. {
  565. zpci_remove_device(pdev);
  566. pdev->sysdata = NULL;
  567. }
  568. int pcibios_add_platform_entries(struct pci_dev *pdev)
  569. {
  570. return zpci_sysfs_add_device(&pdev->dev);
  571. }
  572. int zpci_request_irq(unsigned int irq, irq_handler_t handler, void *data)
  573. {
  574. int msi_nr = irq_to_msi_nr(irq);
  575. struct zdev_irq_map *imap;
  576. struct msi_desc *msi;
  577. msi = irq_get_msi_desc(irq);
  578. if (!msi)
  579. return -EIO;
  580. imap = get_imap(irq);
  581. spin_lock_init(&imap->lock);
  582. pr_debug("%s: register handler for IRQ:MSI %d:%d\n", __func__, irq >> 6, msi_nr);
  583. imap->cb[msi_nr].handler = handler;
  584. imap->cb[msi_nr].data = data;
  585. /*
  586. * The generic MSI code returns with the interrupt disabled on the
  587. * card, using the MSI mask bits. Firmware doesn't appear to unmask
  588. * at that level, so we do it here by hand.
  589. */
  590. zpci_msi_set_mask_bits(msi, 1, 0);
  591. return 0;
  592. }
  593. void zpci_free_irq(unsigned int irq)
  594. {
  595. struct zdev_irq_map *imap = get_imap(irq);
  596. int msi_nr = irq_to_msi_nr(irq);
  597. unsigned long flags;
  598. pr_debug("%s: for irq: %d\n", __func__, irq);
  599. spin_lock_irqsave(&imap->lock, flags);
  600. imap->cb[msi_nr].handler = NULL;
  601. imap->cb[msi_nr].data = NULL;
  602. spin_unlock_irqrestore(&imap->lock, flags);
  603. }
  604. int request_irq(unsigned int irq, irq_handler_t handler,
  605. unsigned long irqflags, const char *devname, void *dev_id)
  606. {
  607. pr_debug("%s: irq: %d handler: %p flags: %lx dev: %s\n",
  608. __func__, irq, handler, irqflags, devname);
  609. return zpci_request_irq(irq, handler, dev_id);
  610. }
  611. EXPORT_SYMBOL_GPL(request_irq);
  612. void free_irq(unsigned int irq, void *dev_id)
  613. {
  614. zpci_free_irq(irq);
  615. }
  616. EXPORT_SYMBOL_GPL(free_irq);
  617. static int __init zpci_irq_init(void)
  618. {
  619. int cpu, rc;
  620. bucket = kzalloc(sizeof(*bucket), GFP_KERNEL);
  621. if (!bucket)
  622. return -ENOMEM;
  623. bucket->aisb = (unsigned long *) get_zeroed_page(GFP_KERNEL);
  624. if (!bucket->aisb) {
  625. rc = -ENOMEM;
  626. goto out_aisb;
  627. }
  628. bucket->alloc = (unsigned long *) get_zeroed_page(GFP_KERNEL);
  629. if (!bucket->alloc) {
  630. rc = -ENOMEM;
  631. goto out_alloc;
  632. }
  633. isc_register(PCI_ISC);
  634. zpci_irq_si = s390_register_adapter_interrupt(&zpci_irq_handler, NULL, PCI_ISC);
  635. if (IS_ERR(zpci_irq_si)) {
  636. rc = PTR_ERR(zpci_irq_si);
  637. zpci_irq_si = NULL;
  638. goto out_ai;
  639. }
  640. for_each_online_cpu(cpu)
  641. per_cpu(next_sbit, cpu) = 0;
  642. spin_lock_init(&bucket->lock);
  643. /* set summary to 1 to be called every time for the ISC */
  644. *zpci_irq_si = 1;
  645. sic_instr(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  646. return 0;
  647. out_ai:
  648. isc_unregister(PCI_ISC);
  649. free_page((unsigned long) bucket->alloc);
  650. out_alloc:
  651. free_page((unsigned long) bucket->aisb);
  652. out_aisb:
  653. kfree(bucket);
  654. return rc;
  655. }
  656. static void zpci_irq_exit(void)
  657. {
  658. free_page((unsigned long) bucket->alloc);
  659. free_page((unsigned long) bucket->aisb);
  660. s390_unregister_adapter_interrupt(zpci_irq_si, PCI_ISC);
  661. isc_unregister(PCI_ISC);
  662. kfree(bucket);
  663. }
  664. void zpci_debug_info(struct zpci_dev *zdev, struct seq_file *m)
  665. {
  666. if (!zdev)
  667. return;
  668. seq_printf(m, "global irq retries: %u\n", atomic_read(&irq_retries));
  669. seq_printf(m, "aibv[0]:%016lx aibv[1]:%016lx aisb:%016lx\n",
  670. get_imap(0)->aibv, get_imap(1)->aibv, *bucket->aisb);
  671. }
  672. static struct resource *zpci_alloc_bus_resource(unsigned long start, unsigned long size,
  673. unsigned long flags, int domain)
  674. {
  675. struct resource *r;
  676. char *name;
  677. int rc;
  678. r = kzalloc(sizeof(*r), GFP_KERNEL);
  679. if (!r)
  680. return ERR_PTR(-ENOMEM);
  681. r->start = start;
  682. r->end = r->start + size - 1;
  683. r->flags = flags;
  684. r->parent = &iomem_resource;
  685. name = kmalloc(18, GFP_KERNEL);
  686. if (!name) {
  687. kfree(r);
  688. return ERR_PTR(-ENOMEM);
  689. }
  690. sprintf(name, "PCI Bus: %04x:%02x", domain, ZPCI_BUS_NR);
  691. r->name = name;
  692. rc = request_resource(&iomem_resource, r);
  693. if (rc)
  694. pr_debug("request resource %pR failed\n", r);
  695. return r;
  696. }
  697. static int zpci_alloc_iomap(struct zpci_dev *zdev)
  698. {
  699. int entry;
  700. spin_lock(&zpci_iomap_lock);
  701. entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  702. if (entry == ZPCI_IOMAP_MAX_ENTRIES) {
  703. spin_unlock(&zpci_iomap_lock);
  704. return -ENOSPC;
  705. }
  706. set_bit(entry, zpci_iomap);
  707. spin_unlock(&zpci_iomap_lock);
  708. return entry;
  709. }
  710. static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
  711. {
  712. spin_lock(&zpci_iomap_lock);
  713. memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
  714. clear_bit(entry, zpci_iomap);
  715. spin_unlock(&zpci_iomap_lock);
  716. }
  717. static int zpci_create_device_bus(struct zpci_dev *zdev)
  718. {
  719. struct resource *res;
  720. LIST_HEAD(resources);
  721. int i;
  722. /* allocate mapping entry for each used bar */
  723. for (i = 0; i < PCI_BAR_COUNT; i++) {
  724. unsigned long addr, size, flags;
  725. int entry;
  726. if (!zdev->bars[i].size)
  727. continue;
  728. entry = zpci_alloc_iomap(zdev);
  729. if (entry < 0)
  730. return entry;
  731. zdev->bars[i].map_idx = entry;
  732. /* only MMIO is supported */
  733. flags = IORESOURCE_MEM;
  734. if (zdev->bars[i].val & 8)
  735. flags |= IORESOURCE_PREFETCH;
  736. if (zdev->bars[i].val & 4)
  737. flags |= IORESOURCE_MEM_64;
  738. addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48);
  739. size = 1UL << zdev->bars[i].size;
  740. res = zpci_alloc_bus_resource(addr, size, flags, zdev->domain);
  741. if (IS_ERR(res)) {
  742. zpci_free_iomap(zdev, entry);
  743. return PTR_ERR(res);
  744. }
  745. pci_add_resource(&resources, res);
  746. }
  747. zdev->bus = pci_create_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops,
  748. zdev, &resources);
  749. if (!zdev->bus)
  750. return -EIO;
  751. zdev->bus->max_bus_speed = zdev->max_bus_speed;
  752. return 0;
  753. }
  754. static int zpci_alloc_domain(struct zpci_dev *zdev)
  755. {
  756. spin_lock(&zpci_domain_lock);
  757. zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
  758. if (zdev->domain == ZPCI_NR_DEVICES) {
  759. spin_unlock(&zpci_domain_lock);
  760. return -ENOSPC;
  761. }
  762. set_bit(zdev->domain, zpci_domain);
  763. spin_unlock(&zpci_domain_lock);
  764. return 0;
  765. }
  766. static void zpci_free_domain(struct zpci_dev *zdev)
  767. {
  768. spin_lock(&zpci_domain_lock);
  769. clear_bit(zdev->domain, zpci_domain);
  770. spin_unlock(&zpci_domain_lock);
  771. }
  772. int zpci_enable_device(struct zpci_dev *zdev)
  773. {
  774. int rc;
  775. rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
  776. if (rc)
  777. goto out;
  778. pr_info("Enabled fh: 0x%x fid: 0x%x\n", zdev->fh, zdev->fid);
  779. rc = zpci_dma_init_device(zdev);
  780. if (rc)
  781. goto out_dma;
  782. return 0;
  783. out_dma:
  784. clp_disable_fh(zdev);
  785. out:
  786. return rc;
  787. }
  788. EXPORT_SYMBOL_GPL(zpci_enable_device);
  789. int zpci_create_device(struct zpci_dev *zdev)
  790. {
  791. int rc;
  792. rc = zpci_alloc_domain(zdev);
  793. if (rc)
  794. goto out;
  795. rc = zpci_create_device_bus(zdev);
  796. if (rc)
  797. goto out_bus;
  798. mutex_lock(&zpci_list_lock);
  799. list_add_tail(&zdev->entry, &zpci_list);
  800. if (hotplug_ops)
  801. hotplug_ops->create_slot(zdev);
  802. mutex_unlock(&zpci_list_lock);
  803. if (zdev->state == ZPCI_FN_STATE_STANDBY)
  804. return 0;
  805. rc = zpci_enable_device(zdev);
  806. if (rc)
  807. goto out_start;
  808. return 0;
  809. out_start:
  810. mutex_lock(&zpci_list_lock);
  811. list_del(&zdev->entry);
  812. if (hotplug_ops)
  813. hotplug_ops->remove_slot(zdev);
  814. mutex_unlock(&zpci_list_lock);
  815. out_bus:
  816. zpci_free_domain(zdev);
  817. out:
  818. return rc;
  819. }
  820. void zpci_stop_device(struct zpci_dev *zdev)
  821. {
  822. zpci_dma_exit_device(zdev);
  823. /*
  824. * Note: SCLP disables fh via set-pci-fn so don't
  825. * do that here.
  826. */
  827. }
  828. EXPORT_SYMBOL_GPL(zpci_stop_device);
  829. int zpci_scan_device(struct zpci_dev *zdev)
  830. {
  831. zdev->pdev = pci_scan_single_device(zdev->bus, ZPCI_DEVFN);
  832. if (!zdev->pdev) {
  833. pr_err("pci_scan_single_device failed for fid: 0x%x\n",
  834. zdev->fid);
  835. goto out;
  836. }
  837. zpci_debug_init_device(zdev);
  838. zpci_fmb_enable_device(zdev);
  839. zpci_map_resources(zdev);
  840. pci_bus_add_devices(zdev->bus);
  841. /* now that pdev was added to the bus mark it as used */
  842. zdev->state = ZPCI_FN_STATE_ONLINE;
  843. return 0;
  844. out:
  845. zpci_dma_exit_device(zdev);
  846. clp_disable_fh(zdev);
  847. return -EIO;
  848. }
  849. EXPORT_SYMBOL_GPL(zpci_scan_device);
  850. static inline int barsize(u8 size)
  851. {
  852. return (size) ? (1 << size) >> 10 : 0;
  853. }
  854. static int zpci_mem_init(void)
  855. {
  856. zdev_irq_cache = kmem_cache_create("PCI_IRQ_cache", sizeof(struct zdev_irq_map),
  857. L1_CACHE_BYTES, SLAB_HWCACHE_ALIGN, NULL);
  858. if (!zdev_irq_cache)
  859. goto error_zdev;
  860. zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
  861. 16, 0, NULL);
  862. if (!zdev_fmb_cache)
  863. goto error_fmb;
  864. /* TODO: use realloc */
  865. zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start),
  866. GFP_KERNEL);
  867. if (!zpci_iomap_start)
  868. goto error_iomap;
  869. return 0;
  870. error_iomap:
  871. kmem_cache_destroy(zdev_fmb_cache);
  872. error_fmb:
  873. kmem_cache_destroy(zdev_irq_cache);
  874. error_zdev:
  875. return -ENOMEM;
  876. }
  877. static void zpci_mem_exit(void)
  878. {
  879. kfree(zpci_iomap_start);
  880. kmem_cache_destroy(zdev_irq_cache);
  881. kmem_cache_destroy(zdev_fmb_cache);
  882. }
  883. void zpci_register_hp_ops(struct pci_hp_callback_ops *ops)
  884. {
  885. mutex_lock(&zpci_list_lock);
  886. hotplug_ops = ops;
  887. mutex_unlock(&zpci_list_lock);
  888. }
  889. EXPORT_SYMBOL_GPL(zpci_register_hp_ops);
  890. void zpci_deregister_hp_ops(void)
  891. {
  892. mutex_lock(&zpci_list_lock);
  893. hotplug_ops = NULL;
  894. mutex_unlock(&zpci_list_lock);
  895. }
  896. EXPORT_SYMBOL_GPL(zpci_deregister_hp_ops);
  897. unsigned int s390_pci_probe = 1;
  898. EXPORT_SYMBOL_GPL(s390_pci_probe);
  899. char * __init pcibios_setup(char *str)
  900. {
  901. if (!strcmp(str, "off")) {
  902. s390_pci_probe = 0;
  903. return NULL;
  904. }
  905. return str;
  906. }
  907. static int __init pci_base_init(void)
  908. {
  909. int rc;
  910. if (!s390_pci_probe)
  911. return 0;
  912. if (!test_facility(2) || !test_facility(69)
  913. || !test_facility(71) || !test_facility(72))
  914. return 0;
  915. pr_info("Probing PCI hardware: PCI:%d SID:%d AEN:%d\n",
  916. test_facility(69), test_facility(70),
  917. test_facility(71));
  918. rc = zpci_debug_init();
  919. if (rc)
  920. return rc;
  921. rc = zpci_mem_init();
  922. if (rc)
  923. goto out_mem;
  924. rc = zpci_msihash_init();
  925. if (rc)
  926. goto out_hash;
  927. rc = zpci_irq_init();
  928. if (rc)
  929. goto out_irq;
  930. rc = zpci_dma_init();
  931. if (rc)
  932. goto out_dma;
  933. rc = clp_find_pci_devices();
  934. if (rc)
  935. goto out_find;
  936. zpci_scan_devices();
  937. return 0;
  938. out_find:
  939. zpci_dma_exit();
  940. out_dma:
  941. zpci_irq_exit();
  942. out_irq:
  943. zpci_msihash_exit();
  944. out_hash:
  945. zpci_mem_exit();
  946. out_mem:
  947. zpci_debug_exit();
  948. return rc;
  949. }
  950. subsys_initcall(pci_base_init);